setup_64.c revision b160544cccb403310cf38ddb3ebc156ea454848a
1/*
2 *
3 * Common boot and setup code.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 *      This program is free software; you can redistribute it and/or
8 *      modify it under the terms of the GNU General Public License
9 *      as published by the Free Software Foundation; either version
10 *      2 of the License, or (at your option) any later version.
11 */
12
13#undef DEBUG
14
15#include <linux/module.h>
16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/delay.h>
22#include <linux/initrd.h>
23#include <linux/seq_file.h>
24#include <linux/ioport.h>
25#include <linux/console.h>
26#include <linux/utsname.h>
27#include <linux/tty.h>
28#include <linux/root_dev.h>
29#include <linux/notifier.h>
30#include <linux/cpu.h>
31#include <linux/unistd.h>
32#include <linux/serial.h>
33#include <linux/serial_8250.h>
34#include <linux/bootmem.h>
35#include <linux/pci.h>
36#include <linux/lockdep.h>
37#include <linux/lmb.h>
38#include <asm/io.h>
39#include <asm/kdump.h>
40#include <asm/prom.h>
41#include <asm/processor.h>
42#include <asm/pgtable.h>
43#include <asm/smp.h>
44#include <asm/elf.h>
45#include <asm/machdep.h>
46#include <asm/paca.h>
47#include <asm/time.h>
48#include <asm/cputable.h>
49#include <asm/sections.h>
50#include <asm/btext.h>
51#include <asm/nvram.h>
52#include <asm/setup.h>
53#include <asm/system.h>
54#include <asm/rtas.h>
55#include <asm/iommu.h>
56#include <asm/serial.h>
57#include <asm/cache.h>
58#include <asm/page.h>
59#include <asm/mmu.h>
60#include <asm/firmware.h>
61#include <asm/xmon.h>
62#include <asm/udbg.h>
63#include <asm/kexec.h>
64
65#include "setup.h"
66
67#ifdef DEBUG
68#define DBG(fmt...) udbg_printf(fmt)
69#else
70#define DBG(fmt...)
71#endif
72
73int have_of = 1;
74int boot_cpuid = 0;
75u64 ppc64_pft_size;
76
77/* Pick defaults since we might want to patch instructions
78 * before we've read this from the device tree.
79 */
80struct ppc64_caches ppc64_caches = {
81	.dline_size = 0x40,
82	.log_dline_size = 6,
83	.iline_size = 0x40,
84	.log_iline_size = 6
85};
86EXPORT_SYMBOL_GPL(ppc64_caches);
87
88/*
89 * These are used in binfmt_elf.c to put aux entries on the stack
90 * for each elf executable being started.
91 */
92int dcache_bsize;
93int icache_bsize;
94int ucache_bsize;
95
96#ifdef CONFIG_SMP
97
98static int smt_enabled_cmdline;
99
100/* Look for ibm,smt-enabled OF option */
101static void check_smt_enabled(void)
102{
103	struct device_node *dn;
104	const char *smt_option;
105
106	/* Allow the command line to overrule the OF option */
107	if (smt_enabled_cmdline)
108		return;
109
110	dn = of_find_node_by_path("/options");
111
112	if (dn) {
113		smt_option = of_get_property(dn, "ibm,smt-enabled", NULL);
114
115                if (smt_option) {
116			if (!strcmp(smt_option, "on"))
117				smt_enabled_at_boot = 1;
118			else if (!strcmp(smt_option, "off"))
119				smt_enabled_at_boot = 0;
120                }
121        }
122}
123
124/* Look for smt-enabled= cmdline option */
125static int __init early_smt_enabled(char *p)
126{
127	smt_enabled_cmdline = 1;
128
129	if (!p)
130		return 0;
131
132	if (!strcmp(p, "on") || !strcmp(p, "1"))
133		smt_enabled_at_boot = 1;
134	else if (!strcmp(p, "off") || !strcmp(p, "0"))
135		smt_enabled_at_boot = 0;
136
137	return 0;
138}
139early_param("smt-enabled", early_smt_enabled);
140
141#else
142#define check_smt_enabled()
143#endif /* CONFIG_SMP */
144
145/* Put the paca pointer into r13 and SPRG3 */
146void __init setup_paca(int cpu)
147{
148	local_paca = &paca[cpu];
149	mtspr(SPRN_SPRG3, local_paca);
150}
151
152/*
153 * Early initialization entry point. This is called by head.S
154 * with MMU translation disabled. We rely on the "feature" of
155 * the CPU that ignores the top 2 bits of the address in real
156 * mode so we can access kernel globals normally provided we
157 * only toy with things in the RMO region. From here, we do
158 * some early parsing of the device-tree to setup out LMB
159 * data structures, and allocate & initialize the hash table
160 * and segment tables so we can start running with translation
161 * enabled.
162 *
163 * It is this function which will call the probe() callback of
164 * the various platform types and copy the matching one to the
165 * global ppc_md structure. Your platform can eventually do
166 * some very early initializations from the probe() routine, but
167 * this is not recommended, be very careful as, for example, the
168 * device-tree is not accessible via normal means at this point.
169 */
170
171void __init early_setup(unsigned long dt_ptr)
172{
173	/* -------- printk is _NOT_ safe to use here ! ------- */
174
175	/* Fill in any unititialised pacas */
176	initialise_pacas();
177
178	/* Identify CPU type */
179	identify_cpu(0, mfspr(SPRN_PVR));
180
181	/* Assume we're on cpu 0 for now. Don't write to the paca yet! */
182	setup_paca(0);
183
184	/* Initialize lockdep early or else spinlocks will blow */
185	lockdep_init();
186
187	/* -------- printk is now safe to use ------- */
188
189	/* Enable early debugging if any specified (see udbg.h) */
190	udbg_early_init();
191
192 	DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
193
194	/*
195	 * Do early initialization using the flattened device
196	 * tree, such as retrieving the physical memory map or
197	 * calculating/retrieving the hash table size.
198	 */
199	early_init_devtree(__va(dt_ptr));
200
201	/* Now we know the logical id of our boot cpu, setup the paca. */
202	setup_paca(boot_cpuid);
203
204	/* Fix up paca fields required for the boot cpu */
205	get_paca()->cpu_start = 1;
206	get_paca()->stab_real = __pa((u64)&initial_stab);
207	get_paca()->stab_addr = (u64)&initial_stab;
208
209	/* Probe the machine type */
210	probe_machine();
211
212	setup_kdump_trampoline();
213
214	DBG("Found, Initializing memory management...\n");
215
216	/*
217	 * Initialize the MMU Hash table and create the linear mapping
218	 * of memory. Has to be done before stab/slb initialization as
219	 * this is currently where the page size encoding is obtained
220	 */
221	htab_initialize();
222
223	/*
224	 * Initialize stab / SLB management except on iSeries
225	 */
226	if (cpu_has_feature(CPU_FTR_SLB))
227		slb_initialize();
228	else if (!firmware_has_feature(FW_FEATURE_ISERIES))
229		stab_initialize(get_paca()->stab_real);
230
231	DBG(" <- early_setup()\n");
232}
233
234#ifdef CONFIG_SMP
235void early_setup_secondary(void)
236{
237	struct paca_struct *lpaca = get_paca();
238
239	/* Mark interrupts enabled in PACA */
240	lpaca->soft_enabled = 0;
241
242	/* Initialize hash table for that CPU */
243	htab_initialize_secondary();
244
245	/* Initialize STAB/SLB. We use a virtual address as it works
246	 * in real mode on pSeries and we want a virutal address on
247	 * iSeries anyway
248	 */
249	if (cpu_has_feature(CPU_FTR_SLB))
250		slb_initialize();
251	else
252		stab_initialize(lpaca->stab_addr);
253}
254
255#endif /* CONFIG_SMP */
256
257#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
258extern unsigned long __secondary_hold_spinloop;
259extern void generic_secondary_smp_init(void);
260
261void smp_release_cpus(void)
262{
263	unsigned long *ptr;
264
265	DBG(" -> smp_release_cpus()\n");
266
267	/* All secondary cpus are spinning on a common spinloop, release them
268	 * all now so they can start to spin on their individual paca
269	 * spinloops. For non SMP kernels, the secondary cpus never get out
270	 * of the common spinloop.
271	 */
272
273	ptr  = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
274			- PHYSICAL_START);
275	*ptr = __pa(generic_secondary_smp_init);
276	mb();
277
278	DBG(" <- smp_release_cpus()\n");
279}
280#endif /* CONFIG_SMP || CONFIG_KEXEC */
281
282/*
283 * Initialize some remaining members of the ppc64_caches and systemcfg
284 * structures
285 * (at least until we get rid of them completely). This is mostly some
286 * cache informations about the CPU that will be used by cache flush
287 * routines and/or provided to userland
288 */
289static void __init initialize_cache_info(void)
290{
291	struct device_node *np;
292	unsigned long num_cpus = 0;
293
294	DBG(" -> initialize_cache_info()\n");
295
296	for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
297		num_cpus += 1;
298
299		/* We're assuming *all* of the CPUs have the same
300		 * d-cache and i-cache sizes... -Peter
301		 */
302
303		if ( num_cpus == 1 ) {
304			const u32 *sizep, *lsizep;
305			u32 size, lsize;
306
307			size = 0;
308			lsize = cur_cpu_spec->dcache_bsize;
309			sizep = of_get_property(np, "d-cache-size", NULL);
310			if (sizep != NULL)
311				size = *sizep;
312			lsizep = of_get_property(np, "d-cache-block-size", NULL);
313			/* fallback if block size missing */
314			if (lsizep == NULL)
315				lsizep = of_get_property(np, "d-cache-line-size", NULL);
316			if (lsizep != NULL)
317				lsize = *lsizep;
318			if (sizep == 0 || lsizep == 0)
319				DBG("Argh, can't find dcache properties ! "
320				    "sizep: %p, lsizep: %p\n", sizep, lsizep);
321
322			ppc64_caches.dsize = size;
323			ppc64_caches.dline_size = lsize;
324			ppc64_caches.log_dline_size = __ilog2(lsize);
325			ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
326
327			size = 0;
328			lsize = cur_cpu_spec->icache_bsize;
329			sizep = of_get_property(np, "i-cache-size", NULL);
330			if (sizep != NULL)
331				size = *sizep;
332			lsizep = of_get_property(np, "i-cache-block-size", NULL);
333			if (lsizep == NULL)
334				lsizep = of_get_property(np, "i-cache-line-size", NULL);
335			if (lsizep != NULL)
336				lsize = *lsizep;
337			if (sizep == 0 || lsizep == 0)
338				DBG("Argh, can't find icache properties ! "
339				    "sizep: %p, lsizep: %p\n", sizep, lsizep);
340
341			ppc64_caches.isize = size;
342			ppc64_caches.iline_size = lsize;
343			ppc64_caches.log_iline_size = __ilog2(lsize);
344			ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
345		}
346	}
347
348	DBG(" <- initialize_cache_info()\n");
349}
350
351
352/*
353 * Do some initial setup of the system.  The parameters are those which
354 * were passed in from the bootloader.
355 */
356void __init setup_system(void)
357{
358	DBG(" -> setup_system()\n");
359
360	/* Apply the CPUs-specific and firmware specific fixups to kernel
361	 * text (nop out sections not relevant to this CPU or this firmware)
362	 */
363	do_feature_fixups(cur_cpu_spec->cpu_features,
364			  &__start___ftr_fixup, &__stop___ftr_fixup);
365	do_feature_fixups(powerpc_firmware_features,
366			  &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
367	do_lwsync_fixups(cur_cpu_spec->cpu_features,
368			 &__start___lwsync_fixup, &__stop___lwsync_fixup);
369
370	/*
371	 * Unflatten the device-tree passed by prom_init or kexec
372	 */
373	unflatten_device_tree();
374
375	/*
376	 * Fill the ppc64_caches & systemcfg structures with informations
377 	 * retrieved from the device-tree.
378	 */
379	initialize_cache_info();
380
381	/*
382	 * Initialize irq remapping subsystem
383	 */
384	irq_early_init();
385
386#ifdef CONFIG_PPC_RTAS
387	/*
388	 * Initialize RTAS if available
389	 */
390	rtas_initialize();
391#endif /* CONFIG_PPC_RTAS */
392
393	/*
394	 * Check if we have an initrd provided via the device-tree
395	 */
396	check_for_initrd();
397
398	/*
399	 * Do some platform specific early initializations, that includes
400	 * setting up the hash table pointers. It also sets up some interrupt-mapping
401	 * related options that will be used by finish_device_tree()
402	 */
403	if (ppc_md.init_early)
404		ppc_md.init_early();
405
406 	/*
407	 * We can discover serial ports now since the above did setup the
408	 * hash table management for us, thus ioremap works. We do that early
409	 * so that further code can be debugged
410	 */
411	find_legacy_serial_ports();
412
413	/*
414	 * Register early console
415	 */
416	register_early_udbg_console();
417
418	/*
419	 * Initialize xmon
420	 */
421	xmon_setup();
422
423	check_smt_enabled();
424	smp_setup_cpu_maps();
425
426#ifdef CONFIG_SMP
427	/* Release secondary cpus out of their spinloops at 0x60 now that
428	 * we can map physical -> logical CPU ids
429	 */
430	smp_release_cpus();
431#endif
432
433	printk("Starting Linux PPC64 %s\n", init_utsname()->version);
434
435	printk("-----------------------------------------------------\n");
436	printk("ppc64_pft_size                = 0x%lx\n", ppc64_pft_size);
437	printk("physicalMemorySize            = 0x%lx\n", lmb_phys_mem_size());
438	if (ppc64_caches.dline_size != 0x80)
439		printk("ppc64_caches.dcache_line_size = 0x%x\n",
440		       ppc64_caches.dline_size);
441	if (ppc64_caches.iline_size != 0x80)
442		printk("ppc64_caches.icache_line_size = 0x%x\n",
443		       ppc64_caches.iline_size);
444	if (htab_address)
445		printk("htab_address                  = 0x%p\n", htab_address);
446	printk("htab_hash_mask                = 0x%lx\n", htab_hash_mask);
447	if (PHYSICAL_START > 0)
448		printk("physical_start                = 0x%lx\n",
449		       PHYSICAL_START);
450	printk("-----------------------------------------------------\n");
451
452	DBG(" <- setup_system()\n");
453}
454
455#ifdef CONFIG_IRQSTACKS
456static void __init irqstack_early_init(void)
457{
458	unsigned int i;
459
460	/*
461	 * interrupt stacks must be under 256MB, we cannot afford to take
462	 * SLB misses on them.
463	 */
464	for_each_possible_cpu(i) {
465		softirq_ctx[i] = (struct thread_info *)
466			__va(lmb_alloc_base(THREAD_SIZE,
467					    THREAD_SIZE, 0x10000000));
468		hardirq_ctx[i] = (struct thread_info *)
469			__va(lmb_alloc_base(THREAD_SIZE,
470					    THREAD_SIZE, 0x10000000));
471	}
472}
473#else
474#define irqstack_early_init()
475#endif
476
477/*
478 * Stack space used when we detect a bad kernel stack pointer, and
479 * early in SMP boots before relocation is enabled.
480 */
481static void __init emergency_stack_init(void)
482{
483	unsigned long limit;
484	unsigned int i;
485
486	/*
487	 * Emergency stacks must be under 256MB, we cannot afford to take
488	 * SLB misses on them. The ABI also requires them to be 128-byte
489	 * aligned.
490	 *
491	 * Since we use these as temporary stacks during secondary CPU
492	 * bringup, we need to get at them in real mode. This means they
493	 * must also be within the RMO region.
494	 */
495	limit = min(0x10000000UL, lmb.rmo_size);
496
497	for_each_possible_cpu(i) {
498		unsigned long sp;
499		sp  = lmb_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
500		sp += THREAD_SIZE;
501		paca[i].emergency_sp = __va(sp);
502	}
503}
504
505/*
506 * Called into from start_kernel, after lock_kernel has been called.
507 * Initializes bootmem, which is unsed to manage page allocation until
508 * mem_init is called.
509 */
510void __init setup_arch(char **cmdline_p)
511{
512	ppc64_boot_msg(0x12, "Setup Arch");
513
514	*cmdline_p = cmd_line;
515
516	/*
517	 * Set cache line size based on type of cpu as a default.
518	 * Systems with OF can look in the properties on the cpu node(s)
519	 * for a possibly more accurate value.
520	 */
521	dcache_bsize = ppc64_caches.dline_size;
522	icache_bsize = ppc64_caches.iline_size;
523
524	/* reboot on panic */
525	panic_timeout = 180;
526
527	if (ppc_md.panic)
528		setup_panic();
529
530	init_mm.start_code = (unsigned long)_stext;
531	init_mm.end_code = (unsigned long) _etext;
532	init_mm.end_data = (unsigned long) _edata;
533	init_mm.brk = klimit;
534
535	irqstack_early_init();
536	emergency_stack_init();
537
538	stabs_alloc();
539
540	/* set up the bootmem stuff with available memory */
541	do_init_bootmem();
542	sparse_init();
543
544#ifdef CONFIG_DUMMY_CONSOLE
545	conswitchp = &dummy_con;
546#endif
547
548	if (ppc_md.setup_arch)
549		ppc_md.setup_arch();
550
551	paging_init();
552	ppc64_boot_msg(0x15, "Setup Done");
553}
554
555
556/* ToDo: do something useful if ppc_md is not yet setup. */
557#define PPC64_LINUX_FUNCTION 0x0f000000
558#define PPC64_IPL_MESSAGE 0xc0000000
559#define PPC64_TERM_MESSAGE 0xb0000000
560
561static void ppc64_do_msg(unsigned int src, const char *msg)
562{
563	if (ppc_md.progress) {
564		char buf[128];
565
566		sprintf(buf, "%08X\n", src);
567		ppc_md.progress(buf, 0);
568		snprintf(buf, 128, "%s", msg);
569		ppc_md.progress(buf, 0);
570	}
571}
572
573/* Print a boot progress message. */
574void ppc64_boot_msg(unsigned int src, const char *msg)
575{
576	ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
577	printk("[boot]%04x %s\n", src, msg);
578}
579
580/* Print a termination message (print only -- does not stop the kernel) */
581void ppc64_terminate_msg(unsigned int src, const char *msg)
582{
583	ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
584	printk("[terminate]%04x %s\n", src, msg);
585}
586
587void cpu_die(void)
588{
589	if (ppc_md.cpu_die)
590		ppc_md.cpu_die();
591}
592
593#ifdef CONFIG_SMP
594void __init setup_per_cpu_areas(void)
595{
596	int i;
597	unsigned long size;
598	char *ptr;
599
600	/* Copy section for each CPU (we discard the original) */
601	size = ALIGN(__per_cpu_end - __per_cpu_start, PAGE_SIZE);
602#ifdef CONFIG_MODULES
603	if (size < PERCPU_ENOUGH_ROOM)
604		size = PERCPU_ENOUGH_ROOM;
605#endif
606
607	for_each_possible_cpu(i) {
608		ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size);
609		if (!ptr)
610			panic("Cannot allocate cpu data for CPU %d\n", i);
611
612		paca[i].data_offset = ptr - __per_cpu_start;
613		memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
614	}
615}
616#endif
617
618
619#ifdef CONFIG_PPC_INDIRECT_IO
620struct ppc_pci_io ppc_pci_io;
621EXPORT_SYMBOL(ppc_pci_io);
622#endif /* CONFIG_PPC_INDIRECT_IO */
623
624