setup_64.c revision fa61a4e376d2129690c82dfb05b31705a67d6e0b
1/* 2 * 3 * Common boot and setup code. 4 * 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13#undef DEBUG 14 15#include <linux/export.h> 16#include <linux/string.h> 17#include <linux/sched.h> 18#include <linux/init.h> 19#include <linux/kernel.h> 20#include <linux/reboot.h> 21#include <linux/delay.h> 22#include <linux/initrd.h> 23#include <linux/seq_file.h> 24#include <linux/ioport.h> 25#include <linux/console.h> 26#include <linux/utsname.h> 27#include <linux/tty.h> 28#include <linux/root_dev.h> 29#include <linux/notifier.h> 30#include <linux/cpu.h> 31#include <linux/unistd.h> 32#include <linux/serial.h> 33#include <linux/serial_8250.h> 34#include <linux/bootmem.h> 35#include <linux/pci.h> 36#include <linux/lockdep.h> 37#include <linux/memblock.h> 38#include <linux/hugetlb.h> 39 40#include <asm/io.h> 41#include <asm/kdump.h> 42#include <asm/prom.h> 43#include <asm/processor.h> 44#include <asm/pgtable.h> 45#include <asm/smp.h> 46#include <asm/elf.h> 47#include <asm/machdep.h> 48#include <asm/paca.h> 49#include <asm/time.h> 50#include <asm/cputable.h> 51#include <asm/sections.h> 52#include <asm/btext.h> 53#include <asm/nvram.h> 54#include <asm/setup.h> 55#include <asm/rtas.h> 56#include <asm/iommu.h> 57#include <asm/serial.h> 58#include <asm/cache.h> 59#include <asm/page.h> 60#include <asm/mmu.h> 61#include <asm/firmware.h> 62#include <asm/xmon.h> 63#include <asm/udbg.h> 64#include <asm/kexec.h> 65#include <asm/mmu_context.h> 66#include <asm/code-patching.h> 67#include <asm/kvm_ppc.h> 68#include <asm/hugetlb.h> 69 70#include "setup.h" 71 72#ifdef DEBUG 73#define DBG(fmt...) udbg_printf(fmt) 74#else 75#define DBG(fmt...) 76#endif 77 78int boot_cpuid = 0; 79int __initdata spinning_secondaries; 80u64 ppc64_pft_size; 81 82/* Pick defaults since we might want to patch instructions 83 * before we've read this from the device tree. 84 */ 85struct ppc64_caches ppc64_caches = { 86 .dline_size = 0x40, 87 .log_dline_size = 6, 88 .iline_size = 0x40, 89 .log_iline_size = 6 90}; 91EXPORT_SYMBOL_GPL(ppc64_caches); 92 93/* 94 * These are used in binfmt_elf.c to put aux entries on the stack 95 * for each elf executable being started. 96 */ 97int dcache_bsize; 98int icache_bsize; 99int ucache_bsize; 100 101#ifdef CONFIG_SMP 102 103static char *smt_enabled_cmdline; 104 105/* Look for ibm,smt-enabled OF option */ 106static void check_smt_enabled(void) 107{ 108 struct device_node *dn; 109 const char *smt_option; 110 111 /* Default to enabling all threads */ 112 smt_enabled_at_boot = threads_per_core; 113 114 /* Allow the command line to overrule the OF option */ 115 if (smt_enabled_cmdline) { 116 if (!strcmp(smt_enabled_cmdline, "on")) 117 smt_enabled_at_boot = threads_per_core; 118 else if (!strcmp(smt_enabled_cmdline, "off")) 119 smt_enabled_at_boot = 0; 120 else { 121 long smt; 122 int rc; 123 124 rc = strict_strtol(smt_enabled_cmdline, 10, &smt); 125 if (!rc) 126 smt_enabled_at_boot = 127 min(threads_per_core, (int)smt); 128 } 129 } else { 130 dn = of_find_node_by_path("/options"); 131 if (dn) { 132 smt_option = of_get_property(dn, "ibm,smt-enabled", 133 NULL); 134 135 if (smt_option) { 136 if (!strcmp(smt_option, "on")) 137 smt_enabled_at_boot = threads_per_core; 138 else if (!strcmp(smt_option, "off")) 139 smt_enabled_at_boot = 0; 140 } 141 142 of_node_put(dn); 143 } 144 } 145} 146 147/* Look for smt-enabled= cmdline option */ 148static int __init early_smt_enabled(char *p) 149{ 150 smt_enabled_cmdline = p; 151 return 0; 152} 153early_param("smt-enabled", early_smt_enabled); 154 155#else 156#define check_smt_enabled() 157#endif /* CONFIG_SMP */ 158 159/** Fix up paca fields required for the boot cpu */ 160static void fixup_boot_paca(void) 161{ 162 /* The boot cpu is started */ 163 get_paca()->cpu_start = 1; 164 /* Allow percpu accesses to work until we setup percpu data */ 165 get_paca()->data_offset = 0; 166} 167 168/* 169 * Early initialization entry point. This is called by head.S 170 * with MMU translation disabled. We rely on the "feature" of 171 * the CPU that ignores the top 2 bits of the address in real 172 * mode so we can access kernel globals normally provided we 173 * only toy with things in the RMO region. From here, we do 174 * some early parsing of the device-tree to setup out MEMBLOCK 175 * data structures, and allocate & initialize the hash table 176 * and segment tables so we can start running with translation 177 * enabled. 178 * 179 * It is this function which will call the probe() callback of 180 * the various platform types and copy the matching one to the 181 * global ppc_md structure. Your platform can eventually do 182 * some very early initializations from the probe() routine, but 183 * this is not recommended, be very careful as, for example, the 184 * device-tree is not accessible via normal means at this point. 185 */ 186 187void __init early_setup(unsigned long dt_ptr) 188{ 189 static __initdata struct paca_struct boot_paca; 190 191 /* -------- printk is _NOT_ safe to use here ! ------- */ 192 193 /* Identify CPU type */ 194 identify_cpu(0, mfspr(SPRN_PVR)); 195 196 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 197 initialise_paca(&boot_paca, 0); 198 setup_paca(&boot_paca); 199 fixup_boot_paca(); 200 201 /* Initialize lockdep early or else spinlocks will blow */ 202 lockdep_init(); 203 204 /* -------- printk is now safe to use ------- */ 205 206 /* Enable early debugging if any specified (see udbg.h) */ 207 udbg_early_init(); 208 209 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); 210 211 /* 212 * Do early initialization using the flattened device 213 * tree, such as retrieving the physical memory map or 214 * calculating/retrieving the hash table size. 215 */ 216 early_init_devtree(__va(dt_ptr)); 217 218 /* Now we know the logical id of our boot cpu, setup the paca. */ 219 setup_paca(&paca[boot_cpuid]); 220 fixup_boot_paca(); 221 222 /* Probe the machine type */ 223 probe_machine(); 224 225 setup_kdump_trampoline(); 226 227 DBG("Found, Initializing memory management...\n"); 228 229 /* Initialize the hash table or TLB handling */ 230 early_init_mmu(); 231 232 kvm_cma_reserve(); 233 234 /* 235 * Reserve any gigantic pages requested on the command line. 236 * memblock needs to have been initialized by the time this is 237 * called since this will reserve memory. 238 */ 239 reserve_hugetlb_gpages(); 240 241 DBG(" <- early_setup()\n"); 242} 243 244#ifdef CONFIG_SMP 245void early_setup_secondary(void) 246{ 247 /* Mark interrupts enabled in PACA */ 248 get_paca()->soft_enabled = 0; 249 250 /* Initialize the hash table or TLB handling */ 251 early_init_mmu_secondary(); 252} 253 254#endif /* CONFIG_SMP */ 255 256#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 257void smp_release_cpus(void) 258{ 259 unsigned long *ptr; 260 int i; 261 262 DBG(" -> smp_release_cpus()\n"); 263 264 /* All secondary cpus are spinning on a common spinloop, release them 265 * all now so they can start to spin on their individual paca 266 * spinloops. For non SMP kernels, the secondary cpus never get out 267 * of the common spinloop. 268 */ 269 270 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop 271 - PHYSICAL_START); 272 *ptr = __pa(generic_secondary_smp_init); 273 274 /* And wait a bit for them to catch up */ 275 for (i = 0; i < 100000; i++) { 276 mb(); 277 HMT_low(); 278 if (spinning_secondaries == 0) 279 break; 280 udelay(1); 281 } 282 DBG("spinning_secondaries = %d\n", spinning_secondaries); 283 284 DBG(" <- smp_release_cpus()\n"); 285} 286#endif /* CONFIG_SMP || CONFIG_KEXEC */ 287 288/* 289 * Initialize some remaining members of the ppc64_caches and systemcfg 290 * structures 291 * (at least until we get rid of them completely). This is mostly some 292 * cache informations about the CPU that will be used by cache flush 293 * routines and/or provided to userland 294 */ 295static void __init initialize_cache_info(void) 296{ 297 struct device_node *np; 298 unsigned long num_cpus = 0; 299 300 DBG(" -> initialize_cache_info()\n"); 301 302 for_each_node_by_type(np, "cpu") { 303 num_cpus += 1; 304 305 /* 306 * We're assuming *all* of the CPUs have the same 307 * d-cache and i-cache sizes... -Peter 308 */ 309 if (num_cpus == 1) { 310 const u32 *sizep, *lsizep; 311 u32 size, lsize; 312 313 size = 0; 314 lsize = cur_cpu_spec->dcache_bsize; 315 sizep = of_get_property(np, "d-cache-size", NULL); 316 if (sizep != NULL) 317 size = *sizep; 318 lsizep = of_get_property(np, "d-cache-block-size", 319 NULL); 320 /* fallback if block size missing */ 321 if (lsizep == NULL) 322 lsizep = of_get_property(np, 323 "d-cache-line-size", 324 NULL); 325 if (lsizep != NULL) 326 lsize = *lsizep; 327 if (sizep == 0 || lsizep == 0) 328 DBG("Argh, can't find dcache properties ! " 329 "sizep: %p, lsizep: %p\n", sizep, lsizep); 330 331 ppc64_caches.dsize = size; 332 ppc64_caches.dline_size = lsize; 333 ppc64_caches.log_dline_size = __ilog2(lsize); 334 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; 335 336 size = 0; 337 lsize = cur_cpu_spec->icache_bsize; 338 sizep = of_get_property(np, "i-cache-size", NULL); 339 if (sizep != NULL) 340 size = *sizep; 341 lsizep = of_get_property(np, "i-cache-block-size", 342 NULL); 343 if (lsizep == NULL) 344 lsizep = of_get_property(np, 345 "i-cache-line-size", 346 NULL); 347 if (lsizep != NULL) 348 lsize = *lsizep; 349 if (sizep == 0 || lsizep == 0) 350 DBG("Argh, can't find icache properties ! " 351 "sizep: %p, lsizep: %p\n", sizep, lsizep); 352 353 ppc64_caches.isize = size; 354 ppc64_caches.iline_size = lsize; 355 ppc64_caches.log_iline_size = __ilog2(lsize); 356 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; 357 } 358 } 359 360 DBG(" <- initialize_cache_info()\n"); 361} 362 363 364/* 365 * Do some initial setup of the system. The parameters are those which 366 * were passed in from the bootloader. 367 */ 368void __init setup_system(void) 369{ 370 DBG(" -> setup_system()\n"); 371 372 /* Apply the CPUs-specific and firmware specific fixups to kernel 373 * text (nop out sections not relevant to this CPU or this firmware) 374 */ 375 do_feature_fixups(cur_cpu_spec->cpu_features, 376 &__start___ftr_fixup, &__stop___ftr_fixup); 377 do_feature_fixups(cur_cpu_spec->mmu_features, 378 &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); 379 do_feature_fixups(powerpc_firmware_features, 380 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); 381 do_lwsync_fixups(cur_cpu_spec->cpu_features, 382 &__start___lwsync_fixup, &__stop___lwsync_fixup); 383 do_final_fixups(); 384 385 /* 386 * Unflatten the device-tree passed by prom_init or kexec 387 */ 388 unflatten_device_tree(); 389 390 /* 391 * Fill the ppc64_caches & systemcfg structures with informations 392 * retrieved from the device-tree. 393 */ 394 initialize_cache_info(); 395 396#ifdef CONFIG_PPC_RTAS 397 /* 398 * Initialize RTAS if available 399 */ 400 rtas_initialize(); 401#endif /* CONFIG_PPC_RTAS */ 402 403 /* 404 * Check if we have an initrd provided via the device-tree 405 */ 406 check_for_initrd(); 407 408 /* 409 * Do some platform specific early initializations, that includes 410 * setting up the hash table pointers. It also sets up some interrupt-mapping 411 * related options that will be used by finish_device_tree() 412 */ 413 if (ppc_md.init_early) 414 ppc_md.init_early(); 415 416 /* 417 * We can discover serial ports now since the above did setup the 418 * hash table management for us, thus ioremap works. We do that early 419 * so that further code can be debugged 420 */ 421 find_legacy_serial_ports(); 422 423 /* 424 * Register early console 425 */ 426 register_early_udbg_console(); 427 428 /* 429 * Initialize xmon 430 */ 431 xmon_setup(); 432 433 smp_setup_cpu_maps(); 434 check_smt_enabled(); 435 436#ifdef CONFIG_SMP 437 /* Release secondary cpus out of their spinloops at 0x60 now that 438 * we can map physical -> logical CPU ids 439 */ 440 smp_release_cpus(); 441#endif 442 443 printk("Starting Linux PPC64 %s\n", init_utsname()->version); 444 445 printk("-----------------------------------------------------\n"); 446 printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); 447 printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size()); 448 if (ppc64_caches.dline_size != 0x80) 449 printk("ppc64_caches.dcache_line_size = 0x%x\n", 450 ppc64_caches.dline_size); 451 if (ppc64_caches.iline_size != 0x80) 452 printk("ppc64_caches.icache_line_size = 0x%x\n", 453 ppc64_caches.iline_size); 454#ifdef CONFIG_PPC_STD_MMU_64 455 if (htab_address) 456 printk("htab_address = 0x%p\n", htab_address); 457 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); 458#endif /* CONFIG_PPC_STD_MMU_64 */ 459 if (PHYSICAL_START > 0) 460 printk("physical_start = 0x%llx\n", 461 (unsigned long long)PHYSICAL_START); 462 printk("-----------------------------------------------------\n"); 463 464 DBG(" <- setup_system()\n"); 465} 466 467/* This returns the limit below which memory accesses to the linear 468 * mapping are guarnateed not to cause a TLB or SLB miss. This is 469 * used to allocate interrupt or emergency stacks for which our 470 * exception entry path doesn't deal with being interrupted. 471 */ 472static u64 safe_stack_limit(void) 473{ 474#ifdef CONFIG_PPC_BOOK3E 475 /* Freescale BookE bolts the entire linear mapping */ 476 if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) 477 return linear_map_top; 478 /* Other BookE, we assume the first GB is bolted */ 479 return 1ul << 30; 480#else 481 /* BookS, the first segment is bolted */ 482 if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 483 return 1UL << SID_SHIFT_1T; 484 return 1UL << SID_SHIFT; 485#endif 486} 487 488static void __init irqstack_early_init(void) 489{ 490 u64 limit = safe_stack_limit(); 491 unsigned int i; 492 493 /* 494 * Interrupt stacks must be in the first segment since we 495 * cannot afford to take SLB misses on them. 496 */ 497 for_each_possible_cpu(i) { 498 softirq_ctx[i] = (struct thread_info *) 499 __va(memblock_alloc_base(THREAD_SIZE, 500 THREAD_SIZE, limit)); 501 hardirq_ctx[i] = (struct thread_info *) 502 __va(memblock_alloc_base(THREAD_SIZE, 503 THREAD_SIZE, limit)); 504 } 505} 506 507#ifdef CONFIG_PPC_BOOK3E 508static void __init exc_lvl_early_init(void) 509{ 510 extern unsigned int interrupt_base_book3e; 511 extern unsigned int exc_debug_debug_book3e; 512 513 unsigned int i; 514 515 for_each_possible_cpu(i) { 516 critirq_ctx[i] = (struct thread_info *) 517 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 518 dbgirq_ctx[i] = (struct thread_info *) 519 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 520 mcheckirq_ctx[i] = (struct thread_info *) 521 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 522 } 523 524 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) 525 patch_branch(&interrupt_base_book3e + (0x040 / 4) + 1, 526 (unsigned long)&exc_debug_debug_book3e, 0); 527} 528#else 529#define exc_lvl_early_init() 530#endif 531 532/* 533 * Stack space used when we detect a bad kernel stack pointer, and 534 * early in SMP boots before relocation is enabled. 535 */ 536static void __init emergency_stack_init(void) 537{ 538 u64 limit; 539 unsigned int i; 540 541 /* 542 * Emergency stacks must be under 256MB, we cannot afford to take 543 * SLB misses on them. The ABI also requires them to be 128-byte 544 * aligned. 545 * 546 * Since we use these as temporary stacks during secondary CPU 547 * bringup, we need to get at them in real mode. This means they 548 * must also be within the RMO region. 549 */ 550 limit = min(safe_stack_limit(), ppc64_rma_size); 551 552 for_each_possible_cpu(i) { 553 unsigned long sp; 554 sp = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); 555 sp += THREAD_SIZE; 556 paca[i].emergency_sp = __va(sp); 557 } 558} 559 560/* 561 * Called into from start_kernel this initializes bootmem, which is used 562 * to manage page allocation until mem_init is called. 563 */ 564void __init setup_arch(char **cmdline_p) 565{ 566 ppc64_boot_msg(0x12, "Setup Arch"); 567 568 *cmdline_p = cmd_line; 569 570 /* 571 * Set cache line size based on type of cpu as a default. 572 * Systems with OF can look in the properties on the cpu node(s) 573 * for a possibly more accurate value. 574 */ 575 dcache_bsize = ppc64_caches.dline_size; 576 icache_bsize = ppc64_caches.iline_size; 577 578 /* reboot on panic */ 579 panic_timeout = 180; 580 581 if (ppc_md.panic) 582 setup_panic(); 583 584 init_mm.start_code = (unsigned long)_stext; 585 init_mm.end_code = (unsigned long) _etext; 586 init_mm.end_data = (unsigned long) _edata; 587 init_mm.brk = klimit; 588#ifdef CONFIG_PPC_64K_PAGES 589 init_mm.context.pte_frag = NULL; 590#endif 591 irqstack_early_init(); 592 exc_lvl_early_init(); 593 emergency_stack_init(); 594 595#ifdef CONFIG_PPC_STD_MMU_64 596 stabs_alloc(); 597#endif 598 /* set up the bootmem stuff with available memory */ 599 do_init_bootmem(); 600 sparse_init(); 601 602#ifdef CONFIG_DUMMY_CONSOLE 603 conswitchp = &dummy_con; 604#endif 605 606 if (ppc_md.setup_arch) 607 ppc_md.setup_arch(); 608 609 paging_init(); 610 611 /* Initialize the MMU context management stuff */ 612 mmu_context_init(); 613 614 kvm_linear_init(); 615 616 /* Interrupt code needs to be 64K-aligned */ 617 if ((unsigned long)_stext & 0xffff) 618 panic("Kernelbase not 64K-aligned (0x%lx)!\n", 619 (unsigned long)_stext); 620 621 ppc64_boot_msg(0x15, "Setup Done"); 622} 623 624 625/* ToDo: do something useful if ppc_md is not yet setup. */ 626#define PPC64_LINUX_FUNCTION 0x0f000000 627#define PPC64_IPL_MESSAGE 0xc0000000 628#define PPC64_TERM_MESSAGE 0xb0000000 629 630static void ppc64_do_msg(unsigned int src, const char *msg) 631{ 632 if (ppc_md.progress) { 633 char buf[128]; 634 635 sprintf(buf, "%08X\n", src); 636 ppc_md.progress(buf, 0); 637 snprintf(buf, 128, "%s", msg); 638 ppc_md.progress(buf, 0); 639 } 640} 641 642/* Print a boot progress message. */ 643void ppc64_boot_msg(unsigned int src, const char *msg) 644{ 645 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); 646 printk("[boot]%04x %s\n", src, msg); 647} 648 649#ifdef CONFIG_SMP 650#define PCPU_DYN_SIZE () 651 652static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align) 653{ 654 return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align, 655 __pa(MAX_DMA_ADDRESS)); 656} 657 658static void __init pcpu_fc_free(void *ptr, size_t size) 659{ 660 free_bootmem(__pa(ptr), size); 661} 662 663static int pcpu_cpu_distance(unsigned int from, unsigned int to) 664{ 665 if (cpu_to_node(from) == cpu_to_node(to)) 666 return LOCAL_DISTANCE; 667 else 668 return REMOTE_DISTANCE; 669} 670 671unsigned long __per_cpu_offset[NR_CPUS] __read_mostly; 672EXPORT_SYMBOL(__per_cpu_offset); 673 674void __init setup_per_cpu_areas(void) 675{ 676 const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE; 677 size_t atom_size; 678 unsigned long delta; 679 unsigned int cpu; 680 int rc; 681 682 /* 683 * Linear mapping is one of 4K, 1M and 16M. For 4K, no need 684 * to group units. For larger mappings, use 1M atom which 685 * should be large enough to contain a number of units. 686 */ 687 if (mmu_linear_psize == MMU_PAGE_4K) 688 atom_size = PAGE_SIZE; 689 else 690 atom_size = 1 << 20; 691 692 rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance, 693 pcpu_fc_alloc, pcpu_fc_free); 694 if (rc < 0) 695 panic("cannot initialize percpu area (err=%d)", rc); 696 697 delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; 698 for_each_possible_cpu(cpu) { 699 __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu]; 700 paca[cpu].data_offset = __per_cpu_offset[cpu]; 701 } 702} 703#endif 704 705 706#ifdef CONFIG_PPC_INDIRECT_IO 707struct ppc_pci_io ppc_pci_io; 708EXPORT_SYMBOL(ppc_pci_io); 709#endif /* CONFIG_PPC_INDIRECT_IO */ 710 711