setup_64.c revision fd6e7d2d6a0231ebfa08e1f9a323497ea548da7d
1/* 2 * 3 * Common boot and setup code. 4 * 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13#undef DEBUG 14 15#include <linux/module.h> 16#include <linux/string.h> 17#include <linux/sched.h> 18#include <linux/init.h> 19#include <linux/kernel.h> 20#include <linux/reboot.h> 21#include <linux/delay.h> 22#include <linux/initrd.h> 23#include <linux/ide.h> 24#include <linux/seq_file.h> 25#include <linux/ioport.h> 26#include <linux/console.h> 27#include <linux/utsname.h> 28#include <linux/tty.h> 29#include <linux/root_dev.h> 30#include <linux/notifier.h> 31#include <linux/cpu.h> 32#include <linux/unistd.h> 33#include <linux/serial.h> 34#include <linux/serial_8250.h> 35#include <linux/bootmem.h> 36#include <asm/io.h> 37#include <asm/kdump.h> 38#include <asm/prom.h> 39#include <asm/processor.h> 40#include <asm/pgtable.h> 41#include <asm/smp.h> 42#include <asm/elf.h> 43#include <asm/machdep.h> 44#include <asm/paca.h> 45#include <asm/time.h> 46#include <asm/cputable.h> 47#include <asm/sections.h> 48#include <asm/btext.h> 49#include <asm/nvram.h> 50#include <asm/setup.h> 51#include <asm/system.h> 52#include <asm/rtas.h> 53#include <asm/iommu.h> 54#include <asm/serial.h> 55#include <asm/cache.h> 56#include <asm/page.h> 57#include <asm/mmu.h> 58#include <asm/lmb.h> 59#include <asm/firmware.h> 60#include <asm/xmon.h> 61#include <asm/udbg.h> 62#include <asm/kexec.h> 63 64#include "setup.h" 65 66#ifdef DEBUG 67#define DBG(fmt...) udbg_printf(fmt) 68#else 69#define DBG(fmt...) 70#endif 71 72int have_of = 1; 73int boot_cpuid = 0; 74u64 ppc64_pft_size; 75 76/* Pick defaults since we might want to patch instructions 77 * before we've read this from the device tree. 78 */ 79struct ppc64_caches ppc64_caches = { 80 .dline_size = 0x40, 81 .log_dline_size = 6, 82 .iline_size = 0x40, 83 .log_iline_size = 6 84}; 85EXPORT_SYMBOL_GPL(ppc64_caches); 86 87/* 88 * These are used in binfmt_elf.c to put aux entries on the stack 89 * for each elf executable being started. 90 */ 91int dcache_bsize; 92int icache_bsize; 93int ucache_bsize; 94 95#ifdef CONFIG_SMP 96 97static int smt_enabled_cmdline; 98 99/* Look for ibm,smt-enabled OF option */ 100static void check_smt_enabled(void) 101{ 102 struct device_node *dn; 103 const char *smt_option; 104 105 /* Allow the command line to overrule the OF option */ 106 if (smt_enabled_cmdline) 107 return; 108 109 dn = of_find_node_by_path("/options"); 110 111 if (dn) { 112 smt_option = get_property(dn, "ibm,smt-enabled", NULL); 113 114 if (smt_option) { 115 if (!strcmp(smt_option, "on")) 116 smt_enabled_at_boot = 1; 117 else if (!strcmp(smt_option, "off")) 118 smt_enabled_at_boot = 0; 119 } 120 } 121} 122 123/* Look for smt-enabled= cmdline option */ 124static int __init early_smt_enabled(char *p) 125{ 126 smt_enabled_cmdline = 1; 127 128 if (!p) 129 return 0; 130 131 if (!strcmp(p, "on") || !strcmp(p, "1")) 132 smt_enabled_at_boot = 1; 133 else if (!strcmp(p, "off") || !strcmp(p, "0")) 134 smt_enabled_at_boot = 0; 135 136 return 0; 137} 138early_param("smt-enabled", early_smt_enabled); 139 140#else 141#define check_smt_enabled() 142#endif /* CONFIG_SMP */ 143 144/* Put the paca pointer into r13 and SPRG3 */ 145void __init setup_paca(int cpu) 146{ 147 local_paca = &paca[cpu]; 148 mtspr(SPRN_SPRG3, local_paca); 149} 150 151/* 152 * Early initialization entry point. This is called by head.S 153 * with MMU translation disabled. We rely on the "feature" of 154 * the CPU that ignores the top 2 bits of the address in real 155 * mode so we can access kernel globals normally provided we 156 * only toy with things in the RMO region. From here, we do 157 * some early parsing of the device-tree to setup out LMB 158 * data structures, and allocate & initialize the hash table 159 * and segment tables so we can start running with translation 160 * enabled. 161 * 162 * It is this function which will call the probe() callback of 163 * the various platform types and copy the matching one to the 164 * global ppc_md structure. Your platform can eventually do 165 * some very early initializations from the probe() routine, but 166 * this is not recommended, be very careful as, for example, the 167 * device-tree is not accessible via normal means at this point. 168 */ 169 170void __init early_setup(unsigned long dt_ptr) 171{ 172 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 173 setup_paca(0); 174 175 /* Enable early debugging if any specified (see udbg.h) */ 176 udbg_early_init(); 177 178 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); 179 180 /* 181 * Do early initializations using the flattened device 182 * tree, like retreiving the physical memory map or 183 * calculating/retreiving the hash table size 184 */ 185 early_init_devtree(__va(dt_ptr)); 186 187 /* Now we know the logical id of our boot cpu, setup the paca. */ 188 setup_paca(boot_cpuid); 189 190 /* Fix up paca fields required for the boot cpu */ 191 get_paca()->cpu_start = 1; 192 get_paca()->stab_real = __pa((u64)&initial_stab); 193 get_paca()->stab_addr = (u64)&initial_stab; 194 195 /* Probe the machine type */ 196 probe_machine(); 197 198 setup_kdump_trampoline(); 199 200 DBG("Found, Initializing memory management...\n"); 201 202 /* 203 * Initialize the MMU Hash table and create the linear mapping 204 * of memory. Has to be done before stab/slb initialization as 205 * this is currently where the page size encoding is obtained 206 */ 207 htab_initialize(); 208 209 /* 210 * Initialize stab / SLB management except on iSeries 211 */ 212 if (cpu_has_feature(CPU_FTR_SLB)) 213 slb_initialize(); 214 else if (!firmware_has_feature(FW_FEATURE_ISERIES)) 215 stab_initialize(get_paca()->stab_real); 216 217 DBG(" <- early_setup()\n"); 218} 219 220#ifdef CONFIG_SMP 221void early_setup_secondary(void) 222{ 223 struct paca_struct *lpaca = get_paca(); 224 225 /* Mark interrupts enabled in PACA */ 226 lpaca->soft_enabled = 0; 227 228 /* Initialize hash table for that CPU */ 229 htab_initialize_secondary(); 230 231 /* Initialize STAB/SLB. We use a virtual address as it works 232 * in real mode on pSeries and we want a virutal address on 233 * iSeries anyway 234 */ 235 if (cpu_has_feature(CPU_FTR_SLB)) 236 slb_initialize(); 237 else 238 stab_initialize(lpaca->stab_addr); 239} 240 241#endif /* CONFIG_SMP */ 242 243#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 244void smp_release_cpus(void) 245{ 246 extern unsigned long __secondary_hold_spinloop; 247 unsigned long *ptr; 248 249 DBG(" -> smp_release_cpus()\n"); 250 251 /* All secondary cpus are spinning on a common spinloop, release them 252 * all now so they can start to spin on their individual paca 253 * spinloops. For non SMP kernels, the secondary cpus never get out 254 * of the common spinloop. 255 * This is useless but harmless on iSeries, secondaries are already 256 * waiting on their paca spinloops. */ 257 258 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop 259 - PHYSICAL_START); 260 *ptr = 1; 261 mb(); 262 263 DBG(" <- smp_release_cpus()\n"); 264} 265#endif /* CONFIG_SMP || CONFIG_KEXEC */ 266 267/* 268 * Initialize some remaining members of the ppc64_caches and systemcfg 269 * structures 270 * (at least until we get rid of them completely). This is mostly some 271 * cache informations about the CPU that will be used by cache flush 272 * routines and/or provided to userland 273 */ 274static void __init initialize_cache_info(void) 275{ 276 struct device_node *np; 277 unsigned long num_cpus = 0; 278 279 DBG(" -> initialize_cache_info()\n"); 280 281 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { 282 num_cpus += 1; 283 284 /* We're assuming *all* of the CPUs have the same 285 * d-cache and i-cache sizes... -Peter 286 */ 287 288 if ( num_cpus == 1 ) { 289 const u32 *sizep, *lsizep; 290 u32 size, lsize; 291 const char *dc, *ic; 292 293 /* Then read cache informations */ 294 if (machine_is(powermac)) { 295 dc = "d-cache-block-size"; 296 ic = "i-cache-block-size"; 297 } else { 298 dc = "d-cache-line-size"; 299 ic = "i-cache-line-size"; 300 } 301 302 size = 0; 303 lsize = cur_cpu_spec->dcache_bsize; 304 sizep = get_property(np, "d-cache-size", NULL); 305 if (sizep != NULL) 306 size = *sizep; 307 lsizep = get_property(np, dc, NULL); 308 if (lsizep != NULL) 309 lsize = *lsizep; 310 if (sizep == 0 || lsizep == 0) 311 DBG("Argh, can't find dcache properties ! " 312 "sizep: %p, lsizep: %p\n", sizep, lsizep); 313 314 ppc64_caches.dsize = size; 315 ppc64_caches.dline_size = lsize; 316 ppc64_caches.log_dline_size = __ilog2(lsize); 317 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; 318 319 size = 0; 320 lsize = cur_cpu_spec->icache_bsize; 321 sizep = get_property(np, "i-cache-size", NULL); 322 if (sizep != NULL) 323 size = *sizep; 324 lsizep = get_property(np, ic, NULL); 325 if (lsizep != NULL) 326 lsize = *lsizep; 327 if (sizep == 0 || lsizep == 0) 328 DBG("Argh, can't find icache properties ! " 329 "sizep: %p, lsizep: %p\n", sizep, lsizep); 330 331 ppc64_caches.isize = size; 332 ppc64_caches.iline_size = lsize; 333 ppc64_caches.log_iline_size = __ilog2(lsize); 334 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; 335 } 336 } 337 338 DBG(" <- initialize_cache_info()\n"); 339} 340 341 342/* 343 * Do some initial setup of the system. The parameters are those which 344 * were passed in from the bootloader. 345 */ 346void __init setup_system(void) 347{ 348 DBG(" -> setup_system()\n"); 349 350 /* 351 * Unflatten the device-tree passed by prom_init or kexec 352 */ 353 unflatten_device_tree(); 354 355 /* 356 * Fill the ppc64_caches & systemcfg structures with informations 357 * retrieved from the device-tree. 358 */ 359 initialize_cache_info(); 360 361 /* 362 * Initialize irq remapping subsystem 363 */ 364 irq_early_init(); 365 366#ifdef CONFIG_PPC_RTAS 367 /* 368 * Initialize RTAS if available 369 */ 370 rtas_initialize(); 371#endif /* CONFIG_PPC_RTAS */ 372 373 /* 374 * Check if we have an initrd provided via the device-tree 375 */ 376 check_for_initrd(); 377 378 /* 379 * Do some platform specific early initializations, that includes 380 * setting up the hash table pointers. It also sets up some interrupt-mapping 381 * related options that will be used by finish_device_tree() 382 */ 383 ppc_md.init_early(); 384 385 /* 386 * We can discover serial ports now since the above did setup the 387 * hash table management for us, thus ioremap works. We do that early 388 * so that further code can be debugged 389 */ 390 find_legacy_serial_ports(); 391 392 /* 393 * Register early console 394 */ 395 register_early_udbg_console(); 396 397 /* 398 * Initialize xmon 399 */ 400 xmon_setup(); 401 402 check_smt_enabled(); 403 smp_setup_cpu_maps(); 404 405#ifdef CONFIG_SMP 406 /* Release secondary cpus out of their spinloops at 0x60 now that 407 * we can map physical -> logical CPU ids 408 */ 409 smp_release_cpus(); 410#endif 411 412 printk("Starting Linux PPC64 %s\n", init_utsname()->version); 413 414 printk("-----------------------------------------------------\n"); 415 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); 416 printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size()); 417 printk("ppc64_caches.dcache_line_size = 0x%x\n", 418 ppc64_caches.dline_size); 419 printk("ppc64_caches.icache_line_size = 0x%x\n", 420 ppc64_caches.iline_size); 421 printk("htab_address = 0x%p\n", htab_address); 422 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); 423#if PHYSICAL_START > 0 424 printk("physical_start = 0x%x\n", PHYSICAL_START); 425#endif 426 printk("-----------------------------------------------------\n"); 427 428 DBG(" <- setup_system()\n"); 429} 430 431#ifdef CONFIG_IRQSTACKS 432static void __init irqstack_early_init(void) 433{ 434 unsigned int i; 435 436 /* 437 * interrupt stacks must be under 256MB, we cannot afford to take 438 * SLB misses on them. 439 */ 440 for_each_possible_cpu(i) { 441 softirq_ctx[i] = (struct thread_info *) 442 __va(lmb_alloc_base(THREAD_SIZE, 443 THREAD_SIZE, 0x10000000)); 444 hardirq_ctx[i] = (struct thread_info *) 445 __va(lmb_alloc_base(THREAD_SIZE, 446 THREAD_SIZE, 0x10000000)); 447 } 448} 449#else 450#define irqstack_early_init() 451#endif 452 453/* 454 * Stack space used when we detect a bad kernel stack pointer, and 455 * early in SMP boots before relocation is enabled. 456 */ 457static void __init emergency_stack_init(void) 458{ 459 unsigned long limit; 460 unsigned int i; 461 462 /* 463 * Emergency stacks must be under 256MB, we cannot afford to take 464 * SLB misses on them. The ABI also requires them to be 128-byte 465 * aligned. 466 * 467 * Since we use these as temporary stacks during secondary CPU 468 * bringup, we need to get at them in real mode. This means they 469 * must also be within the RMO region. 470 */ 471 limit = min(0x10000000UL, lmb.rmo_size); 472 473 for_each_possible_cpu(i) 474 paca[i].emergency_sp = 475 __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE; 476} 477 478/* 479 * Called into from start_kernel, after lock_kernel has been called. 480 * Initializes bootmem, which is unsed to manage page allocation until 481 * mem_init is called. 482 */ 483void __init setup_arch(char **cmdline_p) 484{ 485 ppc64_boot_msg(0x12, "Setup Arch"); 486 487 *cmdline_p = cmd_line; 488 489 /* 490 * Set cache line size based on type of cpu as a default. 491 * Systems with OF can look in the properties on the cpu node(s) 492 * for a possibly more accurate value. 493 */ 494 dcache_bsize = ppc64_caches.dline_size; 495 icache_bsize = ppc64_caches.iline_size; 496 497 /* reboot on panic */ 498 panic_timeout = 180; 499 500 if (ppc_md.panic) 501 setup_panic(); 502 503 init_mm.start_code = PAGE_OFFSET; 504 init_mm.end_code = (unsigned long) _etext; 505 init_mm.end_data = (unsigned long) _edata; 506 init_mm.brk = klimit; 507 508 irqstack_early_init(); 509 emergency_stack_init(); 510 511 stabs_alloc(); 512 513 /* set up the bootmem stuff with available memory */ 514 do_init_bootmem(); 515 sparse_init(); 516 517#ifdef CONFIG_DUMMY_CONSOLE 518 conswitchp = &dummy_con; 519#endif 520 521 ppc_md.setup_arch(); 522 523 paging_init(); 524 ppc64_boot_msg(0x15, "Setup Done"); 525} 526 527 528/* ToDo: do something useful if ppc_md is not yet setup. */ 529#define PPC64_LINUX_FUNCTION 0x0f000000 530#define PPC64_IPL_MESSAGE 0xc0000000 531#define PPC64_TERM_MESSAGE 0xb0000000 532 533static void ppc64_do_msg(unsigned int src, const char *msg) 534{ 535 if (ppc_md.progress) { 536 char buf[128]; 537 538 sprintf(buf, "%08X\n", src); 539 ppc_md.progress(buf, 0); 540 snprintf(buf, 128, "%s", msg); 541 ppc_md.progress(buf, 0); 542 } 543} 544 545/* Print a boot progress message. */ 546void ppc64_boot_msg(unsigned int src, const char *msg) 547{ 548 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); 549 printk("[boot]%04x %s\n", src, msg); 550} 551 552/* Print a termination message (print only -- does not stop the kernel) */ 553void ppc64_terminate_msg(unsigned int src, const char *msg) 554{ 555 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg); 556 printk("[terminate]%04x %s\n", src, msg); 557} 558 559void cpu_die(void) 560{ 561 if (ppc_md.cpu_die) 562 ppc_md.cpu_die(); 563} 564 565#ifdef CONFIG_SMP 566void __init setup_per_cpu_areas(void) 567{ 568 int i; 569 unsigned long size; 570 char *ptr; 571 572 /* Copy section for each CPU (we discard the original) */ 573 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES); 574#ifdef CONFIG_MODULES 575 if (size < PERCPU_ENOUGH_ROOM) 576 size = PERCPU_ENOUGH_ROOM; 577#endif 578 579 for_each_possible_cpu(i) { 580 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size); 581 if (!ptr) 582 panic("Cannot allocate cpu data for CPU %d\n", i); 583 584 paca[i].data_offset = ptr - __per_cpu_start; 585 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); 586 } 587} 588#endif 589