book3s_emulate.c revision 95327d08fd5fc686b35ac21050a1b74f9bce3abe
1/* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14 * 15 * Copyright SUSE Linux Products GmbH 2009 16 * 17 * Authors: Alexander Graf <agraf@suse.de> 18 */ 19 20#include <asm/kvm_ppc.h> 21#include <asm/disassemble.h> 22#include <asm/kvm_book3s.h> 23#include <asm/reg.h> 24#include <asm/switch_to.h> 25 26#define OP_19_XOP_RFID 18 27#define OP_19_XOP_RFI 50 28 29#define OP_31_XOP_MFMSR 83 30#define OP_31_XOP_MTMSR 146 31#define OP_31_XOP_MTMSRD 178 32#define OP_31_XOP_MTSR 210 33#define OP_31_XOP_MTSRIN 242 34#define OP_31_XOP_TLBIEL 274 35#define OP_31_XOP_TLBIE 306 36#define OP_31_XOP_SLBMTE 402 37#define OP_31_XOP_SLBIE 434 38#define OP_31_XOP_SLBIA 498 39#define OP_31_XOP_MFSR 595 40#define OP_31_XOP_MFSRIN 659 41#define OP_31_XOP_DCBA 758 42#define OP_31_XOP_SLBMFEV 851 43#define OP_31_XOP_EIOIO 854 44#define OP_31_XOP_SLBMFEE 915 45 46/* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */ 47#define OP_31_XOP_DCBZ 1010 48 49#define OP_LFS 48 50#define OP_LFD 50 51#define OP_STFS 52 52#define OP_STFD 54 53 54#define SPRN_GQR0 912 55#define SPRN_GQR1 913 56#define SPRN_GQR2 914 57#define SPRN_GQR3 915 58#define SPRN_GQR4 916 59#define SPRN_GQR5 917 60#define SPRN_GQR6 918 61#define SPRN_GQR7 919 62 63/* Book3S_32 defines mfsrin(v) - but that messes up our abstract 64 * function pointers, so let's just disable the define. */ 65#undef mfsrin 66 67enum priv_level { 68 PRIV_PROBLEM = 0, 69 PRIV_SUPER = 1, 70 PRIV_HYPER = 2, 71}; 72 73static bool spr_allowed(struct kvm_vcpu *vcpu, enum priv_level level) 74{ 75 /* PAPR VMs only access supervisor SPRs */ 76 if (vcpu->arch.papr_enabled && (level > PRIV_SUPER)) 77 return false; 78 79 /* Limit user space to its own small SPR set */ 80 if ((vcpu->arch.shared->msr & MSR_PR) && level > PRIV_PROBLEM) 81 return false; 82 83 return true; 84} 85 86int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, 87 unsigned int inst, int *advance) 88{ 89 int emulated = EMULATE_DONE; 90 91 switch (get_op(inst)) { 92 case 19: 93 switch (get_xop(inst)) { 94 case OP_19_XOP_RFID: 95 case OP_19_XOP_RFI: 96 kvmppc_set_pc(vcpu, vcpu->arch.shared->srr0); 97 kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1); 98 *advance = 0; 99 break; 100 101 default: 102 emulated = EMULATE_FAIL; 103 break; 104 } 105 break; 106 case 31: 107 switch (get_xop(inst)) { 108 case OP_31_XOP_MFMSR: 109 kvmppc_set_gpr(vcpu, get_rt(inst), 110 vcpu->arch.shared->msr); 111 break; 112 case OP_31_XOP_MTMSRD: 113 { 114 ulong rs = kvmppc_get_gpr(vcpu, get_rs(inst)); 115 if (inst & 0x10000) { 116 vcpu->arch.shared->msr &= ~(MSR_RI | MSR_EE); 117 vcpu->arch.shared->msr |= rs & (MSR_RI | MSR_EE); 118 } else 119 kvmppc_set_msr(vcpu, rs); 120 break; 121 } 122 case OP_31_XOP_MTMSR: 123 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst))); 124 break; 125 case OP_31_XOP_MFSR: 126 { 127 int srnum; 128 129 srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32); 130 if (vcpu->arch.mmu.mfsrin) { 131 u32 sr; 132 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum); 133 kvmppc_set_gpr(vcpu, get_rt(inst), sr); 134 } 135 break; 136 } 137 case OP_31_XOP_MFSRIN: 138 { 139 int srnum; 140 141 srnum = (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf; 142 if (vcpu->arch.mmu.mfsrin) { 143 u32 sr; 144 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum); 145 kvmppc_set_gpr(vcpu, get_rt(inst), sr); 146 } 147 break; 148 } 149 case OP_31_XOP_MTSR: 150 vcpu->arch.mmu.mtsrin(vcpu, 151 (inst >> 16) & 0xf, 152 kvmppc_get_gpr(vcpu, get_rs(inst))); 153 break; 154 case OP_31_XOP_MTSRIN: 155 vcpu->arch.mmu.mtsrin(vcpu, 156 (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf, 157 kvmppc_get_gpr(vcpu, get_rs(inst))); 158 break; 159 case OP_31_XOP_TLBIE: 160 case OP_31_XOP_TLBIEL: 161 { 162 bool large = (inst & 0x00200000) ? true : false; 163 ulong addr = kvmppc_get_gpr(vcpu, get_rb(inst)); 164 vcpu->arch.mmu.tlbie(vcpu, addr, large); 165 break; 166 } 167 case OP_31_XOP_EIOIO: 168 break; 169 case OP_31_XOP_SLBMTE: 170 if (!vcpu->arch.mmu.slbmte) 171 return EMULATE_FAIL; 172 173 vcpu->arch.mmu.slbmte(vcpu, 174 kvmppc_get_gpr(vcpu, get_rs(inst)), 175 kvmppc_get_gpr(vcpu, get_rb(inst))); 176 break; 177 case OP_31_XOP_SLBIE: 178 if (!vcpu->arch.mmu.slbie) 179 return EMULATE_FAIL; 180 181 vcpu->arch.mmu.slbie(vcpu, 182 kvmppc_get_gpr(vcpu, get_rb(inst))); 183 break; 184 case OP_31_XOP_SLBIA: 185 if (!vcpu->arch.mmu.slbia) 186 return EMULATE_FAIL; 187 188 vcpu->arch.mmu.slbia(vcpu); 189 break; 190 case OP_31_XOP_SLBMFEE: 191 if (!vcpu->arch.mmu.slbmfee) { 192 emulated = EMULATE_FAIL; 193 } else { 194 ulong t, rb; 195 196 rb = kvmppc_get_gpr(vcpu, get_rb(inst)); 197 t = vcpu->arch.mmu.slbmfee(vcpu, rb); 198 kvmppc_set_gpr(vcpu, get_rt(inst), t); 199 } 200 break; 201 case OP_31_XOP_SLBMFEV: 202 if (!vcpu->arch.mmu.slbmfev) { 203 emulated = EMULATE_FAIL; 204 } else { 205 ulong t, rb; 206 207 rb = kvmppc_get_gpr(vcpu, get_rb(inst)); 208 t = vcpu->arch.mmu.slbmfev(vcpu, rb); 209 kvmppc_set_gpr(vcpu, get_rt(inst), t); 210 } 211 break; 212 case OP_31_XOP_DCBA: 213 /* Gets treated as NOP */ 214 break; 215 case OP_31_XOP_DCBZ: 216 { 217 ulong rb = kvmppc_get_gpr(vcpu, get_rb(inst)); 218 ulong ra = 0; 219 ulong addr, vaddr; 220 u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 221 u32 dsisr; 222 int r; 223 224 if (get_ra(inst)) 225 ra = kvmppc_get_gpr(vcpu, get_ra(inst)); 226 227 addr = (ra + rb) & ~31ULL; 228 if (!(vcpu->arch.shared->msr & MSR_SF)) 229 addr &= 0xffffffff; 230 vaddr = addr; 231 232 r = kvmppc_st(vcpu, &addr, 32, zeros, true); 233 if ((r == -ENOENT) || (r == -EPERM)) { 234 struct kvmppc_book3s_shadow_vcpu *svcpu; 235 236 svcpu = svcpu_get(vcpu); 237 *advance = 0; 238 vcpu->arch.shared->dar = vaddr; 239 svcpu->fault_dar = vaddr; 240 241 dsisr = DSISR_ISSTORE; 242 if (r == -ENOENT) 243 dsisr |= DSISR_NOHPTE; 244 else if (r == -EPERM) 245 dsisr |= DSISR_PROTFAULT; 246 247 vcpu->arch.shared->dsisr = dsisr; 248 svcpu->fault_dsisr = dsisr; 249 svcpu_put(svcpu); 250 251 kvmppc_book3s_queue_irqprio(vcpu, 252 BOOK3S_INTERRUPT_DATA_STORAGE); 253 } 254 255 break; 256 } 257 default: 258 emulated = EMULATE_FAIL; 259 } 260 break; 261 default: 262 emulated = EMULATE_FAIL; 263 } 264 265 if (emulated == EMULATE_FAIL) 266 emulated = kvmppc_emulate_paired_single(run, vcpu); 267 268 return emulated; 269} 270 271void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper, 272 u32 val) 273{ 274 if (upper) { 275 /* Upper BAT */ 276 u32 bl = (val >> 2) & 0x7ff; 277 bat->bepi_mask = (~bl << 17); 278 bat->bepi = val & 0xfffe0000; 279 bat->vs = (val & 2) ? 1 : 0; 280 bat->vp = (val & 1) ? 1 : 0; 281 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val; 282 } else { 283 /* Lower BAT */ 284 bat->brpn = val & 0xfffe0000; 285 bat->wimg = (val >> 3) & 0xf; 286 bat->pp = val & 3; 287 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32); 288 } 289} 290 291static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn) 292{ 293 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); 294 struct kvmppc_bat *bat; 295 296 switch (sprn) { 297 case SPRN_IBAT0U ... SPRN_IBAT3L: 298 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2]; 299 break; 300 case SPRN_IBAT4U ... SPRN_IBAT7L: 301 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)]; 302 break; 303 case SPRN_DBAT0U ... SPRN_DBAT3L: 304 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2]; 305 break; 306 case SPRN_DBAT4U ... SPRN_DBAT7L: 307 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)]; 308 break; 309 default: 310 BUG(); 311 } 312 313 return bat; 314} 315 316int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) 317{ 318 int emulated = EMULATE_DONE; 319 ulong spr_val = kvmppc_get_gpr(vcpu, rs); 320 321 switch (sprn) { 322 case SPRN_SDR1: 323 if (!spr_allowed(vcpu, PRIV_HYPER)) 324 goto unprivileged; 325 to_book3s(vcpu)->sdr1 = spr_val; 326 break; 327 case SPRN_DSISR: 328 vcpu->arch.shared->dsisr = spr_val; 329 break; 330 case SPRN_DAR: 331 vcpu->arch.shared->dar = spr_val; 332 break; 333 case SPRN_HIOR: 334 to_book3s(vcpu)->hior = spr_val; 335 break; 336 case SPRN_IBAT0U ... SPRN_IBAT3L: 337 case SPRN_IBAT4U ... SPRN_IBAT7L: 338 case SPRN_DBAT0U ... SPRN_DBAT3L: 339 case SPRN_DBAT4U ... SPRN_DBAT7L: 340 { 341 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn); 342 343 kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val); 344 /* BAT writes happen so rarely that we're ok to flush 345 * everything here */ 346 kvmppc_mmu_pte_flush(vcpu, 0, 0); 347 kvmppc_mmu_flush_segments(vcpu); 348 break; 349 } 350 case SPRN_HID0: 351 to_book3s(vcpu)->hid[0] = spr_val; 352 break; 353 case SPRN_HID1: 354 to_book3s(vcpu)->hid[1] = spr_val; 355 break; 356 case SPRN_HID2: 357 to_book3s(vcpu)->hid[2] = spr_val; 358 break; 359 case SPRN_HID2_GEKKO: 360 to_book3s(vcpu)->hid[2] = spr_val; 361 /* HID2.PSE controls paired single on gekko */ 362 switch (vcpu->arch.pvr) { 363 case 0x00080200: /* lonestar 2.0 */ 364 case 0x00088202: /* lonestar 2.2 */ 365 case 0x70000100: /* gekko 1.0 */ 366 case 0x00080100: /* gekko 2.0 */ 367 case 0x00083203: /* gekko 2.3a */ 368 case 0x00083213: /* gekko 2.3b */ 369 case 0x00083204: /* gekko 2.4 */ 370 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */ 371 case 0x00087200: /* broadway */ 372 if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) { 373 /* Native paired singles */ 374 } else if (spr_val & (1 << 29)) { /* HID2.PSE */ 375 vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE; 376 kvmppc_giveup_ext(vcpu, MSR_FP); 377 } else { 378 vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE; 379 } 380 break; 381 } 382 break; 383 case SPRN_HID4: 384 case SPRN_HID4_GEKKO: 385 to_book3s(vcpu)->hid[4] = spr_val; 386 break; 387 case SPRN_HID5: 388 to_book3s(vcpu)->hid[5] = spr_val; 389 /* guest HID5 set can change is_dcbz32 */ 390 if (vcpu->arch.mmu.is_dcbz32(vcpu) && 391 (mfmsr() & MSR_HV)) 392 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; 393 break; 394 case SPRN_GQR0: 395 case SPRN_GQR1: 396 case SPRN_GQR2: 397 case SPRN_GQR3: 398 case SPRN_GQR4: 399 case SPRN_GQR5: 400 case SPRN_GQR6: 401 case SPRN_GQR7: 402 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val; 403 break; 404 case SPRN_ICTC: 405 case SPRN_THRM1: 406 case SPRN_THRM2: 407 case SPRN_THRM3: 408 case SPRN_CTRLF: 409 case SPRN_CTRLT: 410 case SPRN_L2CR: 411 case SPRN_MMCR0_GEKKO: 412 case SPRN_MMCR1_GEKKO: 413 case SPRN_PMC1_GEKKO: 414 case SPRN_PMC2_GEKKO: 415 case SPRN_PMC3_GEKKO: 416 case SPRN_PMC4_GEKKO: 417 case SPRN_WPAR_GEKKO: 418 break; 419unprivileged: 420 default: 421 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn); 422#ifndef DEBUG_SPR 423 emulated = EMULATE_FAIL; 424#endif 425 break; 426 } 427 428 return emulated; 429} 430 431int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt) 432{ 433 int emulated = EMULATE_DONE; 434 435 switch (sprn) { 436 case SPRN_IBAT0U ... SPRN_IBAT3L: 437 case SPRN_IBAT4U ... SPRN_IBAT7L: 438 case SPRN_DBAT0U ... SPRN_DBAT3L: 439 case SPRN_DBAT4U ... SPRN_DBAT7L: 440 { 441 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn); 442 443 if (sprn % 2) 444 kvmppc_set_gpr(vcpu, rt, bat->raw >> 32); 445 else 446 kvmppc_set_gpr(vcpu, rt, bat->raw); 447 448 break; 449 } 450 case SPRN_SDR1: 451 if (!spr_allowed(vcpu, PRIV_HYPER)) 452 goto unprivileged; 453 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1); 454 break; 455 case SPRN_DSISR: 456 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dsisr); 457 break; 458 case SPRN_DAR: 459 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dar); 460 break; 461 case SPRN_HIOR: 462 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hior); 463 break; 464 case SPRN_HID0: 465 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[0]); 466 break; 467 case SPRN_HID1: 468 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[1]); 469 break; 470 case SPRN_HID2: 471 case SPRN_HID2_GEKKO: 472 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[2]); 473 break; 474 case SPRN_HID4: 475 case SPRN_HID4_GEKKO: 476 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[4]); 477 break; 478 case SPRN_HID5: 479 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]); 480 break; 481 case SPRN_CFAR: 482 case SPRN_PURR: 483 kvmppc_set_gpr(vcpu, rt, 0); 484 break; 485 case SPRN_GQR0: 486 case SPRN_GQR1: 487 case SPRN_GQR2: 488 case SPRN_GQR3: 489 case SPRN_GQR4: 490 case SPRN_GQR5: 491 case SPRN_GQR6: 492 case SPRN_GQR7: 493 kvmppc_set_gpr(vcpu, rt, 494 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0]); 495 break; 496 case SPRN_THRM1: 497 case SPRN_THRM2: 498 case SPRN_THRM3: 499 case SPRN_CTRLF: 500 case SPRN_CTRLT: 501 case SPRN_L2CR: 502 case SPRN_MMCR0_GEKKO: 503 case SPRN_MMCR1_GEKKO: 504 case SPRN_PMC1_GEKKO: 505 case SPRN_PMC2_GEKKO: 506 case SPRN_PMC3_GEKKO: 507 case SPRN_PMC4_GEKKO: 508 case SPRN_WPAR_GEKKO: 509 kvmppc_set_gpr(vcpu, rt, 0); 510 break; 511 default: 512unprivileged: 513 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn); 514#ifndef DEBUG_SPR 515 emulated = EMULATE_FAIL; 516#endif 517 break; 518 } 519 520 return emulated; 521} 522 523u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst) 524{ 525 u32 dsisr = 0; 526 527 /* 528 * This is what the spec says about DSISR bits (not mentioned = 0): 529 * 530 * 12:13 [DS] Set to bits 30:31 531 * 15:16 [X] Set to bits 29:30 532 * 17 [X] Set to bit 25 533 * [D/DS] Set to bit 5 534 * 18:21 [X] Set to bits 21:24 535 * [D/DS] Set to bits 1:4 536 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS) 537 * 27:31 Set to bits 11:15 (RA) 538 */ 539 540 switch (get_op(inst)) { 541 /* D-form */ 542 case OP_LFS: 543 case OP_LFD: 544 case OP_STFD: 545 case OP_STFS: 546 dsisr |= (inst >> 12) & 0x4000; /* bit 17 */ 547 dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */ 548 break; 549 /* X-form */ 550 case 31: 551 dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */ 552 dsisr |= (inst << 8) & 0x04000; /* bit 17 */ 553 dsisr |= (inst << 3) & 0x03c00; /* bits 18:21 */ 554 break; 555 default: 556 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst); 557 break; 558 } 559 560 dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */ 561 562 return dsisr; 563} 564 565ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst) 566{ 567 ulong dar = 0; 568 ulong ra; 569 570 switch (get_op(inst)) { 571 case OP_LFS: 572 case OP_LFD: 573 case OP_STFD: 574 case OP_STFS: 575 ra = get_ra(inst); 576 if (ra) 577 dar = kvmppc_get_gpr(vcpu, ra); 578 dar += (s32)((s16)inst); 579 break; 580 case 31: 581 ra = get_ra(inst); 582 if (ra) 583 dar = kvmppc_get_gpr(vcpu, ra); 584 dar += kvmppc_get_gpr(vcpu, get_rb(inst)); 585 break; 586 default: 587 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst); 588 break; 589 } 590 591 return dar; 592} 593