114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* 214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Support for PCI bridges found on Power Macintoshes. 314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * 41beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * Copyright (C) 2003-2005 Benjamin Herrenschmuidt (benh@kernel.crashing.org) 514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Copyright (C) 1997 Paul Mackerras (paulus@samba.org) 614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * 714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * This program is free software; you can redistribute it and/or 814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * modify it under the terms of the GNU General Public License 914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * as published by the Free Software Foundation; either version 1014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * 2 of the License, or (at your option) any later version. 1114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 1214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 1314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <linux/kernel.h> 1414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <linux/pci.h> 1514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <linux/delay.h> 1614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <linux/string.h> 1714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <linux/init.h> 1814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <linux/bootmem.h> 196e99e4582861578fb00d84d085f8f283569f51ddBenjamin Herrenschmidt#include <linux/irq.h> 2098d9f30c820d509145757e6ecbc36013aa02f7bcBenjamin Herrenschmidt#include <linux/of_pci.h> 2114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 2214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <asm/sections.h> 2314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <asm/io.h> 2414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <asm/prom.h> 2514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <asm/pci-bridge.h> 2614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <asm/machdep.h> 2714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#include <asm/pmac_feature.h> 28830825d6c37a28061c0b6ca538a6411001cf3b2aPaul Mackerras#include <asm/grackle.h> 293c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras#include <asm/ppc-pci.h> 3014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 3114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#undef DEBUG 3214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 3314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#ifdef DEBUG 3414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#define DBG(x...) printk(x) 3514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#else 3614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#define DBG(x...) 3714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#endif 3814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 3914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* XXX Could be per-controller, but I don't think we risk anything by 4014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * assuming we won't have both UniNorth and Bandit */ 4114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic int has_uninorth; 4235499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras#ifdef CONFIG_PPC64 4314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic struct pci_controller *u3_agp; 440ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt#else 450ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidtstatic int has_second_ohare; 4635499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras#endif /* CONFIG_PPC64 */ 4714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 4814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasextern int pcibios_assign_bus_offset; 4914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 5014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstruct device_node *k2_skiplist[2]; 5114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 5214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* 5314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Magic constants for enabling cache coherency in the bandit/PSX bridge. 5414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 5514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#define BANDIT_DEVID_2 8 5614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#define BANDIT_REVID 3 5714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 5814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#define BANDIT_DEVNUM 11 5914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#define BANDIT_MAGIC 0x50 6014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#define BANDIT_COHERENT 0x40 6114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 6214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic int __init fixup_one_level_bus_range(struct device_node *node, int higher) 6314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 6414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras for (; node != 0;node = node->sibling) { 65018a3d1db7cdb6127656c1622ee1d2302e16436dJeremy Kerr const int * bus_range; 66018a3d1db7cdb6127656c1622ee1d2302e16436dJeremy Kerr const unsigned int *class_code; 6714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int len; 6814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 6914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* For PCI<->PCI bridges or CardBus bridges, we go down */ 70e2eb63927bfcb54232163bfec32440246fd44457Stephen Rothwell class_code = of_get_property(node, "class-code", NULL); 7114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI && 7214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) 7314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras continue; 74e2eb63927bfcb54232163bfec32440246fd44457Stephen Rothwell bus_range = of_get_property(node, "bus-range", &len); 7514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (bus_range != NULL && len > 2 * sizeof(int)) { 7614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (bus_range[1] > higher) 7714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras higher = bus_range[1]; 7814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 7914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras higher = fixup_one_level_bus_range(node->child, higher); 8014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 8114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return higher; 8214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 8314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 8414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* This routine fixes the "bus-range" property of all bridges in the 8514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * system since they tend to have their "last" member wrong on macs 8614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * 8714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Note that the bus numbers manipulated here are OF bus numbers, they 8814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * are not Linux bus numbers. 8914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 9014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic void __init fixup_bus_range(struct device_node *bridge) 9114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 92018a3d1db7cdb6127656c1622ee1d2302e16436dJeremy Kerr int *bus_range, len; 93018a3d1db7cdb6127656c1622ee1d2302e16436dJeremy Kerr struct property *prop; 9414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 9514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* Lookup the "bus-range" property for the hose */ 96018a3d1db7cdb6127656c1622ee1d2302e16436dJeremy Kerr prop = of_find_property(bridge, "bus-range", &len); 97018a3d1db7cdb6127656c1622ee1d2302e16436dJeremy Kerr if (prop == NULL || prop->length < 2 * sizeof(int)) 9814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return; 99018a3d1db7cdb6127656c1622ee1d2302e16436dJeremy Kerr 1001a38147ed0737a9c01dbf5f2ca47fd2a0aa5cb55Stephen Rothwell bus_range = prop->value; 10114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras bus_range[1] = fixup_one_level_bus_range(bridge->child, bus_range[1]); 10214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 10314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 10414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* 10514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Apple MacRISC (U3, UniNorth, Bandit, Chaos) PCI controllers. 10614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * 10714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * The "Bandit" version is present in all early PCI PowerMacs, 10814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * and up to the first ones using Grackle. Some machines may 10914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * have 2 bandit controllers (2 PCI busses). 11014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * 11114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * "Chaos" is used in some "Bandit"-type machines as a bridge 11214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * for the separate display bus. It is accessed the same 11314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * way as bandit, but cannot be probed for devices. It therefore 11414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * has its own config access functions. 11514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * 11614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * The "UniNorth" version is present in all Core99 machines 11714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * (iBook, G4, new IMacs, and all the recent Apple machines). 11814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * It contains 3 controllers in one ASIC. 11914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * 12014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * The U3 is the bridge used on G5 machines. It contains an 12114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * AGP bus which is dealt with the old UniNorth access routines 12214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * and a HyperTransport bus which uses its own set of access 12314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * functions. 12414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 12514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 12614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#define MACRISC_CFA0(devfn, off) \ 1271beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt ((1 << (unsigned int)PCI_SLOT(dev_fn)) \ 1281beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt | (((unsigned int)PCI_FUNC(dev_fn)) << 8) \ 1291beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt | (((unsigned int)(off)) & 0xFCUL)) 13014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 13114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#define MACRISC_CFA1(bus, devfn, off) \ 1321beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt ((((unsigned int)(bus)) << 16) \ 1331beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt |(((unsigned int)(devfn)) << 8) \ 1341beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt |(((unsigned int)(off)) & 0xFCUL) \ 13514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras |1UL) 13614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 137de125bf395df34892862d76580ce3a153e80f151Al Virostatic volatile void __iomem *macrisc_cfg_access(struct pci_controller* hose, 13814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras u8 bus, u8 dev_fn, u8 offset) 13914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 14014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras unsigned int caddr; 14114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 14214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (bus == hose->first_busno) { 14314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (dev_fn < (11 << 3)) 144de125bf395df34892862d76580ce3a153e80f151Al Viro return NULL; 14514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras caddr = MACRISC_CFA0(dev_fn, offset); 14614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } else 14714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras caddr = MACRISC_CFA1(bus, dev_fn, offset); 14814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 14914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* Uninorth will return garbage if we don't read back the value ! */ 15014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras do { 15114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras out_le32(hose->cfg_addr, caddr); 15214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } while (in_le32(hose->cfg_addr) != caddr); 15314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 15414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras offset &= has_uninorth ? 0x07 : 0x03; 155de125bf395df34892862d76580ce3a153e80f151Al Viro return hose->cfg_data + offset; 15614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 15714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 15814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic int macrisc_read_config(struct pci_bus *bus, unsigned int devfn, 15914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int offset, int len, u32 *val) 16014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 1613c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras struct pci_controller *hose; 162de125bf395df34892862d76580ce3a153e80f151Al Viro volatile void __iomem *addr; 16314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 1643c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras hose = pci_bus_to_host(bus); 1653c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras if (hose == NULL) 1663c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 1671beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (offset >= 0x100) 1681beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_BAD_REGISTER_NUMBER; 16914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras addr = macrisc_cfg_access(hose, bus->number, devfn, offset); 17014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (!addr) 17114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 17214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* 17314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Note: the caller has already checked that offset is 17414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * suitably aligned and that len is 1, 2 or 4. 17514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 17614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras switch (len) { 17714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 1: 178de125bf395df34892862d76580ce3a153e80f151Al Viro *val = in_8(addr); 17914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 18014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 2: 181de125bf395df34892862d76580ce3a153e80f151Al Viro *val = in_le16(addr); 18214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 18314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras default: 184de125bf395df34892862d76580ce3a153e80f151Al Viro *val = in_le32(addr); 18514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 18614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 18714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_SUCCESSFUL; 18814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 18914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 19014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic int macrisc_write_config(struct pci_bus *bus, unsigned int devfn, 19114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int offset, int len, u32 val) 19214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 1933c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras struct pci_controller *hose; 194de125bf395df34892862d76580ce3a153e80f151Al Viro volatile void __iomem *addr; 19514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 1963c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras hose = pci_bus_to_host(bus); 1973c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras if (hose == NULL) 1983c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 1991beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (offset >= 0x100) 2001beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_BAD_REGISTER_NUMBER; 20114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras addr = macrisc_cfg_access(hose, bus->number, devfn, offset); 20214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (!addr) 20314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 20414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* 20514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Note: the caller has already checked that offset is 20614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * suitably aligned and that len is 1, 2 or 4. 20714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 20814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras switch (len) { 20914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 1: 210de125bf395df34892862d76580ce3a153e80f151Al Viro out_8(addr, val); 21114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 21214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 2: 213de125bf395df34892862d76580ce3a153e80f151Al Viro out_le16(addr, val); 21414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 21514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras default: 216de125bf395df34892862d76580ce3a153e80f151Al Viro out_le32(addr, val); 21714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 21814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 21914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_SUCCESSFUL; 22014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 22114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 22214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic struct pci_ops macrisc_pci_ops = 22314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 2243fac10e7f5a6dfa4a08938d24af2775cd9b9e267Nathan Lynch .read = macrisc_read_config, 2253fac10e7f5a6dfa4a08938d24af2775cd9b9e267Nathan Lynch .write = macrisc_write_config, 22614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras}; 22714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 22835499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras#ifdef CONFIG_PPC32 22914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* 2303c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras * Verify that a specific (bus, dev_fn) exists on chaos 23114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 2321beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidtstatic int chaos_validate_dev(struct pci_bus *bus, int devfn, int offset) 23314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 23414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras struct device_node *np; 235018a3d1db7cdb6127656c1622ee1d2302e16436dJeremy Kerr const u32 *vendor, *device; 23614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 2371beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (offset >= 0x100) 2381beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_BAD_REGISTER_NUMBER; 23998d9f30c820d509145757e6ecbc36013aa02f7bcBenjamin Herrenschmidt np = of_pci_find_child_device(bus->dev.of_node, devfn); 24014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (np == NULL) 24114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 24214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 243e2eb63927bfcb54232163bfec32440246fd44457Stephen Rothwell vendor = of_get_property(np, "vendor-id", NULL); 244e2eb63927bfcb54232163bfec32440246fd44457Stephen Rothwell device = of_get_property(np, "device-id", NULL); 24514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (vendor == NULL || device == NULL) 24614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 24714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 24814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if ((*vendor == 0x106b) && (*device == 3) && (offset >= 0x10) 24914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras && (offset != 0x14) && (offset != 0x18) && (offset <= 0x24)) 25014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_BAD_REGISTER_NUMBER; 25114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 25214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_SUCCESSFUL; 25314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 25414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 25514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic int 25614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerraschaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 25714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int len, u32 *val) 25814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 25914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int result = chaos_validate_dev(bus, devfn, offset); 26014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (result == PCIBIOS_BAD_REGISTER_NUMBER) 26114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras *val = ~0U; 26214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (result != PCIBIOS_SUCCESSFUL) 26314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return result; 26414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return macrisc_read_config(bus, devfn, offset, len, val); 26514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 26614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 26714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic int 26814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerraschaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 26914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int len, u32 val) 27014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 27114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int result = chaos_validate_dev(bus, devfn, offset); 27214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (result != PCIBIOS_SUCCESSFUL) 27314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return result; 27414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return macrisc_write_config(bus, devfn, offset, len, val); 27514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 27614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 27714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic struct pci_ops chaos_pci_ops = 27814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 2793fac10e7f5a6dfa4a08938d24af2775cd9b9e267Nathan Lynch .read = chaos_read_config, 2803fac10e7f5a6dfa4a08938d24af2775cd9b9e267Nathan Lynch .write = chaos_write_config, 28114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras}; 28214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 28335499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerrasstatic void __init setup_chaos(struct pci_controller *hose, 284cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt struct resource *addr) 28535499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras{ 28635499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras /* assume a `chaos' bridge */ 28735499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras hose->ops = &chaos_pci_ops; 288cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000); 289cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000); 29035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras} 29135499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras#endif /* CONFIG_PPC32 */ 29235499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras 29335499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras#ifdef CONFIG_PPC64 29414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* 29514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * These versions of U3 HyperTransport config space access ops do not 29614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * implement self-view of the HT host yet 29714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 29814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 29914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* 30014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * This function deals with some "special cases" devices. 30114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * 30214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * 0 -> No special case 30325985edcedea6396277003854657b5f3cb31a628Lucas De Marchi * 1 -> Skip the device but act as if the access was successful 30414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * (return 0xff's on reads, eventually, cache config space 30514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * accesses in a later version) 306af901ca181d92aac3a7dc265144a9081a86d8f39André Goddard Rosa * -1 -> Hide the device (unsuccessful access) 30714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 30814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic int u3_ht_skip_device(struct pci_controller *hose, 30914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras struct pci_bus *bus, unsigned int devfn) 31014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 31114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras struct device_node *busdn, *dn; 31214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int i; 31314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 31414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* We only allow config cycles to devices that are in OF device-tree 31514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * as we are apparently having some weird things going on with some 316444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt * revs of K2 on recent G5s, except for the host bridge itself, which 317444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt * is missing from the tree but we know we can probe. 31814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 31914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (bus->self) 32014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras busdn = pci_device_to_OF_node(bus->self); 321444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt else if (devfn == 0) 322444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt return 0; 32314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras else 32444ef339073f67d4abcc62ae52a5fbc069d7a4d29Stephen Rothwell busdn = hose->dn; 32514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras for (dn = busdn->child; dn; dn = dn->sibling) 326e07102db63d10d9f9d94d21dfdb1178e65154b9eLinas Vepstas if (PCI_DN(dn) && PCI_DN(dn)->devfn == devfn) 32714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 32814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (dn == NULL) 32914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return -1; 33014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 33114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* 33214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * When a device in K2 is powered down, we die on config 33314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * cycle accesses. Fix that here. 33414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 33514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras for (i=0; i<2; i++) 33614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (k2_skiplist[i] == dn) 33714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return 1; 33814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 33914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return 0; 34014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 34114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 34214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#define U3_HT_CFA0(devfn, off) \ 3431beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt ((((unsigned int)devfn) << 8) | offset) 34414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras#define U3_HT_CFA1(bus, devfn, off) \ 34514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras (U3_HT_CFA0(devfn, off) \ 3461beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt + (((unsigned int)bus) << 16) \ 34714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras + 0x01000000UL) 34814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 349444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidtstatic void __iomem *u3_ht_cfg_access(struct pci_controller *hose, u8 bus, 350444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt u8 devfn, u8 offset, int *swap) 35114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 352444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt *swap = 1; 35314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (bus == hose->first_busno) { 354444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt if (devfn != 0) 355444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt return hose->cfg_data + U3_HT_CFA0(devfn, offset); 356444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt *swap = 0; 357444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt return ((void __iomem *)hose->cfg_addr) + (offset << 2); 35814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } else 359de125bf395df34892862d76580ce3a153e80f151Al Viro return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset); 36014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 36114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 36214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, 36314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int offset, int len, u32 *val) 36414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 3653c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras struct pci_controller *hose; 366444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt void __iomem *addr; 367444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt int swap; 36814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 3693c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras hose = pci_bus_to_host(bus); 3703c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras if (hose == NULL) 37114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 3721beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (offset >= 0x100) 3731beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_BAD_REGISTER_NUMBER; 374444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap); 37514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (!addr) 37614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 37714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 37814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras switch (u3_ht_skip_device(hose, bus, devfn)) { 37914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 0: 38014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 38114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 1: 3823c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras switch (len) { 3833c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras case 1: 3843c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras *val = 0xff; break; 3853c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras case 2: 3863c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras *val = 0xffff; break; 3873c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras default: 3883c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras *val = 0xfffffffful; break; 3893c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras } 3903c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras return PCIBIOS_SUCCESSFUL; 39114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras default: 39214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 3933c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras } 3943c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras 39514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* 39614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Note: the caller has already checked that offset is 39714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * suitably aligned and that len is 1, 2 or 4. 39814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 39914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras switch (len) { 40014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 1: 401de125bf395df34892862d76580ce3a153e80f151Al Viro *val = in_8(addr); 40214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 40314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 2: 404444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt *val = swap ? in_le16(addr) : in_be16(addr); 40514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 40614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras default: 407444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt *val = swap ? in_le32(addr) : in_be32(addr); 40814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 40914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 41014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_SUCCESSFUL; 41114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 41214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 41314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, 41414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int offset, int len, u32 val) 41514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 4163c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras struct pci_controller *hose; 417444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt void __iomem *addr; 418444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt int swap; 41914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 4203c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras hose = pci_bus_to_host(bus); 4213c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras if (hose == NULL) 42214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 4231beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (offset >= 0x100) 4241beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_BAD_REGISTER_NUMBER; 425444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap); 42614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (!addr) 42714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 42814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 42914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras switch (u3_ht_skip_device(hose, bus, devfn)) { 43014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 0: 43114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 43214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 1: 43314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_SUCCESSFUL; 43414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras default: 43514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_DEVICE_NOT_FOUND; 43614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 43714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 43814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* 43914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Note: the caller has already checked that offset is 44014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * suitably aligned and that len is 1, 2 or 4. 44114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 44214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras switch (len) { 44314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 1: 444de125bf395df34892862d76580ce3a153e80f151Al Viro out_8(addr, val); 44514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 44614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case 2: 447444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt swap ? out_le16(addr, val) : out_be16(addr, val); 44814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 44914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras default: 450444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt swap ? out_le32(addr, val) : out_be32(addr, val); 45114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras break; 45214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 45314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return PCIBIOS_SUCCESSFUL; 45414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 45514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 45614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic struct pci_ops u3_ht_pci_ops = 45714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 4583fac10e7f5a6dfa4a08938d24af2775cd9b9e267Nathan Lynch .read = u3_ht_read_config, 4593fac10e7f5a6dfa4a08938d24af2775cd9b9e267Nathan Lynch .write = u3_ht_write_config, 46014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras}; 4611beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 4621beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt#define U4_PCIE_CFA0(devfn, off) \ 4631beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt ((1 << ((unsigned int)PCI_SLOT(dev_fn))) \ 4641beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt | (((unsigned int)PCI_FUNC(dev_fn)) << 8) \ 4651beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt | ((((unsigned int)(off)) >> 8) << 28) \ 4661beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt | (((unsigned int)(off)) & 0xfcU)) 4671beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 4681beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt#define U4_PCIE_CFA1(bus, devfn, off) \ 4691beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt ((((unsigned int)(bus)) << 16) \ 4701beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt |(((unsigned int)(devfn)) << 8) \ 4711beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt | ((((unsigned int)(off)) >> 8) << 28) \ 4721beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt |(((unsigned int)(off)) & 0xfcU) \ 4731beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt |1UL) 4741beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 475de125bf395df34892862d76580ce3a153e80f151Al Virostatic volatile void __iomem *u4_pcie_cfg_access(struct pci_controller* hose, 4761beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt u8 bus, u8 dev_fn, int offset) 4771beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt{ 4781beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt unsigned int caddr; 4791beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 4801beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (bus == hose->first_busno) { 4811beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt caddr = U4_PCIE_CFA0(dev_fn, offset); 4821beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt } else 4831beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt caddr = U4_PCIE_CFA1(bus, dev_fn, offset); 4841beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 4851beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt /* Uninorth will return garbage if we don't read back the value ! */ 4861beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt do { 4871beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt out_le32(hose->cfg_addr, caddr); 4881beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt } while (in_le32(hose->cfg_addr) != caddr); 4891beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 4901beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt offset &= 0x03; 491de125bf395df34892862d76580ce3a153e80f151Al Viro return hose->cfg_data + offset; 4921beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt} 4931beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 4941beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidtstatic int u4_pcie_read_config(struct pci_bus *bus, unsigned int devfn, 4951beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt int offset, int len, u32 *val) 4961beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt{ 4971beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt struct pci_controller *hose; 498de125bf395df34892862d76580ce3a153e80f151Al Viro volatile void __iomem *addr; 4991beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 5001beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt hose = pci_bus_to_host(bus); 5011beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (hose == NULL) 5021beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_DEVICE_NOT_FOUND; 5031beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (offset >= 0x1000) 5041beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_BAD_REGISTER_NUMBER; 5051beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt addr = u4_pcie_cfg_access(hose, bus->number, devfn, offset); 5061beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (!addr) 5071beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_DEVICE_NOT_FOUND; 5081beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt /* 5091beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * Note: the caller has already checked that offset is 5101beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * suitably aligned and that len is 1, 2 or 4. 5111beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt */ 5121beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt switch (len) { 5131beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt case 1: 514de125bf395df34892862d76580ce3a153e80f151Al Viro *val = in_8(addr); 5151beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt break; 5161beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt case 2: 517de125bf395df34892862d76580ce3a153e80f151Al Viro *val = in_le16(addr); 5181beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt break; 5191beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt default: 520de125bf395df34892862d76580ce3a153e80f151Al Viro *val = in_le32(addr); 5211beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt break; 5221beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt } 5231beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_SUCCESSFUL; 5241beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt} 5251beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 5261beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidtstatic int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn, 5271beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt int offset, int len, u32 val) 5281beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt{ 5291beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt struct pci_controller *hose; 530de125bf395df34892862d76580ce3a153e80f151Al Viro volatile void __iomem *addr; 5311beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 5321beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt hose = pci_bus_to_host(bus); 5331beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (hose == NULL) 5341beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_DEVICE_NOT_FOUND; 5351beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (offset >= 0x1000) 5361beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_BAD_REGISTER_NUMBER; 5371beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt addr = u4_pcie_cfg_access(hose, bus->number, devfn, offset); 5381beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt if (!addr) 5391beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_DEVICE_NOT_FOUND; 5401beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt /* 5411beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * Note: the caller has already checked that offset is 5421beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * suitably aligned and that len is 1, 2 or 4. 5431beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt */ 5441beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt switch (len) { 5451beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt case 1: 546de125bf395df34892862d76580ce3a153e80f151Al Viro out_8(addr, val); 5471beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt break; 5481beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt case 2: 549de125bf395df34892862d76580ce3a153e80f151Al Viro out_le16(addr, val); 5501beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt break; 5511beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt default: 552de125bf395df34892862d76580ce3a153e80f151Al Viro out_le32(addr, val); 5531beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt break; 5541beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt } 5551beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt return PCIBIOS_SUCCESSFUL; 5561beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt} 5571beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 5581beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidtstatic struct pci_ops u4_pcie_pci_ops = 5591beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt{ 5603fac10e7f5a6dfa4a08938d24af2775cd9b9e267Nathan Lynch .read = u4_pcie_read_config, 5613fac10e7f5a6dfa4a08938d24af2775cd9b9e267Nathan Lynch .write = u4_pcie_write_config, 5621beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt}; 5631beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 564cad5cef62a5a0c525d39118d2e94b6e2034d5e05Greg Kroah-Hartmanstatic void pmac_pci_fixup_u4_of_node(struct pci_dev *dev) 56516fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt{ 56616fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt /* Apple's device-tree "hides" the root complex virtual P2P bridge 56716fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt * on U4. However, Linux sees it, causing the PCI <-> OF matching 56816fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt * code to fail to properly match devices below it. This works around 56916fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt * it by setting the node of the bridge to point to the PHB node, 57016fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt * which is not entirely correct but fixes the matching code and 57116fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt * doesn't break anything else. It's also the simplest possible fix. 57216fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt */ 57316fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt if (dev->dev.of_node == NULL) 57416fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt dev->dev.of_node = pcibios_get_phb_of_node(dev->bus); 57516fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt} 57616fa42affd484bb500533a7e78e0c72687eddd58Benjamin HerrenschmidtDECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_APPLE, 0x5b, pmac_pci_fixup_u4_of_node); 57716fa42affd484bb500533a7e78e0c72687eddd58Benjamin Herrenschmidt 57835499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras#endif /* CONFIG_PPC64 */ 57914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 58035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras#ifdef CONFIG_PPC32 58114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* 58214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * For a bandit bridge, turn on cache coherency if necessary. 58314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * N.B. we could clean this up using the hose ops directly. 58414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 5853c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerrasstatic void __init init_bandit(struct pci_controller *bp) 58614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 58714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras unsigned int vendev, magic; 58814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int rev; 58914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 59014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* read the word at offset 0 in config space for device 11 */ 59114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + PCI_VENDOR_ID); 59214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras udelay(2); 59314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras vendev = in_le32(bp->cfg_data); 59414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (vendev == (PCI_DEVICE_ID_APPLE_BANDIT << 16) + 59514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras PCI_VENDOR_ID_APPLE) { 59614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* read the revision id */ 59714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras out_le32(bp->cfg_addr, 59814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras (1UL << BANDIT_DEVNUM) + PCI_REVISION_ID); 59914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras udelay(2); 60014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras rev = in_8(bp->cfg_data); 60114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (rev != BANDIT_REVID) 60214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras printk(KERN_WARNING 60314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras "Unknown revision %d for bandit\n", rev); 60414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } else if (vendev != (BANDIT_DEVID_2 << 16) + PCI_VENDOR_ID_APPLE) { 60514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras printk(KERN_WARNING "bandit isn't? (%x)\n", vendev); 60614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return; 60714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 60814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 60914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* read the word at offset 0x50 */ 61014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + BANDIT_MAGIC); 61114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras udelay(2); 61214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras magic = in_le32(bp->cfg_data); 61314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if ((magic & BANDIT_COHERENT) != 0) 61414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return; 61514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras magic |= BANDIT_COHERENT; 61614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras udelay(2); 61714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras out_le32(bp->cfg_data, magic); 61814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras printk(KERN_INFO "Cache coherency enabled for bandit/PSX\n"); 61914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 62014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 62114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* 62214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Tweak the PCI-PCI bridge chip on the blue & white G3s. 62314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 6243c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerrasstatic void __init init_p2pbridge(void) 62514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 62614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras struct device_node *p2pbridge; 62714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras struct pci_controller* hose; 62814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras u8 bus, devfn; 62914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras u16 val; 63014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 63114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* XXX it would be better here to identify the specific 63214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras PCI-PCI bridge chip we have. */ 63330686ba6d56858657829d3eb524ed73e5dc98d2bStephen Rothwell p2pbridge = of_find_node_by_name(NULL, "pci-bridge"); 63430686ba6d56858657829d3eb524ed73e5dc98d2bStephen Rothwell if (p2pbridge == NULL 63514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras || p2pbridge->parent == NULL 63614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras || strcmp(p2pbridge->parent->name, "pci") != 0) 63730686ba6d56858657829d3eb524ed73e5dc98d2bStephen Rothwell goto done; 63814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (pci_device_from_OF_node(p2pbridge, &bus, &devfn) < 0) { 63914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras DBG("Can't find PCI infos for PCI<->PCI bridge\n"); 64030686ba6d56858657829d3eb524ed73e5dc98d2bStephen Rothwell goto done; 64114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 64214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* Warning: At this point, we have not yet renumbered all busses. 64314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * So we must use OF walking to find out hose 64414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 64514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose = pci_find_hose_for_OF_device(p2pbridge); 64614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (!hose) { 64714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras DBG("Can't find hose for PCI<->PCI bridge\n"); 64830686ba6d56858657829d3eb524ed73e5dc98d2bStephen Rothwell goto done; 64914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 65014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (early_read_config_word(hose, bus, devfn, 65114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras PCI_BRIDGE_CONTROL, &val) < 0) { 652cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt printk(KERN_ERR "init_p2pbridge: couldn't read bridge" 653cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt " control\n"); 65430686ba6d56858657829d3eb524ed73e5dc98d2bStephen Rothwell goto done; 65514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 65614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras val &= ~PCI_BRIDGE_CTL_MASTER_ABORT; 65714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras early_write_config_word(hose, bus, devfn, PCI_BRIDGE_CONTROL, val); 65830686ba6d56858657829d3eb524ed73e5dc98d2bStephen Rothwelldone: 65930686ba6d56858657829d3eb524ed73e5dc98d2bStephen Rothwell of_node_put(p2pbridge); 66014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 66114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 6620ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidtstatic void __init init_second_ohare(void) 6630ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt{ 6640ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt struct device_node *np = of_find_node_by_name(NULL, "pci106b,7"); 6650ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt unsigned char bus, devfn; 6660ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt unsigned short cmd; 6670ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt 6680ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt if (np == NULL) 6690ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt return; 6700ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt 6710ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt /* This must run before we initialize the PICs since the second 6720ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt * ohare hosts a PIC that will be accessed there. 6730ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt */ 6740ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt if (pci_device_from_OF_node(np, &bus, &devfn) == 0) { 6750ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt struct pci_controller* hose = 6760ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt pci_find_hose_for_OF_device(np); 6770ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt if (!hose) { 6780ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt printk(KERN_ERR "Can't find PCI hose for OHare2 !\n"); 679afcb065450913745027169d906b9afc8294f7007Nicolas Palix of_node_put(np); 6800ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt return; 6810ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt } 6820ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd); 6830ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; 6840ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt cmd &= ~PCI_COMMAND_IO; 6850ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd); 6860ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt } 6870ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt has_second_ohare = 1; 688afcb065450913745027169d906b9afc8294f7007Nicolas Palix of_node_put(np); 6890ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt} 6900ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt 69114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* 69214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Some Apple desktop machines have a NEC PD720100A USB2 controller 69314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * on the motherboard. Open Firmware, on these, will disable the 69414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * EHCI part of it so it behaves like a pair of OHCI's. This fixup 69514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * code re-enables it ;) 69614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 6973c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerrasstatic void __init fixup_nec_usb2(void) 69814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 69914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras struct device_node *nec; 70014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 701ccdb8ed3b3c739fe99a6f2f474f7ffad3203485dGrant Likely for_each_node_by_name(nec, "usb") { 70214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras struct pci_controller *hose; 703018a3d1db7cdb6127656c1622ee1d2302e16436dJeremy Kerr u32 data; 704018a3d1db7cdb6127656c1622ee1d2302e16436dJeremy Kerr const u32 *prop; 70514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras u8 bus, devfn; 70635499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras 707e2eb63927bfcb54232163bfec32440246fd44457Stephen Rothwell prop = of_get_property(nec, "vendor-id", NULL); 70814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (prop == NULL) 70914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras continue; 71014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (0x1033 != *prop) 71114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras continue; 712e2eb63927bfcb54232163bfec32440246fd44457Stephen Rothwell prop = of_get_property(nec, "device-id", NULL); 71314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (prop == NULL) 71414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras continue; 71514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (0x0035 != *prop) 71614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras continue; 717e2eb63927bfcb54232163bfec32440246fd44457Stephen Rothwell prop = of_get_property(nec, "reg", NULL); 71814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (prop == NULL) 71914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras continue; 72014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras devfn = (prop[0] >> 8) & 0xff; 72114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras bus = (prop[0] >> 16) & 0xff; 72214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (PCI_FUNC(devfn) != 0) 72314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras continue; 72414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose = pci_find_hose_for_OF_device(nec); 72514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (!hose) 72614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras continue; 72714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras early_read_config_dword(hose, bus, devfn, 0xe4, &data); 72814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (data & 1UL) { 729cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt printk("Found NEC PD720100A USB2 chip with disabled" 730cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt " EHCI, fixing up...\n"); 73114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras data &= ~1UL; 73214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras early_write_config_dword(hose, bus, devfn, 0xe4, data); 73314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 73414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 73514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 73614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 73735499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerrasstatic void __init setup_bandit(struct pci_controller *hose, 738cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt struct resource *addr) 73914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 74014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->ops = ¯isc_pci_ops; 741cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000); 742cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000); 74314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras init_bandit(hose); 74414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 74514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 74635499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerrasstatic int __init setup_uninorth(struct pci_controller *hose, 747cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt struct resource *addr) 74814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 7490e47ff1ce65bbd0b12a9421a2756b26987ea5083Rob Herring pci_add_flags(PCI_REASSIGN_ALL_BUS); 75035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras has_uninorth = 1; 75135499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras hose->ops = ¯isc_pci_ops; 752cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000); 753cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000); 75435499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras /* We "know" that the bridge at f2000000 has the PCI slots. */ 755cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt return addr->start == 0xf2000000; 75614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 757cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt#endif /* CONFIG_PPC32 */ 75814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 75935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras#ifdef CONFIG_PPC64 76014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic void __init setup_u3_agp(struct pci_controller* hose) 76114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 76214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* On G5, we move AGP up to high bus number so we don't need 76314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * to reassign bus numbers for HT. If we ever have P2P bridges 76435499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras * on AGP, we'll have to move pci_assign_all_busses to the 76514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * pci_controller structure so we enable it for AGP and not for 76614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * HT childs. 76714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * We hard code the address because of the different size of 76814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * the reg address cell, we shall fix that by killing struct 76914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * reg_property and using some accessor functions instead 77014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 7713c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras hose->first_busno = 0xf0; 77214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->last_busno = 0xff; 77314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras has_uninorth = 1; 77414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->ops = ¯isc_pci_ops; 77514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000); 77614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000); 77714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras u3_agp = hose; 77814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 77914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 7801beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidtstatic void __init setup_u4_pcie(struct pci_controller* hose) 7811beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt{ 7821beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt /* We currently only implement the "non-atomic" config space, to 7831beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * be optimised later. 7841beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt */ 7851beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt hose->ops = &u4_pcie_pci_ops; 7861beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000); 7871beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000); 7881beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 7891beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt /* The bus contains a bridge from root -> device, we need to 7901beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * make it visible on bus 0 so that we pick the right type 7911beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * of config cycles. If we didn't, we would have to force all 7921beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * config cycles to be type 1. So we override the "bus-range" 7931beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * property here 7941beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt */ 7951beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt hose->first_busno = 0x00; 7961beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt hose->last_busno = 0xff; 797d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt} 798d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt 799d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidtstatic void __init parse_region_decode(struct pci_controller *hose, 800d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt u32 decode) 801d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt{ 802d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt unsigned long base, end, next = -1; 803d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt int i, cur = -1; 804d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt 805d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt /* Iterate through all bits. We ignore the last bit as this region is 806d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * reserved for the ROM among other niceties 807d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt */ 808d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt for (i = 0; i < 31; i++) { 809d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt if ((decode & (0x80000000 >> i)) == 0) 810d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt continue; 811d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt if (i < 16) { 812d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt base = 0xf0000000 | (((u32)i) << 24); 813d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt end = base + 0x00ffffff; 814d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt } else { 815d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt base = ((u32)i-16) << 28; 816d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt end = base + 0x0fffffff; 817d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt } 818d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt if (base != next) { 819d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt if (++cur >= 3) { 820d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt printk(KERN_WARNING "PCI: Too many ranges !\n"); 821d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt break; 822d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt } 823d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt hose->mem_resources[cur].flags = IORESOURCE_MEM; 824d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt hose->mem_resources[cur].name = hose->dn->full_name; 825d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt hose->mem_resources[cur].start = base; 826d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt hose->mem_resources[cur].end = end; 8273fd47f063b17692e843128e2abda3e697df42198Benjamin Herrenschmidt hose->mem_offset[cur] = 0; 828d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt DBG(" %d: 0x%08lx-0x%08lx\n", cur, base, end); 829d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt } else { 830d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt DBG(" : -0x%08lx\n", end); 831d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt hose->mem_resources[cur].end = end; 832d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt } 833d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt next = end + 1; 834d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt } 8351beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt} 8361beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 83714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic void __init setup_u3_ht(struct pci_controller* hose) 83814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 83944ef339073f67d4abcc62ae52a5fbc069d7a4d29Stephen Rothwell struct device_node *np = hose->dn; 840444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt struct resource cfg_res, self_res; 841d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt u32 decode; 8421beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 84314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->ops = &u3_ht_pci_ops; 84414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 845444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt /* Get base addresses from OF tree 846444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt */ 847444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt if (of_address_to_resource(np, 0, &cfg_res) || 848444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt of_address_to_resource(np, 1, &self_res)) { 849444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt printk(KERN_ERR "PCI: Failed to get U3/U4 HT resources !\n"); 850444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt return; 851444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt } 852444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt 853444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt /* Map external cfg space access into cfg_data and self registers 854444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt * into cfg_addr 85514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 856444532d44aa6bc4d6e3ca74d8ad99c36f3b4d9f0Benjamin Herrenschmidt hose->cfg_data = ioremap(cfg_res.start, 0x02000000); 85728f65c11f2ffb3957259dece647a24f8ad2e241bJoe Perches hose->cfg_addr = ioremap(self_res.start, resource_size(&self_res)); 85814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 85914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* 860d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * /ht node doesn't expose a "ranges" property, we read the register 861d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * that controls the decoding logic and use that for memory regions. 862d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * The IO region is hard coded since it is fixed in HW as well. 86314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 86414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->io_base_phys = 0xf4000000; 86535499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras hose->pci_io_size = 0x00400000; 86614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->io_resource.name = np->full_name; 86714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->io_resource.start = 0; 86814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->io_resource.end = 0x003fffff; 86914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->io_resource.flags = IORESOURCE_IO; 87014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->first_busno = 0; 87114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras hose->last_busno = 0xef; 87214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 873d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt /* Note: fix offset when cfg_addr becomes a void * */ 874d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt decode = in_be32(hose->cfg_addr + 0x80); 875d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt 876d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt DBG("PCI: Apple HT bridge decode register: 0x%08x\n", decode); 877d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt 878d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt /* NOTE: The decode register setup is a bit weird... region 879d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * 0xf8000000 for example is marked as enabled in there while it's 880d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt & actually the memory controller registers. 881d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * That means that we are incorrectly attributing it to HT. 882d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * 883d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * In a similar vein, region 0xf4000000 is actually the HT IO space but 884d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * also marked as enabled in here and 0xf9000000 is used by some other 885d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * internal bits of the northbridge. 886d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * 887d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * Unfortunately, we can't just mask out those bit as we would end 888d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * up with more regions than we can cope (linux can only cope with 889d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * 3 memory regions for a PHB at this stage). 890d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * 891d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * So for now, we just do a little hack. We happen to -know- that 892d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * Apple firmware doesn't assign things below 0xfa000000 for that 893d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt * bridge anyway so we mask out all bits we don't want. 89414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 895d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt decode &= 0x003fffff; 896d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt 897d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt /* Now parse the resulting bits and build resources */ 898d0264ce796e4e3d77fdadf72d6625f8e6c1c96bdBenjamin Herrenschmidt parse_region_decode(hose, decode); 89914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 900cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt#endif /* CONFIG_PPC64 */ 90114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 90214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* 90314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * We assume that if we have a G3 powermac, we have one bridge called 90414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * "pci" (a MPC106) and no bandit or chaos bridges, and contrariwise, 90514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * if we have one or more bandit or chaos bridges, we don't have a MPC106. 90614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 90709b55f76c9e41ed88f445f64f00ed39b48ed137dArnd Bergmannstatic int __init pmac_add_bridge(struct device_node *dev) 90814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 90914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int len; 91014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras struct pci_controller *hose; 911cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt struct resource rsrc; 91235499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras char *disp_name; 913018a3d1db7cdb6127656c1622ee1d2302e16436dJeremy Kerr const int *bus_range; 914cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt int primary = 1, has_address = 0; 91514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 91614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras DBG("Adding PCI host bridge %s\n", dev->full_name); 91714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 918cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt /* Fetch host bridge registers address */ 919cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt has_address = (of_address_to_resource(dev, 0, &rsrc) == 0); 920cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt 921cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt /* Get bus range if any */ 922e2eb63927bfcb54232163bfec32440246fd44457Stephen Rothwell bus_range = of_get_property(dev, "bus-range", &len); 92335499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras if (bus_range == NULL || len < 2 * sizeof(int)) { 924b5166cc252190be80465f3b4f050e4a0310f71afBenjamin Herrenschmidt printk(KERN_WARNING "Can't get bus-range for %s, assume" 925b5166cc252190be80465f3b4f050e4a0310f71afBenjamin Herrenschmidt " bus 0\n", dev->full_name); 92635499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras } 92735499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras 928b5166cc252190be80465f3b4f050e4a0310f71afBenjamin Herrenschmidt hose = pcibios_alloc_controller(dev); 92935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras if (!hose) 93035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras return -ENOMEM; 93135499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras hose->first_busno = bus_range ? bus_range[0] : 0; 93235499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras hose->last_busno = bus_range ? bus_range[1] : 0xff; 93314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 93414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras disp_name = NULL; 935cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt 936cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt /* 64 bits only bridges */ 937b5166cc252190be80465f3b4f050e4a0310f71afBenjamin Herrenschmidt#ifdef CONFIG_PPC64 93855b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell if (of_device_is_compatible(dev, "u3-agp")) { 93935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras setup_u3_agp(hose); 94035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras disp_name = "U3-AGP"; 94135499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras primary = 0; 94255b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell } else if (of_device_is_compatible(dev, "u3-ht")) { 94335499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras setup_u3_ht(hose); 94435499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras disp_name = "U3-HT"; 94535499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras primary = 1; 94655b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell } else if (of_device_is_compatible(dev, "u4-pcie")) { 9471beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt setup_u4_pcie(hose); 9481beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt disp_name = "U4-PCIE"; 9491beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt primary = 0; 95035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras } 9511beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt printk(KERN_INFO "Found %s PCI host bridge. Firmware bus number:" 9521beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt " %d->%d\n", disp_name, hose->first_busno, hose->last_busno); 953cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt#endif /* CONFIG_PPC64 */ 954cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt 955cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt /* 32 bits only bridges */ 956cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt#ifdef CONFIG_PPC32 95755b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell if (of_device_is_compatible(dev, "uni-north")) { 958cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt primary = setup_uninorth(hose, &rsrc); 95935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras disp_name = "UniNorth"; 9603c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras } else if (strcmp(dev->name, "pci") == 0) { 96135499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras /* XXX assume this is a mpc106 (grackle) */ 96235499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras setup_grackle(hose); 96335499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras disp_name = "Grackle (MPC106)"; 96435499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras } else if (strcmp(dev->name, "bandit") == 0) { 965cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt setup_bandit(hose, &rsrc); 96635499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras disp_name = "Bandit"; 96735499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras } else if (strcmp(dev->name, "chaos") == 0) { 968cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt setup_chaos(hose, &rsrc); 96935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras disp_name = "Chaos"; 97035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras primary = 0; 97135499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras } 972685143ac1f7a579a3fac9c7f2ac8f82e95af6864Greg Kroah-Hartman printk(KERN_INFO "Found %s PCI host bridge at 0x%016llx. " 973cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt "Firmware bus number: %d->%d\n", 974685143ac1f7a579a3fac9c7f2ac8f82e95af6864Greg Kroah-Hartman disp_name, (unsigned long long)rsrc.start, hose->first_busno, 975685143ac1f7a579a3fac9c7f2ac8f82e95af6864Greg Kroah-Hartman hose->last_busno); 976cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt#endif /* CONFIG_PPC32 */ 977cc5d0189b9ba95260857a5018a1c2fef90008507Benjamin Herrenschmidt 97835499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", 97935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras hose, hose->cfg_addr, hose->cfg_data); 98035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras 98135499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras /* Interpret the "ranges" property */ 98235499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras /* This also maps the I/O region and sets isa_io/mem_base */ 98335499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras pci_process_bridge_OF_ranges(hose, dev, primary); 98435499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras 98535499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras /* Fixup "bus-range" OF property */ 98635499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras fixup_bus_range(dev); 98714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 98814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return 0; 98914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 99014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 991cad5cef62a5a0c525d39118d2e94b6e2034d5e05Greg Kroah-Hartmanvoid pmac_pci_irq_fixup(struct pci_dev *dev) 99214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 9936e99e4582861578fb00d84d085f8f283569f51ddBenjamin Herrenschmidt#ifdef CONFIG_PPC32 994f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt /* Fixup interrupt for the modem/ethernet combo controller. 995f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt * on machines with a second ohare chip. 996f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt * The number in the device tree (27) is bogus (correct for 997f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt * the ethernet-only board but not the combo ethernet/modem 998f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt * board). The real interrupt is 28 on the second controller 999f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt * -> 28+32 = 60. 1000f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt */ 1001f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt if (has_second_ohare && 1002f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt dev->vendor == PCI_VENDOR_ID_DEC && 1003f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt dev->device == PCI_DEVICE_ID_DEC_TULIP_PLUS) { 1004f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt dev->irq = irq_create_mapping(NULL, 60); 1005ec775d0e70eb6b7116406b3441cb8501c2849dd2Thomas Gleixner irq_set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW); 100614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 1007f90bb153b1493719d18b4529a46ebfe43220ea6cBenjamin Herrenschmidt#endif /* CONFIG_PPC32 */ 100814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 100914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 101035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerrasvoid __init pmac_pci_init(void) 10113c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras{ 10123c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras struct device_node *np, *root; 10133c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras struct device_node *ht = NULL; 10143c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras 10150e47ff1ce65bbd0b12a9421a2756b26987ea5083Rob Herring pci_set_flags(PCI_CAN_SKIP_ISA_ALIGN); 10163fd94c6b1a1158d3e0e505b0a00c3a707b5fcd40Benjamin Herrenschmidt 10173c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras root = of_find_node_by_path("/"); 10183c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras if (root == NULL) { 101935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras printk(KERN_CRIT "pmac_pci_init: can't find root " 102035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras "of device tree\n"); 10213c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras return; 10223c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras } 10233c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras for (np = NULL; (np = of_get_next_child(root, np)) != NULL;) { 10243c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras if (np->name == NULL) 10253c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras continue; 10263c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras if (strcmp(np->name, "bandit") == 0 10273c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras || strcmp(np->name, "chaos") == 0 10283c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras || strcmp(np->name, "pci") == 0) { 102909b55f76c9e41ed88f445f64f00ed39b48ed137dArnd Bergmann if (pmac_add_bridge(np) == 0) 10303c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras of_node_get(np); 10313c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras } 10323c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras if (strcmp(np->name, "ht") == 0) { 10333c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras of_node_get(np); 10343c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras ht = np; 10353c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras } 10363c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras } 10373c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras of_node_put(root); 10383c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras 103935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras#ifdef CONFIG_PPC64 10403c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras /* Probe HT last as it relies on the agp resources to be already 10413c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras * setup 10423c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras */ 104309b55f76c9e41ed88f445f64f00ed39b48ed137dArnd Bergmann if (ht && pmac_add_bridge(ht) != 0) 10443c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras of_node_put(ht); 10453c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras 104635499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras /* Setup the linkage between OF nodes and PHBs */ 104735499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras pci_devs_phb_init(); 104835499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras 104935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras /* Fixup the PCI<->OF mapping for U3 AGP due to bus renumbering. We 105035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras * assume there is no P2P bridge on the AGP bus, which should be a 10511beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * safe assumptions for now. We should do something better in the 10521beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt * future though 105335499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras */ 105435499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras if (u3_agp) { 105544ef339073f67d4abcc62ae52a5fbc069d7a4d29Stephen Rothwell struct device_node *np = u3_agp->dn; 105635499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras PCI_DN(np)->busno = 0xf0; 105735499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras for (np = np->child; np; np = np->sibling) 105835499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras PCI_DN(np)->busno = 0xf0; 105935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras } 106035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras /* pmac_check_ht_link(); */ 106135499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras 106235499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras#else /* CONFIG_PPC64 */ 10633c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras init_p2pbridge(); 10640ebfff1491ef85d41ddf9c633834838be144f69fBenjamin Herrenschmidt init_second_ohare(); 10653c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras fixup_nec_usb2(); 106635499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras 10673c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras /* We are still having some issues with the Xserve G4, enabling 10683c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras * some offset between bus number and domains for now when we 10693c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras * assign all busses should help for now 10703c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras */ 10710e47ff1ce65bbd0b12a9421a2756b26987ea5083Rob Herring if (pci_has_flag(PCI_REASSIGN_ALL_BUS)) 10723c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras pcibios_assign_bus_offset = 0x10; 107335499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras#endif 10743c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras} 10753c3f42d63a11f2e22dbff6bb4d170f92dbd39316Paul Mackerras 1076bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt#ifdef CONFIG_PPC32 1077549beb9ba3b03345cbd8e1233825d5b197a3f9f7Benjamin Herrenschmidtint pmac_pci_enable_device_hook(struct pci_dev *dev) 107814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 107914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras struct device_node* node; 108014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int updatecfg = 0; 108114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int uninorth_child; 108214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 108314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras node = pci_device_to_OF_node(dev); 108414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 108514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* We don't want to enable USB controllers absent from the OF tree 108614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * (iBook second controller) 108714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 108814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (dev->vendor == PCI_VENDOR_ID_APPLE 1089c67808eee61a01c3128298c5972426a1a67b9093Jean Delvare && dev->class == PCI_CLASS_SERIAL_USB_OHCI 109014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras && !node) { 109114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras printk(KERN_INFO "Apple USB OHCI %s disabled by firmware\n", 109214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pci_name(dev)); 109314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return -EINVAL; 109414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 109514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 109614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (!node) 109714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return 0; 109814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 109914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras uninorth_child = node->parent && 110055b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell of_device_is_compatible(node->parent, "uni-north"); 110135499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras 110214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* Firewire & GMAC were disabled after PCI probe, the driver is 110314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * claiming them, we must re-enable them now. 110414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 110514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (uninorth_child && !strcmp(node->name, "firewire") && 110655b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell (of_device_is_compatible(node, "pci106b,18") || 110755b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell of_device_is_compatible(node, "pci106b,30") || 110855b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell of_device_is_compatible(node, "pci11c1,5811"))) { 110914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, node, 0, 1); 111014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pmac_call_feature(PMAC_FTR_1394_ENABLE, node, 0, 1); 111114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras updatecfg = 1; 111214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 111314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (uninorth_child && !strcmp(node->name, "ethernet") && 111455b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell of_device_is_compatible(node, "gmac")) { 111514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pmac_call_feature(PMAC_FTR_GMAC_ENABLE, node, 0, 1); 111614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras updatecfg = 1; 111714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 111814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 1119549beb9ba3b03345cbd8e1233825d5b197a3f9f7Benjamin Herrenschmidt /* 1120549beb9ba3b03345cbd8e1233825d5b197a3f9f7Benjamin Herrenschmidt * Fixup various header fields on 32 bits. We don't do that on 1121549beb9ba3b03345cbd8e1233825d5b197a3f9f7Benjamin Herrenschmidt * 64 bits as some of these have strange values behind the HT 1122549beb9ba3b03345cbd8e1233825d5b197a3f9f7Benjamin Herrenschmidt * bridge and we must not, for example, enable MWI or set the 1123549beb9ba3b03345cbd8e1233825d5b197a3f9f7Benjamin Herrenschmidt * cache line size on them. 1124549beb9ba3b03345cbd8e1233825d5b197a3f9f7Benjamin Herrenschmidt */ 112514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (updatecfg) { 112614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras u16 cmd; 112735499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras 112814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pci_read_config_word(dev, PCI_COMMAND, &cmd); 112935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER 113035499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras | PCI_COMMAND_INVALIDATE; 113135499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras pci_write_config_word(dev, PCI_COMMAND, cmd); 113235499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras pci_write_config_byte(dev, PCI_LATENCY_TIMER, 16); 1133549beb9ba3b03345cbd8e1233825d5b197a3f9f7Benjamin Herrenschmidt 113435499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 113535499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras L1_CACHE_BYTES >> 2); 113614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 113714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 113814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return 0; 113914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 114014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 1141cad5cef62a5a0c525d39118d2e94b6e2034d5e05Greg Kroah-Hartmanvoid pmac_pci_fixup_ohci(struct pci_dev *dev) 1142bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt{ 1143bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt struct device_node *node = pci_device_to_OF_node(dev); 1144bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt 1145bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt /* We don't want to assign resources to USB controllers 1146bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt * absent from the OF tree (iBook second controller) 1147bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt */ 1148bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt if (dev->class == PCI_CLASS_SERIAL_USB_OHCI && !node) 1149bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt dev->resource[0].flags = 0; 1150bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt} 1151bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin HerrenschmidtDECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_APPLE, PCI_ANY_ID, pmac_pci_fixup_ohci); 1152bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt 115314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* We power down some devices after they have been probed. They'll 115414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * be powered back on later on 115514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 115635499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerrasvoid __init pmac_pcibios_after_init(void) 115714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 115814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras struct device_node* nd; 115914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 116030686ba6d56858657829d3eb524ed73e5dc98d2bStephen Rothwell for_each_node_by_name(nd, "firewire") { 116155b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell if (nd->parent && (of_device_is_compatible(nd, "pci106b,18") || 116255b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell of_device_is_compatible(nd, "pci106b,30") || 116355b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell of_device_is_compatible(nd, "pci11c1,5811")) 116455b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell && of_device_is_compatible(nd->parent, "uni-north")) { 116514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pmac_call_feature(PMAC_FTR_1394_ENABLE, nd, 0, 0); 116614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, nd, 0, 0); 116714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 116814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 116930686ba6d56858657829d3eb524ed73e5dc98d2bStephen Rothwell for_each_node_by_name(nd, "ethernet") { 117055b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell if (nd->parent && of_device_is_compatible(nd, "gmac") 117155b61fec22caa3e7872caea6c4100fc75cb8f49bStephen Rothwell && of_device_is_compatible(nd->parent, "uni-north")) 117214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pmac_call_feature(PMAC_FTR_GMAC_ENABLE, nd, 0, 0); 117314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 117414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 117514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 117614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasvoid pmac_pci_fixup_cardbus(struct pci_dev* dev) 117714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 1178e8222502ee6157e2713da9e0792c21f4ad458d50Benjamin Herrenschmidt if (!machine_is(powermac)) 117914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return; 118014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* 118114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Fix the interrupt routing on the various cardbus bridges 118214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * used on powerbooks 118314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 118414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (dev->vendor != PCI_VENDOR_ID_TI) 118514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return; 118614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (dev->device == PCI_DEVICE_ID_TI_1130 || 118714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras dev->device == PCI_DEVICE_ID_TI_1131) { 118814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras u8 val; 118935499c0195e46f479cf6ac16ad8d3f394b5fcc10Paul Mackerras /* Enable PCI interrupt */ 119014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (pci_read_config_byte(dev, 0x91, &val) == 0) 119114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pci_write_config_byte(dev, 0x91, val | 0x30); 119214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* Disable ISA interrupt mode */ 119314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (pci_read_config_byte(dev, 0x92, &val) == 0) 119414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pci_write_config_byte(dev, 0x92, val & ~0x06); 119514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 119614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (dev->device == PCI_DEVICE_ID_TI_1210 || 119714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras dev->device == PCI_DEVICE_ID_TI_1211 || 119814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras dev->device == PCI_DEVICE_ID_TI_1410 || 119914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras dev->device == PCI_DEVICE_ID_TI_1510) { 120014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras u8 val; 120114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* 0x8c == TI122X_IRQMUX, 2 says to route the INTA 120214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras signal out the MFUNC0 pin */ 120314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (pci_read_config_byte(dev, 0x8c, &val) == 0) 120414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pci_write_config_byte(dev, 0x8c, (val & ~0x0f) | 2); 120514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* Disable ISA interrupt mode */ 120614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (pci_read_config_byte(dev, 0x92, &val) == 0) 120714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pci_write_config_byte(dev, 0x92, val & ~0x06); 120814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 120914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 121014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 121114cf11af6cf608eb8c23e989ddb17a715ddce109Paul MackerrasDECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TI, PCI_ANY_ID, pmac_pci_fixup_cardbus); 121214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 121314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasvoid pmac_pci_fixup_pciata(struct pci_dev* dev) 121414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 121514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras u8 progif = 0; 121614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 121714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* 121814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * On PowerMacs, we try to switch any PCI ATA controller to 121914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * fully native mode 122014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 1221e8222502ee6157e2713da9e0792c21f4ad458d50Benjamin Herrenschmidt if (!machine_is(powermac)) 122214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return; 1223e8222502ee6157e2713da9e0792c21f4ad458d50Benjamin Herrenschmidt 122414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* Some controllers don't have the class IDE */ 122514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (dev->vendor == PCI_VENDOR_ID_PROMISE) 122614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras switch(dev->device) { 122714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20246: 122814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20262: 122914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20263: 123014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20265: 123114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20267: 123214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20268: 123314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20269: 123414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20270: 123514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20271: 123614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20275: 123714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20276: 123814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras case PCI_DEVICE_ID_PROMISE_20277: 123914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras goto good; 124014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 124114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras /* Others, check PCI class */ 124214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) 124314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras return; 124414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras good: 124514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pci_read_config_byte(dev, PCI_CLASS_PROG, &progif); 124614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if ((progif & 5) != 5) { 12476d98bda79bea0e1be26c0767d0e9923ad3b72f2eBenjamin Herrenschmidt printk(KERN_INFO "PCI: %s Forcing PCI IDE into native mode\n", 12481beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt pci_name(dev)); 124914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); 125014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 125114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras (progif & 5) != 5) 125214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras printk(KERN_ERR "Rewrite of PROGIF failed !\n"); 12536d98bda79bea0e1be26c0767d0e9923ad3b72f2eBenjamin Herrenschmidt else { 12546d98bda79bea0e1be26c0767d0e9923ad3b72f2eBenjamin Herrenschmidt /* Clear IO BARs, they will be reassigned */ 12556d98bda79bea0e1be26c0767d0e9923ad3b72f2eBenjamin Herrenschmidt pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0); 12566d98bda79bea0e1be26c0767d0e9923ad3b72f2eBenjamin Herrenschmidt pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0); 12576d98bda79bea0e1be26c0767d0e9923ad3b72f2eBenjamin Herrenschmidt pci_write_config_dword(dev, PCI_BASE_ADDRESS_2, 0); 12586d98bda79bea0e1be26c0767d0e9923ad3b72f2eBenjamin Herrenschmidt pci_write_config_dword(dev, PCI_BASE_ADDRESS_3, 0); 12596d98bda79bea0e1be26c0767d0e9923ad3b72f2eBenjamin Herrenschmidt } 126014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 126114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 12626d98bda79bea0e1be26c0767d0e9923ad3b72f2eBenjamin HerrenschmidtDECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata); 1263bc0826cfb102b6f360f2ec3082fa794f5dbbdee7Benjamin Herrenschmidt#endif /* CONFIG_PPC32 */ 126414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 126514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras/* 126614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * Disable second function on K2-SATA, it's broken 126714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras * and disable IO BARs on first one 126814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras */ 126914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerrasstatic void fixup_k2_sata(struct pci_dev* dev) 127014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras{ 127114cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras int i; 127214cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras u16 cmd; 127314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 127414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras if (PCI_FUNC(dev->devfn) > 0) { 127514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pci_read_config_word(dev, PCI_COMMAND, &cmd); 127614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY); 127714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pci_write_config_word(dev, PCI_COMMAND, cmd); 127814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras for (i = 0; i < 6; i++) { 127914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras dev->resource[i].start = dev->resource[i].end = 0; 128014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras dev->resource[i].flags = 0; 12811beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + 4 * i, 12821beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 0); 128314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 128414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } else { 128514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pci_read_config_word(dev, PCI_COMMAND, &cmd); 128614cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras cmd &= ~PCI_COMMAND_IO; 128714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras pci_write_config_word(dev, PCI_COMMAND, cmd); 128814cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras for (i = 0; i < 5; i++) { 128914cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras dev->resource[i].start = dev->resource[i].end = 0; 129014cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras dev->resource[i].flags = 0; 12911beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + 4 * i, 12921beb6a7d6cbed3ac03500ce9b5b9bb632c512039Benjamin Herrenschmidt 0); 129314cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 129414cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras } 129514cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras} 129614cf11af6cf608eb8c23e989ddb17a715ddce109Paul MackerrasDECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, 0x0240, fixup_k2_sata); 129714cf11af6cf608eb8c23e989ddb17a715ddce109Paul Mackerras 1298cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt/* 1299cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * On U4 (aka CPC945) the PCIe root complex "P2P" bridge resource ranges aren't 1300cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * configured by the firmware. The bridge itself seems to ignore them but it 1301cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * causes problems with Linux which then re-assigns devices below the bridge, 1302cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * thus changing addresses of those devices from what was in the device-tree, 1303cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * which sucks when those are video cards using offb 1304cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * 1305cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * We could just mark it transparent but I prefer fixing up the resources to 1306cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * properly show what's going on here, as I have some doubts about having them 1307cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * badly configured potentially being an issue for DMA. 1308cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * 1309cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * We leave PIO alone, it seems to be fine 1310cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * 1311cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * Oh and there's another funny bug. The OF properties advertize the region 1312cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * 0xf1000000..0xf1ffffff as being forwarded as memory space. But that's 1313cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * actually not true, this region is the memory mapped config space. So we 1314cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * also need to filter it out or we'll map things in the wrong place. 1315cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt */ 1316cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidtstatic void fixup_u4_pcie(struct pci_dev* dev) 1317cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt{ 1318cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt struct pci_controller *host = pci_bus_to_host(dev->bus); 1319cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt struct resource *region = NULL; 1320cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt u32 reg; 1321cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt int i; 1322cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt 1323cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt /* Only do that on PowerMac */ 1324cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt if (!machine_is(powermac)) 1325cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt return; 1326cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt 1327cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt /* Find the largest MMIO region */ 1328cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt for (i = 0; i < 3; i++) { 1329cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt struct resource *r = &host->mem_resources[i]; 1330cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt if (!(r->flags & IORESOURCE_MEM)) 1331cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt continue; 1332cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt /* Skip the 0xf0xxxxxx..f2xxxxxx regions, we know they 1333cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * are reserved by HW for other things 1334cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt */ 1335cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt if (r->start >= 0xf0000000 && r->start < 0xf3000000) 1336cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt continue; 133728f65c11f2ffb3957259dece647a24f8ad2e241bJoe Perches if (!region || resource_size(r) > resource_size(region)) 1338cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt region = r; 1339cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt } 1340cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt /* Nothing found, bail */ 1341cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt if (region == 0) 1342cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt return; 1343cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt 1344cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt /* Print things out */ 1345cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt printk(KERN_INFO "PCI: Fixup U4 PCIe bridge range: %pR\n", region); 1346cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt 1347cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt /* Fixup bridge config space. We know it's a Mac, resource aren't 1348cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * offset so let's just blast them as-is. We also know that they 1349cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt * fit in 32 bits 1350cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt */ 1351cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt reg = ((region->start >> 16) & 0xfff0) | (region->end & 0xfff00000); 1352cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt pci_write_config_dword(dev, PCI_MEMORY_BASE, reg); 1353cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0); 1354cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0); 1355cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0); 1356cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin Herrenschmidt} 1357cede3930f0ca6fef353fa01306c72a01420bd45eBenjamin HerrenschmidtDECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_U4_PCIE, fixup_u4_pcie); 1358