11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * include/asm-sh/cpu-sh3/mmu_context.h 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1999 Niibe Yutaka 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This file is subject to the terms and conditions of the GNU General Public 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * License. See the file "COPYING" in the main directory of this archive 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * for more details. 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef __ASM_CPU_SH3_MMU_CONTEXT_H 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __ASM_CPU_SH3_MMU_CONTEXT_H 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MMU_PTEH 0xFFFFFFF0 /* Page table entry register HIGH */ 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MMU_PTEL 0xFFFFFFF4 /* Page table entry register LOW */ 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MMU_TTB 0xFFFFFFF8 /* Translation table base register */ 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MMU_TEA 0xFFFFFFFC /* TLB Exception Address */ 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MMUCR 0xFFFFFFE0 /* MMU Control Register */ 1906c7a489a97fce99fd86611f6f32e565e686e5d8Paul Mundt#define MMUCR_TI (1 << 2) /* TLB flush bit */ 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MMU_TLB_ADDRESS_ARRAY 0xF2000000 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MMU_PAGE_ASSOC_BIT 0x80 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MMU_NTLB_ENTRIES 128 /* for 7708 */ 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MMU_NTLB_WAYS 4 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MMU_CONTROL_INIT 0x007 /* SV=0, TF=1, IX=1, AT=1 */ 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 28091904ae5fc6f018680f83d71301ceac4f39d77fPaul Mundt#define TRA 0xffffffd0 29091904ae5fc6f018680f83d71301ceac4f39d77fPaul Mundt#define EXPEVT 0xffffffd4 30091904ae5fc6f018680f83d71301ceac4f39d77fPaul Mundt 313ea6bc3de4f15fcae84fb31eeea4d420685a3da2Markus Brunner#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 32e5723e0eeb2dc16629e86d66785024ead9169000Paul Mundt defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 333ea6bc3de4f15fcae84fb31eeea4d420685a3da2Markus Brunner defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 343ea6bc3de4f15fcae84fb31eeea4d420685a3da2Markus Brunner defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 353ea6bc3de4f15fcae84fb31eeea4d420685a3da2Markus Brunner defined(CONFIG_CPU_SUBTYPE_SH7710) || \ 369465a54fa4a9da628091c372baa84120f8304587Nobuhiro Iwamatsu defined(CONFIG_CPU_SUBTYPE_SH7712) || \ 3731a49c4bf8f964b7a9897baa889916d71b51d9c1Yoshihiro Shimoda defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 3831a49c4bf8f964b7a9897baa889916d71b51d9c1Yoshihiro Shimoda defined(CONFIG_CPU_SUBTYPE_SH7721) 39091904ae5fc6f018680f83d71301ceac4f39d77fPaul Mundt#define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ 40091904ae5fc6f018680f83d71301ceac4f39d77fPaul Mundt#else 41091904ae5fc6f018680f83d71301ceac4f39d77fPaul Mundt#define INTEVT 0xffffffd8 42091904ae5fc6f018680f83d71301ceac4f39d77fPaul Mundt#endif 43091904ae5fc6f018680f83d71301ceac4f39d77fPaul Mundt 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* __ASM_CPU_SH3_MMU_CONTEXT_H */ 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 46