131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin/* -*- linux-c -*- ------------------------------------------------------- * 231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * 331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * Copyright (C) 1991, 1992 Linus Torvalds 431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * Copyright 2007 rPath, Inc. - All Rights Reserved 531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * 631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * This file is part of the Linux kernel, and is made available under 731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * the terms of the GNU General Public License version 2. 831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * 931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * ----------------------------------------------------------------------- */ 1031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 1131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin/* 1231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * Check for obligatory CPU features and abort if the features are not 1331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * present. This code should be compilable as 16-, 32- or 64-bit 1431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * code, so be very careful with types and inline assembly. 1531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * 1631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * This code should not contain any messages; that requires an 1731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * additional wrapper. 1831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * 1931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * As written, this code is not safe for inclusion into the kernel 2031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * proper (after FPU initialization, in particular). 2131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin */ 2231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 2331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin#ifdef _SETUP 2431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin# include "boot.h" 2531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin#endif 2631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin#include <linux/types.h> 2731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin#include <asm/processor-flags.h> 2831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin#include <asm/required-features.h> 2931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin#include <asm/msr-index.h> 30c041b5ad8640dd89ccf1411cd2636ef7c1cfee92Vivek Goyal#include "string.h" 3131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 3231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvinstatic u32 err_flags[NCAPINTS]; 3331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 3431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvinstatic const int req_level = CONFIG_X86_MINIMUM_CPU_FAMILY; 3531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 3631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvinstatic const u32 req_flags[NCAPINTS] = 3731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin{ 3831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin REQUIRED_MASK0, 3931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin REQUIRED_MASK1, 40b74b06c5f6612a72298f37baa65460a59c26ca67H. Peter Anvin 0, /* REQUIRED_MASK2 not implemented in this file */ 41b74b06c5f6612a72298f37baa65460a59c26ca67H. Peter Anvin 0, /* REQUIRED_MASK3 not implemented in this file */ 4231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin REQUIRED_MASK4, 43b74b06c5f6612a72298f37baa65460a59c26ca67H. Peter Anvin 0, /* REQUIRED_MASK5 not implemented in this file */ 4431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin REQUIRED_MASK6, 45b74b06c5f6612a72298f37baa65460a59c26ca67H. Peter Anvin 0, /* REQUIRED_MASK7 not implemented in this file */ 4631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin}; 4731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 487030760ae5d29d637d1e962c70d1d9c58be3306fPaolo Ciarrocchi#define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a)) 4931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 5031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvinstatic int is_amd(void) 5131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin{ 527030760ae5d29d637d1e962c70d1d9c58be3306fPaolo Ciarrocchi return cpu_vendor[0] == A32('A', 'u', 't', 'h') && 537030760ae5d29d637d1e962c70d1d9c58be3306fPaolo Ciarrocchi cpu_vendor[1] == A32('e', 'n', 't', 'i') && 547030760ae5d29d637d1e962c70d1d9c58be3306fPaolo Ciarrocchi cpu_vendor[2] == A32('c', 'A', 'M', 'D'); 5531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin} 5631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 5731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvinstatic int is_centaur(void) 5831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin{ 597030760ae5d29d637d1e962c70d1d9c58be3306fPaolo Ciarrocchi return cpu_vendor[0] == A32('C', 'e', 'n', 't') && 607030760ae5d29d637d1e962c70d1d9c58be3306fPaolo Ciarrocchi cpu_vendor[1] == A32('a', 'u', 'r', 'H') && 617030760ae5d29d637d1e962c70d1d9c58be3306fPaolo Ciarrocchi cpu_vendor[2] == A32('a', 'u', 'l', 's'); 6231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin} 6331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 6431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvinstatic int is_transmeta(void) 6531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin{ 667030760ae5d29d637d1e962c70d1d9c58be3306fPaolo Ciarrocchi return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && 677030760ae5d29d637d1e962c70d1d9c58be3306fPaolo Ciarrocchi cpu_vendor[1] == A32('i', 'n', 'e', 'T') && 687030760ae5d29d637d1e962c70d1d9c58be3306fPaolo Ciarrocchi cpu_vendor[2] == A32('M', 'x', '8', '6'); 6931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin} 7031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 7169f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridgestatic int is_intel(void) 7269f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge{ 7369f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && 7469f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge cpu_vendor[1] == A32('i', 'n', 'e', 'I') && 7569f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge cpu_vendor[2] == A32('n', 't', 'e', 'l'); 7669f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge} 7769f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge 7831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin/* Returns a bitmask of which words we have error bits in */ 796e6a4932b0f569b1a5bb4fcbf5dde1b1a42f01bbH. Peter Anvinstatic int check_cpuflags(void) 8031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin{ 8131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin u32 err; 8231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin int i; 8331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 8431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin err = 0; 8531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin for (i = 0; i < NCAPINTS; i++) { 8631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin err_flags[i] = req_flags[i] & ~cpu.flags[i]; 8731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin if (err_flags[i]) 8831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin err |= 1 << i; 8931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin } 9031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 9131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin return err; 9231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin} 9331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 9431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin/* 9531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * Returns -1 on error. 9631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * 9731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * *cpu_level is set to the current CPU level; *req_level to the required 9831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * level. x86-64 is considered level 64 for this purpose. 9931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * 10031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin * *err_flags_ptr is set to the flags error array if there are flags missing. 10131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin */ 10231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvinint check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr) 10331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin{ 10431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin int err; 10531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 10631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin memset(&cpu.flags, 0, sizeof cpu.flags); 10731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin cpu.level = 3; 10831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 10931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin if (has_eflag(X86_EFLAGS_AC)) 11031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin cpu.level = 4; 11131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 1126e6a4932b0f569b1a5bb4fcbf5dde1b1a42f01bbH. Peter Anvin get_cpuflags(); 1136e6a4932b0f569b1a5bb4fcbf5dde1b1a42f01bbH. Peter Anvin err = check_cpuflags(); 11431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 11531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin if (test_bit(X86_FEATURE_LM, cpu.flags)) 11631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin cpu.level = 64; 11731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 11831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin if (err == 0x01 && 11931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin !(err_flags[0] & 12031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin ~((1 << X86_FEATURE_XMM)|(1 << X86_FEATURE_XMM2))) && 12131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin is_amd()) { 12231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin /* If this is an AMD and we're only missing SSE+SSE2, try to 12331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin turn them on */ 12431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 12531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin u32 ecx = MSR_K7_HWCR; 12631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin u32 eax, edx; 12731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 12831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx)); 12931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin eax &= ~(1 << 15); 13031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); 13131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 1326e6a4932b0f569b1a5bb4fcbf5dde1b1a42f01bbH. Peter Anvin get_cpuflags(); /* Make sure it really did something */ 1336e6a4932b0f569b1a5bb4fcbf5dde1b1a42f01bbH. Peter Anvin err = check_cpuflags(); 13431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin } else if (err == 0x01 && 13531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin !(err_flags[0] & ~(1 << X86_FEATURE_CX8)) && 13631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin is_centaur() && cpu.model >= 6) { 13731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin /* If this is a VIA C3, we might have to enable CX8 13831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin explicitly */ 13931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 14031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin u32 ecx = MSR_VIA_FCR; 14131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin u32 eax, edx; 14231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 14331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx)); 14431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin eax |= (1<<1)|(1<<7); 14531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); 14631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 14731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin set_bit(X86_FEATURE_CX8, cpu.flags); 1486e6a4932b0f569b1a5bb4fcbf5dde1b1a42f01bbH. Peter Anvin err = check_cpuflags(); 14931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin } else if (err == 0x01 && is_transmeta()) { 15031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin /* Transmeta might have masked feature bits in word 0 */ 15131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 15231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin u32 ecx = 0x80860004; 15331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin u32 eax, edx; 15431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin u32 level = 1; 15531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 15631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx)); 15731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin asm("wrmsr" : : "a" (~0), "d" (edx), "c" (ecx)); 15831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin asm("cpuid" 15931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin : "+a" (level), "=d" (cpu.flags[0]) 16031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin : : "ecx", "ebx"); 16131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); 16231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 1636e6a4932b0f569b1a5bb4fcbf5dde1b1a42f01bbH. Peter Anvin err = check_cpuflags(); 16469f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge } else if (err == 0x01 && 16569f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) && 16669f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge is_intel() && cpu.level == 6 && 16769f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge (cpu.model == 9 || cpu.model == 13)) { 16869f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge /* PAE is disabled on this Pentium M but can be forced */ 16969f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge if (cmdline_find_option_bool("forcepae")) { 17069f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge puts("WARNING: Forcing PAE in CPU flags\n"); 17169f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge set_bit(X86_FEATURE_PAE, cpu.flags); 17269f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge err = check_cpuflags(); 17369f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge } 17469f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge else { 17569f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge puts("WARNING: PAE disabled. Use parameter 'forcepae' to enable at your own risk!\n"); 17669f2366c9456d0ce784cf5aba87ee77eeadc1d5eChris Bainbridge } 17731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin } 17831b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 17931b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin if (err_flags_ptr) 18031b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin *err_flags_ptr = err ? err_flags : NULL; 18131b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin if (cpu_level_ptr) 18231b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin *cpu_level_ptr = cpu.level; 18331b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin if (req_level_ptr) 18431b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin *req_level_ptr = req_level; 18531b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin 18631b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin return (cpu.level < req_level || err) ? -1 : 0; 18731b54f40e12e4d04941762be6615edaf3c6ed811H. Peter Anvin} 188