11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/bitops.h> 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/delay.h> 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/pci.h> 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/dma.h> 58bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox#include <linux/io.h> 6f25f64ed5bd3c2932493681bdfdb483ea707da0aJuergen Beisert#include <asm/processor-cyrix.h> 77ebad705340f35276326ed93a43190e62f725f77Dave Jones#include <asm/processor-flags.h> 88bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox#include <linux/timer.h> 9120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox#include <asm/pci-direct.h> 10e8edc6e03a5c8562dc70a6d969f732bdb355a7e7Alexey Dobriyan#include <asm/tsc.h> 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "cpu.h" 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Read NSC/Cyrix DEVID registers (DIR) to get more detailed info. about the CPU 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 17148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic void __do_cyrix_devid(unsigned char *dir0, unsigned char *dir1) 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char ccr2, ccr3; 20adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* we test for DEVID by checking whether CCR3 is writable */ 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 = getCx86(CX86_CCR3); 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR3, ccr3 ^ 0x80); 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds getCx86(0xc0); /* dummy to change bus */ 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (getCx86(CX86_CCR3) == ccr3) { /* no DEVID regs. */ 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr2 = getCx86(CX86_CCR2); 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR2, ccr2 ^ 0x04); 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds getCx86(0xc0); /* dummy */ 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (getCx86(CX86_CCR2) == ccr2) /* old Cx486SLC/DLC */ 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *dir0 = 0xfd; 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { /* Cx486S A step */ 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR2, ccr2); 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *dir0 = 0xfe; 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 37adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi } else { 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR3, ccr3); /* restore CCR3 */ 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* read DIR0 and DIR1 CPU registers */ 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *dir0 = getCx86(CX86_DIR0); 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *dir1 = getCx86(CX86_DIR1); 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 46148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic void do_cyrix_devid(unsigned char *dir0, unsigned char *dir1) 475fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu{ 485fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu unsigned long flags; 495fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu 505fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu local_irq_save(flags); 515fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu __do_cyrix_devid(dir0, dir1); 525fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu local_irq_restore(flags); 535fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu} 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Cx86_dir0_msb is a HACK needed by check_cx686_cpuid/slop in bugs.h in 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * order to identify the Cyrix CPU model after we're out of setup.c 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Actually since bugs.h doesn't even reference this perhaps someone should 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * fix the documentation ??? 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 61148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic unsigned char Cx86_dir0_msb = 0; 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 63148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic const char Cx86_model[][9] = { 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "Cx486", "Cx486", "5x86 ", "6x86", "MediaGX ", "6x86MX ", 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "M II ", "Unknown" 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 67148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic const char Cx486_name[][5] = { 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "SLC", "DLC", "SLC2", "DLC2", "SRx", "DRx", 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "SRx2", "DRx2" 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 71148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic const char Cx486S_name[][4] = { 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "S", "S2", "Se", "S2e" 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 74148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic const char Cx486D_name[][4] = { 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "DX", "DX2", "?", "?", "?", "DX4" 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 77148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic char Cx86_cb[] = "?.5x Core/Bus Clock"; 78148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic const char cyrix_model_mult1[] = "12??43"; 79148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic const char cyrix_model_mult2[] = "12233445"; 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Reset the slow-loop (SLOP) bit on the 686(L) which is set by some old 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * BIOSes for compatibility with DOS games. This makes the udelay loop 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * work correctly, and improves performance. 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * FIXME: our newer udelay uses the tsc. We don't need to frob with SLOP 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 89148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic void check_cx686_slop(struct cpuinfo_x86 *c) 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long flags; 92adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (Cx86_dir0_msb == 3) { 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char ccr3, ccr5; 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_save(flags); 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 = getCx86(CX86_CCR3); 98db955170d40601d9925f01712782fbe3ce362b7eMarcin Garski setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr5 = getCx86(CX86_CCR5); 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (ccr5 & 2) 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR5, ccr5 & 0xfd); /* reset SLOP */ 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_restore(flags); 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (ccr5 & 2) { /* possible wrong calibration done */ 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Recalibrating delay loop with SLOP bit reset\n"); 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds calibrate_delay(); 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds c->loops_per_jiffy = loops_per_jiffy; 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 114148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic void set_cx86_reorder(void) 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 ccr3; 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Enable Memory access reorder on Cyrix/NSC processor.\n"); 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 = getCx86(CX86_CCR3); 12096de0e252cedffad61b3cb5e05662c591898e69aJan Engelhardt setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12296de0e252cedffad61b3cb5e05662c591898e69aJan Engelhardt /* Load/Store Serialize to mem access disable (=reorder it) */ 123026e2c05ef58ef413e2d52696f125d5ea1aa8bceIngo Molnar setCx86_old(CX86_PCR0, getCx86_old(CX86_PCR0) & ~0x80); 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* set load/store serialize from 1GB to 4GB */ 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 |= 0xe0; 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR3, ccr3); 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 129148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic void set_cx86_memwb(void) 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Enable Memory-Write-back mode on Cyrix/NSC processor.\n"); 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* CCR2 bit 2: unlock NW bit */ 134026e2c05ef58ef413e2d52696f125d5ea1aa8bceIngo Molnar setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) & ~0x04); 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* set 'Not Write-through' */ 1367ebad705340f35276326ed93a43190e62f725f77Dave Jones write_cr0(read_cr0() | X86_CR0_NW); 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* CCR2 bit 2: lock NW bit and set WT1 */ 138026e2c05ef58ef413e2d52696f125d5ea1aa8bceIngo Molnar setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x14); 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Configure later MediaGX and/or Geode processor. 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 145148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic void geode_configure(void) 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long flags; 148bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito u8 ccr3; 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_save(flags); 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Suspend on halt power saving and enable #SUSP pin */ 152026e2c05ef58ef413e2d52696f125d5ea1aa8bceIngo Molnar setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x88); 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 = getCx86(CX86_CCR3); 155bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ 156adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 157bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito 158bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito /* FPU fast, DTE cache, Mem bypass */ 159026e2c05ef58ef413e2d52696f125d5ea1aa8bceIngo Molnar setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x38); 160bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ 161adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds set_cx86_memwb(); 163adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi set_cx86_reorder(); 164adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_restore(flags); 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 168148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic void early_init_cyrix(struct cpuinfo_x86 *c) 1695fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu{ 1705fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu unsigned char dir0, dir0_msn, dir1 = 0; 1715fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu 1725fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu __do_cyrix_devid(&dir0, &dir1); 1735fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu dir0_msn = dir0 >> 4; /* identifies CPU "family" */ 1745fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu 1755fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu switch (dir0_msn) { 1765fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu case 3: /* 6x86/6x86L */ 1775fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu /* Emulate MTRRs using Cyrix's ARRs. */ 1785fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu set_cpu_cap(c, X86_FEATURE_CYRIX_ARR); 1795fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu break; 1805fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu case 5: /* 6x86MX/M II */ 1815fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu /* Emulate MTRRs using Cyrix's ARRs. */ 1825fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu set_cpu_cap(c, X86_FEATURE_CYRIX_ARR); 1835fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu break; 1845fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu } 1855fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu} 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 187148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic void init_cyrix(struct cpuinfo_x86 *c) 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char dir0, dir0_msn, dir0_lsn, dir1 = 0; 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char *buf = c->x86_model_id; 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds const char *p = NULL; 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 193adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi /* 194adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * Bit 31 in normal CPUID used for nonstandard 3DNow ID; 195adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway 196adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi */ 1971d007cd5aeea2c9283e01433dbce4c9f91dd7823Ingo Molnar clear_cpu_cap(c, 0*32+31); 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Cyrix used bit 24 in extended (AMD) CPUID for Cyrix MMX extensions */ 2001d007cd5aeea2c9283e01433dbce4c9f91dd7823Ingo Molnar if (test_cpu_cap(c, 1*32+24)) { 2011d007cd5aeea2c9283e01433dbce4c9f91dd7823Ingo Molnar clear_cpu_cap(c, 1*32+24); 2021d007cd5aeea2c9283e01433dbce4c9f91dd7823Ingo Molnar set_cpu_cap(c, X86_FEATURE_CXMMX); 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 2041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds do_cyrix_devid(&dir0, &dir1); 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds check_cx686_slop(c); 2081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_dir0_msb = dir0_msn = dir0 >> 4; /* identifies CPU "family" */ 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dir0_lsn = dir0 & 0xf; /* model or clock multiplier */ 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* common case step number/rev -- exceptions handled below */ 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds c->x86_model = (dir1 >> 4) + 1; 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds c->x86_mask = dir1 & 0xf; 2151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Now cook; the original recipe is by Channing Corn, from Cyrix. 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * We do the same thing for each generation: we work out 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the model, multiplier and stepping. Black magic included, 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * to make the silicon step/rev numbers match the printed ones. 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 221adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds switch (dir0_msn) { 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char tmp; 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 0: /* Cx486SLC/DLC/SRx/DRx */ 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx486_name[dir0_lsn & 7]; 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 1: /* Cx486S/DX/DX2/DX4 */ 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = (dir0_lsn & 8) ? Cx486D_name[dir0_lsn & 5] 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : Cx486S_name[dir0_lsn & 3]; 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 2: /* 5x86 */ 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[2] = cyrix_model_mult1[dir0_lsn & 5]; 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx86_cb+2; 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 3: /* 6x86/6x86L */ 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[1] = ' '; 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[2] = cyrix_model_mult1[dir0_lsn & 5]; 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (dir1 > 0x21) { /* 686L */ 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[0] = 'L'; 2441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx86_cb; 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (c->x86_model)++; 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } else /* 686 */ 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx86_cb+1; 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Emulate MTRRs using Cyrix's ARRs. */ 2491d007cd5aeea2c9283e01433dbce4c9f91dd7823Ingo Molnar set_cpu_cap(c, X86_FEATURE_CYRIX_ARR); 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 6x86's contain this bug */ 251c5b41a67505cc3c9744d8f105c63a3bf3c443a01Borislav Petkov set_cpu_bug(c, X86_BUG_COMA); 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 4: /* MediaGX/GXm or Geode GXM/GXLV/GX1 */ 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_PCI 256120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox { 257120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox u32 vendor, device; 258adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi /* 259adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * It isn't really a PCI quirk directly, but the cure is the 260adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * same. The MediaGX has deep magic SMM stuff that handles the 261adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * SB emulation. It throws away the fifo on disable_dma() which 262adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * is wrong and ruins the audio. 263adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * 264adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * Bug2: VSA1 has a wrap bug so that using maximum sized DMA 265adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * causes bad things. According to NatSemi VSA2 has another 266adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * bug to do with 'hlt'. I've not seen any boards using VSA2 267adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * and X doesn't seem to support it either so who cares 8). 268adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * VSA1 we work around however. 269adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi */ 2701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Working around Cyrix MediaGX virtual DMA bugs.\n"); 2721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds isa_dma_bridge_buggy = 2; 273cefc01130ba2bb0a81abda14b3f00fcc2e70dd43Andreas Mohr 274120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox /* We do this before the PCI layer is running. However we 275120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox are safe here as we know the bridge must be a Cyrix 276120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox companion and must be present */ 277120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox vendor = read_pci_config_16(0, 0, 0x12, PCI_VENDOR_ID); 278120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox device = read_pci_config_16(0, 0, 0x12, PCI_DEVICE_ID); 279cefc01130ba2bb0a81abda14b3f00fcc2e70dd43Andreas Mohr 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The 5510/5520 companion chips have a funky PIT. 282adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi */ 283120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox if (vendor == PCI_VENDOR_ID_CYRIX && 2848bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox (device == PCI_DEVICE_ID_CYRIX_5510 || 2858bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox device == PCI_DEVICE_ID_CYRIX_5520)) 2865a90cf205c922707ffed2d8f87cefd942e96b0baJohn Stultz mark_tsc_unstable("cyrix 5510/5520 detected"); 287120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox } 288cefc01130ba2bb0a81abda14b3f00fcc2e70dd43Andreas Mohr#endif 289adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi c->x86_cache_size = 16; /* Yep 16K integrated cache thats it */ 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* GXm supports extended cpuid levels 'ala' AMD */ 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (c->cpuid_level == 2) { 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Enable cxMMX extensions (GX1 Datasheet 54) */ 294026e2c05ef58ef413e2d52696f125d5ea1aa8bceIngo Molnar setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7) | 1); 295adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 2962632f01a66d75f4ad59653a7efa506c6ea6845d0takada /* 2972632f01a66d75f4ad59653a7efa506c6ea6845d0takada * GXm : 0x30 ... 0x5f GXm datasheet 51 2982632f01a66d75f4ad59653a7efa506c6ea6845d0takada * GXlv: 0x6x GXlv datasheet 54 2992632f01a66d75f4ad59653a7efa506c6ea6845d0takada * ? : 0x7x 3002632f01a66d75f4ad59653a7efa506c6ea6845d0takada * GX1 : 0x8x GX1 datasheet 56 3012632f01a66d75f4ad59653a7efa506c6ea6845d0takada */ 3028bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox if ((0x30 <= dir1 && dir1 <= 0x6f) || 3038bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox (0x80 <= dir1 && dir1 <= 0x8f)) 3041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds geode_configure(); 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 306adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi } else { /* MediaGX */ 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[2] = (dir0_lsn & 1) ? '3' : '4'; 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx86_cb+2; 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds c->x86_model = (dir1 & 0x20) ? 1 : 2; 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 313adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi case 5: /* 6x86MX/M II */ 314adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if (dir1 > 7) { 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dir0_msn++; /* M II */ 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Enable MMX extensions (App note 108) */ 317026e2c05ef58ef413e2d52696f125d5ea1aa8bceIngo Molnar setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7)|1); 318adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi } else { 319c5b41a67505cc3c9744d8f105c63a3bf3c443a01Borislav Petkov /* A 6x86MX - it has the bug. */ 320c5b41a67505cc3c9744d8f105c63a3bf3c443a01Borislav Petkov set_cpu_bug(c, X86_BUG_COMA); 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tmp = (!(dir0_lsn & 7) || dir0_lsn & 1) ? 2 : 0; 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[tmp] = cyrix_model_mult2[dir0_lsn & 7]; 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx86_cb+tmp; 325adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if (((dir1 & 0x0f) > 4) || ((dir1 & 0xf0) == 0x20)) 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (c->x86_model)++; 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Emulate MTRRs using Cyrix's ARRs. */ 3281d007cd5aeea2c9283e01433dbce4c9f91dd7823Ingo Molnar set_cpu_cap(c, X86_FEATURE_CYRIX_ARR); 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 0xf: /* Cyrix 486 without DEVID registers */ 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds switch (dir0_lsn) { 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 0xd: /* either a 486SLC or DLC w/o DEVID */ 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dir0_msn = 0; 33560e019eb37a8d989031ad47ae9810453536f3127H. Peter Anvin p = Cx486_name[(cpu_has_fpu ? 1 : 0)]; 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 0xe: /* a 486S A step */ 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dir0_msn = 0; 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx486S_name[0]; 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds default: /* unknown (shouldn't happen, we know everyone ;-) */ 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dir0_msn = 7; 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds strcpy(buf, Cx86_model[dir0_msn & 7]); 350adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if (p) 351adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi strcat(buf, p); 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 356f90b8116032f4216d260e31f966a3585319387acJordan Crouse * Handle National Semiconductor branded processors 357f90b8116032f4216d260e31f966a3585319387acJordan Crouse */ 358148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic void init_nsc(struct cpuinfo_x86 *c) 359f90b8116032f4216d260e31f966a3585319387acJordan Crouse{ 360adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi /* 361adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * There may be GX1 processors in the wild that are branded 362f90b8116032f4216d260e31f966a3585319387acJordan Crouse * NSC and not Cyrix. 363f90b8116032f4216d260e31f966a3585319387acJordan Crouse * 364f90b8116032f4216d260e31f966a3585319387acJordan Crouse * This function only handles the GX processor, and kicks every 365f90b8116032f4216d260e31f966a3585319387acJordan Crouse * thing else to the Cyrix init function above - that should 366f90b8116032f4216d260e31f966a3585319387acJordan Crouse * cover any processors that might have been branded differently 367d6e05edc59ecd79e8badf440c0d295a979bdfa3eAndreas Mohr * after NSC acquired Cyrix. 368f90b8116032f4216d260e31f966a3585319387acJordan Crouse * 369f90b8116032f4216d260e31f966a3585319387acJordan Crouse * If this breaks your GX1 horribly, please e-mail 370f90b8116032f4216d260e31f966a3585319387acJordan Crouse * info-linux@ldcmail.amd.com to tell us. 371f90b8116032f4216d260e31f966a3585319387acJordan Crouse */ 372f90b8116032f4216d260e31f966a3585319387acJordan Crouse 373f90b8116032f4216d260e31f966a3585319387acJordan Crouse /* Handle the GX (Formally known as the GX2) */ 374f90b8116032f4216d260e31f966a3585319387acJordan Crouse 375f90b8116032f4216d260e31f966a3585319387acJordan Crouse if (c->x86 == 5 && c->x86_model == 5) 37627c13ecec4d8856687b50b959e1146845b478f95Borislav Petkov cpu_detect_cache_sizes(c); 377f90b8116032f4216d260e31f966a3585319387acJordan Crouse else 378f90b8116032f4216d260e31f966a3585319387acJordan Crouse init_cyrix(c); 379f90b8116032f4216d260e31f966a3585319387acJordan Crouse} 380f90b8116032f4216d260e31f966a3585319387acJordan Crouse 381f90b8116032f4216d260e31f966a3585319387acJordan Crouse/* 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * by the fact that they preserve the flags across the division of 5/2. 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PII and PPro exhibit this behavior too, but they have cpuid available. 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 386adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Perform the Cyrix 5/2 test. A Cyrix won't change 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the flags, while other 486 chips will. 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline int test_cyrix_52div(void) 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int test; 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __asm__ __volatile__( 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "sahf\n\t" /* clear flags (%eax = 0x0005) */ 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "div %b2\n\t" /* divide 5 by 2 */ 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "lahf" /* store flags into %ah */ 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : "=a" (test) 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : "0" (5), "q" (2) 4011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : "cc"); 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* AH is 0x02 on Cyrix after the divide.. */ 4041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return (unsigned char) (test >> 8) == 0x02; 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 407148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic void cyrix_identify(struct cpuinfo_x86 *c) 4081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Detect Cyrix with disabled CPUID */ 410adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if (c->x86 == 4 && test_cyrix_52div()) { 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char dir0, dir1; 412adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds strcpy(c->x86_vendor_id, "CyrixInstead"); 414adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi c->x86_vendor = X86_VENDOR_CYRIX; 415adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 416adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi /* Actually enable cpuid on the older cyrix */ 417adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 418adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi /* Retrieve CPU revisions */ 419adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 4201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds do_cyrix_devid(&dir0, &dir1); 4211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 422adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi dir0 >>= 4; 423adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Check it is an affected model */ 425adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 426adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if (dir0 == 5 || dir0 == 3) { 427bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito unsigned char ccr3; 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long flags; 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Enabling CPUID on Cyrix processor.\n"); 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_save(flags); 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 = getCx86(CX86_CCR3); 4328bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox /* enable MAPEN */ 4338bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); 4348bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox /* enable cpuid */ 4358bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x80); 4368bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox /* disable MAPEN */ 4378bdbd962ecfcbdd96f9dbb02d780b4553afd2543Alan Cox setCx86(CX86_CCR3, ccr3); 4381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_restore(flags); 4391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 4411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 443148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic const struct cpu_dev cyrix_cpu_dev = { 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .c_vendor = "Cyrix", 445adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi .c_ident = { "CyrixInstead" }, 4465fef55fddb7317585cabc1eae38dbd57f1c59729Yinghai Lu .c_early_init = early_init_cyrix, 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .c_init = init_cyrix, 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .c_identify = cyrix_identify, 44910a434fcb23a57c385177a0086955fae01003f64Yinghai Lu .c_x86_vendor = X86_VENDOR_CYRIX, 4501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 4511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 45210a434fcb23a57c385177a0086955fae01003f64Yinghai Lucpu_dev_register(cyrix_cpu_dev); 4531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 454148f9bb87745ed45f7a11b2cbd3bc0f017d5d257Paul Gortmakerstatic const struct cpu_dev nsc_cpu_dev = { 4551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .c_vendor = "NSC", 456adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi .c_ident = { "Geode by NSC" }, 457f90b8116032f4216d260e31f966a3585319387acJordan Crouse .c_init = init_nsc, 45810a434fcb23a57c385177a0086955fae01003f64Yinghai Lu .c_x86_vendor = X86_VENDOR_NSC, 4591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 4601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 46110a434fcb23a57c385177a0086955fae01003f64Yinghai Lucpu_dev_register(nsc_cpu_dev); 462