cyrix.c revision adf85265b455f096fa9caf4aea51f274cdaca3c6
11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/init.h> 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/bitops.h> 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/delay.h> 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/pci.h> 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/dma.h> 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/io.h> 7f25f64ed5bd3c2932493681bdfdb483ea707da0aJuergen Beisert#include <asm/processor-cyrix.h> 87ebad705340f35276326ed93a43190e62f725f77Dave Jones#include <asm/processor-flags.h> 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/timer.h> 10120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox#include <asm/pci-direct.h> 11e8edc6e03a5c8562dc70a6d969f732bdb355a7e7Alexey Dobriyan#include <asm/tsc.h> 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "cpu.h" 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Read NSC/Cyrix DEVID registers (DIR) to get more detailed info. about the CPU 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 185f0f1c166647860bb2c2a206338e7d9af3834753Magnus Dammstatic void __cpuinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1) 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char ccr2, ccr3; 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long flags; 22adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* we test for DEVID by checking whether CCR3 is writable */ 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_save(flags); 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 = getCx86(CX86_CCR3); 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR3, ccr3 ^ 0x80); 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds getCx86(0xc0); /* dummy to change bus */ 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (getCx86(CX86_CCR3) == ccr3) { /* no DEVID regs. */ 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr2 = getCx86(CX86_CCR2); 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR2, ccr2 ^ 0x04); 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds getCx86(0xc0); /* dummy */ 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (getCx86(CX86_CCR2) == ccr2) /* old Cx486SLC/DLC */ 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *dir0 = 0xfd; 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { /* Cx486S A step */ 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR2, ccr2); 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *dir0 = 0xfe; 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 40adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi } else { 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR3, ccr3); /* restore CCR3 */ 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* read DIR0 and DIR1 CPU registers */ 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *dir0 = getCx86(CX86_DIR0); 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *dir1 = getCx86(CX86_DIR1); 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_restore(flags); 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Cx86_dir0_msb is a HACK needed by check_cx686_cpuid/slop in bugs.h in 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * order to identify the Cyrix CPU model after we're out of setup.c 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Actually since bugs.h doesn't even reference this perhaps someone should 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * fix the documentation ??? 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 57b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic unsigned char Cx86_dir0_msb __cpuinitdata = 0; 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 59b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic char Cx86_model[][9] __cpuinitdata = { 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "Cx486", "Cx486", "5x86 ", "6x86", "MediaGX ", "6x86MX ", 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "M II ", "Unknown" 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 63b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic char Cx486_name[][5] __cpuinitdata = { 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "SLC", "DLC", "SLC2", "DLC2", "SRx", "DRx", 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "SRx2", "DRx2" 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 67b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic char Cx486S_name[][4] __cpuinitdata = { 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "S", "S2", "Se", "S2e" 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 70b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic char Cx486D_name[][4] __cpuinitdata = { 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "DX", "DX2", "?", "?", "?", "DX4" 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 73b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic char Cx86_cb[] __cpuinitdata = "?.5x Core/Bus Clock"; 74b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic char cyrix_model_mult1[] __cpuinitdata = "12??43"; 75b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic char cyrix_model_mult2[] __cpuinitdata = "12233445"; 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Reset the slow-loop (SLOP) bit on the 686(L) which is set by some old 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * BIOSes for compatibility with DOS games. This makes the udelay loop 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * work correctly, and improves performance. 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * FIXME: our newer udelay uses the tsc. We don't need to frob with SLOP 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 85b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic void __cpuinit check_cx686_slop(struct cpuinfo_x86 *c) 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long flags; 88adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (Cx86_dir0_msb == 3) { 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char ccr3, ccr5; 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_save(flags); 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 = getCx86(CX86_CCR3); 94db955170d40601d9925f01712782fbe3ce362b7eMarcin Garski setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr5 = getCx86(CX86_CCR5); 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (ccr5 & 2) 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR5, ccr5 & 0xfd); /* reset SLOP */ 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_restore(flags); 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (ccr5 & 2) { /* possible wrong calibration done */ 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Recalibrating delay loop with SLOP bit reset\n"); 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds calibrate_delay(); 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds c->loops_per_jiffy = loops_per_jiffy; 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 110b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic void __cpuinit set_cx86_reorder(void) 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 ccr3; 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Enable Memory access reorder on Cyrix/NSC processor.\n"); 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 = getCx86(CX86_CCR3); 11696de0e252cedffad61b3cb5e05662c591898e69aJan Engelhardt setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11896de0e252cedffad61b3cb5e05662c591898e69aJan Engelhardt /* Load/Store Serialize to mem access disable (=reorder it) */ 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_PCR0, getCx86(CX86_PCR0) & ~0x80); 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* set load/store serialize from 1GB to 4GB */ 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 |= 0xe0; 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR3, ccr3); 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 125b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic void __cpuinit set_cx86_memwb(void) 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Enable Memory-Write-back mode on Cyrix/NSC processor.\n"); 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* CCR2 bit 2: unlock NW bit */ 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR2, getCx86(CX86_CCR2) & ~0x04); 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* set 'Not Write-through' */ 1327ebad705340f35276326ed93a43190e62f725f77Dave Jones write_cr0(read_cr0() | X86_CR0_NW); 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* CCR2 bit 2: lock NW bit and set WT1 */ 134adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14); 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 137b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic void __cpuinit set_cx86_inc(void) 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char ccr3; 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Enable Incrementor on Cyrix/NSC processor.\n"); 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 = getCx86(CX86_CCR3); 14496de0e252cedffad61b3cb5e05662c591898e69aJan Engelhardt setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* PCR1 -- Performance Control */ 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Incrementor on, whatever that is */ 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_PCR1, getCx86(CX86_PCR1) | 0x02); 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* PCR0 -- Performance Control */ 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Incrementor Margin 10 */ 150adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi setCx86(CX86_PCR0, getCx86(CX86_PCR0) | 0x04); 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Configure later MediaGX and/or Geode processor. 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 158b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic void __cpuinit geode_configure(void) 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long flags; 161bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito u8 ccr3; 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_save(flags); 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Suspend on halt power saving and enable #SUSP pin */ 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88); 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 = getCx86(CX86_CCR3); 168bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ 169adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 170bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito 171bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito /* FPU fast, DTE cache, Mem bypass */ 172bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x38); 173bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ 174adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds set_cx86_memwb(); 176adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi set_cx86_reorder(); 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds set_cx86_inc(); 178adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_restore(flags); 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 183b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic void __cpuinit init_cyrix(struct cpuinfo_x86 *c) 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char dir0, dir0_msn, dir0_lsn, dir1 = 0; 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char *buf = c->x86_model_id; 1871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds const char *p = NULL; 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 189adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi /* 190adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * Bit 31 in normal CPUID used for nonstandard 3DNow ID; 191adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway 192adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi */ 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds clear_bit(0*32+31, c->x86_capability); 1941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Cyrix used bit 24 in extended (AMD) CPUID for Cyrix MMX extensions */ 196adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if (test_bit(1*32+24, c->x86_capability)) { 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds clear_bit(1*32+24, c->x86_capability); 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds set_bit(X86_FEATURE_CXMMX, c->x86_capability); 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds do_cyrix_devid(&dir0, &dir1); 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds check_cx686_slop(c); 2041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_dir0_msb = dir0_msn = dir0 >> 4; /* identifies CPU "family" */ 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dir0_lsn = dir0 & 0xf; /* model or clock multiplier */ 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* common case step number/rev -- exceptions handled below */ 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds c->x86_model = (dir1 >> 4) + 1; 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds c->x86_mask = dir1 & 0xf; 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Now cook; the original recipe is by Channing Corn, from Cyrix. 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * We do the same thing for each generation: we work out 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the model, multiplier and stepping. Black magic included, 2151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * to make the silicon step/rev numbers match the printed ones. 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 217adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds switch (dir0_msn) { 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char tmp; 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 0: /* Cx486SLC/DLC/SRx/DRx */ 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx486_name[dir0_lsn & 7]; 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 1: /* Cx486S/DX/DX2/DX4 */ 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = (dir0_lsn & 8) ? Cx486D_name[dir0_lsn & 5] 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : Cx486S_name[dir0_lsn & 3]; 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 2: /* 5x86 */ 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[2] = cyrix_model_mult1[dir0_lsn & 5]; 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx86_cb+2; 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 3: /* 6x86/6x86L */ 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[1] = ' '; 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[2] = cyrix_model_mult1[dir0_lsn & 5]; 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (dir1 > 0x21) { /* 686L */ 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[0] = 'L'; 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx86_cb; 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (c->x86_model)++; 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } else /* 686 */ 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx86_cb+1; 2441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Emulate MTRRs using Cyrix's ARRs. */ 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds set_bit(X86_FEATURE_CYRIX_ARR, c->x86_capability); 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 6x86's contain this bug */ 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds c->coma_bug = 1; 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 4: /* MediaGX/GXm or Geode GXM/GXLV/GX1 */ 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_PCI 252120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox { 253120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox u32 vendor, device; 254adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi /* 255adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * It isn't really a PCI quirk directly, but the cure is the 256adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * same. The MediaGX has deep magic SMM stuff that handles the 257adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * SB emulation. It throws away the fifo on disable_dma() which 258adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * is wrong and ruins the audio. 259adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * 260adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * Bug2: VSA1 has a wrap bug so that using maximum sized DMA 261adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * causes bad things. According to NatSemi VSA2 has another 262adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * bug to do with 'hlt'. I've not seen any boards using VSA2 263adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * and X doesn't seem to support it either so who cares 8). 264adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * VSA1 we work around however. 265adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi */ 2661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Working around Cyrix MediaGX virtual DMA bugs.\n"); 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds isa_dma_bridge_buggy = 2; 269cefc01130ba2bb0a81abda14b3f00fcc2e70dd43Andreas Mohr 270120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox /* We do this before the PCI layer is running. However we 271120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox are safe here as we know the bridge must be a Cyrix 272120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox companion and must be present */ 273120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox vendor = read_pci_config_16(0, 0, 0x12, PCI_VENDOR_ID); 274120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox device = read_pci_config_16(0, 0, 0x12, PCI_DEVICE_ID); 275cefc01130ba2bb0a81abda14b3f00fcc2e70dd43Andreas Mohr 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The 5510/5520 companion chips have a funky PIT. 278adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi */ 279120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox if (vendor == PCI_VENDOR_ID_CYRIX && 280120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox (device == PCI_DEVICE_ID_CYRIX_5510 || device == PCI_DEVICE_ID_CYRIX_5520)) 2815a90cf205c922707ffed2d8f87cefd942e96b0baJohn Stultz mark_tsc_unstable("cyrix 5510/5520 detected"); 282120fad72401ebec2a126c16cc48f56c28f3eefe2Alan Cox } 283cefc01130ba2bb0a81abda14b3f00fcc2e70dd43Andreas Mohr#endif 284adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi c->x86_cache_size = 16; /* Yep 16K integrated cache thats it */ 2851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* GXm supports extended cpuid levels 'ala' AMD */ 2871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (c->cpuid_level == 2) { 2881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Enable cxMMX extensions (GX1 Datasheet 54) */ 2892632f01a66d75f4ad59653a7efa506c6ea6845d0takada setCx86(CX86_CCR7, getCx86(CX86_CCR7) | 1); 290adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 2912632f01a66d75f4ad59653a7efa506c6ea6845d0takada /* 2922632f01a66d75f4ad59653a7efa506c6ea6845d0takada * GXm : 0x30 ... 0x5f GXm datasheet 51 2932632f01a66d75f4ad59653a7efa506c6ea6845d0takada * GXlv: 0x6x GXlv datasheet 54 2942632f01a66d75f4ad59653a7efa506c6ea6845d0takada * ? : 0x7x 2952632f01a66d75f4ad59653a7efa506c6ea6845d0takada * GX1 : 0x8x GX1 datasheet 56 2962632f01a66d75f4ad59653a7efa506c6ea6845d0takada */ 297adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if ((0x30 <= dir1 && dir1 <= 0x6f) || (0x80 <= dir1 && dir1 <= 0x8f)) 2981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds geode_configure(); 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds get_model_name(c); /* get CPU marketing name */ 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 301adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi } else { /* MediaGX */ 3021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[2] = (dir0_lsn & 1) ? '3' : '4'; 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx86_cb+2; 3041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds c->x86_model = (dir1 & 0x20) ? 1 : 2; 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 308adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi case 5: /* 6x86MX/M II */ 309adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if (dir1 > 7) { 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dir0_msn++; /* M II */ 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Enable MMX extensions (App note 108) */ 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds setCx86(CX86_CCR7, getCx86(CX86_CCR7)|1); 313adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi } else { 3141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds c->coma_bug = 1; /* 6x86MX, it has the bug. */ 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tmp = (!(dir0_lsn & 7) || dir0_lsn & 1) ? 2 : 0; 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Cx86_cb[tmp] = cyrix_model_mult2[dir0_lsn & 7]; 3181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx86_cb+tmp; 319adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if (((dir1 & 0x0f) > 4) || ((dir1 & 0xf0) == 0x20)) 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (c->x86_model)++; 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Emulate MTRRs using Cyrix's ARRs. */ 3221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds set_bit(X86_FEATURE_CYRIX_ARR, c->x86_capability); 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 0xf: /* Cyrix 486 without DEVID registers */ 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds switch (dir0_lsn) { 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 0xd: /* either a 486SLC or DLC w/o DEVID */ 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dir0_msn = 0; 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx486_name[(c->hard_math) ? 1 : 0]; 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 0xe: /* a 486S A step */ 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dir0_msn = 0; 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p = Cx486S_name[0]; 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds default: /* unknown (shouldn't happen, we know everyone ;-) */ 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dir0_msn = 7; 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds strcpy(buf, Cx86_model[dir0_msn & 7]); 344adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if (p) 345adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi strcat(buf, p); 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 350f90b8116032f4216d260e31f966a3585319387acJordan Crouse * Handle National Semiconductor branded processors 351f90b8116032f4216d260e31f966a3585319387acJordan Crouse */ 352b4af3f7cf11e6b5904af08a652d4a2429af17c74Magnus Dammstatic void __cpuinit init_nsc(struct cpuinfo_x86 *c) 353f90b8116032f4216d260e31f966a3585319387acJordan Crouse{ 354adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi /* 355adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi * There may be GX1 processors in the wild that are branded 356f90b8116032f4216d260e31f966a3585319387acJordan Crouse * NSC and not Cyrix. 357f90b8116032f4216d260e31f966a3585319387acJordan Crouse * 358f90b8116032f4216d260e31f966a3585319387acJordan Crouse * This function only handles the GX processor, and kicks every 359f90b8116032f4216d260e31f966a3585319387acJordan Crouse * thing else to the Cyrix init function above - that should 360f90b8116032f4216d260e31f966a3585319387acJordan Crouse * cover any processors that might have been branded differently 361d6e05edc59ecd79e8badf440c0d295a979bdfa3eAndreas Mohr * after NSC acquired Cyrix. 362f90b8116032f4216d260e31f966a3585319387acJordan Crouse * 363f90b8116032f4216d260e31f966a3585319387acJordan Crouse * If this breaks your GX1 horribly, please e-mail 364f90b8116032f4216d260e31f966a3585319387acJordan Crouse * info-linux@ldcmail.amd.com to tell us. 365f90b8116032f4216d260e31f966a3585319387acJordan Crouse */ 366f90b8116032f4216d260e31f966a3585319387acJordan Crouse 367f90b8116032f4216d260e31f966a3585319387acJordan Crouse /* Handle the GX (Formally known as the GX2) */ 368f90b8116032f4216d260e31f966a3585319387acJordan Crouse 369f90b8116032f4216d260e31f966a3585319387acJordan Crouse if (c->x86 == 5 && c->x86_model == 5) 370f90b8116032f4216d260e31f966a3585319387acJordan Crouse display_cacheinfo(c); 371f90b8116032f4216d260e31f966a3585319387acJordan Crouse else 372f90b8116032f4216d260e31f966a3585319387acJordan Crouse init_cyrix(c); 373f90b8116032f4216d260e31f966a3585319387acJordan Crouse} 374f90b8116032f4216d260e31f966a3585319387acJordan Crouse 375f90b8116032f4216d260e31f966a3585319387acJordan Crouse/* 3761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected 3771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * by the fact that they preserve the flags across the division of 5/2. 3781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PII and PPro exhibit this behavior too, but they have cpuid available. 3791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 380adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 3811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Perform the Cyrix 5/2 test. A Cyrix won't change 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the flags, while other 486 chips will. 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline int test_cyrix_52div(void) 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int test; 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __asm__ __volatile__( 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "sahf\n\t" /* clear flags (%eax = 0x0005) */ 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "div %b2\n\t" /* divide 5 by 2 */ 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "lahf" /* store flags into %ah */ 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : "=a" (test) 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : "0" (5), "q" (2) 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : "cc"); 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* AH is 0x02 on Cyrix after the divide.. */ 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return (unsigned char) (test >> 8) == 0x02; 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 401adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchistatic void __cpuinit cyrix_identify(struct cpuinfo_x86 *c) 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Detect Cyrix with disabled CPUID */ 404adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if (c->x86 == 4 && test_cyrix_52div()) { 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char dir0, dir1; 406adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds strcpy(c->x86_vendor_id, "CyrixInstead"); 408adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi c->x86_vendor = X86_VENDOR_CYRIX; 409adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 410adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi /* Actually enable cpuid on the older cyrix */ 411adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 412adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi /* Retrieve CPU revisions */ 413adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds do_cyrix_devid(&dir0, &dir1); 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 416adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi dir0 >>= 4; 417adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Check it is an affected model */ 419adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi 420adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi if (dir0 == 5 || dir0 == 3) { 421bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito unsigned char ccr3; 4221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long flags; 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Enabling CPUID on Cyrix processor.\n"); 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_save(flags); 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr3 = getCx86(CX86_CCR3); 426bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ 427bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x80); /* enable cpuid */ 428bcde1ebb81c51ebdfa02887703e4d21c1bbc2431TAKADA Yoshihito setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds local_irq_restore(flags); 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 43495414930548871c6c92a5b0e607b12b81f3d84d8Magnus Dammstatic struct cpu_dev cyrix_cpu_dev __cpuinitdata = { 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .c_vendor = "Cyrix", 436adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi .c_ident = { "CyrixInstead" }, 4371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .c_init = init_cyrix, 4381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .c_identify = cyrix_identify, 4391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 44103ae5768b6110ebaa97dc3e7abf1c3d8bec5f874Thomas Petazzonicpu_vendor_dev_register(X86_VENDOR_CYRIX, &cyrix_cpu_dev); 4421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 44395414930548871c6c92a5b0e607b12b81f3d84d8Magnus Dammstatic struct cpu_dev nsc_cpu_dev __cpuinitdata = { 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .c_vendor = "NSC", 445adf85265b455f096fa9caf4aea51f274cdaca3c6Paolo Ciarrocchi .c_ident = { "Geode by NSC" }, 446f90b8116032f4216d260e31f966a3585319387acJordan Crouse .c_init = init_nsc, 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 44903ae5768b6110ebaa97dc3e7abf1c3d8bec5f874Thomas Petazzonicpu_vendor_dev_register(X86_VENDOR_NSC, &nsc_cpu_dev); 450