1c622b29d1f38021411965b7e0170ab055551b257Max Filippov/* 2c622b29d1f38021411965b7e0170ab055551b257Max Filippov * arch/xtensa/include/asm/initialize_mmu.h 3c622b29d1f38021411965b7e0170ab055551b257Max Filippov * 4c622b29d1f38021411965b7e0170ab055551b257Max Filippov * Initializes MMU: 5c622b29d1f38021411965b7e0170ab055551b257Max Filippov * 6c622b29d1f38021411965b7e0170ab055551b257Max Filippov * For the new V3 MMU we remap the TLB from virtual == physical 7c622b29d1f38021411965b7e0170ab055551b257Max Filippov * to the standard Linux mapping used in earlier MMU's. 8c622b29d1f38021411965b7e0170ab055551b257Max Filippov * 9c622b29d1f38021411965b7e0170ab055551b257Max Filippov * The the MMU we also support a new configuration register that 10c622b29d1f38021411965b7e0170ab055551b257Max Filippov * specifies how the S32C1I instruction operates with the cache 11c622b29d1f38021411965b7e0170ab055551b257Max Filippov * controller. 12c622b29d1f38021411965b7e0170ab055551b257Max Filippov * 13c622b29d1f38021411965b7e0170ab055551b257Max Filippov * This file is subject to the terms and conditions of the GNU General 14c622b29d1f38021411965b7e0170ab055551b257Max Filippov * Public License. See the file "COPYING" in the main directory of 15c622b29d1f38021411965b7e0170ab055551b257Max Filippov * this archive for more details. 16c622b29d1f38021411965b7e0170ab055551b257Max Filippov * 17c622b29d1f38021411965b7e0170ab055551b257Max Filippov * Copyright (C) 2008 - 2012 Tensilica, Inc. 18c622b29d1f38021411965b7e0170ab055551b257Max Filippov * 19c622b29d1f38021411965b7e0170ab055551b257Max Filippov * Marc Gauthier <marc@tensilica.com> 20c622b29d1f38021411965b7e0170ab055551b257Max Filippov * Pete Delaney <piet@tensilica.com> 21c622b29d1f38021411965b7e0170ab055551b257Max Filippov */ 22c622b29d1f38021411965b7e0170ab055551b257Max Filippov 23c622b29d1f38021411965b7e0170ab055551b257Max Filippov#ifndef _XTENSA_INITIALIZE_MMU_H 24c622b29d1f38021411965b7e0170ab055551b257Max Filippov#define _XTENSA_INITIALIZE_MMU_H 25c622b29d1f38021411965b7e0170ab055551b257Max Filippov 26e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov#include <asm/pgtable.h> 27e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov#include <asm/vectors.h> 28e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 296cb971114f633a0bf240c20b681d989b45e3ec56Baruch Siach#define CA_BYPASS (_PAGE_CA_BYPASS | _PAGE_HW_WRITE | _PAGE_HW_EXEC) 306cb971114f633a0bf240c20b681d989b45e3ec56Baruch Siach#define CA_WRITEBACK (_PAGE_CA_WB | _PAGE_HW_WRITE | _PAGE_HW_EXEC) 316cb971114f633a0bf240c20b681d989b45e3ec56Baruch Siach 32c622b29d1f38021411965b7e0170ab055551b257Max Filippov#ifdef __ASSEMBLY__ 33c622b29d1f38021411965b7e0170ab055551b257Max Filippov 34c622b29d1f38021411965b7e0170ab055551b257Max Filippov#define XTENSA_HWVERSION_RC_2009_0 230000 35c622b29d1f38021411965b7e0170ab055551b257Max Filippov 36c622b29d1f38021411965b7e0170ab055551b257Max Filippov .macro initialize_mmu 37c622b29d1f38021411965b7e0170ab055551b257Max Filippov 38c622b29d1f38021411965b7e0170ab055551b257Max Filippov#if XCHAL_HAVE_S32C1I && (XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RC_2009_0) 39c622b29d1f38021411965b7e0170ab055551b257Max Filippov/* 40c622b29d1f38021411965b7e0170ab055551b257Max Filippov * We Have Atomic Operation Control (ATOMCTL) Register; Initialize it. 41c622b29d1f38021411965b7e0170ab055551b257Max Filippov * For details see Documentation/xtensa/atomctl.txt 42c622b29d1f38021411965b7e0170ab055551b257Max Filippov */ 43c622b29d1f38021411965b7e0170ab055551b257Max Filippov#if XCHAL_DCACHE_IS_COHERENT 44c622b29d1f38021411965b7e0170ab055551b257Max Filippov movi a3, 0x25 /* For SMP/MX -- internal for writeback, 45c622b29d1f38021411965b7e0170ab055551b257Max Filippov * RCW otherwise 46c622b29d1f38021411965b7e0170ab055551b257Max Filippov */ 47c622b29d1f38021411965b7e0170ab055551b257Max Filippov#else 48c622b29d1f38021411965b7e0170ab055551b257Max Filippov movi a3, 0x29 /* non-MX -- Most cores use Std Memory 49c622b29d1f38021411965b7e0170ab055551b257Max Filippov * Controlers which usually can't use RCW 50c622b29d1f38021411965b7e0170ab055551b257Max Filippov */ 51c622b29d1f38021411965b7e0170ab055551b257Max Filippov#endif 52c622b29d1f38021411965b7e0170ab055551b257Max Filippov wsr a3, atomctl 53c622b29d1f38021411965b7e0170ab055551b257Max Filippov#endif /* XCHAL_HAVE_S32C1I && 54c622b29d1f38021411965b7e0170ab055551b257Max Filippov * (XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RC_2009_0) 55c622b29d1f38021411965b7e0170ab055551b257Max Filippov */ 56c622b29d1f38021411965b7e0170ab055551b257Max Filippov 57e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov#if defined(CONFIG_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY 58e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov/* 59e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov * Have MMU v3 60e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov */ 61e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 62e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov#if !XCHAL_HAVE_VECBASE 63e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov# error "MMU v3 requires reloc vectors" 64e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov#endif 65e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 66e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov movi a1, 0 67e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov _call0 1f 68e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov _j 2f 69e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 70e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov .align 4 71e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov1: movi a2, 0x10000000 72e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov movi a3, 0x18000000 73e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov add a2, a2, a0 74e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov9: bgeu a2, a3, 9b /* PC is out of the expected range */ 75e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 76e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov /* Step 1: invalidate mapping at 0x40000000..0x5FFFFFFF. */ 77e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 78e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov movi a2, 0x40000006 79e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov idtlb a2 80e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov iitlb a2 81e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov isync 82e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 83e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov /* Step 2: map 0x40000000..0x47FFFFFF to paddr containing this code 84e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov * and jump to the new mapping. 85e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov */ 86e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 87e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov srli a3, a0, 27 88e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov slli a3, a3, 27 89e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov addi a3, a3, CA_BYPASS 90e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov addi a7, a2, -1 91e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov wdtlb a3, a7 92e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov witlb a3, a7 93e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov isync 94e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 95e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov slli a4, a0, 5 96e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov srli a4, a4, 5 97e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov addi a5, a2, -6 98e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov add a4, a4, a5 99e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov jx a4 100e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 101e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov /* Step 3: unmap everything other than current area. 102e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov * Start at 0x60000000, wrap around, and end with 0x20000000 103e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov */ 104e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov2: movi a4, 0x20000000 105e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov add a5, a2, a4 106e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov3: idtlb a5 107e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov iitlb a5 108e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov add a5, a5, a4 109e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov bne a5, a2, 3b 110e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 111e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov /* Step 4: Setup MMU with the old V2 mappings. */ 112e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov movi a6, 0x01000000 113e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov wsr a6, ITLBCFG 114e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov wsr a6, DTLBCFG 115e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov isync 116e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 117e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov movi a5, 0xd0000005 118e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov movi a4, CA_WRITEBACK 119e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov wdtlb a4, a5 120e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov witlb a4, a5 121e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 122e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov movi a5, 0xd8000005 123e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov movi a4, CA_BYPASS 124e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov wdtlb a4, a5 125e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov witlb a4, a5 126e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 1274809bb468f140d561dfbb785e8dcdda5bae8c1f2Baruch Siach movi a5, XCHAL_KIO_CACHED_VADDR + 6 1286cb971114f633a0bf240c20b681d989b45e3ec56Baruch Siach movi a4, XCHAL_KIO_DEFAULT_PADDR + CA_WRITEBACK 129e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov wdtlb a4, a5 130e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov witlb a4, a5 131e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 1324809bb468f140d561dfbb785e8dcdda5bae8c1f2Baruch Siach movi a5, XCHAL_KIO_BYPASS_VADDR + 6 1336cb971114f633a0bf240c20b681d989b45e3ec56Baruch Siach movi a4, XCHAL_KIO_DEFAULT_PADDR + CA_BYPASS 134e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov wdtlb a4, a5 135e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov witlb a4, a5 136e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 137e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov isync 138e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 139e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov /* Jump to self, using MMU v2 mappings. */ 140e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov movi a4, 1f 141e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov jx a4 142e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 143e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov1: 144e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov movi a2, VECBASE_RESET_VADDR 145e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov wsr a2, vecbase 146e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 147e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov /* Step 5: remove temporary mapping. */ 148e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov idtlb a7 149e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov iitlb a7 150e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov isync 151e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 152e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov movi a0, 0 153e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov wsr a0, ptevaddr 154e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov rsync 155e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 156e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov#endif /* defined(CONFIG_MMU) && XCHAL_HAVE_PTP_MMU && 157e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov XCHAL_HAVE_SPANNING_WAY */ 158e85e335f8ff615f74e29e09cc2599f095600114bMax Filippov 159c622b29d1f38021411965b7e0170ab055551b257Max Filippov .endm 160c622b29d1f38021411965b7e0170ab055551b257Max Filippov 161c622b29d1f38021411965b7e0170ab055551b257Max Filippov#endif /*__ASSEMBLY__*/ 162c622b29d1f38021411965b7e0170ab055551b257Max Filippov 163c622b29d1f38021411965b7e0170ab055551b257Max Filippov#endif /* _XTENSA_INITIALIZE_MMU_H */ 164