1c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel/* 2c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * This header file contains assembly-language definitions (assembly 3c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * macros, etc.) for this specific Xtensa processor's TIE extensions 4c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * and options. It is customized to this Xtensa processor configuration. 5c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * 6c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * This file is subject to the terms and conditions of the GNU General Public 7c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * License. See the file "COPYING" in the main directory of this archive 8c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * for more details. 9c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * 10c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * Copyright (C) 1999-2008 Tensilica Inc. 11c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel */ 12c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 13c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#ifndef _XTENSA_CORE_TIE_ASM_H 14c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#define _XTENSA_CORE_TIE_ASM_H 15c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 16c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel/* Selection parameter values for save-area save/restore macros: */ 17c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel/* Option vs. TIE: */ 18c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#define XTHAL_SAS_TIE 0x0001 /* custom extension or coprocessor */ 19c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#define XTHAL_SAS_OPT 0x0002 /* optional (and not a coprocessor) */ 20c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel/* Whether used automatically by compiler: */ 21c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#define XTHAL_SAS_NOCC 0x0004 /* not used by compiler w/o special opts/code */ 22c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#define XTHAL_SAS_CC 0x0008 /* used by compiler without special opts/code */ 23c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel/* ABI handling across function calls: */ 24c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#define XTHAL_SAS_CALR 0x0010 /* caller-saved */ 25c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#define XTHAL_SAS_CALE 0x0020 /* callee-saved */ 26c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#define XTHAL_SAS_GLOB 0x0040 /* global across function calls (in thread) */ 27c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel/* Misc */ 28c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#define XTHAL_SAS_ALL 0xFFFF /* include all default NCP contents */ 29c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 30c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 31c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 32c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel/* Macro to save all non-coprocessor (extra) custom TIE and optional state 33c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * (not including zero-overhead loop registers). 34c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * Save area ptr (clobbered): ptr (1 byte aligned) 35c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed) 36c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel */ 37c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL 38c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel xchal_sa_start \continue, \ofs 39c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~\select 40c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel xchal_sa_align \ptr, 0, 1024-4, 4, 4 41c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel rur \at1, THREADPTR // threadptr option 42c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel s32i \at1, \ptr, .Lxchal_ofs_ + 0 43c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel .set .Lxchal_ofs_, .Lxchal_ofs_ + 4 44c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel .endif 45c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel .endm // xchal_ncp_store 46c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 47c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel/* Macro to save all non-coprocessor (extra) custom TIE and optional state 48c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * (not including zero-overhead loop registers). 49c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * Save area ptr (clobbered): ptr (1 byte aligned) 50c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed) 51c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel */ 52c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL 53c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel xchal_sa_start \continue, \ofs 54c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_GLOB) & ~\select 55c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel xchal_sa_align \ptr, 0, 1024-4, 4, 4 56c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel l32i \at1, \ptr, .Lxchal_ofs_ + 0 57c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel wur \at1, THREADPTR // threadptr option 58c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel .set .Lxchal_ofs_, .Lxchal_ofs_ + 4 59c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel .endif 60c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel .endm // xchal_ncp_load 61c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 62c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 63c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 64c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#define XCHAL_NCP_NUM_ATMPS 1 65c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 66c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 67c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#define XCHAL_SA_NUM_ATMPS 1 68c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 69c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel#endif /*_XTENSA_CORE_TIE_ASM_H*/ 70c658eac628aa8df040dfe614556d95e6da3a9ffbChris Zankel 71