pata_amd.c revision 68d1d07b510bb57a504588adc2bd2758adea0965
1669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/* 2669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * pata_amd.c - AMD PATA for new ATA layer 3669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * (C) 2005-2006 Red Hat Inc 4669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Alan Cox <alan@redhat.com> 5669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 6669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Based on pata-sil680. Errata information is taken from data sheets 7669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * and the amd74xx.c driver by Vojtech Pavlik. Nvidia SATA devices are 8669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * claimed by sata-nv.c. 9669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 10669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * TODO: 11669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Variable system clock when/if it makes sense 12669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Power management on ports 13669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 14669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 15669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Documentation publically available. 16669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 17669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 18669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/kernel.h> 19669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/module.h> 20669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/pci.h> 21669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/init.h> 22669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/blkdev.h> 23669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/delay.h> 24669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <scsi/scsi_host.h> 25669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/libata.h> 26669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 27669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#define DRV_NAME "pata_amd" 28943547abdfe9b4e27e36a25987909619908dffbfBartlomiej Zolnierkiewicz#define DRV_VERSION "0.3.10" 29669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 30669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 31669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * timing_setup - shared timing computation and load 32669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @ap: ATA port being set up 33669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @adev: drive being configured 34669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @offset: port offset 35669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @speed: target speed 36669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @clock: clock multiplier (number of times 33MHz for this part) 37669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 38669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Perform the actual timing set up for Nvidia or AMD PATA devices. 39669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * The actual devices vary so they all call into this helper function 40669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * providing the clock multipler and offset (because AMD and Nvidia put 41669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * the ports at different locations). 42669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 43669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 44669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void timing_setup(struct ata_port *ap, struct ata_device *adev, int offset, int speed, int clock) 45669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 46669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik static const unsigned char amd_cyc2udma[] = { 47669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 48669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }; 49669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 50669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 51669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik struct ata_device *peer = ata_dev_pair(adev); 52669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik int dn = ap->port_no * 2 + adev->devno; 53669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik struct ata_timing at, apeer; 54669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik int T, UT; 55669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik const int amd_clock = 33333; /* KHz. */ 56669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik u8 t; 57669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 58669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik T = 1000000000 / amd_clock; 59669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik UT = T / min_t(int, max_t(int, clock, 1), 2); 60669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 61669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (ata_timing_compute(adev, speed, &at, T, UT) < 0) { 62669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik dev_printk(KERN_ERR, &pdev->dev, "unknown mode %d.\n", speed); 63669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik return; 64669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 65669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 66669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (peer) { 67669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* This may be over conservative */ 68669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (peer->dma_mode) { 69669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik ata_timing_compute(peer, peer->dma_mode, &apeer, T, UT); 70669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik ata_timing_merge(&apeer, &at, &at, ATA_TIMING_8BIT); 71669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 72669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik ata_timing_compute(peer, peer->pio_mode, &apeer, T, UT); 73669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik ata_timing_merge(&apeer, &at, &at, ATA_TIMING_8BIT); 74669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 75669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 76669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (speed == XFER_UDMA_5 && amd_clock <= 33333) at.udma = 1; 77669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (speed == XFER_UDMA_6 && amd_clock <= 33333) at.udma = 15; 78669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 79669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* 80669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Now do the setup work 81669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 82669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 83669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Configure the address set up timing */ 84669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_read_config_byte(pdev, offset + 0x0C, &t); 85669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(at.setup, 1, 4) - 1) << ((3 - dn) << 1)); 86669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_byte(pdev, offset + 0x0C , t); 87669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 88669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Configure the 8bit I/O timing */ 89669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_byte(pdev, offset + 0x0E + (1 - (dn >> 1)), 90669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik ((FIT(at.act8b, 1, 16) - 1) << 4) | (FIT(at.rec8b, 1, 16) - 1)); 91669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 92669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Drive timing */ 93669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_byte(pdev, offset + 0x08 + (3 - dn), 94669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik ((FIT(at.active, 1, 16) - 1) << 4) | (FIT(at.recover, 1, 16) - 1)); 95669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 96669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik switch (clock) { 97669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik case 1: 98669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik t = at.udma ? (0xc0 | (FIT(at.udma, 2, 5) - 2)) : 0x03; 99669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik break; 100669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 101669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik case 2: 102669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik t = at.udma ? (0xc0 | amd_cyc2udma[FIT(at.udma, 2, 10)]) : 0x03; 103669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik break; 104669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 105669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik case 3: 106669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik t = at.udma ? (0xc0 | amd_cyc2udma[FIT(at.udma, 1, 10)]) : 0x03; 107669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik break; 108669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 109669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik case 4: 110669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik t = at.udma ? (0xc0 | amd_cyc2udma[FIT(at.udma, 1, 15)]) : 0x03; 111669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik break; 112669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 113669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik default: 114669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik return; 115669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 116669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 117669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* UDMA timing */ 118943547abdfe9b4e27e36a25987909619908dffbfBartlomiej Zolnierkiewicz if (at.udma) 119943547abdfe9b4e27e36a25987909619908dffbfBartlomiej Zolnierkiewicz pci_write_config_byte(pdev, offset + 0x10 + (3 - dn), t); 120669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 121669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 122669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 123cc0680a580b5be81a1ca321b58f8e9b80b5c1052Tejun Heo * amd_pre_reset - perform reset handling 124cc0680a580b5be81a1ca321b58f8e9b80b5c1052Tejun Heo * @link: ATA link 125d4b2bab4f26345ea1803feb23ea92fbe3f6b77bcTejun Heo * @deadline: deadline jiffies for the operation 126669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 127eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox * Reset sequence checking enable bits to see which ports are 128eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox * active. 129669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 130669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 131cc0680a580b5be81a1ca321b58f8e9b80b5c1052Tejun Heostatic int amd_pre_reset(struct ata_link *link, unsigned long deadline) 132669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 133669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik static const struct pci_bits amd_enable_bits[] = { 134669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { 0x40, 1, 0x02, 0x02 }, 135669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { 0x40, 1, 0x01, 0x01 } 136669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }; 137669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 138cc0680a580b5be81a1ca321b58f8e9b80b5c1052Tejun Heo struct ata_port *ap = link->ap; 139669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 14085cd7251b9112e3dabeac9fd3b175601ca607241Jeff Garzik 141c961922b73dab429a759f560952fd4c3f60bd6b3Alan Cox if (!pci_test_config_bits(pdev, &amd_enable_bits[ap->port_no])) 142c961922b73dab429a759f560952fd4c3f60bd6b3Alan Cox return -ENOENT; 143669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 144cc0680a580b5be81a1ca321b58f8e9b80b5c1052Tejun Heo return ata_std_prereset(link, deadline); 145669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 146669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 147669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void amd_error_handler(struct ata_port *ap) 148669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 149d98f88c222bf56cfa5839930fb0d0af22d1c36bfHarvey Harrison ata_bmdma_drive_eh(ap, amd_pre_reset, ata_std_softreset, NULL, 150d98f88c222bf56cfa5839930fb0d0af22d1c36bfHarvey Harrison ata_std_postreset); 151669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 152669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 153eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Coxstatic int amd_cable_detect(struct ata_port *ap) 154669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 155eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox static const u32 bitmask[2] = {0x03, 0x0C}; 156669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 157eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox u8 ata66; 158669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 159eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox pci_read_config_byte(pdev, 0x42, &ata66); 160eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox if (ata66 & bitmask[ap->port_no]) 161eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox return ATA_CBL_PATA80; 162eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox return ATA_CBL_PATA40; 163669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 164669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 165669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 166669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * amd33_set_piomode - set initial PIO mode data 167669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @ap: ATA interface 168669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @adev: ATA device 169669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 170669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Program the AMD registers for PIO mode. 171669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 172669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 173669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void amd33_set_piomode(struct ata_port *ap, struct ata_device *adev) 174669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 175669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x40, adev->pio_mode, 1); 176669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 177669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 178669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void amd66_set_piomode(struct ata_port *ap, struct ata_device *adev) 179669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 180669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x40, adev->pio_mode, 2); 181669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 182669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 183669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void amd100_set_piomode(struct ata_port *ap, struct ata_device *adev) 184669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 185669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x40, adev->pio_mode, 3); 186669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 187669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 188669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void amd133_set_piomode(struct ata_port *ap, struct ata_device *adev) 189669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 190669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x40, adev->pio_mode, 4); 191669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 192669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 193669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 194669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * amd33_set_dmamode - set initial DMA mode data 195669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @ap: ATA interface 196669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @adev: ATA device 197669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 198669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Program the MWDMA/UDMA modes for the AMD and Nvidia 199669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * chipset. 200669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 201669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 202669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void amd33_set_dmamode(struct ata_port *ap, struct ata_device *adev) 203669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 204669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x40, adev->dma_mode, 1); 205669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 206669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 207669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void amd66_set_dmamode(struct ata_port *ap, struct ata_device *adev) 208669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 209669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x40, adev->dma_mode, 2); 210669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 211669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 212669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void amd100_set_dmamode(struct ata_port *ap, struct ata_device *adev) 213669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 214669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x40, adev->dma_mode, 3); 215669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 216669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 217669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void amd133_set_dmamode(struct ata_port *ap, struct ata_device *adev) 218669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 219669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x40, adev->dma_mode, 4); 220669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 221669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 222ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo/* Both host-side and drive-side detection results are worthless on NV 223ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo * PATAs. Ignore them and just follow what BIOS configured. Both the 224ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo * current configuration in PCI config reg and ACPI GTM result are 225ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo * cached during driver attach and are consulted to select transfer 226ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo * mode. 227ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo */ 228ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heostatic unsigned long nv_mode_filter(struct ata_device *dev, 229ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo unsigned long xfer_mask) 230ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo{ 231ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo static const unsigned int udma_mask_map[] = 232ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo { ATA_UDMA2, ATA_UDMA1, ATA_UDMA0, 0, 233ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo ATA_UDMA3, ATA_UDMA4, ATA_UDMA5, ATA_UDMA6 }; 234ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo struct ata_port *ap = dev->link->ap; 235ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo char acpi_str[32] = ""; 236ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo u32 saved_udma, udma; 237ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo const struct ata_acpi_gtm *gtm; 238ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo unsigned long bios_limit = 0, acpi_limit = 0, limit; 239ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 240ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo /* find out what BIOS configured */ 241ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo udma = saved_udma = (unsigned long)ap->host->private_data; 242ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 243ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo if (ap->port_no == 0) 244ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo udma >>= 16; 245ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo if (dev->devno == 0) 246ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo udma >>= 8; 247ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 248ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo if ((udma & 0xc0) == 0xc0) 249ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo bios_limit = ata_pack_xfermask(0, 0, udma_mask_map[udma & 0x7]); 250ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 251ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo /* consult ACPI GTM too */ 252ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo gtm = ata_acpi_init_gtm(ap); 253ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo if (gtm) { 254ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo acpi_limit = ata_acpi_gtm_xfermask(dev, gtm); 255ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 256ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo snprintf(acpi_str, sizeof(acpi_str), " (%u:%u:0x%x)", 257ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo gtm->drive[0].dma, gtm->drive[1].dma, gtm->flags); 258ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo } 259ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 260ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo /* be optimistic, EH can take care of things if something goes wrong */ 261ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo limit = bios_limit | acpi_limit; 262ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 263ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo /* If PIO or DMA isn't configured at all, don't limit. Let EH 264ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo * handle it. 265ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo */ 266ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo if (!(limit & ATA_MASK_PIO)) 267ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo limit |= ATA_MASK_PIO; 268ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo if (!(limit & (ATA_MASK_MWDMA | ATA_MASK_UDMA))) 269ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo limit |= ATA_MASK_MWDMA | ATA_MASK_UDMA; 270ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 271ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo ata_port_printk(ap, KERN_DEBUG, "nv_mode_filter: 0x%lx&0x%lx->0x%lx, " 272ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo "BIOS=0x%lx (0x%x) ACPI=0x%lx%s\n", 273ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo xfer_mask, limit, xfer_mask & limit, bios_limit, 274ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo saved_udma, acpi_limit, acpi_str); 275ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 276ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo return xfer_mask & limit; 277ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo} 278669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 279669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 280669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * nv_probe_init - cable detection 281cc0680a580b5be81a1ca321b58f8e9b80b5c1052Tejun Heo * @lin: ATA link 282669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 283669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Perform cable detection. The BIOS stores this in PCI config 284669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * space for us. 285669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 286669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 287cc0680a580b5be81a1ca321b58f8e9b80b5c1052Tejun Heostatic int nv_pre_reset(struct ata_link *link, unsigned long deadline) 288d4b2bab4f26345ea1803feb23ea92fbe3f6b77bcTejun Heo{ 28976ff3c6e3b389a5a7692811dd456e0ff58340cacAlan Cox static const struct pci_bits nv_enable_bits[] = { 29076ff3c6e3b389a5a7692811dd456e0ff58340cacAlan Cox { 0x50, 1, 0x02, 0x02 }, 29176ff3c6e3b389a5a7692811dd456e0ff58340cacAlan Cox { 0x50, 1, 0x01, 0x01 } 29276ff3c6e3b389a5a7692811dd456e0ff58340cacAlan Cox }; 293669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 294cc0680a580b5be81a1ca321b58f8e9b80b5c1052Tejun Heo struct ata_port *ap = link->ap; 295669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 296669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 297c961922b73dab429a759f560952fd4c3f60bd6b3Alan Cox if (!pci_test_config_bits(pdev, &nv_enable_bits[ap->port_no])) 298c961922b73dab429a759f560952fd4c3f60bd6b3Alan Cox return -ENOENT; 29976ff3c6e3b389a5a7692811dd456e0ff58340cacAlan Cox 300cc0680a580b5be81a1ca321b58f8e9b80b5c1052Tejun Heo return ata_std_prereset(link, deadline); 301669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 302669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 303669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void nv_error_handler(struct ata_port *ap) 304669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 305669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik ata_bmdma_drive_eh(ap, nv_pre_reset, 306669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik ata_std_softreset, NULL, 307669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik ata_std_postreset); 308669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 309eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox 310669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 311669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * nv100_set_piomode - set initial PIO mode data 312669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @ap: ATA interface 313669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @adev: ATA device 314669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 315669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Program the AMD registers for PIO mode. 316669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 317669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 318669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void nv100_set_piomode(struct ata_port *ap, struct ata_device *adev) 319669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 320669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x50, adev->pio_mode, 3); 321669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 322669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 323669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void nv133_set_piomode(struct ata_port *ap, struct ata_device *adev) 324669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 325669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x50, adev->pio_mode, 4); 326669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 327669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 328669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 329669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * nv100_set_dmamode - set initial DMA mode data 330669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @ap: ATA interface 331669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @adev: ATA device 332669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 333669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Program the MWDMA/UDMA modes for the AMD and Nvidia 334669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * chipset. 335669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 336669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 337669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void nv100_set_dmamode(struct ata_port *ap, struct ata_device *adev) 338669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 339669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x50, adev->dma_mode, 3); 340669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 341669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 342669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void nv133_set_dmamode(struct ata_port *ap, struct ata_device *adev) 343669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 344669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik timing_setup(ap, adev, 0x50, adev->dma_mode, 4); 345669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 346669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 347ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heostatic void nv_host_stop(struct ata_host *host) 348ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo{ 349ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo u32 udma = (unsigned long)host->private_data; 350ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 351ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo /* restore PCI config register 0x60 */ 352ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo pci_write_config_dword(to_pci_dev(host->dev), 0x60, udma); 353ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo} 354ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 355669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct scsi_host_template amd_sht = { 35668d1d07b510bb57a504588adc2bd2758adea0965Tejun Heo ATA_BMDMA_SHT(DRV_NAME), 357669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 358669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 359669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct ata_port_operations amd33_port_ops = { 360669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_piomode = amd33_set_piomode, 361669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_dmamode = amd33_set_dmamode, 362669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mode_filter = ata_pci_default_filter, 363669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_load = ata_tf_load, 364669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_read = ata_tf_read, 365669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .check_status = ata_check_status, 366669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .exec_command = ata_exec_command, 367669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .dev_select = ata_std_dev_select, 368669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 369669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .freeze = ata_bmdma_freeze, 370669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .thaw = ata_bmdma_thaw, 371eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox .error_handler = amd_error_handler, 372669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 373eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox .cable_detect = ata_cable_40wire, 374669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 375669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_setup = ata_bmdma_setup, 376669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_start = ata_bmdma_start, 377669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_stop = ata_bmdma_stop, 378669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_status = ata_bmdma_status, 379669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 380669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_prep = ata_qc_prep, 381669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_issue = ata_qc_issue_prot, 382bda3028813bd07f34f30288a492fbf6f7b8712ddJeff Garzik 3830d5ff566779f894ca9937231a181eb31e4adff0eTejun Heo .data_xfer = ata_data_xfer, 384669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 385669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_handler = ata_interrupt, 386669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_clear = ata_bmdma_irq_clear, 387246ce3b675843e0369643cceb4faeb6cf6d19a30Akira Iguchi .irq_on = ata_irq_on, 388669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 38981ad1837b590775336f68eafcae8dab13a975b3aAlan Cox .port_start = ata_sff_port_start, 390669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 391669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 392669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct ata_port_operations amd66_port_ops = { 393669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_piomode = amd66_set_piomode, 394669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_dmamode = amd66_set_dmamode, 395669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mode_filter = ata_pci_default_filter, 396669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_load = ata_tf_load, 397669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_read = ata_tf_read, 398669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .check_status = ata_check_status, 399669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .exec_command = ata_exec_command, 400669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .dev_select = ata_std_dev_select, 401669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 402669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .freeze = ata_bmdma_freeze, 403669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .thaw = ata_bmdma_thaw, 404eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox .error_handler = amd_error_handler, 405669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 406eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox .cable_detect = ata_cable_unknown, 407669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 408669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_setup = ata_bmdma_setup, 409669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_start = ata_bmdma_start, 410669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_stop = ata_bmdma_stop, 411669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_status = ata_bmdma_status, 412669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 413669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_prep = ata_qc_prep, 414669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_issue = ata_qc_issue_prot, 415bda3028813bd07f34f30288a492fbf6f7b8712ddJeff Garzik 4160d5ff566779f894ca9937231a181eb31e4adff0eTejun Heo .data_xfer = ata_data_xfer, 417669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 418669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_handler = ata_interrupt, 419669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_clear = ata_bmdma_irq_clear, 420246ce3b675843e0369643cceb4faeb6cf6d19a30Akira Iguchi .irq_on = ata_irq_on, 421669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 42281ad1837b590775336f68eafcae8dab13a975b3aAlan Cox .port_start = ata_sff_port_start, 423669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 424669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 425669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct ata_port_operations amd100_port_ops = { 426669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_piomode = amd100_set_piomode, 427669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_dmamode = amd100_set_dmamode, 428669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mode_filter = ata_pci_default_filter, 429669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_load = ata_tf_load, 430669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_read = ata_tf_read, 431669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .check_status = ata_check_status, 432669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .exec_command = ata_exec_command, 433669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .dev_select = ata_std_dev_select, 434669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 435669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .freeze = ata_bmdma_freeze, 436669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .thaw = ata_bmdma_thaw, 437669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .error_handler = amd_error_handler, 438669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 439eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox .cable_detect = ata_cable_unknown, 440669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 441669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_setup = ata_bmdma_setup, 442669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_start = ata_bmdma_start, 443669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_stop = ata_bmdma_stop, 444669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_status = ata_bmdma_status, 445669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 446669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_prep = ata_qc_prep, 447669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_issue = ata_qc_issue_prot, 448bda3028813bd07f34f30288a492fbf6f7b8712ddJeff Garzik 4490d5ff566779f894ca9937231a181eb31e4adff0eTejun Heo .data_xfer = ata_data_xfer, 450669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 451669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_handler = ata_interrupt, 452669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_clear = ata_bmdma_irq_clear, 453246ce3b675843e0369643cceb4faeb6cf6d19a30Akira Iguchi .irq_on = ata_irq_on, 454669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 45581ad1837b590775336f68eafcae8dab13a975b3aAlan Cox .port_start = ata_sff_port_start, 456669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 457669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 458669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct ata_port_operations amd133_port_ops = { 459669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_piomode = amd133_set_piomode, 460669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_dmamode = amd133_set_dmamode, 461669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mode_filter = ata_pci_default_filter, 462669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_load = ata_tf_load, 463669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_read = ata_tf_read, 464669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .check_status = ata_check_status, 465669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .exec_command = ata_exec_command, 466669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .dev_select = ata_std_dev_select, 467669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 468669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .freeze = ata_bmdma_freeze, 469669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .thaw = ata_bmdma_thaw, 470669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .error_handler = amd_error_handler, 471669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 472eb4a2c7f03db06dda0370591c958fa5a62ff2ec3Alan Cox .cable_detect = amd_cable_detect, 473669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 474669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_setup = ata_bmdma_setup, 475669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_start = ata_bmdma_start, 476669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_stop = ata_bmdma_stop, 477669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_status = ata_bmdma_status, 478669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 479669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_prep = ata_qc_prep, 480669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_issue = ata_qc_issue_prot, 481bda3028813bd07f34f30288a492fbf6f7b8712ddJeff Garzik 4820d5ff566779f894ca9937231a181eb31e4adff0eTejun Heo .data_xfer = ata_data_xfer, 483669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 484669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_handler = ata_interrupt, 485669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_clear = ata_bmdma_irq_clear, 486246ce3b675843e0369643cceb4faeb6cf6d19a30Akira Iguchi .irq_on = ata_irq_on, 487669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 48881ad1837b590775336f68eafcae8dab13a975b3aAlan Cox .port_start = ata_sff_port_start, 489669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 490669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 491669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct ata_port_operations nv100_port_ops = { 492669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_piomode = nv100_set_piomode, 493669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_dmamode = nv100_set_dmamode, 494669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_load = ata_tf_load, 495669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_read = ata_tf_read, 496669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .check_status = ata_check_status, 497669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .exec_command = ata_exec_command, 498669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .dev_select = ata_std_dev_select, 499669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 500669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .freeze = ata_bmdma_freeze, 501669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .thaw = ata_bmdma_thaw, 502669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .error_handler = nv_error_handler, 503669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 504ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo .cable_detect = ata_cable_ignore, 505ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo .mode_filter = nv_mode_filter, 506669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 507669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_setup = ata_bmdma_setup, 508669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_start = ata_bmdma_start, 509669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_stop = ata_bmdma_stop, 510669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_status = ata_bmdma_status, 511669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 512669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_prep = ata_qc_prep, 513669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_issue = ata_qc_issue_prot, 514bda3028813bd07f34f30288a492fbf6f7b8712ddJeff Garzik 5150d5ff566779f894ca9937231a181eb31e4adff0eTejun Heo .data_xfer = ata_data_xfer, 516669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 517669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_handler = ata_interrupt, 518669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_clear = ata_bmdma_irq_clear, 519246ce3b675843e0369643cceb4faeb6cf6d19a30Akira Iguchi .irq_on = ata_irq_on, 520669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 52181ad1837b590775336f68eafcae8dab13a975b3aAlan Cox .port_start = ata_sff_port_start, 522ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo .host_stop = nv_host_stop, 523669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 524669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 525669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct ata_port_operations nv133_port_ops = { 526669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_piomode = nv133_set_piomode, 527669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_dmamode = nv133_set_dmamode, 528669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_load = ata_tf_load, 529669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .tf_read = ata_tf_read, 530669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .check_status = ata_check_status, 531669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .exec_command = ata_exec_command, 532669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .dev_select = ata_std_dev_select, 533669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 534669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .freeze = ata_bmdma_freeze, 535669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .thaw = ata_bmdma_thaw, 536669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .error_handler = nv_error_handler, 537669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 538ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo .cable_detect = ata_cable_ignore, 539ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo .mode_filter = nv_mode_filter, 540669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 541669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_setup = ata_bmdma_setup, 542669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_start = ata_bmdma_start, 543669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_stop = ata_bmdma_stop, 544669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .bmdma_status = ata_bmdma_status, 545669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 546669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_prep = ata_qc_prep, 547669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .qc_issue = ata_qc_issue_prot, 548bda3028813bd07f34f30288a492fbf6f7b8712ddJeff Garzik 5490d5ff566779f894ca9937231a181eb31e4adff0eTejun Heo .data_xfer = ata_data_xfer, 550669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 551669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_handler = ata_interrupt, 552669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .irq_clear = ata_bmdma_irq_clear, 553246ce3b675843e0369643cceb4faeb6cf6d19a30Akira Iguchi .irq_on = ata_irq_on, 554669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 55581ad1837b590775336f68eafcae8dab13a975b3aAlan Cox .port_start = ata_sff_port_start, 556ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo .host_stop = nv_host_stop, 557669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 558669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 559669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 560669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 5611626aeb881236c8cb022b5e4ca594146a951d669Tejun Heo static const struct ata_port_info info[10] = { 562669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { /* 0: AMD 7401 */ 563669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .sht = &amd_sht, 5641d2808fd3d2d5d2c0483796a0f443d1cb3f11367Jeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 565669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .pio_mask = 0x1f, 566669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mwdma_mask = 0x07, /* No SWDMA */ 567669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .udma_mask = 0x07, /* UDMA 33 */ 568669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .port_ops = &amd33_port_ops 569669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }, 570669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { /* 1: Early AMD7409 - no swdma */ 571669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .sht = &amd_sht, 5721d2808fd3d2d5d2c0483796a0f443d1cb3f11367Jeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 573669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .pio_mask = 0x1f, 574669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mwdma_mask = 0x07, 575bf6263a853c9c143bf03f0a6fdcc68ab714fb5f5Jeff Garzik .udma_mask = ATA_UDMA4, /* UDMA 66 */ 576669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .port_ops = &amd66_port_ops 577669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }, 578669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { /* 2: AMD 7409, no swdma errata */ 579669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .sht = &amd_sht, 5801d2808fd3d2d5d2c0483796a0f443d1cb3f11367Jeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 581669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .pio_mask = 0x1f, 582669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mwdma_mask = 0x07, 583bf6263a853c9c143bf03f0a6fdcc68ab714fb5f5Jeff Garzik .udma_mask = ATA_UDMA4, /* UDMA 66 */ 584669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .port_ops = &amd66_port_ops 585669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }, 586669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { /* 3: AMD 7411 */ 587669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .sht = &amd_sht, 5881d2808fd3d2d5d2c0483796a0f443d1cb3f11367Jeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 589669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .pio_mask = 0x1f, 590669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mwdma_mask = 0x07, 591bf6263a853c9c143bf03f0a6fdcc68ab714fb5f5Jeff Garzik .udma_mask = ATA_UDMA5, /* UDMA 100 */ 592669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .port_ops = &amd100_port_ops 593669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }, 594669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { /* 4: AMD 7441 */ 595669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .sht = &amd_sht, 5961d2808fd3d2d5d2c0483796a0f443d1cb3f11367Jeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 597669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .pio_mask = 0x1f, 598669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mwdma_mask = 0x07, 599bf6263a853c9c143bf03f0a6fdcc68ab714fb5f5Jeff Garzik .udma_mask = ATA_UDMA5, /* UDMA 100 */ 600669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .port_ops = &amd100_port_ops 601669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }, 602669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { /* 5: AMD 8111*/ 603669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .sht = &amd_sht, 6041d2808fd3d2d5d2c0483796a0f443d1cb3f11367Jeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 605669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .pio_mask = 0x1f, 606669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mwdma_mask = 0x07, 607bf6263a853c9c143bf03f0a6fdcc68ab714fb5f5Jeff Garzik .udma_mask = ATA_UDMA6, /* UDMA 133, no swdma */ 608669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .port_ops = &amd133_port_ops 609669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }, 610669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { /* 6: AMD 8111 UDMA 100 (Serenade) */ 611669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .sht = &amd_sht, 6121d2808fd3d2d5d2c0483796a0f443d1cb3f11367Jeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 613669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .pio_mask = 0x1f, 614669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mwdma_mask = 0x07, 615bf6263a853c9c143bf03f0a6fdcc68ab714fb5f5Jeff Garzik .udma_mask = ATA_UDMA5, /* UDMA 100, no swdma */ 616669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .port_ops = &amd133_port_ops 617669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }, 618669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { /* 7: Nvidia Nforce */ 619669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .sht = &amd_sht, 6201d2808fd3d2d5d2c0483796a0f443d1cb3f11367Jeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 621669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .pio_mask = 0x1f, 622669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mwdma_mask = 0x07, 623bf6263a853c9c143bf03f0a6fdcc68ab714fb5f5Jeff Garzik .udma_mask = ATA_UDMA5, /* UDMA 100 */ 624669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .port_ops = &nv100_port_ops 625669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }, 626669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { /* 8: Nvidia Nforce2 and later */ 627669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .sht = &amd_sht, 6281d2808fd3d2d5d2c0483796a0f443d1cb3f11367Jeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 629669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .pio_mask = 0x1f, 630669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mwdma_mask = 0x07, 631bf6263a853c9c143bf03f0a6fdcc68ab714fb5f5Jeff Garzik .udma_mask = ATA_UDMA6, /* UDMA 133, no swdma */ 632669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .port_ops = &nv133_port_ops 633669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }, 634669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { /* 9: AMD CS5536 (Geode companion) */ 635669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .sht = &amd_sht, 6361d2808fd3d2d5d2c0483796a0f443d1cb3f11367Jeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 637669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .pio_mask = 0x1f, 638669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .mwdma_mask = 0x07, 639bf6263a853c9c143bf03f0a6fdcc68ab714fb5f5Jeff Garzik .udma_mask = ATA_UDMA5, /* UDMA 100 */ 640669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .port_ops = &amd100_port_ops 641669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 642669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }; 643ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo struct ata_port_info pi; 644ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo const struct ata_port_info *ppi[] = { &pi, NULL }; 645669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik static int printed_version; 646669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik int type = id->driver_data; 647669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik u8 fifo; 648f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo int rc; 649669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 650669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (!printed_version++) 651669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 652669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 653f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo rc = pcim_enable_device(pdev); 654f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo if (rc) 655f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo return rc; 656f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo 657669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_read_config_byte(pdev, 0x41, &fifo); 658669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 659669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Check for AMD7409 without swdma errata and if found adjust type */ 66044c10138fd4bbc4b6d6bff0873c24902f2a9da65Auke Kok if (type == 1 && pdev->revision > 0x7) 661669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik type = 2; 662669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 663ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo /* Serenade ? */ 664ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo if (type == 5 && pdev->subsystem_vendor == PCI_VENDOR_ID_AMD && 665ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo pdev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE) 666ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo type = 6; /* UDMA 100 only */ 667ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 668ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo /* 669ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo * Okay, type is determined now. Apply type-specific workarounds. 670ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo */ 671ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo pi = info[type]; 672ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 673ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo if (type < 3) 674ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo ata_pci_clear_simplex(pdev); 675ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo 676669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Check for AMD7411 */ 677669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (type == 3) 678669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* FIFO is broken */ 679669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_byte(pdev, 0x41, fifo & 0x0F); 680669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik else 681669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_byte(pdev, 0x41, fifo | 0xF0); 682669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 683ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo /* Cable detection on Nvidia chips doesn't work too well, 684ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo * cache BIOS programmed UDMA mode. 685ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo */ 686ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo if (type == 7 || type == 8) { 687ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo u32 udma; 688669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 689ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo pci_read_config_dword(pdev, 0x60, &udma); 690ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo pi.private_data = (void *)(unsigned long)udma; 691ce54d1616302117fa98513ae916bb3333e1c02eaTejun Heo } 692669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 693669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* And fire it up */ 6941626aeb881236c8cb022b5e4ca594146a951d669Tejun Heo return ata_pci_init_one(pdev, ppi); 695669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 696669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 697438ac6d5e3f8106a6bd1a5682c508d660294a85dTejun Heo#ifdef CONFIG_PM 698c304193a005b5262671c1389b1cae96d7afc952aAlan Coxstatic int amd_reinit_one(struct pci_dev *pdev) 699c304193a005b5262671c1389b1cae96d7afc952aAlan Cox{ 700f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo struct ata_host *host = dev_get_drvdata(&pdev->dev); 701f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo int rc; 702f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo 703f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo rc = ata_pci_device_do_resume(pdev); 704f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo if (rc) 705f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo return rc; 706f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo 707c304193a005b5262671c1389b1cae96d7afc952aAlan Cox if (pdev->vendor == PCI_VENDOR_ID_AMD) { 708c304193a005b5262671c1389b1cae96d7afc952aAlan Cox u8 fifo; 709c304193a005b5262671c1389b1cae96d7afc952aAlan Cox pci_read_config_byte(pdev, 0x41, &fifo); 710c304193a005b5262671c1389b1cae96d7afc952aAlan Cox if (pdev->device == PCI_DEVICE_ID_AMD_VIPER_7411) 711c304193a005b5262671c1389b1cae96d7afc952aAlan Cox /* FIFO is broken */ 712c304193a005b5262671c1389b1cae96d7afc952aAlan Cox pci_write_config_byte(pdev, 0x41, fifo & 0x0F); 713c304193a005b5262671c1389b1cae96d7afc952aAlan Cox else 714c304193a005b5262671c1389b1cae96d7afc952aAlan Cox pci_write_config_byte(pdev, 0x41, fifo | 0xF0); 715c304193a005b5262671c1389b1cae96d7afc952aAlan Cox if (pdev->device == PCI_DEVICE_ID_AMD_VIPER_7409 || 716c304193a005b5262671c1389b1cae96d7afc952aAlan Cox pdev->device == PCI_DEVICE_ID_AMD_COBRA_7401) 717c304193a005b5262671c1389b1cae96d7afc952aAlan Cox ata_pci_clear_simplex(pdev); 718c304193a005b5262671c1389b1cae96d7afc952aAlan Cox } 719f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo 720f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo ata_host_resume(host); 721f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo return 0; 722c304193a005b5262671c1389b1cae96d7afc952aAlan Cox} 723438ac6d5e3f8106a6bd1a5682c508d660294a85dTejun Heo#endif 724c304193a005b5262671c1389b1cae96d7afc952aAlan Cox 725669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic const struct pci_device_id amd[] = { 7262d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_COBRA_7401), 0 }, 7272d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7409), 1 }, 7282d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7411), 3 }, 7292d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_OPUS_7441), 4 }, 7302d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_8111_IDE), 5 }, 7312d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE), 7 }, 7322d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE), 8 }, 7332d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE), 8 }, 7342d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE), 8 }, 7352d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE), 8 }, 7362d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE), 8 }, 7372d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE), 8 }, 7382d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE), 8 }, 7392d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE), 8 }, 7402d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE), 8 }, 74105e2867a7bcc76de37e103a97ed48ba6872db797Peer Chen { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE), 8 }, 74205e2867a7bcc76de37e103a97ed48ba6872db797Peer Chen { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE), 8 }, 7439f7897554eeca34ec23dd877cc27402bd327a1cePeer Chen { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE), 8 }, 7449f7897554eeca34ec23dd877cc27402bd327a1cePeer Chen { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE), 8 }, 7452d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), 9 }, 7462d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik 7472d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { }, 748669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 749669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 750669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct pci_driver amd_pci_driver = { 7512d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik .name = DRV_NAME, 752669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .id_table = amd, 753669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .probe = amd_init_one, 754c304193a005b5262671c1389b1cae96d7afc952aAlan Cox .remove = ata_pci_remove_one, 755438ac6d5e3f8106a6bd1a5682c508d660294a85dTejun Heo#ifdef CONFIG_PM 756c304193a005b5262671c1389b1cae96d7afc952aAlan Cox .suspend = ata_pci_device_suspend, 757c304193a005b5262671c1389b1cae96d7afc952aAlan Cox .resume = amd_reinit_one, 758438ac6d5e3f8106a6bd1a5682c508d660294a85dTejun Heo#endif 759669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 760669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 761669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic int __init amd_init(void) 762669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 763669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik return pci_register_driver(&amd_pci_driver); 764669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 765669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 766669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void __exit amd_exit(void) 767669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 768669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_unregister_driver(&amd_pci_driver); 769669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 770669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 771669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_AUTHOR("Alan Cox"); 772c9544bcb4c7df07555e4b22d297c5705738da09dAlan CoxMODULE_DESCRIPTION("low-level driver for AMD and Nvidia PATA IDE"); 773669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_LICENSE("GPL"); 774669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_DEVICE_TABLE(pci, amd); 775669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_VERSION(DRV_VERSION); 776669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 777669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikmodule_init(amd_init); 778669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikmodule_exit(amd_exit); 779