1669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/* 2669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * IDE tuning and bus mastering support for the CS5510/CS5520 3669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * chipsets 4669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 5669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * The CS5510/CS5520 are slightly unusual devices. Unlike the 6669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * typical IDE controllers they do bus mastering with the drive in 7669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * PIO mode and smarter silicon. 8669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 9669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * The practical upshot of this is that we must always tune the 10669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * drive for the right PIO mode. We must also ignore all the blacklists 11669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * and the drive bus mastering DMA information. Also to confuse matters 12669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * further we can do DMA on PIO only drives. 13669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 14669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * DMA on the 5510 also requires we disable_hlt() during DMA on early 15669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * revisions. 16669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 17669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * *** This driver is strictly experimental *** 18669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 19669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * (c) Copyright Red Hat Inc 2002 20669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 21669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * This program is free software; you can redistribute it and/or modify it 22669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * under the terms of the GNU General Public License as published by the 23669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Free Software Foundation; either version 2, or (at your option) any 24669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * later version. 25669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 26669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * This program is distributed in the hope that it will be useful, but 27669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * WITHOUT ANY WARRANTY; without even the implied warranty of 28669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 29669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * General Public License for more details. 30669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 31669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Documentation: 3225985edcedea6396277003854657b5f3cb31a628Lucas De Marchi * Not publicly available. 33669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 34669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/kernel.h> 35669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/module.h> 36669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/pci.h> 37669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/blkdev.h> 38669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/delay.h> 39669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <scsi/scsi_host.h> 40669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/libata.h> 41669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 42669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#define DRV_NAME "pata_cs5520" 432a3103ce4357a09c2289405f969acec0edf4398fJeff Garzik#define DRV_VERSION "0.6.6" 44669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 45669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstruct pio_clocks 46669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 47669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik int address; 48669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik int assert; 49669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik int recovery; 50669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 51669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 52669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic const struct pio_clocks cs5520_pio_clocks[]={ 53669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik {3, 6, 11}, 54669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik {2, 5, 6}, 55669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik {1, 4, 3}, 56669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik {1, 3, 2}, 57669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik {1, 2, 1} 58669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 59669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 60669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 61669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * cs5520_set_timings - program PIO timings 62669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @ap: ATA port 63669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @adev: ATA device 64669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 65669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Program the PIO mode timings for the controller according to the pio 66669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * clocking table. 67669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 68669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 69669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void cs5520_set_timings(struct ata_port *ap, struct ata_device *adev, int pio) 70669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 71669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 72669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik int slave = adev->devno; 73669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 74669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pio -= XFER_PIO_0; 75669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 76669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Channel command timing */ 77669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_byte(pdev, 0x62 + ap->port_no, 78669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik (cs5520_pio_clocks[pio].recovery << 4) | 79669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik (cs5520_pio_clocks[pio].assert)); 80669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* FIXME: should these use address ? */ 81669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Read command timing */ 82669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_byte(pdev, 0x64 + 4*ap->port_no + slave, 83669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik (cs5520_pio_clocks[pio].recovery << 4) | 84669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik (cs5520_pio_clocks[pio].assert)); 85669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Write command timing */ 86669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_byte(pdev, 0x66 + 4*ap->port_no + slave, 87669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik (cs5520_pio_clocks[pio].recovery << 4) | 88669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik (cs5520_pio_clocks[pio].assert)); 89669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 90669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 91669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 92669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * cs5520_set_piomode - program PIO timings 93669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @ap: ATA port 94669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @adev: ATA device 95669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 96669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Program the PIO mode timings for the controller according to the pio 97940a68de56c1952c29d9f3c1a769a82b1bdd2b67Bartlomiej Zolnierkiewicz * clocking table. 98669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 99669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 100669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev) 101669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 102669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik cs5520_set_timings(ap, adev, adev->pio_mode); 103669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 104669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 105669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct scsi_host_template cs5520_sht = { 10668d1d07b510bb57a504588adc2bd2758adea0965Tejun Heo ATA_BMDMA_SHT(DRV_NAME), 107d26fc9551a15fdad0d5de8376a78816b8af44f00Alan Cox .sg_tablesize = LIBATA_DUMB_MAX_PRD, 108669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 109669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 110669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct ata_port_operations cs5520_port_ops = { 111029cfd6b74fc5c517865fad78cf4a3ea8d9b664aTejun Heo .inherits = &ata_bmdma_port_ops, 112f47451c45fe0032ef491aaf3e0623fa0154e156dTejun Heo .qc_prep = ata_bmdma_dumb_qc_prep, 113029cfd6b74fc5c517865fad78cf4a3ea8d9b664aTejun Heo .cable_detect = ata_cable_40wire, 114669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_piomode = cs5520_set_piomode, 115669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 116669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 1170ec24914675c48213378da550db494bf154f0f6cGreg Kroah-Hartmanstatic int cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 118669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 119cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo static const unsigned int cmd_port[] = { 0x1F0, 0x170 }; 120cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo static const unsigned int ctl_port[] = { 0x3F6, 0x376 }; 1215d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo struct ata_port_info pi = { 1225d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo .flags = ATA_FLAG_SLAVE_POSS, 12314bdef982caeda19afe34010482867c18217c641Erik Inge Bolsø .pio_mask = ATA_PIO4, 1245d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo .port_ops = &cs5520_port_ops, 1255d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo }; 1265d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo const struct ata_port_info *ppi[2]; 127669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik u8 pcicfg; 1284ca4e439640cd1d3659cbcf60e7a73c2ae0450b3Al Viro void __iomem *iomap[5]; 1295d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo struct ata_host *host; 1305d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo struct ata_ioports *ioaddr; 1315d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo int i, rc; 132669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 133f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo rc = pcim_enable_device(pdev); 134f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo if (rc) 135f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo return rc; 136f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo 137669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* IDE port enable bits */ 1385d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo pci_read_config_byte(pdev, 0x60, &pcicfg); 139669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 140669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Check if the ATA ports are enabled */ 141669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if ((pcicfg & 3) == 0) 142669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik return -ENODEV; 143669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 1445d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ppi[0] = ppi[1] = &ata_dummy_port_info; 1455d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo if (pcicfg & 1) 1465d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ppi[0] = π 1475d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo if (pcicfg & 2) 1485d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ppi[1] = π 1495d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo 150669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if ((pcicfg & 0x40) == 0) { 151a44fec1fce5d5d14cc3ac4545b8da346394de666Joe Perches dev_warn(&pdev->dev, "DMA mode disabled. Enabling.\n"); 1525d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo pci_write_config_byte(pdev, 0x60, pcicfg | 0x40); 153669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 154669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 1555d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo pi.mwdma_mask = id->driver_data; 1565d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo 1575d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2); 1585d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo if (!host) 1595d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo return -ENOMEM; 1605d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo 161669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Perform set up for DMA */ 1620948391641918b95d8d96c15089eb5ac156850b3Benjamin Herrenschmidt if (pci_enable_device_io(pdev)) { 163669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik printk(KERN_ERR DRV_NAME ": unable to configure BAR2.\n"); 164669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik return -ENODEV; 165669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 1665d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo 167284901a90a9e0b812ca3f5f852cbbfb60d10249dYang Hongyang if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { 168669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik printk(KERN_ERR DRV_NAME ": unable to configure DMA mask.\n"); 169669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik return -ENODEV; 170669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 171284901a90a9e0b812ca3f5f852cbbfb60d10249dYang Hongyang if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 172669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik printk(KERN_ERR DRV_NAME ": unable to configure consistent DMA mask.\n"); 173669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik return -ENODEV; 174669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 175669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 1765d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo /* Map IO ports and initialize host accordingly */ 177cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo iomap[0] = devm_ioport_map(&pdev->dev, cmd_port[0], 8); 178cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo iomap[1] = devm_ioport_map(&pdev->dev, ctl_port[0], 1); 179cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo iomap[2] = devm_ioport_map(&pdev->dev, cmd_port[1], 8); 180cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo iomap[3] = devm_ioport_map(&pdev->dev, ctl_port[1], 1); 1815d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo iomap[4] = pcim_iomap(pdev, 2, 0); 1820d5ff566779f894ca9937231a181eb31e4adff0eTejun Heo 1830d5ff566779f894ca9937231a181eb31e4adff0eTejun Heo if (!iomap[0] || !iomap[1] || !iomap[2] || !iomap[3] || !iomap[4]) 1840d5ff566779f894ca9937231a181eb31e4adff0eTejun Heo return -ENOMEM; 1850d5ff566779f894ca9937231a181eb31e4adff0eTejun Heo 1865d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ioaddr = &host->ports[0]->ioaddr; 1875d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ioaddr->cmd_addr = iomap[0]; 1885d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ioaddr->ctl_addr = iomap[1]; 1895d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ioaddr->altstatus_addr = iomap[1]; 1905d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ioaddr->bmdma_addr = iomap[4]; 1919363c3825ea9ad76561eb48a395349dd29211ed6Tejun Heo ata_sff_std_ports(ioaddr); 1925d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo 193cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo ata_port_desc(host->ports[0], 194cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo "cmd 0x%x ctl 0x%x", cmd_port[0], ctl_port[0]); 195cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo ata_port_pbar_desc(host->ports[0], 4, 0, "bmdma"); 196cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo 1975d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ioaddr = &host->ports[1]->ioaddr; 1985d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ioaddr->cmd_addr = iomap[2]; 1995d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ioaddr->ctl_addr = iomap[3]; 2005d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ioaddr->altstatus_addr = iomap[3]; 2015d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo ioaddr->bmdma_addr = iomap[4] + 8; 2029363c3825ea9ad76561eb48a395349dd29211ed6Tejun Heo ata_sff_std_ports(ioaddr); 2035d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo 204cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo ata_port_desc(host->ports[1], 205cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo "cmd 0x%x ctl 0x%x", cmd_port[1], ctl_port[1]); 206cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo ata_port_pbar_desc(host->ports[1], 4, 8, "bmdma"); 207cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo 2085d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo /* activate the host */ 2095d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo pci_set_master(pdev); 2105d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo rc = ata_host_start(host); 2115d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo if (rc) 2125d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo return rc; 2135d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo 2145d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo for (i = 0; i < 2; i++) { 2155d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo static const int irq[] = { 14, 15 }; 2168c6b065b792061c2e471d530127f2348fd9d243dAlan Cox struct ata_port *ap = host->ports[i]; 2175d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo 2185d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo if (ata_port_is_dummy(ap)) 2195d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo continue; 2205d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo 2215d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo rc = devm_request_irq(&pdev->dev, irq[ap->port_no], 222c3b2889424c26f3b42962b6f39aabb4f1fd1b576Tejun Heo ata_bmdma_interrupt, 0, DRV_NAME, host); 2235d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo if (rc) 2245d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo return rc; 2254031826b3ca40982880f6b9f2282c7d7fad60d77Tejun Heo 226cbcdd87593a1d85c5c4b259945a3a09eee12814dTejun Heo ata_port_desc(ap, "irq %d", irq[i]); 2275d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo } 2285d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo 2295d728824efeda61d304153bfcf1378a3c18b7d70Tejun Heo return ata_host_register(host, &cs5520_sht); 230669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 231669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 23258eb8cd565af4a104395e3c10443951c1f73dafeBartlomiej Zolnierkiewicz#ifdef CONFIG_PM_SLEEP 2338501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox/** 2348501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox * cs5520_reinit_one - device resume 2358501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox * @pdev: PCI device 2368501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox * 2378501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox * Do any reconfiguration work needed by a resume from RAM. We need 2388501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox * to restore DMA mode support on BIOSen which disabled it 2398501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox */ 240f20b16ff7c19d1c369ee07470952aca093551ed0Jeff Garzik 2418501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Coxstatic int cs5520_reinit_one(struct pci_dev *pdev) 2428501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox{ 2430a86e1c857134efe2cdb31d74bc7ea21721db494Jingoo Han struct ata_host *host = pci_get_drvdata(pdev); 2448501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox u8 pcicfg; 245f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo int rc; 246f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo 247f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo rc = ata_pci_device_do_resume(pdev); 248f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo if (rc) 249f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo return rc; 250f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo 2518501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox pci_read_config_byte(pdev, 0x60, &pcicfg); 2528501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox if ((pcicfg & 0x40) == 0) 2538501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox pci_write_config_byte(pdev, 0x60, pcicfg | 0x40); 254f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo 255f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo ata_host_resume(host); 256f08048e94564d009b19038cfbdd800aa83e79c7fTejun Heo return 0; 2578501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox} 258aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox 259aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox/** 260aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox * cs5520_pci_device_suspend - device suspend 261aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox * @pdev: PCI device 262aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox * 263aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox * We have to cut and waste bits from the standard method because 264aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox * the 5520 is a bit odd and not just a pure ATA device. As a result 265aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox * we must not disable it. The needed code is short and this avoids 266aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox * chip specific mess in the core code. 267aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox */ 268aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox 269aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Coxstatic int cs5520_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 270aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox{ 2710a86e1c857134efe2cdb31d74bc7ea21721db494Jingoo Han struct ata_host *host = pci_get_drvdata(pdev); 272aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox int rc = 0; 273aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox 274aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox rc = ata_host_suspend(host, mesg); 275aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox if (rc) 276aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox return rc; 277aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox 278aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox pci_save_state(pdev); 279aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox return 0; 280aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox} 28158eb8cd565af4a104395e3c10443951c1f73dafeBartlomiej Zolnierkiewicz#endif /* CONFIG_PM_SLEEP */ 282a84471fe269c38ea3725345c43ad64e5f489bea2Jeff Garzik 283669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/* For now keep DMA off. We can set it for all but A rev CS5510 once the 284669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik core ATA code can handle it */ 285669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 2862d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzikstatic const struct pci_device_id pata_cs5520[] = { 2872d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), }, 2882d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), }, 2892d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik 2902d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { }, 291669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 292669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 293669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct pci_driver cs5520_pci_driver = { 294669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .name = DRV_NAME, 295669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .id_table = pata_cs5520, 296669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .probe = cs5520_init_one, 2972855568b1ee4f58ef2c0a13ddfceb4b0b216b7edJeff Garzik .remove = ata_pci_remove_one, 29858eb8cd565af4a104395e3c10443951c1f73dafeBartlomiej Zolnierkiewicz#ifdef CONFIG_PM_SLEEP 299aa6de4942c25f05cb7f4aa8efa20c5ec0884d8f1Alan Cox .suspend = cs5520_pci_device_suspend, 3008501120f1df1aa6abe38b51ab91df08ccaa1b971Alan Cox .resume = cs5520_reinit_one, 301438ac6d5e3f8106a6bd1a5682c508d660294a85dTejun Heo#endif 302669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 303669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 3042fc75da0c59634b81223af497c4a037822f6e457Axel Linmodule_pci_driver(cs5520_pci_driver); 305669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 306669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_AUTHOR("Alan Cox"); 307669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_DESCRIPTION("low-level driver for Cyrix CS5510/5520"); 308669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_LICENSE("GPL"); 309669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_DEVICE_TABLE(pci, pata_cs5520); 310669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_VERSION(DRV_VERSION); 311