1789221ecc870117b77e354d488d5d29f15410de8Bing Zhao/**
2789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * Marvell BT-over-SDIO driver: SDIO interface related definitions
3789221ecc870117b77e354d488d5d29f15410de8Bing Zhao *
4789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * Copyright (C) 2009, Marvell International Ltd.
5789221ecc870117b77e354d488d5d29f15410de8Bing Zhao *
6789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * This software file (the "File") is distributed by Marvell International
7789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * (the "License").  You may use, redistribute and/or modify this File in
9789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * accordance with the terms and conditions of the License, a copy of which
10789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * is available by writing to the Free Software Foundation, Inc.,
11789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13789221ecc870117b77e354d488d5d29f15410de8Bing Zhao *
14789221ecc870117b77e354d488d5d29f15410de8Bing Zhao *
15789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
16789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
17789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
18789221ecc870117b77e354d488d5d29f15410de8Bing Zhao * this warranty disclaimer.
19789221ecc870117b77e354d488d5d29f15410de8Bing Zhao *
20789221ecc870117b77e354d488d5d29f15410de8Bing Zhao **/
21789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
22789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define SDIO_HEADER_LEN			4
23789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
24789221ecc870117b77e354d488d5d29f15410de8Bing Zhao/* SD block size can not bigger than 64 due to buf size limit in firmware */
25789221ecc870117b77e354d488d5d29f15410de8Bing Zhao/* define SD block size for data Tx/Rx */
26789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define SDIO_BLOCK_SIZE			64
27789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
28789221ecc870117b77e354d488d5d29f15410de8Bing Zhao/* Number of blocks for firmware transfer */
29789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define FIRMWARE_TRANSFER_NBLOCK	2
30789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
31789221ecc870117b77e354d488d5d29f15410de8Bing Zhao/* This is for firmware specific length */
32789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define FW_EXTRA_LEN			36
33789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
34789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define MRVDRV_SIZE_OF_CMD_BUFFER       (2 * 1024)
35789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
36789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define MRVDRV_BT_RX_PACKET_BUFFER_SIZE \
37789221ecc870117b77e354d488d5d29f15410de8Bing Zhao	(HCI_MAX_FRAME_SIZE + FW_EXTRA_LEN)
38789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
39789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define ALLOC_BUF_SIZE	(((max_t (int, MRVDRV_BT_RX_PACKET_BUFFER_SIZE, \
40789221ecc870117b77e354d488d5d29f15410de8Bing Zhao			MRVDRV_SIZE_OF_CMD_BUFFER) + SDIO_HEADER_LEN \
41789221ecc870117b77e354d488d5d29f15410de8Bing Zhao			+ SDIO_BLOCK_SIZE - 1) / SDIO_BLOCK_SIZE) \
42789221ecc870117b77e354d488d5d29f15410de8Bing Zhao			* SDIO_BLOCK_SIZE)
43789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
44789221ecc870117b77e354d488d5d29f15410de8Bing Zhao/* The number of times to try when polling for status */
45789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define MAX_POLL_TRIES			100
46789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
47789221ecc870117b77e354d488d5d29f15410de8Bing Zhao/* Max retry number of CMD53 write */
48789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define MAX_WRITE_IOMEM_RETRY		2
49789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
509f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan/* register bitmasks */
519f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan#define HOST_POWER_UP				BIT(1)
529f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan#define HOST_CMD53_FIN				BIT(2)
539f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan
549f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan#define HIM_DISABLE				0xff
559f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan#define HIM_ENABLE				(BIT(0) | BIT(1))
569f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan
579f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan#define UP_LD_HOST_INT_STATUS			BIT(0)
589f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan#define DN_LD_HOST_INT_STATUS			BIT(1)
599f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan
609f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan#define DN_LD_CARD_RDY				BIT(0)
619f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan#define CARD_IO_READY				BIT(3)
629f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan
639f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan#define FIRMWARE_READY				0xfedc
649f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan
659f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan
669f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Ganstruct btmrvl_sdio_card_reg {
679f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 cfg;
689f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 host_int_mask;
699f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 host_intstatus;
709f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 card_status;
719f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 sq_read_base_addr_a0;
729f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 sq_read_base_addr_a1;
739f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 card_revision;
749f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 card_fw_status0;
759f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 card_fw_status1;
769f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 card_rx_len;
779f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 card_rx_unit;
789f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 io_port_0;
799f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 io_port_1;
809f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u8 io_port_2;
810d3674084c89130bcaf15b1a69881b31f198ee72Bing Zhao	bool int_read_to_clear;
820d3674084c89130bcaf15b1a69881b31f198ee72Bing Zhao	u8 host_int_rsr;
830d3674084c89130bcaf15b1a69881b31f198ee72Bing Zhao	u8 card_misc_cfg;
849f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan};
85789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
86789221ecc870117b77e354d488d5d29f15410de8Bing Zhaostruct btmrvl_sdio_card {
87789221ecc870117b77e354d488d5d29f15410de8Bing Zhao	struct sdio_func *func;
88789221ecc870117b77e354d488d5d29f15410de8Bing Zhao	u32 ioport;
89789221ecc870117b77e354d488d5d29f15410de8Bing Zhao	const char *helper;
90789221ecc870117b77e354d488d5d29f15410de8Bing Zhao	const char *firmware;
919f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	const struct btmrvl_sdio_card_reg *reg;
924df82b5911c0e380d8b308958f158c3e7b365467Bing Zhao	bool support_pscan_win_report;
939f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u16 sd_blksz_fw_dl;
94789221ecc870117b77e354d488d5d29f15410de8Bing Zhao	u8 rx_unit;
95789221ecc870117b77e354d488d5d29f15410de8Bing Zhao	struct btmrvl_private *priv;
96789221ecc870117b77e354d488d5d29f15410de8Bing Zhao};
97789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
98789221ecc870117b77e354d488d5d29f15410de8Bing Zhaostruct btmrvl_sdio_device {
99789221ecc870117b77e354d488d5d29f15410de8Bing Zhao	const char *helper;
100789221ecc870117b77e354d488d5d29f15410de8Bing Zhao	const char *firmware;
1019f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	const struct btmrvl_sdio_card_reg *reg;
1024df82b5911c0e380d8b308958f158c3e7b365467Bing Zhao	const bool support_pscan_win_report;
1039f72c1d977e47a7d182d49ea131067cba0a96ab8Kevin Gan	u16 sd_blksz_fw_dl;
104789221ecc870117b77e354d488d5d29f15410de8Bing Zhao};
105789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
106789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
107789221ecc870117b77e354d488d5d29f15410de8Bing Zhao/* Platform specific DMA alignment */
108789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define BTSDIO_DMA_ALIGN		8
109789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
110789221ecc870117b77e354d488d5d29f15410de8Bing Zhao/* Macros for Data Alignment : size */
111789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define ALIGN_SZ(p, a)	\
112789221ecc870117b77e354d488d5d29f15410de8Bing Zhao	(((p) + ((a) - 1)) & ~((a) - 1))
113789221ecc870117b77e354d488d5d29f15410de8Bing Zhao
114789221ecc870117b77e354d488d5d29f15410de8Bing Zhao/* Macros for Data Alignment : address */
115789221ecc870117b77e354d488d5d29f15410de8Bing Zhao#define ALIGN_ADDR(p, a)	\
1163318b2362bf0528be77123c480249663557dfbfcBing Zhao	((((unsigned long)(p)) + (((unsigned long)(a)) - 1)) & \
1173318b2362bf0528be77123c480249663557dfbfcBing Zhao					~(((unsigned long)(a)) - 1))
118