cris-artpec3-cpufreq.c revision ae24b5cda83cd496c72acd9fcd97a5748aaeec22
1#include <linux/init.h> 2#include <linux/module.h> 3#include <linux/cpufreq.h> 4#include <hwregs/reg_map.h> 5#include <hwregs/reg_rdwr.h> 6#include <hwregs/clkgen_defs.h> 7#include <hwregs/ddr2_defs.h> 8 9static int 10cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, 11 void *data); 12 13static struct notifier_block cris_sdram_freq_notifier_block = { 14 .notifier_call = cris_sdram_freq_notifier 15}; 16 17static struct cpufreq_frequency_table cris_freq_table[] = { 18 {0x01, 6000}, 19 {0x02, 200000}, 20 {0, CPUFREQ_TABLE_END}, 21}; 22 23static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu) 24{ 25 reg_clkgen_rw_clk_ctrl clk_ctrl; 26 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); 27 return clk_ctrl.pll ? 200000 : 6000; 28} 29 30static void cris_freq_set_cpu_state(struct cpufreq_policy *policy, 31 unsigned int state) 32{ 33 struct cpufreq_freqs freqs; 34 reg_clkgen_rw_clk_ctrl clk_ctrl; 35 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); 36 37 freqs.old = cris_freq_get_cpu_frequency(policy->cpu); 38 freqs.new = cris_freq_table[state].frequency; 39 40 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 41 42 local_irq_disable(); 43 44 /* Even though we may be SMP they will share the same clock 45 * so all settings are made on CPU0. */ 46 if (cris_freq_table[state].frequency == 200000) 47 clk_ctrl.pll = 1; 48 else 49 clk_ctrl.pll = 0; 50 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); 51 52 local_irq_enable(); 53 54 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 55}; 56 57static int cris_freq_verify(struct cpufreq_policy *policy) 58{ 59 return cpufreq_frequency_table_verify(policy, &cris_freq_table[0]); 60} 61 62static int cris_freq_target(struct cpufreq_policy *policy, 63 unsigned int target_freq, 64 unsigned int relation) 65{ 66 unsigned int newstate = 0; 67 68 if (cpufreq_frequency_table_target(policy, cris_freq_table, 69 target_freq, relation, &newstate)) 70 return -EINVAL; 71 72 cris_freq_set_cpu_state(policy, newstate); 73 74 return 0; 75} 76 77static int cris_freq_cpu_init(struct cpufreq_policy *policy) 78{ 79 /* cpuinfo and default policy values */ 80 policy->cpuinfo.transition_latency = 1000000; /* 1ms */ 81 policy->cur = cris_freq_get_cpu_frequency(0); 82 83 return cpufreq_table_validate_and_show(policy, cris_freq_table); 84} 85 86 87static int cris_freq_cpu_exit(struct cpufreq_policy *policy) 88{ 89 cpufreq_frequency_table_put_attr(policy->cpu); 90 return 0; 91} 92 93 94static struct freq_attr *cris_freq_attr[] = { 95 &cpufreq_freq_attr_scaling_available_freqs, 96 NULL, 97}; 98 99static struct cpufreq_driver cris_freq_driver = { 100 .get = cris_freq_get_cpu_frequency, 101 .verify = cris_freq_verify, 102 .target = cris_freq_target, 103 .init = cris_freq_cpu_init, 104 .exit = cris_freq_cpu_exit, 105 .name = "cris_freq", 106 .attr = cris_freq_attr, 107}; 108 109static int __init cris_freq_init(void) 110{ 111 int ret; 112 ret = cpufreq_register_driver(&cris_freq_driver); 113 cpufreq_register_notifier(&cris_sdram_freq_notifier_block, 114 CPUFREQ_TRANSITION_NOTIFIER); 115 return ret; 116} 117 118static int 119cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, 120 void *data) 121{ 122 int i; 123 struct cpufreq_freqs *freqs = data; 124 if (val == CPUFREQ_PRECHANGE) { 125 reg_ddr2_rw_cfg cfg = 126 REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg); 127 cfg.ref_interval = (freqs->new == 200000 ? 1560 : 46); 128 129 if (freqs->new == 200000) 130 for (i = 0; i < 50000; i++); 131 REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing); 132 } 133 return 0; 134} 135 136 137module_init(cris_freq_init); 138