intel_pstate.c revision 285cb99091fad1416958eb7d9fb8ecf7328d8bef
1/* 2 * intel_pstate.c: Native P state management for Intel processors 3 * 4 * (C) Copyright 2012 Intel Corporation 5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; version 2 10 * of the License. 11 */ 12 13#include <linux/kernel.h> 14#include <linux/kernel_stat.h> 15#include <linux/module.h> 16#include <linux/ktime.h> 17#include <linux/hrtimer.h> 18#include <linux/tick.h> 19#include <linux/slab.h> 20#include <linux/sched.h> 21#include <linux/list.h> 22#include <linux/cpu.h> 23#include <linux/cpufreq.h> 24#include <linux/sysfs.h> 25#include <linux/types.h> 26#include <linux/fs.h> 27#include <linux/debugfs.h> 28#include <linux/acpi.h> 29#include <trace/events/power.h> 30 31#include <asm/div64.h> 32#include <asm/msr.h> 33#include <asm/cpu_device_id.h> 34 35#define BYT_RATIOS 0x66a 36#define BYT_VIDS 0x66b 37#define BYT_TURBO_RATIOS 0x66c 38#define BYT_TURBO_VIDS 0x66d 39 40#define FRAC_BITS 8 41#define int_tofp(X) ((int64_t)(X) << FRAC_BITS) 42#define fp_toint(X) ((X) >> FRAC_BITS) 43 44 45static inline int32_t mul_fp(int32_t x, int32_t y) 46{ 47 return ((int64_t)x * (int64_t)y) >> FRAC_BITS; 48} 49 50static inline int32_t div_fp(int32_t x, int32_t y) 51{ 52 return div_s64((int64_t)x << FRAC_BITS, y); 53} 54 55struct sample { 56 int32_t core_pct_busy; 57 u64 aperf; 58 u64 mperf; 59 int freq; 60 ktime_t time; 61}; 62 63struct pstate_data { 64 int current_pstate; 65 int min_pstate; 66 int max_pstate; 67 int turbo_pstate; 68}; 69 70struct vid_data { 71 int min; 72 int max; 73 int turbo; 74 int32_t ratio; 75}; 76 77struct _pid { 78 int setpoint; 79 int32_t integral; 80 int32_t p_gain; 81 int32_t i_gain; 82 int32_t d_gain; 83 int deadband; 84 int32_t last_err; 85}; 86 87struct cpudata { 88 int cpu; 89 90 struct timer_list timer; 91 92 struct pstate_data pstate; 93 struct vid_data vid; 94 struct _pid pid; 95 96 ktime_t last_sample_time; 97 u64 prev_aperf; 98 u64 prev_mperf; 99 struct sample sample; 100}; 101 102static struct cpudata **all_cpu_data; 103struct pstate_adjust_policy { 104 int sample_rate_ms; 105 int deadband; 106 int setpoint; 107 int p_gain_pct; 108 int d_gain_pct; 109 int i_gain_pct; 110}; 111 112struct pstate_funcs { 113 int (*get_max)(void); 114 int (*get_min)(void); 115 int (*get_turbo)(void); 116 void (*set)(struct cpudata*, int pstate); 117 void (*get_vid)(struct cpudata *); 118}; 119 120struct cpu_defaults { 121 struct pstate_adjust_policy pid_policy; 122 struct pstate_funcs funcs; 123}; 124 125static struct pstate_adjust_policy pid_params; 126static struct pstate_funcs pstate_funcs; 127 128struct perf_limits { 129 int no_turbo; 130 int turbo_disabled; 131 int max_perf_pct; 132 int min_perf_pct; 133 int32_t max_perf; 134 int32_t min_perf; 135 int max_policy_pct; 136 int max_sysfs_pct; 137}; 138 139static struct perf_limits limits = { 140 .no_turbo = 0, 141 .max_perf_pct = 100, 142 .max_perf = int_tofp(1), 143 .min_perf_pct = 0, 144 .min_perf = 0, 145 .max_policy_pct = 100, 146 .max_sysfs_pct = 100, 147}; 148 149static inline void pid_reset(struct _pid *pid, int setpoint, int busy, 150 int deadband, int integral) { 151 pid->setpoint = setpoint; 152 pid->deadband = deadband; 153 pid->integral = int_tofp(integral); 154 pid->last_err = int_tofp(setpoint) - int_tofp(busy); 155} 156 157static inline void pid_p_gain_set(struct _pid *pid, int percent) 158{ 159 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100)); 160} 161 162static inline void pid_i_gain_set(struct _pid *pid, int percent) 163{ 164 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100)); 165} 166 167static inline void pid_d_gain_set(struct _pid *pid, int percent) 168{ 169 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100)); 170} 171 172static signed int pid_calc(struct _pid *pid, int32_t busy) 173{ 174 signed int result; 175 int32_t pterm, dterm, fp_error; 176 int32_t integral_limit; 177 178 fp_error = int_tofp(pid->setpoint) - busy; 179 180 if (abs(fp_error) <= int_tofp(pid->deadband)) 181 return 0; 182 183 pterm = mul_fp(pid->p_gain, fp_error); 184 185 pid->integral += fp_error; 186 187 /* limit the integral term */ 188 integral_limit = int_tofp(30); 189 if (pid->integral > integral_limit) 190 pid->integral = integral_limit; 191 if (pid->integral < -integral_limit) 192 pid->integral = -integral_limit; 193 194 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err); 195 pid->last_err = fp_error; 196 197 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm; 198 result = result + (1 << (FRAC_BITS-1)); 199 return (signed int)fp_toint(result); 200} 201 202static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu) 203{ 204 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct); 205 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct); 206 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct); 207 208 pid_reset(&cpu->pid, pid_params.setpoint, 100, pid_params.deadband, 0); 209} 210 211static inline void intel_pstate_reset_all_pid(void) 212{ 213 unsigned int cpu; 214 215 for_each_online_cpu(cpu) { 216 if (all_cpu_data[cpu]) 217 intel_pstate_busy_pid_reset(all_cpu_data[cpu]); 218 } 219} 220 221/************************** debugfs begin ************************/ 222static int pid_param_set(void *data, u64 val) 223{ 224 *(u32 *)data = val; 225 intel_pstate_reset_all_pid(); 226 return 0; 227} 228 229static int pid_param_get(void *data, u64 *val) 230{ 231 *val = *(u32 *)data; 232 return 0; 233} 234DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get, pid_param_set, "%llu\n"); 235 236struct pid_param { 237 char *name; 238 void *value; 239}; 240 241static struct pid_param pid_files[] = { 242 {"sample_rate_ms", &pid_params.sample_rate_ms}, 243 {"d_gain_pct", &pid_params.d_gain_pct}, 244 {"i_gain_pct", &pid_params.i_gain_pct}, 245 {"deadband", &pid_params.deadband}, 246 {"setpoint", &pid_params.setpoint}, 247 {"p_gain_pct", &pid_params.p_gain_pct}, 248 {NULL, NULL} 249}; 250 251static void __init intel_pstate_debug_expose_params(void) 252{ 253 struct dentry *debugfs_parent; 254 int i = 0; 255 256 debugfs_parent = debugfs_create_dir("pstate_snb", NULL); 257 if (IS_ERR_OR_NULL(debugfs_parent)) 258 return; 259 while (pid_files[i].name) { 260 debugfs_create_file(pid_files[i].name, 0660, 261 debugfs_parent, pid_files[i].value, 262 &fops_pid_param); 263 i++; 264 } 265} 266 267/************************** debugfs end ************************/ 268 269/************************** sysfs begin ************************/ 270#define show_one(file_name, object) \ 271 static ssize_t show_##file_name \ 272 (struct kobject *kobj, struct attribute *attr, char *buf) \ 273 { \ 274 return sprintf(buf, "%u\n", limits.object); \ 275 } 276 277static ssize_t store_no_turbo(struct kobject *a, struct attribute *b, 278 const char *buf, size_t count) 279{ 280 unsigned int input; 281 int ret; 282 283 ret = sscanf(buf, "%u", &input); 284 if (ret != 1) 285 return -EINVAL; 286 limits.no_turbo = clamp_t(int, input, 0 , 1); 287 if (limits.turbo_disabled) { 288 pr_warn("Turbo disabled by BIOS or unavailable on processor\n"); 289 limits.no_turbo = limits.turbo_disabled; 290 } 291 return count; 292} 293 294static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b, 295 const char *buf, size_t count) 296{ 297 unsigned int input; 298 int ret; 299 300 ret = sscanf(buf, "%u", &input); 301 if (ret != 1) 302 return -EINVAL; 303 304 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100); 305 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 306 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 307 308 return count; 309} 310 311static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b, 312 const char *buf, size_t count) 313{ 314 unsigned int input; 315 int ret; 316 317 ret = sscanf(buf, "%u", &input); 318 if (ret != 1) 319 return -EINVAL; 320 limits.min_perf_pct = clamp_t(int, input, 0 , 100); 321 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 322 323 return count; 324} 325 326show_one(no_turbo, no_turbo); 327show_one(max_perf_pct, max_perf_pct); 328show_one(min_perf_pct, min_perf_pct); 329 330define_one_global_rw(no_turbo); 331define_one_global_rw(max_perf_pct); 332define_one_global_rw(min_perf_pct); 333 334static struct attribute *intel_pstate_attributes[] = { 335 &no_turbo.attr, 336 &max_perf_pct.attr, 337 &min_perf_pct.attr, 338 NULL 339}; 340 341static struct attribute_group intel_pstate_attr_group = { 342 .attrs = intel_pstate_attributes, 343}; 344 345static void __init intel_pstate_sysfs_expose_params(void) 346{ 347 struct kobject *intel_pstate_kobject; 348 int rc; 349 350 intel_pstate_kobject = kobject_create_and_add("intel_pstate", 351 &cpu_subsys.dev_root->kobj); 352 BUG_ON(!intel_pstate_kobject); 353 rc = sysfs_create_group(intel_pstate_kobject, &intel_pstate_attr_group); 354 BUG_ON(rc); 355} 356 357/************************** sysfs end ************************/ 358static int byt_get_min_pstate(void) 359{ 360 u64 value; 361 362 rdmsrl(BYT_RATIOS, value); 363 return (value >> 8) & 0x7F; 364} 365 366static int byt_get_max_pstate(void) 367{ 368 u64 value; 369 370 rdmsrl(BYT_RATIOS, value); 371 return (value >> 16) & 0x7F; 372} 373 374static int byt_get_turbo_pstate(void) 375{ 376 u64 value; 377 378 rdmsrl(BYT_TURBO_RATIOS, value); 379 return value & 0x7F; 380} 381 382static void byt_set_pstate(struct cpudata *cpudata, int pstate) 383{ 384 u64 val; 385 int32_t vid_fp; 386 u32 vid; 387 388 val = pstate << 8; 389 if (limits.no_turbo && !limits.turbo_disabled) 390 val |= (u64)1 << 32; 391 392 vid_fp = cpudata->vid.min + mul_fp( 393 int_tofp(pstate - cpudata->pstate.min_pstate), 394 cpudata->vid.ratio); 395 396 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max); 397 vid = fp_toint(vid_fp); 398 399 if (pstate > cpudata->pstate.max_pstate) 400 vid = cpudata->vid.turbo; 401 402 val |= vid; 403 404 wrmsrl(MSR_IA32_PERF_CTL, val); 405} 406 407static void byt_get_vid(struct cpudata *cpudata) 408{ 409 u64 value; 410 411 rdmsrl(BYT_VIDS, value); 412 cpudata->vid.min = int_tofp((value >> 8) & 0x7f); 413 cpudata->vid.max = int_tofp((value >> 16) & 0x7f); 414 cpudata->vid.ratio = div_fp( 415 cpudata->vid.max - cpudata->vid.min, 416 int_tofp(cpudata->pstate.max_pstate - 417 cpudata->pstate.min_pstate)); 418 419 rdmsrl(BYT_TURBO_VIDS, value); 420 cpudata->vid.turbo = value & 0x7f; 421} 422 423static int core_get_min_pstate(void) 424{ 425 u64 value; 426 427 rdmsrl(MSR_PLATFORM_INFO, value); 428 return (value >> 40) & 0xFF; 429} 430 431static int core_get_max_pstate(void) 432{ 433 u64 value; 434 435 rdmsrl(MSR_PLATFORM_INFO, value); 436 return (value >> 8) & 0xFF; 437} 438 439static int core_get_turbo_pstate(void) 440{ 441 u64 value; 442 int nont, ret; 443 444 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value); 445 nont = core_get_max_pstate(); 446 ret = (value) & 255; 447 if (ret <= nont) 448 ret = nont; 449 return ret; 450} 451 452static void core_set_pstate(struct cpudata *cpudata, int pstate) 453{ 454 u64 val; 455 456 val = pstate << 8; 457 if (limits.no_turbo && !limits.turbo_disabled) 458 val |= (u64)1 << 32; 459 460 wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val); 461} 462 463static struct cpu_defaults core_params = { 464 .pid_policy = { 465 .sample_rate_ms = 10, 466 .deadband = 0, 467 .setpoint = 97, 468 .p_gain_pct = 20, 469 .d_gain_pct = 0, 470 .i_gain_pct = 0, 471 }, 472 .funcs = { 473 .get_max = core_get_max_pstate, 474 .get_min = core_get_min_pstate, 475 .get_turbo = core_get_turbo_pstate, 476 .set = core_set_pstate, 477 }, 478}; 479 480static struct cpu_defaults byt_params = { 481 .pid_policy = { 482 .sample_rate_ms = 10, 483 .deadband = 0, 484 .setpoint = 97, 485 .p_gain_pct = 14, 486 .d_gain_pct = 0, 487 .i_gain_pct = 4, 488 }, 489 .funcs = { 490 .get_max = byt_get_max_pstate, 491 .get_min = byt_get_min_pstate, 492 .get_turbo = byt_get_turbo_pstate, 493 .set = byt_set_pstate, 494 .get_vid = byt_get_vid, 495 }, 496}; 497 498static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max) 499{ 500 int max_perf = cpu->pstate.turbo_pstate; 501 int max_perf_adj; 502 int min_perf; 503 504 if (limits.no_turbo) 505 max_perf = cpu->pstate.max_pstate; 506 507 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf)); 508 *max = clamp_t(int, max_perf_adj, 509 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate); 510 511 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf)); 512 *min = clamp_t(int, min_perf, cpu->pstate.min_pstate, max_perf); 513} 514 515static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate) 516{ 517 int max_perf, min_perf; 518 519 intel_pstate_get_min_max(cpu, &min_perf, &max_perf); 520 521 pstate = clamp_t(int, pstate, min_perf, max_perf); 522 523 if (pstate == cpu->pstate.current_pstate) 524 return; 525 526 trace_cpu_frequency(pstate * 100000, cpu->cpu); 527 528 cpu->pstate.current_pstate = pstate; 529 530 pstate_funcs.set(cpu, pstate); 531} 532 533static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps) 534{ 535 int target; 536 target = cpu->pstate.current_pstate + steps; 537 538 intel_pstate_set_pstate(cpu, target); 539} 540 541static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps) 542{ 543 int target; 544 target = cpu->pstate.current_pstate - steps; 545 intel_pstate_set_pstate(cpu, target); 546} 547 548static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) 549{ 550 cpu->pstate.min_pstate = pstate_funcs.get_min(); 551 cpu->pstate.max_pstate = pstate_funcs.get_max(); 552 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); 553 554 if (pstate_funcs.get_vid) 555 pstate_funcs.get_vid(cpu); 556 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); 557} 558 559static inline void intel_pstate_calc_busy(struct cpudata *cpu) 560{ 561 struct sample *sample = &cpu->sample; 562 int64_t core_pct; 563 int32_t rem; 564 565 core_pct = int_tofp(sample->aperf) * int_tofp(100); 566 core_pct = div_u64_rem(core_pct, int_tofp(sample->mperf), &rem); 567 568 if ((rem << 1) >= int_tofp(sample->mperf)) 569 core_pct += 1; 570 571 sample->freq = fp_toint( 572 mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct)); 573 574 sample->core_pct_busy = (int32_t)core_pct; 575} 576 577static inline void intel_pstate_sample(struct cpudata *cpu) 578{ 579 u64 aperf, mperf; 580 581 rdmsrl(MSR_IA32_APERF, aperf); 582 rdmsrl(MSR_IA32_MPERF, mperf); 583 584 aperf = aperf >> FRAC_BITS; 585 mperf = mperf >> FRAC_BITS; 586 587 cpu->last_sample_time = cpu->sample.time; 588 cpu->sample.time = ktime_get(); 589 cpu->sample.aperf = aperf; 590 cpu->sample.mperf = mperf; 591 cpu->sample.aperf -= cpu->prev_aperf; 592 cpu->sample.mperf -= cpu->prev_mperf; 593 594 intel_pstate_calc_busy(cpu); 595 596 cpu->prev_aperf = aperf; 597 cpu->prev_mperf = mperf; 598} 599 600static inline void intel_pstate_set_sample_time(struct cpudata *cpu) 601{ 602 int sample_time, delay; 603 604 sample_time = pid_params.sample_rate_ms; 605 delay = msecs_to_jiffies(sample_time); 606 mod_timer_pinned(&cpu->timer, jiffies + delay); 607} 608 609static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu) 610{ 611 int32_t core_busy, max_pstate, current_pstate, sample_ratio; 612 u32 duration_us; 613 u32 sample_time; 614 615 core_busy = cpu->sample.core_pct_busy; 616 max_pstate = int_tofp(cpu->pstate.max_pstate); 617 current_pstate = int_tofp(cpu->pstate.current_pstate); 618 core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate)); 619 620 sample_time = pid_params.sample_rate_ms * USEC_PER_MSEC; 621 duration_us = (u32) ktime_us_delta(cpu->sample.time, 622 cpu->last_sample_time); 623 if (duration_us > sample_time * 3) { 624 sample_ratio = div_fp(int_tofp(sample_time), 625 int_tofp(duration_us)); 626 core_busy = mul_fp(core_busy, sample_ratio); 627 } 628 629 return core_busy; 630} 631 632static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu) 633{ 634 int32_t busy_scaled; 635 struct _pid *pid; 636 signed int ctl = 0; 637 int steps; 638 639 pid = &cpu->pid; 640 busy_scaled = intel_pstate_get_scaled_busy(cpu); 641 642 ctl = pid_calc(pid, busy_scaled); 643 644 steps = abs(ctl); 645 646 if (ctl < 0) 647 intel_pstate_pstate_increase(cpu, steps); 648 else 649 intel_pstate_pstate_decrease(cpu, steps); 650} 651 652static void intel_pstate_timer_func(unsigned long __data) 653{ 654 struct cpudata *cpu = (struct cpudata *) __data; 655 struct sample *sample; 656 657 intel_pstate_sample(cpu); 658 659 sample = &cpu->sample; 660 661 intel_pstate_adjust_busy_pstate(cpu); 662 663 trace_pstate_sample(fp_toint(sample->core_pct_busy), 664 fp_toint(intel_pstate_get_scaled_busy(cpu)), 665 cpu->pstate.current_pstate, 666 sample->mperf, 667 sample->aperf, 668 sample->freq); 669 670 intel_pstate_set_sample_time(cpu); 671} 672 673#define ICPU(model, policy) \ 674 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\ 675 (unsigned long)&policy } 676 677static const struct x86_cpu_id intel_pstate_cpu_ids[] = { 678 ICPU(0x2a, core_params), 679 ICPU(0x2d, core_params), 680 ICPU(0x37, byt_params), 681 ICPU(0x3a, core_params), 682 ICPU(0x3c, core_params), 683 ICPU(0x3d, core_params), 684 ICPU(0x3e, core_params), 685 ICPU(0x3f, core_params), 686 ICPU(0x45, core_params), 687 ICPU(0x46, core_params), 688 ICPU(0x4f, core_params), 689 ICPU(0x56, core_params), 690 {} 691}; 692MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); 693 694static int intel_pstate_init_cpu(unsigned int cpunum) 695{ 696 struct cpudata *cpu; 697 698 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL); 699 if (!all_cpu_data[cpunum]) 700 return -ENOMEM; 701 702 cpu = all_cpu_data[cpunum]; 703 704 cpu->cpu = cpunum; 705 intel_pstate_get_cpu_pstates(cpu); 706 707 init_timer_deferrable(&cpu->timer); 708 cpu->timer.function = intel_pstate_timer_func; 709 cpu->timer.data = (unsigned long)cpu; 710 cpu->timer.expires = jiffies + HZ/100; 711 intel_pstate_busy_pid_reset(cpu); 712 intel_pstate_sample(cpu); 713 714 add_timer_on(&cpu->timer, cpunum); 715 716 pr_info("Intel pstate controlling: cpu %d\n", cpunum); 717 718 return 0; 719} 720 721static unsigned int intel_pstate_get(unsigned int cpu_num) 722{ 723 struct sample *sample; 724 struct cpudata *cpu; 725 726 cpu = all_cpu_data[cpu_num]; 727 if (!cpu) 728 return 0; 729 sample = &cpu->sample; 730 return sample->freq; 731} 732 733static int intel_pstate_set_policy(struct cpufreq_policy *policy) 734{ 735 struct cpudata *cpu; 736 737 cpu = all_cpu_data[policy->cpu]; 738 739 if (!policy->cpuinfo.max_freq) 740 return -ENODEV; 741 742 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { 743 limits.min_perf_pct = 100; 744 limits.min_perf = int_tofp(1); 745 limits.max_perf_pct = 100; 746 limits.max_perf = int_tofp(1); 747 limits.no_turbo = limits.turbo_disabled; 748 return 0; 749 } 750 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq; 751 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100); 752 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 753 754 limits.max_policy_pct = (policy->max * 100) / policy->cpuinfo.max_freq; 755 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100); 756 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 757 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 758 759 return 0; 760} 761 762static int intel_pstate_verify_policy(struct cpufreq_policy *policy) 763{ 764 cpufreq_verify_within_cpu_limits(policy); 765 766 if (policy->policy != CPUFREQ_POLICY_POWERSAVE && 767 policy->policy != CPUFREQ_POLICY_PERFORMANCE) 768 return -EINVAL; 769 770 return 0; 771} 772 773static void intel_pstate_stop_cpu(struct cpufreq_policy *policy) 774{ 775 int cpu_num = policy->cpu; 776 struct cpudata *cpu = all_cpu_data[cpu_num]; 777 778 pr_info("intel_pstate CPU %d exiting\n", cpu_num); 779 780 del_timer_sync(&all_cpu_data[cpu_num]->timer); 781 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); 782 kfree(all_cpu_data[cpu_num]); 783 all_cpu_data[cpu_num] = NULL; 784} 785 786static int intel_pstate_cpu_init(struct cpufreq_policy *policy) 787{ 788 struct cpudata *cpu; 789 int rc; 790 u64 misc_en; 791 792 rc = intel_pstate_init_cpu(policy->cpu); 793 if (rc) 794 return rc; 795 796 cpu = all_cpu_data[policy->cpu]; 797 798 rdmsrl(MSR_IA32_MISC_ENABLE, misc_en); 799 if (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE || 800 cpu->pstate.max_pstate == cpu->pstate.turbo_pstate) { 801 limits.turbo_disabled = 1; 802 limits.no_turbo = 1; 803 } 804 if (limits.min_perf_pct == 100 && limits.max_perf_pct == 100) 805 policy->policy = CPUFREQ_POLICY_PERFORMANCE; 806 else 807 policy->policy = CPUFREQ_POLICY_POWERSAVE; 808 809 policy->min = cpu->pstate.min_pstate * 100000; 810 policy->max = cpu->pstate.turbo_pstate * 100000; 811 812 /* cpuinfo and default policy values */ 813 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000; 814 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000; 815 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 816 cpumask_set_cpu(policy->cpu, policy->cpus); 817 818 return 0; 819} 820 821static struct cpufreq_driver intel_pstate_driver = { 822 .flags = CPUFREQ_CONST_LOOPS, 823 .verify = intel_pstate_verify_policy, 824 .setpolicy = intel_pstate_set_policy, 825 .get = intel_pstate_get, 826 .init = intel_pstate_cpu_init, 827 .stop_cpu = intel_pstate_stop_cpu, 828 .name = "intel_pstate", 829}; 830 831static int __initdata no_load; 832 833static int intel_pstate_msrs_not_valid(void) 834{ 835 /* Check that all the msr's we are using are valid. */ 836 u64 aperf, mperf, tmp; 837 838 rdmsrl(MSR_IA32_APERF, aperf); 839 rdmsrl(MSR_IA32_MPERF, mperf); 840 841 if (!pstate_funcs.get_max() || 842 !pstate_funcs.get_min() || 843 !pstate_funcs.get_turbo()) 844 return -ENODEV; 845 846 rdmsrl(MSR_IA32_APERF, tmp); 847 if (!(tmp - aperf)) 848 return -ENODEV; 849 850 rdmsrl(MSR_IA32_MPERF, tmp); 851 if (!(tmp - mperf)) 852 return -ENODEV; 853 854 return 0; 855} 856 857static void copy_pid_params(struct pstate_adjust_policy *policy) 858{ 859 pid_params.sample_rate_ms = policy->sample_rate_ms; 860 pid_params.p_gain_pct = policy->p_gain_pct; 861 pid_params.i_gain_pct = policy->i_gain_pct; 862 pid_params.d_gain_pct = policy->d_gain_pct; 863 pid_params.deadband = policy->deadband; 864 pid_params.setpoint = policy->setpoint; 865} 866 867static void copy_cpu_funcs(struct pstate_funcs *funcs) 868{ 869 pstate_funcs.get_max = funcs->get_max; 870 pstate_funcs.get_min = funcs->get_min; 871 pstate_funcs.get_turbo = funcs->get_turbo; 872 pstate_funcs.set = funcs->set; 873 pstate_funcs.get_vid = funcs->get_vid; 874} 875 876#if IS_ENABLED(CONFIG_ACPI) 877#include <acpi/processor.h> 878 879static bool intel_pstate_no_acpi_pss(void) 880{ 881 int i; 882 883 for_each_possible_cpu(i) { 884 acpi_status status; 885 union acpi_object *pss; 886 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 887 struct acpi_processor *pr = per_cpu(processors, i); 888 889 if (!pr) 890 continue; 891 892 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer); 893 if (ACPI_FAILURE(status)) 894 continue; 895 896 pss = buffer.pointer; 897 if (pss && pss->type == ACPI_TYPE_PACKAGE) { 898 kfree(pss); 899 return false; 900 } 901 902 kfree(pss); 903 } 904 905 return true; 906} 907 908struct hw_vendor_info { 909 u16 valid; 910 char oem_id[ACPI_OEM_ID_SIZE]; 911 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE]; 912}; 913 914/* Hardware vendor-specific info that has its own power management modes */ 915static struct hw_vendor_info vendor_info[] = { 916 {1, "HP ", "ProLiant"}, 917 {0, "", ""}, 918}; 919 920static bool intel_pstate_platform_pwr_mgmt_exists(void) 921{ 922 struct acpi_table_header hdr; 923 struct hw_vendor_info *v_info; 924 925 if (acpi_disabled 926 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr))) 927 return false; 928 929 for (v_info = vendor_info; v_info->valid; v_info++) { 930 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE) 931 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) 932 && intel_pstate_no_acpi_pss()) 933 return true; 934 } 935 936 return false; 937} 938#else /* CONFIG_ACPI not enabled */ 939static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; } 940#endif /* CONFIG_ACPI */ 941 942static int __init intel_pstate_init(void) 943{ 944 int cpu, rc = 0; 945 const struct x86_cpu_id *id; 946 struct cpu_defaults *cpu_info; 947 948 if (no_load) 949 return -ENODEV; 950 951 id = x86_match_cpu(intel_pstate_cpu_ids); 952 if (!id) 953 return -ENODEV; 954 955 /* 956 * The Intel pstate driver will be ignored if the platform 957 * firmware has its own power management modes. 958 */ 959 if (intel_pstate_platform_pwr_mgmt_exists()) 960 return -ENODEV; 961 962 cpu_info = (struct cpu_defaults *)id->driver_data; 963 964 copy_pid_params(&cpu_info->pid_policy); 965 copy_cpu_funcs(&cpu_info->funcs); 966 967 if (intel_pstate_msrs_not_valid()) 968 return -ENODEV; 969 970 pr_info("Intel P-state driver initializing.\n"); 971 972 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus()); 973 if (!all_cpu_data) 974 return -ENOMEM; 975 976 rc = cpufreq_register_driver(&intel_pstate_driver); 977 if (rc) 978 goto out; 979 980 intel_pstate_debug_expose_params(); 981 intel_pstate_sysfs_expose_params(); 982 983 return rc; 984out: 985 get_online_cpus(); 986 for_each_online_cpu(cpu) { 987 if (all_cpu_data[cpu]) { 988 del_timer_sync(&all_cpu_data[cpu]->timer); 989 kfree(all_cpu_data[cpu]); 990 } 991 } 992 993 put_online_cpus(); 994 vfree(all_cpu_data); 995 return -ENODEV; 996} 997device_initcall(intel_pstate_init); 998 999static int __init intel_pstate_setup(char *str) 1000{ 1001 if (!str) 1002 return -EINVAL; 1003 1004 if (!strcmp(str, "disable")) 1005 no_load = 1; 1006 return 0; 1007} 1008early_param("intel_pstate", intel_pstate_setup); 1009 1010MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>"); 1011MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors"); 1012MODULE_LICENSE("GPL"); 1013