intel_pstate.c revision 6cbd7ee10e2842a3d1f9b60abede1c8f3d1f1130
1/* 2 * intel_pstate.c: Native P state management for Intel processors 3 * 4 * (C) Copyright 2012 Intel Corporation 5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; version 2 10 * of the License. 11 */ 12 13#include <linux/kernel.h> 14#include <linux/kernel_stat.h> 15#include <linux/module.h> 16#include <linux/ktime.h> 17#include <linux/hrtimer.h> 18#include <linux/tick.h> 19#include <linux/slab.h> 20#include <linux/sched.h> 21#include <linux/list.h> 22#include <linux/cpu.h> 23#include <linux/cpufreq.h> 24#include <linux/sysfs.h> 25#include <linux/types.h> 26#include <linux/fs.h> 27#include <linux/debugfs.h> 28#include <linux/acpi.h> 29#include <trace/events/power.h> 30 31#include <asm/div64.h> 32#include <asm/msr.h> 33#include <asm/cpu_device_id.h> 34 35#define SAMPLE_COUNT 3 36 37#define BYT_RATIOS 0x66a 38 39#define FRAC_BITS 8 40#define int_tofp(X) ((int64_t)(X) << FRAC_BITS) 41#define fp_toint(X) ((X) >> FRAC_BITS) 42 43static inline int32_t mul_fp(int32_t x, int32_t y) 44{ 45 return ((int64_t)x * (int64_t)y) >> FRAC_BITS; 46} 47 48static inline int32_t div_fp(int32_t x, int32_t y) 49{ 50 return div_s64((int64_t)x << FRAC_BITS, (int64_t)y); 51} 52 53struct sample { 54 int32_t core_pct_busy; 55 u64 aperf; 56 u64 mperf; 57 int freq; 58}; 59 60struct pstate_data { 61 int current_pstate; 62 int min_pstate; 63 int max_pstate; 64 int turbo_pstate; 65}; 66 67struct _pid { 68 int setpoint; 69 int32_t integral; 70 int32_t p_gain; 71 int32_t i_gain; 72 int32_t d_gain; 73 int deadband; 74 int32_t last_err; 75}; 76 77struct cpudata { 78 int cpu; 79 80 char name[64]; 81 82 struct timer_list timer; 83 84 struct pstate_data pstate; 85 struct _pid pid; 86 87 int min_pstate_count; 88 89 u64 prev_aperf; 90 u64 prev_mperf; 91 int sample_ptr; 92 struct sample samples[SAMPLE_COUNT]; 93}; 94 95static struct cpudata **all_cpu_data; 96struct pstate_adjust_policy { 97 int sample_rate_ms; 98 int deadband; 99 int setpoint; 100 int p_gain_pct; 101 int d_gain_pct; 102 int i_gain_pct; 103}; 104 105struct pstate_funcs { 106 int (*get_max)(void); 107 int (*get_min)(void); 108 int (*get_turbo)(void); 109 void (*set)(int pstate); 110}; 111 112struct cpu_defaults { 113 struct pstate_adjust_policy pid_policy; 114 struct pstate_funcs funcs; 115}; 116 117static struct pstate_adjust_policy pid_params; 118static struct pstate_funcs pstate_funcs; 119 120struct perf_limits { 121 int no_turbo; 122 int max_perf_pct; 123 int min_perf_pct; 124 int32_t max_perf; 125 int32_t min_perf; 126 int max_policy_pct; 127 int max_sysfs_pct; 128}; 129 130static struct perf_limits limits = { 131 .no_turbo = 0, 132 .max_perf_pct = 100, 133 .max_perf = int_tofp(1), 134 .min_perf_pct = 0, 135 .min_perf = 0, 136 .max_policy_pct = 100, 137 .max_sysfs_pct = 100, 138}; 139 140static inline void pid_reset(struct _pid *pid, int setpoint, int busy, 141 int deadband, int integral) { 142 pid->setpoint = setpoint; 143 pid->deadband = deadband; 144 pid->integral = int_tofp(integral); 145 pid->last_err = setpoint - busy; 146} 147 148static inline void pid_p_gain_set(struct _pid *pid, int percent) 149{ 150 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100)); 151} 152 153static inline void pid_i_gain_set(struct _pid *pid, int percent) 154{ 155 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100)); 156} 157 158static inline void pid_d_gain_set(struct _pid *pid, int percent) 159{ 160 161 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100)); 162} 163 164static signed int pid_calc(struct _pid *pid, int32_t busy) 165{ 166 signed int result; 167 int32_t pterm, dterm, fp_error; 168 int32_t integral_limit; 169 170 fp_error = int_tofp(pid->setpoint) - busy; 171 172 if (abs(fp_error) <= int_tofp(pid->deadband)) 173 return 0; 174 175 pterm = mul_fp(pid->p_gain, fp_error); 176 177 pid->integral += fp_error; 178 179 /* limit the integral term */ 180 integral_limit = int_tofp(30); 181 if (pid->integral > integral_limit) 182 pid->integral = integral_limit; 183 if (pid->integral < -integral_limit) 184 pid->integral = -integral_limit; 185 186 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err); 187 pid->last_err = fp_error; 188 189 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm; 190 191 return (signed int)fp_toint(result); 192} 193 194static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu) 195{ 196 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct); 197 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct); 198 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct); 199 200 pid_reset(&cpu->pid, 201 pid_params.setpoint, 202 100, 203 pid_params.deadband, 204 0); 205} 206 207static inline void intel_pstate_reset_all_pid(void) 208{ 209 unsigned int cpu; 210 for_each_online_cpu(cpu) { 211 if (all_cpu_data[cpu]) 212 intel_pstate_busy_pid_reset(all_cpu_data[cpu]); 213 } 214} 215 216/************************** debugfs begin ************************/ 217static int pid_param_set(void *data, u64 val) 218{ 219 *(u32 *)data = val; 220 intel_pstate_reset_all_pid(); 221 return 0; 222} 223static int pid_param_get(void *data, u64 *val) 224{ 225 *val = *(u32 *)data; 226 return 0; 227} 228DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get, 229 pid_param_set, "%llu\n"); 230 231struct pid_param { 232 char *name; 233 void *value; 234}; 235 236static struct pid_param pid_files[] = { 237 {"sample_rate_ms", &pid_params.sample_rate_ms}, 238 {"d_gain_pct", &pid_params.d_gain_pct}, 239 {"i_gain_pct", &pid_params.i_gain_pct}, 240 {"deadband", &pid_params.deadband}, 241 {"setpoint", &pid_params.setpoint}, 242 {"p_gain_pct", &pid_params.p_gain_pct}, 243 {NULL, NULL} 244}; 245 246static struct dentry *debugfs_parent; 247static void intel_pstate_debug_expose_params(void) 248{ 249 int i = 0; 250 251 debugfs_parent = debugfs_create_dir("pstate_snb", NULL); 252 if (IS_ERR_OR_NULL(debugfs_parent)) 253 return; 254 while (pid_files[i].name) { 255 debugfs_create_file(pid_files[i].name, 0660, 256 debugfs_parent, pid_files[i].value, 257 &fops_pid_param); 258 i++; 259 } 260} 261 262/************************** debugfs end ************************/ 263 264/************************** sysfs begin ************************/ 265#define show_one(file_name, object) \ 266 static ssize_t show_##file_name \ 267 (struct kobject *kobj, struct attribute *attr, char *buf) \ 268 { \ 269 return sprintf(buf, "%u\n", limits.object); \ 270 } 271 272static ssize_t store_no_turbo(struct kobject *a, struct attribute *b, 273 const char *buf, size_t count) 274{ 275 unsigned int input; 276 int ret; 277 ret = sscanf(buf, "%u", &input); 278 if (ret != 1) 279 return -EINVAL; 280 limits.no_turbo = clamp_t(int, input, 0 , 1); 281 282 return count; 283} 284 285static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b, 286 const char *buf, size_t count) 287{ 288 unsigned int input; 289 int ret; 290 ret = sscanf(buf, "%u", &input); 291 if (ret != 1) 292 return -EINVAL; 293 294 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100); 295 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 296 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 297 return count; 298} 299 300static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b, 301 const char *buf, size_t count) 302{ 303 unsigned int input; 304 int ret; 305 ret = sscanf(buf, "%u", &input); 306 if (ret != 1) 307 return -EINVAL; 308 limits.min_perf_pct = clamp_t(int, input, 0 , 100); 309 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 310 311 return count; 312} 313 314show_one(no_turbo, no_turbo); 315show_one(max_perf_pct, max_perf_pct); 316show_one(min_perf_pct, min_perf_pct); 317 318define_one_global_rw(no_turbo); 319define_one_global_rw(max_perf_pct); 320define_one_global_rw(min_perf_pct); 321 322static struct attribute *intel_pstate_attributes[] = { 323 &no_turbo.attr, 324 &max_perf_pct.attr, 325 &min_perf_pct.attr, 326 NULL 327}; 328 329static struct attribute_group intel_pstate_attr_group = { 330 .attrs = intel_pstate_attributes, 331}; 332static struct kobject *intel_pstate_kobject; 333 334static void intel_pstate_sysfs_expose_params(void) 335{ 336 int rc; 337 338 intel_pstate_kobject = kobject_create_and_add("intel_pstate", 339 &cpu_subsys.dev_root->kobj); 340 BUG_ON(!intel_pstate_kobject); 341 rc = sysfs_create_group(intel_pstate_kobject, 342 &intel_pstate_attr_group); 343 BUG_ON(rc); 344} 345 346/************************** sysfs end ************************/ 347static int byt_get_min_pstate(void) 348{ 349 u64 value; 350 rdmsrl(BYT_RATIOS, value); 351 return value & 0xFF; 352} 353 354static int byt_get_max_pstate(void) 355{ 356 u64 value; 357 rdmsrl(BYT_RATIOS, value); 358 return (value >> 16) & 0xFF; 359} 360 361static int core_get_min_pstate(void) 362{ 363 u64 value; 364 rdmsrl(MSR_PLATFORM_INFO, value); 365 return (value >> 40) & 0xFF; 366} 367 368static int core_get_max_pstate(void) 369{ 370 u64 value; 371 rdmsrl(MSR_PLATFORM_INFO, value); 372 return (value >> 8) & 0xFF; 373} 374 375static int core_get_turbo_pstate(void) 376{ 377 u64 value; 378 int nont, ret; 379 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value); 380 nont = core_get_max_pstate(); 381 ret = ((value) & 255); 382 if (ret <= nont) 383 ret = nont; 384 return ret; 385} 386 387static void core_set_pstate(int pstate) 388{ 389 u64 val; 390 391 val = pstate << 8; 392 if (limits.no_turbo) 393 val |= (u64)1 << 32; 394 395 wrmsrl(MSR_IA32_PERF_CTL, val); 396} 397 398static struct cpu_defaults core_params = { 399 .pid_policy = { 400 .sample_rate_ms = 10, 401 .deadband = 0, 402 .setpoint = 97, 403 .p_gain_pct = 20, 404 .d_gain_pct = 0, 405 .i_gain_pct = 0, 406 }, 407 .funcs = { 408 .get_max = core_get_max_pstate, 409 .get_min = core_get_min_pstate, 410 .get_turbo = core_get_turbo_pstate, 411 .set = core_set_pstate, 412 }, 413}; 414 415static struct cpu_defaults byt_params = { 416 .pid_policy = { 417 .sample_rate_ms = 10, 418 .deadband = 0, 419 .setpoint = 97, 420 .p_gain_pct = 14, 421 .d_gain_pct = 0, 422 .i_gain_pct = 4, 423 }, 424 .funcs = { 425 .get_max = byt_get_max_pstate, 426 .get_min = byt_get_min_pstate, 427 .get_turbo = byt_get_max_pstate, 428 .set = core_set_pstate, 429 }, 430}; 431 432 433static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max) 434{ 435 int max_perf = cpu->pstate.turbo_pstate; 436 int max_perf_adj; 437 int min_perf; 438 if (limits.no_turbo) 439 max_perf = cpu->pstate.max_pstate; 440 441 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf)); 442 *max = clamp_t(int, max_perf_adj, 443 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate); 444 445 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf)); 446 *min = clamp_t(int, min_perf, 447 cpu->pstate.min_pstate, max_perf); 448} 449 450static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate) 451{ 452 int max_perf, min_perf; 453 454 intel_pstate_get_min_max(cpu, &min_perf, &max_perf); 455 456 pstate = clamp_t(int, pstate, min_perf, max_perf); 457 458 if (pstate == cpu->pstate.current_pstate) 459 return; 460 461 trace_cpu_frequency(pstate * 100000, cpu->cpu); 462 463 cpu->pstate.current_pstate = pstate; 464 465 pstate_funcs.set(pstate); 466} 467 468static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps) 469{ 470 int target; 471 target = cpu->pstate.current_pstate + steps; 472 473 intel_pstate_set_pstate(cpu, target); 474} 475 476static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps) 477{ 478 int target; 479 target = cpu->pstate.current_pstate - steps; 480 intel_pstate_set_pstate(cpu, target); 481} 482 483static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) 484{ 485 sprintf(cpu->name, "Intel 2nd generation core"); 486 487 cpu->pstate.min_pstate = pstate_funcs.get_min(); 488 cpu->pstate.max_pstate = pstate_funcs.get_max(); 489 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); 490 491 /* 492 * goto max pstate so we don't slow up boot if we are built-in if we are 493 * a module we will take care of it during normal operation 494 */ 495 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate); 496} 497 498static inline void intel_pstate_calc_busy(struct cpudata *cpu, 499 struct sample *sample) 500{ 501 u64 core_pct; 502 core_pct = div64_u64(int_tofp(sample->aperf * 100), 503 sample->mperf); 504 sample->freq = fp_toint(cpu->pstate.max_pstate * core_pct * 1000); 505 506 sample->core_pct_busy = core_pct; 507} 508 509static inline void intel_pstate_sample(struct cpudata *cpu) 510{ 511 u64 aperf, mperf; 512 513 rdmsrl(MSR_IA32_APERF, aperf); 514 rdmsrl(MSR_IA32_MPERF, mperf); 515 cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT; 516 cpu->samples[cpu->sample_ptr].aperf = aperf; 517 cpu->samples[cpu->sample_ptr].mperf = mperf; 518 cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf; 519 cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf; 520 521 intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]); 522 523 cpu->prev_aperf = aperf; 524 cpu->prev_mperf = mperf; 525} 526 527static inline void intel_pstate_set_sample_time(struct cpudata *cpu) 528{ 529 int sample_time, delay; 530 531 sample_time = pid_params.sample_rate_ms; 532 delay = msecs_to_jiffies(sample_time); 533 mod_timer_pinned(&cpu->timer, jiffies + delay); 534} 535 536static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu) 537{ 538 int32_t core_busy, max_pstate, current_pstate; 539 540 core_busy = cpu->samples[cpu->sample_ptr].core_pct_busy; 541 max_pstate = int_tofp(cpu->pstate.max_pstate); 542 current_pstate = int_tofp(cpu->pstate.current_pstate); 543 return mul_fp(core_busy, div_fp(max_pstate, current_pstate)); 544} 545 546static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu) 547{ 548 int32_t busy_scaled; 549 struct _pid *pid; 550 signed int ctl = 0; 551 int steps; 552 553 pid = &cpu->pid; 554 busy_scaled = intel_pstate_get_scaled_busy(cpu); 555 556 ctl = pid_calc(pid, busy_scaled); 557 558 steps = abs(ctl); 559 if (ctl < 0) 560 intel_pstate_pstate_increase(cpu, steps); 561 else 562 intel_pstate_pstate_decrease(cpu, steps); 563} 564 565static void intel_pstate_timer_func(unsigned long __data) 566{ 567 struct cpudata *cpu = (struct cpudata *) __data; 568 569 intel_pstate_sample(cpu); 570 intel_pstate_adjust_busy_pstate(cpu); 571 572 if (cpu->pstate.current_pstate == cpu->pstate.min_pstate) { 573 cpu->min_pstate_count++; 574 if (!(cpu->min_pstate_count % 5)) { 575 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate); 576 } 577 } else 578 cpu->min_pstate_count = 0; 579 580 intel_pstate_set_sample_time(cpu); 581} 582 583#define ICPU(model, policy) \ 584 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\ 585 (unsigned long)&policy } 586 587static const struct x86_cpu_id intel_pstate_cpu_ids[] = { 588 ICPU(0x2a, core_params), 589 ICPU(0x2d, core_params), 590 ICPU(0x37, byt_params), 591 ICPU(0x3a, core_params), 592 ICPU(0x3c, core_params), 593 ICPU(0x3e, core_params), 594 ICPU(0x3f, core_params), 595 ICPU(0x45, core_params), 596 ICPU(0x46, core_params), 597 {} 598}; 599MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); 600 601static int intel_pstate_init_cpu(unsigned int cpunum) 602{ 603 604 const struct x86_cpu_id *id; 605 struct cpudata *cpu; 606 607 id = x86_match_cpu(intel_pstate_cpu_ids); 608 if (!id) 609 return -ENODEV; 610 611 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL); 612 if (!all_cpu_data[cpunum]) 613 return -ENOMEM; 614 615 cpu = all_cpu_data[cpunum]; 616 617 intel_pstate_get_cpu_pstates(cpu); 618 if (!cpu->pstate.current_pstate) { 619 all_cpu_data[cpunum] = NULL; 620 kfree(cpu); 621 return -ENODATA; 622 } 623 624 cpu->cpu = cpunum; 625 626 init_timer_deferrable(&cpu->timer); 627 cpu->timer.function = intel_pstate_timer_func; 628 cpu->timer.data = 629 (unsigned long)cpu; 630 cpu->timer.expires = jiffies + HZ/100; 631 intel_pstate_busy_pid_reset(cpu); 632 intel_pstate_sample(cpu); 633 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate); 634 635 add_timer_on(&cpu->timer, cpunum); 636 637 pr_info("Intel pstate controlling: cpu %d\n", cpunum); 638 639 return 0; 640} 641 642static unsigned int intel_pstate_get(unsigned int cpu_num) 643{ 644 struct sample *sample; 645 struct cpudata *cpu; 646 647 cpu = all_cpu_data[cpu_num]; 648 if (!cpu) 649 return 0; 650 sample = &cpu->samples[cpu->sample_ptr]; 651 return sample->freq; 652} 653 654static int intel_pstate_set_policy(struct cpufreq_policy *policy) 655{ 656 struct cpudata *cpu; 657 658 cpu = all_cpu_data[policy->cpu]; 659 660 if (!policy->cpuinfo.max_freq) 661 return -ENODEV; 662 663 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { 664 limits.min_perf_pct = 100; 665 limits.min_perf = int_tofp(1); 666 limits.max_perf_pct = 100; 667 limits.max_perf = int_tofp(1); 668 limits.no_turbo = 0; 669 return 0; 670 } 671 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq; 672 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100); 673 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 674 675 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq; 676 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100); 677 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 678 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 679 680 return 0; 681} 682 683static int intel_pstate_verify_policy(struct cpufreq_policy *policy) 684{ 685 cpufreq_verify_within_cpu_limits(policy); 686 687 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) && 688 (policy->policy != CPUFREQ_POLICY_PERFORMANCE)) 689 return -EINVAL; 690 691 return 0; 692} 693 694static int intel_pstate_cpu_exit(struct cpufreq_policy *policy) 695{ 696 int cpu = policy->cpu; 697 698 del_timer(&all_cpu_data[cpu]->timer); 699 kfree(all_cpu_data[cpu]); 700 all_cpu_data[cpu] = NULL; 701 return 0; 702} 703 704static int intel_pstate_cpu_init(struct cpufreq_policy *policy) 705{ 706 struct cpudata *cpu; 707 int rc; 708 709 rc = intel_pstate_init_cpu(policy->cpu); 710 if (rc) 711 return rc; 712 713 cpu = all_cpu_data[policy->cpu]; 714 715 if (!limits.no_turbo && 716 limits.min_perf_pct == 100 && limits.max_perf_pct == 100) 717 policy->policy = CPUFREQ_POLICY_PERFORMANCE; 718 else 719 policy->policy = CPUFREQ_POLICY_POWERSAVE; 720 721 policy->min = cpu->pstate.min_pstate * 100000; 722 policy->max = cpu->pstate.turbo_pstate * 100000; 723 724 /* cpuinfo and default policy values */ 725 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000; 726 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000; 727 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 728 cpumask_set_cpu(policy->cpu, policy->cpus); 729 730 return 0; 731} 732 733static struct cpufreq_driver intel_pstate_driver = { 734 .flags = CPUFREQ_CONST_LOOPS, 735 .verify = intel_pstate_verify_policy, 736 .setpolicy = intel_pstate_set_policy, 737 .get = intel_pstate_get, 738 .init = intel_pstate_cpu_init, 739 .exit = intel_pstate_cpu_exit, 740 .name = "intel_pstate", 741}; 742 743static int __initdata no_load; 744 745static int intel_pstate_msrs_not_valid(void) 746{ 747 /* Check that all the msr's we are using are valid. */ 748 u64 aperf, mperf, tmp; 749 750 rdmsrl(MSR_IA32_APERF, aperf); 751 rdmsrl(MSR_IA32_MPERF, mperf); 752 753 if (!pstate_funcs.get_max() || 754 !pstate_funcs.get_min() || 755 !pstate_funcs.get_turbo()) 756 return -ENODEV; 757 758 rdmsrl(MSR_IA32_APERF, tmp); 759 if (!(tmp - aperf)) 760 return -ENODEV; 761 762 rdmsrl(MSR_IA32_MPERF, tmp); 763 if (!(tmp - mperf)) 764 return -ENODEV; 765 766 return 0; 767} 768 769static void copy_pid_params(struct pstate_adjust_policy *policy) 770{ 771 pid_params.sample_rate_ms = policy->sample_rate_ms; 772 pid_params.p_gain_pct = policy->p_gain_pct; 773 pid_params.i_gain_pct = policy->i_gain_pct; 774 pid_params.d_gain_pct = policy->d_gain_pct; 775 pid_params.deadband = policy->deadband; 776 pid_params.setpoint = policy->setpoint; 777} 778 779static void copy_cpu_funcs(struct pstate_funcs *funcs) 780{ 781 pstate_funcs.get_max = funcs->get_max; 782 pstate_funcs.get_min = funcs->get_min; 783 pstate_funcs.get_turbo = funcs->get_turbo; 784 pstate_funcs.set = funcs->set; 785} 786 787#if IS_ENABLED(CONFIG_ACPI) 788#include <acpi/processor.h> 789 790static bool intel_pstate_no_acpi_pss(void) 791{ 792 int i; 793 794 for_each_possible_cpu(i) { 795 acpi_status status; 796 union acpi_object *pss; 797 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 798 struct acpi_processor *pr = per_cpu(processors, i); 799 800 if (!pr) 801 continue; 802 803 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer); 804 if (ACPI_FAILURE(status)) 805 continue; 806 807 pss = buffer.pointer; 808 if (pss && pss->type == ACPI_TYPE_PACKAGE) { 809 kfree(pss); 810 return false; 811 } 812 813 kfree(pss); 814 } 815 816 return true; 817} 818 819struct hw_vendor_info { 820 u16 valid; 821 char oem_id[ACPI_OEM_ID_SIZE]; 822 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE]; 823}; 824 825/* Hardware vendor-specific info that has its own power management modes */ 826static struct hw_vendor_info vendor_info[] = { 827 {1, "HP ", "ProLiant"}, 828 {0, "", ""}, 829}; 830 831static bool intel_pstate_platform_pwr_mgmt_exists(void) 832{ 833 struct acpi_table_header hdr; 834 struct hw_vendor_info *v_info; 835 836 if (acpi_disabled 837 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr))) 838 return false; 839 840 for (v_info = vendor_info; v_info->valid; v_info++) { 841 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE) 842 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) 843 && intel_pstate_no_acpi_pss()) 844 return true; 845 } 846 847 return false; 848} 849#else /* CONFIG_ACPI not enabled */ 850static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; } 851#endif /* CONFIG_ACPI */ 852 853static int __init intel_pstate_init(void) 854{ 855 int cpu, rc = 0; 856 const struct x86_cpu_id *id; 857 struct cpu_defaults *cpu_info; 858 859 if (no_load) 860 return -ENODEV; 861 862 id = x86_match_cpu(intel_pstate_cpu_ids); 863 if (!id) 864 return -ENODEV; 865 866 /* 867 * The Intel pstate driver will be ignored if the platform 868 * firmware has its own power management modes. 869 */ 870 if (intel_pstate_platform_pwr_mgmt_exists()) 871 return -ENODEV; 872 873 cpu_info = (struct cpu_defaults *)id->driver_data; 874 875 copy_pid_params(&cpu_info->pid_policy); 876 copy_cpu_funcs(&cpu_info->funcs); 877 878 if (intel_pstate_msrs_not_valid()) 879 return -ENODEV; 880 881 pr_info("Intel P-state driver initializing.\n"); 882 883 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus()); 884 if (!all_cpu_data) 885 return -ENOMEM; 886 887 rc = cpufreq_register_driver(&intel_pstate_driver); 888 if (rc) 889 goto out; 890 891 intel_pstate_debug_expose_params(); 892 intel_pstate_sysfs_expose_params(); 893 return rc; 894out: 895 get_online_cpus(); 896 for_each_online_cpu(cpu) { 897 if (all_cpu_data[cpu]) { 898 del_timer_sync(&all_cpu_data[cpu]->timer); 899 kfree(all_cpu_data[cpu]); 900 } 901 } 902 903 put_online_cpus(); 904 vfree(all_cpu_data); 905 return -ENODEV; 906} 907device_initcall(intel_pstate_init); 908 909static int __init intel_pstate_setup(char *str) 910{ 911 if (!str) 912 return -EINVAL; 913 914 if (!strcmp(str, "disable")) 915 no_load = 1; 916 return 0; 917} 918early_param("intel_pstate", intel_pstate_setup); 919 920MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>"); 921MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors"); 922MODULE_LICENSE("GPL"); 923