intel_pstate.c revision adacdf3f2b8e65aa441613cf61c4f598e9042690
1/* 2 * intel_pstate.c: Native P state management for Intel processors 3 * 4 * (C) Copyright 2012 Intel Corporation 5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; version 2 10 * of the License. 11 */ 12 13#include <linux/kernel.h> 14#include <linux/kernel_stat.h> 15#include <linux/module.h> 16#include <linux/ktime.h> 17#include <linux/hrtimer.h> 18#include <linux/tick.h> 19#include <linux/slab.h> 20#include <linux/sched.h> 21#include <linux/list.h> 22#include <linux/cpu.h> 23#include <linux/cpufreq.h> 24#include <linux/sysfs.h> 25#include <linux/types.h> 26#include <linux/fs.h> 27#include <linux/debugfs.h> 28#include <linux/acpi.h> 29#include <trace/events/power.h> 30 31#include <asm/div64.h> 32#include <asm/msr.h> 33#include <asm/cpu_device_id.h> 34 35#define SAMPLE_COUNT 3 36 37#define BYT_RATIOS 0x66a 38#define BYT_VIDS 0x66b 39#define BYT_TURBO_RATIOS 0x66c 40#define BYT_TURBO_VIDS 0x66d 41 42 43#define FRAC_BITS 6 44#define int_tofp(X) ((int64_t)(X) << FRAC_BITS) 45#define fp_toint(X) ((X) >> FRAC_BITS) 46#define FP_ROUNDUP(X) ((X) += 1 << FRAC_BITS) 47 48static inline int32_t mul_fp(int32_t x, int32_t y) 49{ 50 return ((int64_t)x * (int64_t)y) >> FRAC_BITS; 51} 52 53static inline int32_t div_fp(int32_t x, int32_t y) 54{ 55 return div_s64((int64_t)x << FRAC_BITS, (int64_t)y); 56} 57 58struct sample { 59 int32_t core_pct_busy; 60 u64 aperf; 61 u64 mperf; 62 int freq; 63}; 64 65struct pstate_data { 66 int current_pstate; 67 int min_pstate; 68 int max_pstate; 69 int turbo_pstate; 70}; 71 72struct vid_data { 73 int min; 74 int max; 75 int turbo; 76 int32_t ratio; 77}; 78 79struct _pid { 80 int setpoint; 81 int32_t integral; 82 int32_t p_gain; 83 int32_t i_gain; 84 int32_t d_gain; 85 int deadband; 86 int32_t last_err; 87}; 88 89struct cpudata { 90 int cpu; 91 92 char name[64]; 93 94 struct timer_list timer; 95 96 struct pstate_data pstate; 97 struct vid_data vid; 98 struct _pid pid; 99 100 u64 prev_aperf; 101 u64 prev_mperf; 102 struct sample sample; 103}; 104 105static struct cpudata **all_cpu_data; 106struct pstate_adjust_policy { 107 int sample_rate_ms; 108 int deadband; 109 int setpoint; 110 int p_gain_pct; 111 int d_gain_pct; 112 int i_gain_pct; 113}; 114 115struct pstate_funcs { 116 int (*get_max)(void); 117 int (*get_min)(void); 118 int (*get_turbo)(void); 119 void (*set)(struct cpudata*, int pstate); 120 void (*get_vid)(struct cpudata *); 121}; 122 123struct cpu_defaults { 124 struct pstate_adjust_policy pid_policy; 125 struct pstate_funcs funcs; 126}; 127 128static struct pstate_adjust_policy pid_params; 129static struct pstate_funcs pstate_funcs; 130 131struct perf_limits { 132 int no_turbo; 133 int max_perf_pct; 134 int min_perf_pct; 135 int32_t max_perf; 136 int32_t min_perf; 137 int max_policy_pct; 138 int max_sysfs_pct; 139}; 140 141static struct perf_limits limits = { 142 .no_turbo = 0, 143 .max_perf_pct = 100, 144 .max_perf = int_tofp(1), 145 .min_perf_pct = 0, 146 .min_perf = 0, 147 .max_policy_pct = 100, 148 .max_sysfs_pct = 100, 149}; 150 151static inline void pid_reset(struct _pid *pid, int setpoint, int busy, 152 int deadband, int integral) { 153 pid->setpoint = setpoint; 154 pid->deadband = deadband; 155 pid->integral = int_tofp(integral); 156 pid->last_err = int_tofp(setpoint) - int_tofp(busy); 157} 158 159static inline void pid_p_gain_set(struct _pid *pid, int percent) 160{ 161 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100)); 162} 163 164static inline void pid_i_gain_set(struct _pid *pid, int percent) 165{ 166 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100)); 167} 168 169static inline void pid_d_gain_set(struct _pid *pid, int percent) 170{ 171 172 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100)); 173} 174 175static signed int pid_calc(struct _pid *pid, int32_t busy) 176{ 177 signed int result; 178 int32_t pterm, dterm, fp_error; 179 int32_t integral_limit; 180 181 fp_error = int_tofp(pid->setpoint) - busy; 182 183 if (abs(fp_error) <= int_tofp(pid->deadband)) 184 return 0; 185 186 pterm = mul_fp(pid->p_gain, fp_error); 187 188 pid->integral += fp_error; 189 190 /* limit the integral term */ 191 integral_limit = int_tofp(30); 192 if (pid->integral > integral_limit) 193 pid->integral = integral_limit; 194 if (pid->integral < -integral_limit) 195 pid->integral = -integral_limit; 196 197 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err); 198 pid->last_err = fp_error; 199 200 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm; 201 202 return (signed int)fp_toint(result); 203} 204 205static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu) 206{ 207 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct); 208 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct); 209 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct); 210 211 pid_reset(&cpu->pid, 212 pid_params.setpoint, 213 100, 214 pid_params.deadband, 215 0); 216} 217 218static inline void intel_pstate_reset_all_pid(void) 219{ 220 unsigned int cpu; 221 for_each_online_cpu(cpu) { 222 if (all_cpu_data[cpu]) 223 intel_pstate_busy_pid_reset(all_cpu_data[cpu]); 224 } 225} 226 227/************************** debugfs begin ************************/ 228static int pid_param_set(void *data, u64 val) 229{ 230 *(u32 *)data = val; 231 intel_pstate_reset_all_pid(); 232 return 0; 233} 234static int pid_param_get(void *data, u64 *val) 235{ 236 *val = *(u32 *)data; 237 return 0; 238} 239DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get, 240 pid_param_set, "%llu\n"); 241 242struct pid_param { 243 char *name; 244 void *value; 245}; 246 247static struct pid_param pid_files[] = { 248 {"sample_rate_ms", &pid_params.sample_rate_ms}, 249 {"d_gain_pct", &pid_params.d_gain_pct}, 250 {"i_gain_pct", &pid_params.i_gain_pct}, 251 {"deadband", &pid_params.deadband}, 252 {"setpoint", &pid_params.setpoint}, 253 {"p_gain_pct", &pid_params.p_gain_pct}, 254 {NULL, NULL} 255}; 256 257static struct dentry *debugfs_parent; 258static void intel_pstate_debug_expose_params(void) 259{ 260 int i = 0; 261 262 debugfs_parent = debugfs_create_dir("pstate_snb", NULL); 263 if (IS_ERR_OR_NULL(debugfs_parent)) 264 return; 265 while (pid_files[i].name) { 266 debugfs_create_file(pid_files[i].name, 0660, 267 debugfs_parent, pid_files[i].value, 268 &fops_pid_param); 269 i++; 270 } 271} 272 273/************************** debugfs end ************************/ 274 275/************************** sysfs begin ************************/ 276#define show_one(file_name, object) \ 277 static ssize_t show_##file_name \ 278 (struct kobject *kobj, struct attribute *attr, char *buf) \ 279 { \ 280 return sprintf(buf, "%u\n", limits.object); \ 281 } 282 283static ssize_t store_no_turbo(struct kobject *a, struct attribute *b, 284 const char *buf, size_t count) 285{ 286 unsigned int input; 287 int ret; 288 ret = sscanf(buf, "%u", &input); 289 if (ret != 1) 290 return -EINVAL; 291 limits.no_turbo = clamp_t(int, input, 0 , 1); 292 293 return count; 294} 295 296static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b, 297 const char *buf, size_t count) 298{ 299 unsigned int input; 300 int ret; 301 ret = sscanf(buf, "%u", &input); 302 if (ret != 1) 303 return -EINVAL; 304 305 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100); 306 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 307 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 308 return count; 309} 310 311static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b, 312 const char *buf, size_t count) 313{ 314 unsigned int input; 315 int ret; 316 ret = sscanf(buf, "%u", &input); 317 if (ret != 1) 318 return -EINVAL; 319 limits.min_perf_pct = clamp_t(int, input, 0 , 100); 320 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 321 322 return count; 323} 324 325show_one(no_turbo, no_turbo); 326show_one(max_perf_pct, max_perf_pct); 327show_one(min_perf_pct, min_perf_pct); 328 329define_one_global_rw(no_turbo); 330define_one_global_rw(max_perf_pct); 331define_one_global_rw(min_perf_pct); 332 333static struct attribute *intel_pstate_attributes[] = { 334 &no_turbo.attr, 335 &max_perf_pct.attr, 336 &min_perf_pct.attr, 337 NULL 338}; 339 340static struct attribute_group intel_pstate_attr_group = { 341 .attrs = intel_pstate_attributes, 342}; 343static struct kobject *intel_pstate_kobject; 344 345static void intel_pstate_sysfs_expose_params(void) 346{ 347 int rc; 348 349 intel_pstate_kobject = kobject_create_and_add("intel_pstate", 350 &cpu_subsys.dev_root->kobj); 351 BUG_ON(!intel_pstate_kobject); 352 rc = sysfs_create_group(intel_pstate_kobject, 353 &intel_pstate_attr_group); 354 BUG_ON(rc); 355} 356 357/************************** sysfs end ************************/ 358static int byt_get_min_pstate(void) 359{ 360 u64 value; 361 rdmsrl(BYT_RATIOS, value); 362 return (value >> 8) & 0x3F; 363} 364 365static int byt_get_max_pstate(void) 366{ 367 u64 value; 368 rdmsrl(BYT_RATIOS, value); 369 return (value >> 16) & 0x3F; 370} 371 372static int byt_get_turbo_pstate(void) 373{ 374 u64 value; 375 rdmsrl(BYT_TURBO_RATIOS, value); 376 return value & 0x3F; 377} 378 379static void byt_set_pstate(struct cpudata *cpudata, int pstate) 380{ 381 u64 val; 382 int32_t vid_fp; 383 u32 vid; 384 385 val = pstate << 8; 386 if (limits.no_turbo) 387 val |= (u64)1 << 32; 388 389 vid_fp = cpudata->vid.min + mul_fp( 390 int_tofp(pstate - cpudata->pstate.min_pstate), 391 cpudata->vid.ratio); 392 393 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max); 394 vid = fp_toint(vid_fp); 395 396 if (pstate > cpudata->pstate.max_pstate) 397 vid = cpudata->vid.turbo; 398 399 val |= vid; 400 401 wrmsrl(MSR_IA32_PERF_CTL, val); 402} 403 404static void byt_get_vid(struct cpudata *cpudata) 405{ 406 u64 value; 407 408 409 rdmsrl(BYT_VIDS, value); 410 cpudata->vid.min = int_tofp((value >> 8) & 0x3f); 411 cpudata->vid.max = int_tofp((value >> 16) & 0x3f); 412 cpudata->vid.ratio = div_fp( 413 cpudata->vid.max - cpudata->vid.min, 414 int_tofp(cpudata->pstate.max_pstate - 415 cpudata->pstate.min_pstate)); 416 417 rdmsrl(BYT_TURBO_VIDS, value); 418 cpudata->vid.turbo = value & 0x7f; 419} 420 421 422static int core_get_min_pstate(void) 423{ 424 u64 value; 425 rdmsrl(MSR_PLATFORM_INFO, value); 426 return (value >> 40) & 0xFF; 427} 428 429static int core_get_max_pstate(void) 430{ 431 u64 value; 432 rdmsrl(MSR_PLATFORM_INFO, value); 433 return (value >> 8) & 0xFF; 434} 435 436static int core_get_turbo_pstate(void) 437{ 438 u64 value; 439 int nont, ret; 440 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value); 441 nont = core_get_max_pstate(); 442 ret = ((value) & 255); 443 if (ret <= nont) 444 ret = nont; 445 return ret; 446} 447 448static void core_set_pstate(struct cpudata *cpudata, int pstate) 449{ 450 u64 val; 451 452 val = pstate << 8; 453 if (limits.no_turbo) 454 val |= (u64)1 << 32; 455 456 wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val); 457} 458 459static struct cpu_defaults core_params = { 460 .pid_policy = { 461 .sample_rate_ms = 10, 462 .deadband = 0, 463 .setpoint = 97, 464 .p_gain_pct = 20, 465 .d_gain_pct = 0, 466 .i_gain_pct = 0, 467 }, 468 .funcs = { 469 .get_max = core_get_max_pstate, 470 .get_min = core_get_min_pstate, 471 .get_turbo = core_get_turbo_pstate, 472 .set = core_set_pstate, 473 }, 474}; 475 476static struct cpu_defaults byt_params = { 477 .pid_policy = { 478 .sample_rate_ms = 10, 479 .deadband = 0, 480 .setpoint = 97, 481 .p_gain_pct = 14, 482 .d_gain_pct = 0, 483 .i_gain_pct = 4, 484 }, 485 .funcs = { 486 .get_max = byt_get_max_pstate, 487 .get_min = byt_get_min_pstate, 488 .get_turbo = byt_get_turbo_pstate, 489 .set = byt_set_pstate, 490 .get_vid = byt_get_vid, 491 }, 492}; 493 494 495static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max) 496{ 497 int max_perf = cpu->pstate.turbo_pstate; 498 int max_perf_adj; 499 int min_perf; 500 if (limits.no_turbo) 501 max_perf = cpu->pstate.max_pstate; 502 503 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf)); 504 *max = clamp_t(int, max_perf_adj, 505 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate); 506 507 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf)); 508 *min = clamp_t(int, min_perf, 509 cpu->pstate.min_pstate, max_perf); 510} 511 512static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate) 513{ 514 int max_perf, min_perf; 515 516 intel_pstate_get_min_max(cpu, &min_perf, &max_perf); 517 518 pstate = clamp_t(int, pstate, min_perf, max_perf); 519 520 if (pstate == cpu->pstate.current_pstate) 521 return; 522 523 trace_cpu_frequency(pstate * 100000, cpu->cpu); 524 525 cpu->pstate.current_pstate = pstate; 526 527 pstate_funcs.set(cpu, pstate); 528} 529 530static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps) 531{ 532 int target; 533 target = cpu->pstate.current_pstate + steps; 534 535 intel_pstate_set_pstate(cpu, target); 536} 537 538static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps) 539{ 540 int target; 541 target = cpu->pstate.current_pstate - steps; 542 intel_pstate_set_pstate(cpu, target); 543} 544 545static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) 546{ 547 sprintf(cpu->name, "Intel 2nd generation core"); 548 549 cpu->pstate.min_pstate = pstate_funcs.get_min(); 550 cpu->pstate.max_pstate = pstate_funcs.get_max(); 551 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); 552 553 if (pstate_funcs.get_vid) 554 pstate_funcs.get_vid(cpu); 555 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); 556} 557 558static inline void intel_pstate_calc_busy(struct cpudata *cpu, 559 struct sample *sample) 560{ 561 int32_t core_pct; 562 563 core_pct = div_fp(int_tofp((sample->aperf)), 564 int_tofp((sample->mperf))); 565 core_pct = mul_fp(core_pct, int_tofp(100)); 566 FP_ROUNDUP(core_pct); 567 568 sample->freq = fp_toint( 569 mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct)); 570 571 sample->core_pct_busy = core_pct; 572} 573 574static inline void intel_pstate_sample(struct cpudata *cpu) 575{ 576 u64 aperf, mperf; 577 578 rdmsrl(MSR_IA32_APERF, aperf); 579 rdmsrl(MSR_IA32_MPERF, mperf); 580 581 aperf = aperf >> FRAC_BITS; 582 mperf = mperf >> FRAC_BITS; 583 584 cpu->sample.aperf = aperf; 585 cpu->sample.mperf = mperf; 586 cpu->sample.aperf -= cpu->prev_aperf; 587 cpu->sample.mperf -= cpu->prev_mperf; 588 589 intel_pstate_calc_busy(cpu, &cpu->sample); 590 591 cpu->prev_aperf = aperf; 592 cpu->prev_mperf = mperf; 593} 594 595static inline void intel_pstate_set_sample_time(struct cpudata *cpu) 596{ 597 int sample_time, delay; 598 599 sample_time = pid_params.sample_rate_ms; 600 delay = msecs_to_jiffies(sample_time); 601 mod_timer_pinned(&cpu->timer, jiffies + delay); 602} 603 604static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu) 605{ 606 int32_t core_busy, max_pstate, current_pstate; 607 608 core_busy = cpu->sample.core_pct_busy; 609 max_pstate = int_tofp(cpu->pstate.max_pstate); 610 current_pstate = int_tofp(cpu->pstate.current_pstate); 611 core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate)); 612 return FP_ROUNDUP(core_busy); 613} 614 615static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu) 616{ 617 int32_t busy_scaled; 618 struct _pid *pid; 619 signed int ctl = 0; 620 int steps; 621 622 pid = &cpu->pid; 623 busy_scaled = intel_pstate_get_scaled_busy(cpu); 624 625 ctl = pid_calc(pid, busy_scaled); 626 627 steps = abs(ctl); 628 629 if (ctl < 0) 630 intel_pstate_pstate_increase(cpu, steps); 631 else 632 intel_pstate_pstate_decrease(cpu, steps); 633} 634 635static void intel_pstate_timer_func(unsigned long __data) 636{ 637 struct cpudata *cpu = (struct cpudata *) __data; 638 struct sample *sample; 639 640 intel_pstate_sample(cpu); 641 642 sample = &cpu->sample; 643 644 intel_pstate_adjust_busy_pstate(cpu); 645 646 trace_pstate_sample(fp_toint(sample->core_pct_busy), 647 fp_toint(intel_pstate_get_scaled_busy(cpu)), 648 cpu->pstate.current_pstate, 649 sample->mperf, 650 sample->aperf, 651 sample->freq); 652 653 intel_pstate_set_sample_time(cpu); 654} 655 656#define ICPU(model, policy) \ 657 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\ 658 (unsigned long)&policy } 659 660static const struct x86_cpu_id intel_pstate_cpu_ids[] = { 661 ICPU(0x2a, core_params), 662 ICPU(0x2d, core_params), 663 ICPU(0x37, byt_params), 664 ICPU(0x3a, core_params), 665 ICPU(0x3c, core_params), 666 ICPU(0x3e, core_params), 667 ICPU(0x3f, core_params), 668 ICPU(0x45, core_params), 669 ICPU(0x46, core_params), 670 {} 671}; 672MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); 673 674static int intel_pstate_init_cpu(unsigned int cpunum) 675{ 676 677 const struct x86_cpu_id *id; 678 struct cpudata *cpu; 679 680 id = x86_match_cpu(intel_pstate_cpu_ids); 681 if (!id) 682 return -ENODEV; 683 684 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL); 685 if (!all_cpu_data[cpunum]) 686 return -ENOMEM; 687 688 cpu = all_cpu_data[cpunum]; 689 690 intel_pstate_get_cpu_pstates(cpu); 691 692 cpu->cpu = cpunum; 693 694 init_timer_deferrable(&cpu->timer); 695 cpu->timer.function = intel_pstate_timer_func; 696 cpu->timer.data = 697 (unsigned long)cpu; 698 cpu->timer.expires = jiffies + HZ/100; 699 intel_pstate_busy_pid_reset(cpu); 700 intel_pstate_sample(cpu); 701 702 add_timer_on(&cpu->timer, cpunum); 703 704 pr_info("Intel pstate controlling: cpu %d\n", cpunum); 705 706 return 0; 707} 708 709static unsigned int intel_pstate_get(unsigned int cpu_num) 710{ 711 struct sample *sample; 712 struct cpudata *cpu; 713 714 cpu = all_cpu_data[cpu_num]; 715 if (!cpu) 716 return 0; 717 sample = &cpu->sample; 718 return sample->freq; 719} 720 721static int intel_pstate_set_policy(struct cpufreq_policy *policy) 722{ 723 struct cpudata *cpu; 724 725 cpu = all_cpu_data[policy->cpu]; 726 727 if (!policy->cpuinfo.max_freq) 728 return -ENODEV; 729 730 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { 731 limits.min_perf_pct = 100; 732 limits.min_perf = int_tofp(1); 733 limits.max_perf_pct = 100; 734 limits.max_perf = int_tofp(1); 735 limits.no_turbo = 0; 736 return 0; 737 } 738 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq; 739 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100); 740 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 741 742 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq; 743 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100); 744 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 745 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 746 747 return 0; 748} 749 750static int intel_pstate_verify_policy(struct cpufreq_policy *policy) 751{ 752 cpufreq_verify_within_cpu_limits(policy); 753 754 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) && 755 (policy->policy != CPUFREQ_POLICY_PERFORMANCE)) 756 return -EINVAL; 757 758 return 0; 759} 760 761static void intel_pstate_stop_cpu(struct cpufreq_policy *policy) 762{ 763 int cpu_num = policy->cpu; 764 struct cpudata *cpu = all_cpu_data[cpu_num]; 765 766 pr_info("intel_pstate CPU %d exiting\n", cpu_num); 767 768 del_timer_sync(&all_cpu_data[cpu_num]->timer); 769 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); 770 kfree(all_cpu_data[cpu_num]); 771 all_cpu_data[cpu_num] = NULL; 772} 773 774static int intel_pstate_cpu_init(struct cpufreq_policy *policy) 775{ 776 struct cpudata *cpu; 777 int rc; 778 779 rc = intel_pstate_init_cpu(policy->cpu); 780 if (rc) 781 return rc; 782 783 cpu = all_cpu_data[policy->cpu]; 784 785 if (!limits.no_turbo && 786 limits.min_perf_pct == 100 && limits.max_perf_pct == 100) 787 policy->policy = CPUFREQ_POLICY_PERFORMANCE; 788 else 789 policy->policy = CPUFREQ_POLICY_POWERSAVE; 790 791 policy->min = cpu->pstate.min_pstate * 100000; 792 policy->max = cpu->pstate.turbo_pstate * 100000; 793 794 /* cpuinfo and default policy values */ 795 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000; 796 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000; 797 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 798 cpumask_set_cpu(policy->cpu, policy->cpus); 799 800 return 0; 801} 802 803static struct cpufreq_driver intel_pstate_driver = { 804 .flags = CPUFREQ_CONST_LOOPS, 805 .verify = intel_pstate_verify_policy, 806 .setpolicy = intel_pstate_set_policy, 807 .get = intel_pstate_get, 808 .init = intel_pstate_cpu_init, 809 .stop_cpu = intel_pstate_stop_cpu, 810 .name = "intel_pstate", 811}; 812 813static int __initdata no_load; 814 815static int intel_pstate_msrs_not_valid(void) 816{ 817 /* Check that all the msr's we are using are valid. */ 818 u64 aperf, mperf, tmp; 819 820 rdmsrl(MSR_IA32_APERF, aperf); 821 rdmsrl(MSR_IA32_MPERF, mperf); 822 823 if (!pstate_funcs.get_max() || 824 !pstate_funcs.get_min() || 825 !pstate_funcs.get_turbo()) 826 return -ENODEV; 827 828 rdmsrl(MSR_IA32_APERF, tmp); 829 if (!(tmp - aperf)) 830 return -ENODEV; 831 832 rdmsrl(MSR_IA32_MPERF, tmp); 833 if (!(tmp - mperf)) 834 return -ENODEV; 835 836 return 0; 837} 838 839static void copy_pid_params(struct pstate_adjust_policy *policy) 840{ 841 pid_params.sample_rate_ms = policy->sample_rate_ms; 842 pid_params.p_gain_pct = policy->p_gain_pct; 843 pid_params.i_gain_pct = policy->i_gain_pct; 844 pid_params.d_gain_pct = policy->d_gain_pct; 845 pid_params.deadband = policy->deadband; 846 pid_params.setpoint = policy->setpoint; 847} 848 849static void copy_cpu_funcs(struct pstate_funcs *funcs) 850{ 851 pstate_funcs.get_max = funcs->get_max; 852 pstate_funcs.get_min = funcs->get_min; 853 pstate_funcs.get_turbo = funcs->get_turbo; 854 pstate_funcs.set = funcs->set; 855 pstate_funcs.get_vid = funcs->get_vid; 856} 857 858#if IS_ENABLED(CONFIG_ACPI) 859#include <acpi/processor.h> 860 861static bool intel_pstate_no_acpi_pss(void) 862{ 863 int i; 864 865 for_each_possible_cpu(i) { 866 acpi_status status; 867 union acpi_object *pss; 868 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 869 struct acpi_processor *pr = per_cpu(processors, i); 870 871 if (!pr) 872 continue; 873 874 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer); 875 if (ACPI_FAILURE(status)) 876 continue; 877 878 pss = buffer.pointer; 879 if (pss && pss->type == ACPI_TYPE_PACKAGE) { 880 kfree(pss); 881 return false; 882 } 883 884 kfree(pss); 885 } 886 887 return true; 888} 889 890struct hw_vendor_info { 891 u16 valid; 892 char oem_id[ACPI_OEM_ID_SIZE]; 893 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE]; 894}; 895 896/* Hardware vendor-specific info that has its own power management modes */ 897static struct hw_vendor_info vendor_info[] = { 898 {1, "HP ", "ProLiant"}, 899 {0, "", ""}, 900}; 901 902static bool intel_pstate_platform_pwr_mgmt_exists(void) 903{ 904 struct acpi_table_header hdr; 905 struct hw_vendor_info *v_info; 906 907 if (acpi_disabled 908 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr))) 909 return false; 910 911 for (v_info = vendor_info; v_info->valid; v_info++) { 912 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE) 913 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) 914 && intel_pstate_no_acpi_pss()) 915 return true; 916 } 917 918 return false; 919} 920#else /* CONFIG_ACPI not enabled */ 921static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; } 922#endif /* CONFIG_ACPI */ 923 924static int __init intel_pstate_init(void) 925{ 926 int cpu, rc = 0; 927 const struct x86_cpu_id *id; 928 struct cpu_defaults *cpu_info; 929 930 if (no_load) 931 return -ENODEV; 932 933 id = x86_match_cpu(intel_pstate_cpu_ids); 934 if (!id) 935 return -ENODEV; 936 937 /* 938 * The Intel pstate driver will be ignored if the platform 939 * firmware has its own power management modes. 940 */ 941 if (intel_pstate_platform_pwr_mgmt_exists()) 942 return -ENODEV; 943 944 cpu_info = (struct cpu_defaults *)id->driver_data; 945 946 copy_pid_params(&cpu_info->pid_policy); 947 copy_cpu_funcs(&cpu_info->funcs); 948 949 if (intel_pstate_msrs_not_valid()) 950 return -ENODEV; 951 952 pr_info("Intel P-state driver initializing.\n"); 953 954 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus()); 955 if (!all_cpu_data) 956 return -ENOMEM; 957 958 rc = cpufreq_register_driver(&intel_pstate_driver); 959 if (rc) 960 goto out; 961 962 intel_pstate_debug_expose_params(); 963 intel_pstate_sysfs_expose_params(); 964 965 return rc; 966out: 967 get_online_cpus(); 968 for_each_online_cpu(cpu) { 969 if (all_cpu_data[cpu]) { 970 del_timer_sync(&all_cpu_data[cpu]->timer); 971 kfree(all_cpu_data[cpu]); 972 } 973 } 974 975 put_online_cpus(); 976 vfree(all_cpu_data); 977 return -ENODEV; 978} 979device_initcall(intel_pstate_init); 980 981static int __init intel_pstate_setup(char *str) 982{ 983 if (!str) 984 return -EINVAL; 985 986 if (!strcmp(str, "disable")) 987 no_load = 1; 988 return 0; 989} 990early_param("intel_pstate", intel_pstate_setup); 991 992MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>"); 993MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors"); 994MODULE_LICENSE("GPL"); 995