intel_pstate.c revision f0fe3cd7e12d8290c82284b5c8aee723cbd0371a
1/* 2 * intel_pstate.c: Native P state management for Intel processors 3 * 4 * (C) Copyright 2012 Intel Corporation 5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; version 2 10 * of the License. 11 */ 12 13#include <linux/kernel.h> 14#include <linux/kernel_stat.h> 15#include <linux/module.h> 16#include <linux/ktime.h> 17#include <linux/hrtimer.h> 18#include <linux/tick.h> 19#include <linux/slab.h> 20#include <linux/sched.h> 21#include <linux/list.h> 22#include <linux/cpu.h> 23#include <linux/cpufreq.h> 24#include <linux/sysfs.h> 25#include <linux/types.h> 26#include <linux/fs.h> 27#include <linux/debugfs.h> 28#include <linux/acpi.h> 29#include <trace/events/power.h> 30 31#include <asm/div64.h> 32#include <asm/msr.h> 33#include <asm/cpu_device_id.h> 34 35#define SAMPLE_COUNT 3 36 37#define BYT_RATIOS 0x66a 38#define BYT_VIDS 0x66b 39#define BYT_TURBO_RATIOS 0x66c 40#define BYT_TURBO_VIDS 0x66d 41 42 43#define FRAC_BITS 8 44#define int_tofp(X) ((int64_t)(X) << FRAC_BITS) 45#define fp_toint(X) ((X) >> FRAC_BITS) 46 47 48static inline int32_t mul_fp(int32_t x, int32_t y) 49{ 50 return ((int64_t)x * (int64_t)y) >> FRAC_BITS; 51} 52 53static inline int32_t div_fp(int32_t x, int32_t y) 54{ 55 return div_s64((int64_t)x << FRAC_BITS, (int64_t)y); 56} 57 58struct sample { 59 int32_t core_pct_busy; 60 u64 aperf; 61 u64 mperf; 62 int freq; 63}; 64 65struct pstate_data { 66 int current_pstate; 67 int min_pstate; 68 int max_pstate; 69 int turbo_pstate; 70}; 71 72struct vid_data { 73 int min; 74 int max; 75 int turbo; 76 int32_t ratio; 77}; 78 79struct _pid { 80 int setpoint; 81 int32_t integral; 82 int32_t p_gain; 83 int32_t i_gain; 84 int32_t d_gain; 85 int deadband; 86 int32_t last_err; 87}; 88 89struct cpudata { 90 int cpu; 91 92 char name[64]; 93 94 struct timer_list timer; 95 96 struct pstate_data pstate; 97 struct vid_data vid; 98 struct _pid pid; 99 100 u64 prev_aperf; 101 u64 prev_mperf; 102 struct sample sample; 103}; 104 105static struct cpudata **all_cpu_data; 106struct pstate_adjust_policy { 107 int sample_rate_ms; 108 int deadband; 109 int setpoint; 110 int p_gain_pct; 111 int d_gain_pct; 112 int i_gain_pct; 113}; 114 115struct pstate_funcs { 116 int (*get_max)(void); 117 int (*get_min)(void); 118 int (*get_turbo)(void); 119 void (*set)(struct cpudata*, int pstate); 120 void (*get_vid)(struct cpudata *); 121}; 122 123struct cpu_defaults { 124 struct pstate_adjust_policy pid_policy; 125 struct pstate_funcs funcs; 126}; 127 128static struct pstate_adjust_policy pid_params; 129static struct pstate_funcs pstate_funcs; 130 131struct perf_limits { 132 int no_turbo; 133 int max_perf_pct; 134 int min_perf_pct; 135 int32_t max_perf; 136 int32_t min_perf; 137 int max_policy_pct; 138 int max_sysfs_pct; 139}; 140 141static struct perf_limits limits = { 142 .no_turbo = 0, 143 .max_perf_pct = 100, 144 .max_perf = int_tofp(1), 145 .min_perf_pct = 0, 146 .min_perf = 0, 147 .max_policy_pct = 100, 148 .max_sysfs_pct = 100, 149}; 150 151static inline void pid_reset(struct _pid *pid, int setpoint, int busy, 152 int deadband, int integral) { 153 pid->setpoint = setpoint; 154 pid->deadband = deadband; 155 pid->integral = int_tofp(integral); 156 pid->last_err = int_tofp(setpoint) - int_tofp(busy); 157} 158 159static inline void pid_p_gain_set(struct _pid *pid, int percent) 160{ 161 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100)); 162} 163 164static inline void pid_i_gain_set(struct _pid *pid, int percent) 165{ 166 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100)); 167} 168 169static inline void pid_d_gain_set(struct _pid *pid, int percent) 170{ 171 172 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100)); 173} 174 175static signed int pid_calc(struct _pid *pid, int32_t busy) 176{ 177 signed int result; 178 int32_t pterm, dterm, fp_error; 179 int32_t integral_limit; 180 181 fp_error = int_tofp(pid->setpoint) - busy; 182 183 if (abs(fp_error) <= int_tofp(pid->deadband)) 184 return 0; 185 186 pterm = mul_fp(pid->p_gain, fp_error); 187 188 pid->integral += fp_error; 189 190 /* limit the integral term */ 191 integral_limit = int_tofp(30); 192 if (pid->integral > integral_limit) 193 pid->integral = integral_limit; 194 if (pid->integral < -integral_limit) 195 pid->integral = -integral_limit; 196 197 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err); 198 pid->last_err = fp_error; 199 200 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm; 201 if (result >= 0) 202 result = result + (1 << (FRAC_BITS-1)); 203 else 204 result = result - (1 << (FRAC_BITS-1)); 205 return (signed int)fp_toint(result); 206} 207 208static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu) 209{ 210 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct); 211 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct); 212 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct); 213 214 pid_reset(&cpu->pid, 215 pid_params.setpoint, 216 100, 217 pid_params.deadband, 218 0); 219} 220 221static inline void intel_pstate_reset_all_pid(void) 222{ 223 unsigned int cpu; 224 for_each_online_cpu(cpu) { 225 if (all_cpu_data[cpu]) 226 intel_pstate_busy_pid_reset(all_cpu_data[cpu]); 227 } 228} 229 230/************************** debugfs begin ************************/ 231static int pid_param_set(void *data, u64 val) 232{ 233 *(u32 *)data = val; 234 intel_pstate_reset_all_pid(); 235 return 0; 236} 237static int pid_param_get(void *data, u64 *val) 238{ 239 *val = *(u32 *)data; 240 return 0; 241} 242DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get, 243 pid_param_set, "%llu\n"); 244 245struct pid_param { 246 char *name; 247 void *value; 248}; 249 250static struct pid_param pid_files[] = { 251 {"sample_rate_ms", &pid_params.sample_rate_ms}, 252 {"d_gain_pct", &pid_params.d_gain_pct}, 253 {"i_gain_pct", &pid_params.i_gain_pct}, 254 {"deadband", &pid_params.deadband}, 255 {"setpoint", &pid_params.setpoint}, 256 {"p_gain_pct", &pid_params.p_gain_pct}, 257 {NULL, NULL} 258}; 259 260static struct dentry *debugfs_parent; 261static void intel_pstate_debug_expose_params(void) 262{ 263 int i = 0; 264 265 debugfs_parent = debugfs_create_dir("pstate_snb", NULL); 266 if (IS_ERR_OR_NULL(debugfs_parent)) 267 return; 268 while (pid_files[i].name) { 269 debugfs_create_file(pid_files[i].name, 0660, 270 debugfs_parent, pid_files[i].value, 271 &fops_pid_param); 272 i++; 273 } 274} 275 276/************************** debugfs end ************************/ 277 278/************************** sysfs begin ************************/ 279#define show_one(file_name, object) \ 280 static ssize_t show_##file_name \ 281 (struct kobject *kobj, struct attribute *attr, char *buf) \ 282 { \ 283 return sprintf(buf, "%u\n", limits.object); \ 284 } 285 286static ssize_t store_no_turbo(struct kobject *a, struct attribute *b, 287 const char *buf, size_t count) 288{ 289 unsigned int input; 290 int ret; 291 ret = sscanf(buf, "%u", &input); 292 if (ret != 1) 293 return -EINVAL; 294 limits.no_turbo = clamp_t(int, input, 0 , 1); 295 296 return count; 297} 298 299static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b, 300 const char *buf, size_t count) 301{ 302 unsigned int input; 303 int ret; 304 ret = sscanf(buf, "%u", &input); 305 if (ret != 1) 306 return -EINVAL; 307 308 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100); 309 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 310 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 311 return count; 312} 313 314static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b, 315 const char *buf, size_t count) 316{ 317 unsigned int input; 318 int ret; 319 ret = sscanf(buf, "%u", &input); 320 if (ret != 1) 321 return -EINVAL; 322 limits.min_perf_pct = clamp_t(int, input, 0 , 100); 323 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 324 325 return count; 326} 327 328show_one(no_turbo, no_turbo); 329show_one(max_perf_pct, max_perf_pct); 330show_one(min_perf_pct, min_perf_pct); 331 332define_one_global_rw(no_turbo); 333define_one_global_rw(max_perf_pct); 334define_one_global_rw(min_perf_pct); 335 336static struct attribute *intel_pstate_attributes[] = { 337 &no_turbo.attr, 338 &max_perf_pct.attr, 339 &min_perf_pct.attr, 340 NULL 341}; 342 343static struct attribute_group intel_pstate_attr_group = { 344 .attrs = intel_pstate_attributes, 345}; 346static struct kobject *intel_pstate_kobject; 347 348static void intel_pstate_sysfs_expose_params(void) 349{ 350 int rc; 351 352 intel_pstate_kobject = kobject_create_and_add("intel_pstate", 353 &cpu_subsys.dev_root->kobj); 354 BUG_ON(!intel_pstate_kobject); 355 rc = sysfs_create_group(intel_pstate_kobject, 356 &intel_pstate_attr_group); 357 BUG_ON(rc); 358} 359 360/************************** sysfs end ************************/ 361static int byt_get_min_pstate(void) 362{ 363 u64 value; 364 rdmsrl(BYT_RATIOS, value); 365 return (value >> 8) & 0x3F; 366} 367 368static int byt_get_max_pstate(void) 369{ 370 u64 value; 371 rdmsrl(BYT_RATIOS, value); 372 return (value >> 16) & 0x3F; 373} 374 375static int byt_get_turbo_pstate(void) 376{ 377 u64 value; 378 rdmsrl(BYT_TURBO_RATIOS, value); 379 return value & 0x3F; 380} 381 382static void byt_set_pstate(struct cpudata *cpudata, int pstate) 383{ 384 u64 val; 385 int32_t vid_fp; 386 u32 vid; 387 388 val = pstate << 8; 389 if (limits.no_turbo) 390 val |= (u64)1 << 32; 391 392 vid_fp = cpudata->vid.min + mul_fp( 393 int_tofp(pstate - cpudata->pstate.min_pstate), 394 cpudata->vid.ratio); 395 396 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max); 397 vid = fp_toint(vid_fp); 398 399 if (pstate > cpudata->pstate.max_pstate) 400 vid = cpudata->vid.turbo; 401 402 val |= vid; 403 404 wrmsrl(MSR_IA32_PERF_CTL, val); 405} 406 407static void byt_get_vid(struct cpudata *cpudata) 408{ 409 u64 value; 410 411 412 rdmsrl(BYT_VIDS, value); 413 cpudata->vid.min = int_tofp((value >> 8) & 0x3f); 414 cpudata->vid.max = int_tofp((value >> 16) & 0x3f); 415 cpudata->vid.ratio = div_fp( 416 cpudata->vid.max - cpudata->vid.min, 417 int_tofp(cpudata->pstate.max_pstate - 418 cpudata->pstate.min_pstate)); 419 420 rdmsrl(BYT_TURBO_VIDS, value); 421 cpudata->vid.turbo = value & 0x7f; 422} 423 424 425static int core_get_min_pstate(void) 426{ 427 u64 value; 428 rdmsrl(MSR_PLATFORM_INFO, value); 429 return (value >> 40) & 0xFF; 430} 431 432static int core_get_max_pstate(void) 433{ 434 u64 value; 435 rdmsrl(MSR_PLATFORM_INFO, value); 436 return (value >> 8) & 0xFF; 437} 438 439static int core_get_turbo_pstate(void) 440{ 441 u64 value; 442 int nont, ret; 443 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value); 444 nont = core_get_max_pstate(); 445 ret = ((value) & 255); 446 if (ret <= nont) 447 ret = nont; 448 return ret; 449} 450 451static void core_set_pstate(struct cpudata *cpudata, int pstate) 452{ 453 u64 val; 454 455 val = pstate << 8; 456 if (limits.no_turbo) 457 val |= (u64)1 << 32; 458 459 wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val); 460} 461 462static struct cpu_defaults core_params = { 463 .pid_policy = { 464 .sample_rate_ms = 10, 465 .deadband = 0, 466 .setpoint = 97, 467 .p_gain_pct = 20, 468 .d_gain_pct = 0, 469 .i_gain_pct = 0, 470 }, 471 .funcs = { 472 .get_max = core_get_max_pstate, 473 .get_min = core_get_min_pstate, 474 .get_turbo = core_get_turbo_pstate, 475 .set = core_set_pstate, 476 }, 477}; 478 479static struct cpu_defaults byt_params = { 480 .pid_policy = { 481 .sample_rate_ms = 10, 482 .deadband = 0, 483 .setpoint = 97, 484 .p_gain_pct = 14, 485 .d_gain_pct = 0, 486 .i_gain_pct = 4, 487 }, 488 .funcs = { 489 .get_max = byt_get_max_pstate, 490 .get_min = byt_get_min_pstate, 491 .get_turbo = byt_get_turbo_pstate, 492 .set = byt_set_pstate, 493 .get_vid = byt_get_vid, 494 }, 495}; 496 497 498static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max) 499{ 500 int max_perf = cpu->pstate.turbo_pstate; 501 int max_perf_adj; 502 int min_perf; 503 if (limits.no_turbo) 504 max_perf = cpu->pstate.max_pstate; 505 506 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf)); 507 *max = clamp_t(int, max_perf_adj, 508 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate); 509 510 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf)); 511 *min = clamp_t(int, min_perf, 512 cpu->pstate.min_pstate, max_perf); 513} 514 515static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate) 516{ 517 int max_perf, min_perf; 518 519 intel_pstate_get_min_max(cpu, &min_perf, &max_perf); 520 521 pstate = clamp_t(int, pstate, min_perf, max_perf); 522 523 if (pstate == cpu->pstate.current_pstate) 524 return; 525 526 trace_cpu_frequency(pstate * 100000, cpu->cpu); 527 528 cpu->pstate.current_pstate = pstate; 529 530 pstate_funcs.set(cpu, pstate); 531} 532 533static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps) 534{ 535 int target; 536 target = cpu->pstate.current_pstate + steps; 537 538 intel_pstate_set_pstate(cpu, target); 539} 540 541static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps) 542{ 543 int target; 544 target = cpu->pstate.current_pstate - steps; 545 intel_pstate_set_pstate(cpu, target); 546} 547 548static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) 549{ 550 sprintf(cpu->name, "Intel 2nd generation core"); 551 552 cpu->pstate.min_pstate = pstate_funcs.get_min(); 553 cpu->pstate.max_pstate = pstate_funcs.get_max(); 554 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); 555 556 if (pstate_funcs.get_vid) 557 pstate_funcs.get_vid(cpu); 558 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); 559} 560 561static inline void intel_pstate_calc_busy(struct cpudata *cpu, 562 struct sample *sample) 563{ 564 int32_t core_pct; 565 566 core_pct = div_fp(int_tofp((sample->aperf)), 567 int_tofp((sample->mperf))); 568 core_pct = mul_fp(core_pct, int_tofp(100)); 569 570 sample->freq = fp_toint( 571 mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct)); 572 573 sample->core_pct_busy = core_pct; 574} 575 576static inline void intel_pstate_sample(struct cpudata *cpu) 577{ 578 u64 aperf, mperf; 579 580 rdmsrl(MSR_IA32_APERF, aperf); 581 rdmsrl(MSR_IA32_MPERF, mperf); 582 583 aperf = aperf >> FRAC_BITS; 584 mperf = mperf >> FRAC_BITS; 585 586 cpu->sample.aperf = aperf; 587 cpu->sample.mperf = mperf; 588 cpu->sample.aperf -= cpu->prev_aperf; 589 cpu->sample.mperf -= cpu->prev_mperf; 590 591 intel_pstate_calc_busy(cpu, &cpu->sample); 592 593 cpu->prev_aperf = aperf; 594 cpu->prev_mperf = mperf; 595} 596 597static inline void intel_pstate_set_sample_time(struct cpudata *cpu) 598{ 599 int sample_time, delay; 600 601 sample_time = pid_params.sample_rate_ms; 602 delay = msecs_to_jiffies(sample_time); 603 mod_timer_pinned(&cpu->timer, jiffies + delay); 604} 605 606static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu) 607{ 608 int32_t core_busy, max_pstate, current_pstate; 609 610 core_busy = cpu->sample.core_pct_busy; 611 max_pstate = int_tofp(cpu->pstate.max_pstate); 612 current_pstate = int_tofp(cpu->pstate.current_pstate); 613 core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate)); 614 return core_busy; 615} 616 617static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu) 618{ 619 int32_t busy_scaled; 620 struct _pid *pid; 621 signed int ctl = 0; 622 int steps; 623 624 pid = &cpu->pid; 625 busy_scaled = intel_pstate_get_scaled_busy(cpu); 626 627 ctl = pid_calc(pid, busy_scaled); 628 629 steps = abs(ctl); 630 631 if (ctl < 0) 632 intel_pstate_pstate_increase(cpu, steps); 633 else 634 intel_pstate_pstate_decrease(cpu, steps); 635} 636 637static void intel_pstate_timer_func(unsigned long __data) 638{ 639 struct cpudata *cpu = (struct cpudata *) __data; 640 struct sample *sample; 641 642 intel_pstate_sample(cpu); 643 644 sample = &cpu->sample; 645 646 intel_pstate_adjust_busy_pstate(cpu); 647 648 trace_pstate_sample(fp_toint(sample->core_pct_busy), 649 fp_toint(intel_pstate_get_scaled_busy(cpu)), 650 cpu->pstate.current_pstate, 651 sample->mperf, 652 sample->aperf, 653 sample->freq); 654 655 intel_pstate_set_sample_time(cpu); 656} 657 658#define ICPU(model, policy) \ 659 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\ 660 (unsigned long)&policy } 661 662static const struct x86_cpu_id intel_pstate_cpu_ids[] = { 663 ICPU(0x2a, core_params), 664 ICPU(0x2d, core_params), 665 ICPU(0x37, byt_params), 666 ICPU(0x3a, core_params), 667 ICPU(0x3c, core_params), 668 ICPU(0x3e, core_params), 669 ICPU(0x3f, core_params), 670 ICPU(0x45, core_params), 671 ICPU(0x46, core_params), 672 {} 673}; 674MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); 675 676static int intel_pstate_init_cpu(unsigned int cpunum) 677{ 678 679 const struct x86_cpu_id *id; 680 struct cpudata *cpu; 681 682 id = x86_match_cpu(intel_pstate_cpu_ids); 683 if (!id) 684 return -ENODEV; 685 686 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL); 687 if (!all_cpu_data[cpunum]) 688 return -ENOMEM; 689 690 cpu = all_cpu_data[cpunum]; 691 692 intel_pstate_get_cpu_pstates(cpu); 693 694 cpu->cpu = cpunum; 695 696 init_timer_deferrable(&cpu->timer); 697 cpu->timer.function = intel_pstate_timer_func; 698 cpu->timer.data = 699 (unsigned long)cpu; 700 cpu->timer.expires = jiffies + HZ/100; 701 intel_pstate_busy_pid_reset(cpu); 702 intel_pstate_sample(cpu); 703 704 add_timer_on(&cpu->timer, cpunum); 705 706 pr_info("Intel pstate controlling: cpu %d\n", cpunum); 707 708 return 0; 709} 710 711static unsigned int intel_pstate_get(unsigned int cpu_num) 712{ 713 struct sample *sample; 714 struct cpudata *cpu; 715 716 cpu = all_cpu_data[cpu_num]; 717 if (!cpu) 718 return 0; 719 sample = &cpu->sample; 720 return sample->freq; 721} 722 723static int intel_pstate_set_policy(struct cpufreq_policy *policy) 724{ 725 struct cpudata *cpu; 726 727 cpu = all_cpu_data[policy->cpu]; 728 729 if (!policy->cpuinfo.max_freq) 730 return -ENODEV; 731 732 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { 733 limits.min_perf_pct = 100; 734 limits.min_perf = int_tofp(1); 735 limits.max_perf_pct = 100; 736 limits.max_perf = int_tofp(1); 737 limits.no_turbo = 0; 738 return 0; 739 } 740 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq; 741 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100); 742 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); 743 744 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq; 745 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100); 746 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); 747 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); 748 749 return 0; 750} 751 752static int intel_pstate_verify_policy(struct cpufreq_policy *policy) 753{ 754 cpufreq_verify_within_cpu_limits(policy); 755 756 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) && 757 (policy->policy != CPUFREQ_POLICY_PERFORMANCE)) 758 return -EINVAL; 759 760 return 0; 761} 762 763static void intel_pstate_stop_cpu(struct cpufreq_policy *policy) 764{ 765 int cpu_num = policy->cpu; 766 struct cpudata *cpu = all_cpu_data[cpu_num]; 767 768 pr_info("intel_pstate CPU %d exiting\n", cpu_num); 769 770 del_timer_sync(&all_cpu_data[cpu_num]->timer); 771 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); 772 kfree(all_cpu_data[cpu_num]); 773 all_cpu_data[cpu_num] = NULL; 774} 775 776static int intel_pstate_cpu_init(struct cpufreq_policy *policy) 777{ 778 struct cpudata *cpu; 779 int rc; 780 781 rc = intel_pstate_init_cpu(policy->cpu); 782 if (rc) 783 return rc; 784 785 cpu = all_cpu_data[policy->cpu]; 786 787 if (!limits.no_turbo && 788 limits.min_perf_pct == 100 && limits.max_perf_pct == 100) 789 policy->policy = CPUFREQ_POLICY_PERFORMANCE; 790 else 791 policy->policy = CPUFREQ_POLICY_POWERSAVE; 792 793 policy->min = cpu->pstate.min_pstate * 100000; 794 policy->max = cpu->pstate.turbo_pstate * 100000; 795 796 /* cpuinfo and default policy values */ 797 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000; 798 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000; 799 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 800 cpumask_set_cpu(policy->cpu, policy->cpus); 801 802 return 0; 803} 804 805static struct cpufreq_driver intel_pstate_driver = { 806 .flags = CPUFREQ_CONST_LOOPS, 807 .verify = intel_pstate_verify_policy, 808 .setpolicy = intel_pstate_set_policy, 809 .get = intel_pstate_get, 810 .init = intel_pstate_cpu_init, 811 .stop_cpu = intel_pstate_stop_cpu, 812 .name = "intel_pstate", 813}; 814 815static int __initdata no_load; 816 817static int intel_pstate_msrs_not_valid(void) 818{ 819 /* Check that all the msr's we are using are valid. */ 820 u64 aperf, mperf, tmp; 821 822 rdmsrl(MSR_IA32_APERF, aperf); 823 rdmsrl(MSR_IA32_MPERF, mperf); 824 825 if (!pstate_funcs.get_max() || 826 !pstate_funcs.get_min() || 827 !pstate_funcs.get_turbo()) 828 return -ENODEV; 829 830 rdmsrl(MSR_IA32_APERF, tmp); 831 if (!(tmp - aperf)) 832 return -ENODEV; 833 834 rdmsrl(MSR_IA32_MPERF, tmp); 835 if (!(tmp - mperf)) 836 return -ENODEV; 837 838 return 0; 839} 840 841static void copy_pid_params(struct pstate_adjust_policy *policy) 842{ 843 pid_params.sample_rate_ms = policy->sample_rate_ms; 844 pid_params.p_gain_pct = policy->p_gain_pct; 845 pid_params.i_gain_pct = policy->i_gain_pct; 846 pid_params.d_gain_pct = policy->d_gain_pct; 847 pid_params.deadband = policy->deadband; 848 pid_params.setpoint = policy->setpoint; 849} 850 851static void copy_cpu_funcs(struct pstate_funcs *funcs) 852{ 853 pstate_funcs.get_max = funcs->get_max; 854 pstate_funcs.get_min = funcs->get_min; 855 pstate_funcs.get_turbo = funcs->get_turbo; 856 pstate_funcs.set = funcs->set; 857 pstate_funcs.get_vid = funcs->get_vid; 858} 859 860#if IS_ENABLED(CONFIG_ACPI) 861#include <acpi/processor.h> 862 863static bool intel_pstate_no_acpi_pss(void) 864{ 865 int i; 866 867 for_each_possible_cpu(i) { 868 acpi_status status; 869 union acpi_object *pss; 870 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 871 struct acpi_processor *pr = per_cpu(processors, i); 872 873 if (!pr) 874 continue; 875 876 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer); 877 if (ACPI_FAILURE(status)) 878 continue; 879 880 pss = buffer.pointer; 881 if (pss && pss->type == ACPI_TYPE_PACKAGE) { 882 kfree(pss); 883 return false; 884 } 885 886 kfree(pss); 887 } 888 889 return true; 890} 891 892struct hw_vendor_info { 893 u16 valid; 894 char oem_id[ACPI_OEM_ID_SIZE]; 895 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE]; 896}; 897 898/* Hardware vendor-specific info that has its own power management modes */ 899static struct hw_vendor_info vendor_info[] = { 900 {1, "HP ", "ProLiant"}, 901 {0, "", ""}, 902}; 903 904static bool intel_pstate_platform_pwr_mgmt_exists(void) 905{ 906 struct acpi_table_header hdr; 907 struct hw_vendor_info *v_info; 908 909 if (acpi_disabled 910 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr))) 911 return false; 912 913 for (v_info = vendor_info; v_info->valid; v_info++) { 914 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE) 915 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) 916 && intel_pstate_no_acpi_pss()) 917 return true; 918 } 919 920 return false; 921} 922#else /* CONFIG_ACPI not enabled */ 923static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; } 924#endif /* CONFIG_ACPI */ 925 926static int __init intel_pstate_init(void) 927{ 928 int cpu, rc = 0; 929 const struct x86_cpu_id *id; 930 struct cpu_defaults *cpu_info; 931 932 if (no_load) 933 return -ENODEV; 934 935 id = x86_match_cpu(intel_pstate_cpu_ids); 936 if (!id) 937 return -ENODEV; 938 939 /* 940 * The Intel pstate driver will be ignored if the platform 941 * firmware has its own power management modes. 942 */ 943 if (intel_pstate_platform_pwr_mgmt_exists()) 944 return -ENODEV; 945 946 cpu_info = (struct cpu_defaults *)id->driver_data; 947 948 copy_pid_params(&cpu_info->pid_policy); 949 copy_cpu_funcs(&cpu_info->funcs); 950 951 if (intel_pstate_msrs_not_valid()) 952 return -ENODEV; 953 954 pr_info("Intel P-state driver initializing.\n"); 955 956 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus()); 957 if (!all_cpu_data) 958 return -ENOMEM; 959 960 rc = cpufreq_register_driver(&intel_pstate_driver); 961 if (rc) 962 goto out; 963 964 intel_pstate_debug_expose_params(); 965 intel_pstate_sysfs_expose_params(); 966 967 return rc; 968out: 969 get_online_cpus(); 970 for_each_online_cpu(cpu) { 971 if (all_cpu_data[cpu]) { 972 del_timer_sync(&all_cpu_data[cpu]->timer); 973 kfree(all_cpu_data[cpu]); 974 } 975 } 976 977 put_online_cpus(); 978 vfree(all_cpu_data); 979 return -ENODEV; 980} 981device_initcall(intel_pstate_init); 982 983static int __init intel_pstate_setup(char *str) 984{ 985 if (!str) 986 return -EINVAL; 987 988 if (!strcmp(str, "disable")) 989 no_load = 1; 990 return 0; 991} 992early_param("intel_pstate", intel_pstate_setup); 993 994MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>"); 995MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors"); 996MODULE_LICENSE("GPL"); 997