intel_pstate.c revision fbbcdc0744dace5fcc8147d11c5fb0791126848a
1/*
2 * intel_pstate.c: Native P state management for Intel processors
3 *
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/kernel.h>
14#include <linux/kernel_stat.h>
15#include <linux/module.h>
16#include <linux/ktime.h>
17#include <linux/hrtimer.h>
18#include <linux/tick.h>
19#include <linux/slab.h>
20#include <linux/sched.h>
21#include <linux/list.h>
22#include <linux/cpu.h>
23#include <linux/cpufreq.h>
24#include <linux/sysfs.h>
25#include <linux/types.h>
26#include <linux/fs.h>
27#include <linux/debugfs.h>
28#include <linux/acpi.h>
29#include <trace/events/power.h>
30
31#include <asm/div64.h>
32#include <asm/msr.h>
33#include <asm/cpu_device_id.h>
34
35#define SAMPLE_COUNT		3
36
37#define BYT_RATIOS	0x66a
38
39#define FRAC_BITS 8
40#define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
41#define fp_toint(X) ((X) >> FRAC_BITS)
42
43static inline int32_t mul_fp(int32_t x, int32_t y)
44{
45	return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
46}
47
48static inline int32_t div_fp(int32_t x, int32_t y)
49{
50	return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
51}
52
53struct sample {
54	int core_pct_busy;
55	u64 aperf;
56	u64 mperf;
57	int freq;
58};
59
60struct pstate_data {
61	int	current_pstate;
62	int	min_pstate;
63	int	max_pstate;
64	int	turbo_pstate;
65};
66
67struct _pid {
68	int setpoint;
69	int32_t integral;
70	int32_t p_gain;
71	int32_t i_gain;
72	int32_t d_gain;
73	int deadband;
74	int last_err;
75};
76
77struct cpudata {
78	int cpu;
79
80	char name[64];
81
82	struct timer_list timer;
83
84	struct pstate_data pstate;
85	struct _pid pid;
86
87	int min_pstate_count;
88
89	u64	prev_aperf;
90	u64	prev_mperf;
91	int	sample_ptr;
92	struct sample samples[SAMPLE_COUNT];
93};
94
95static struct cpudata **all_cpu_data;
96struct pstate_adjust_policy {
97	int sample_rate_ms;
98	int deadband;
99	int setpoint;
100	int p_gain_pct;
101	int d_gain_pct;
102	int i_gain_pct;
103};
104
105struct pstate_funcs {
106	int (*get_max)(void);
107	int (*get_min)(void);
108	int (*get_turbo)(void);
109	void (*set)(int pstate);
110};
111
112struct cpu_defaults {
113	struct pstate_adjust_policy pid_policy;
114	struct pstate_funcs funcs;
115};
116
117static struct pstate_adjust_policy pid_params;
118static struct pstate_funcs pstate_funcs;
119
120struct perf_limits {
121	int no_turbo;
122	int max_perf_pct;
123	int min_perf_pct;
124	int32_t max_perf;
125	int32_t min_perf;
126	int max_policy_pct;
127	int max_sysfs_pct;
128};
129
130static struct perf_limits limits = {
131	.no_turbo = 0,
132	.max_perf_pct = 100,
133	.max_perf = int_tofp(1),
134	.min_perf_pct = 0,
135	.min_perf = 0,
136	.max_policy_pct = 100,
137	.max_sysfs_pct = 100,
138};
139
140static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
141			int deadband, int integral) {
142	pid->setpoint = setpoint;
143	pid->deadband  = deadband;
144	pid->integral  = int_tofp(integral);
145	pid->last_err  = setpoint - busy;
146}
147
148static inline void pid_p_gain_set(struct _pid *pid, int percent)
149{
150	pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
151}
152
153static inline void pid_i_gain_set(struct _pid *pid, int percent)
154{
155	pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
156}
157
158static inline void pid_d_gain_set(struct _pid *pid, int percent)
159{
160
161	pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
162}
163
164static signed int pid_calc(struct _pid *pid, int busy)
165{
166	signed int err, result;
167	int32_t pterm, dterm, fp_error;
168	int32_t integral_limit;
169
170	err = pid->setpoint - busy;
171	fp_error = int_tofp(err);
172
173	if (abs(err) <= pid->deadband)
174		return 0;
175
176	pterm = mul_fp(pid->p_gain, fp_error);
177
178	pid->integral += fp_error;
179
180	/* limit the integral term */
181	integral_limit = int_tofp(30);
182	if (pid->integral > integral_limit)
183		pid->integral = integral_limit;
184	if (pid->integral < -integral_limit)
185		pid->integral = -integral_limit;
186
187	dterm = mul_fp(pid->d_gain, (err - pid->last_err));
188	pid->last_err = err;
189
190	result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
191
192	return (signed int)fp_toint(result);
193}
194
195static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
196{
197	pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
198	pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
199	pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
200
201	pid_reset(&cpu->pid,
202		pid_params.setpoint,
203		100,
204		pid_params.deadband,
205		0);
206}
207
208static inline void intel_pstate_reset_all_pid(void)
209{
210	unsigned int cpu;
211	for_each_online_cpu(cpu) {
212		if (all_cpu_data[cpu])
213			intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
214	}
215}
216
217/************************** debugfs begin ************************/
218static int pid_param_set(void *data, u64 val)
219{
220	*(u32 *)data = val;
221	intel_pstate_reset_all_pid();
222	return 0;
223}
224static int pid_param_get(void *data, u64 *val)
225{
226	*val = *(u32 *)data;
227	return 0;
228}
229DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
230			pid_param_set, "%llu\n");
231
232struct pid_param {
233	char *name;
234	void *value;
235};
236
237static struct pid_param pid_files[] = {
238	{"sample_rate_ms", &pid_params.sample_rate_ms},
239	{"d_gain_pct", &pid_params.d_gain_pct},
240	{"i_gain_pct", &pid_params.i_gain_pct},
241	{"deadband", &pid_params.deadband},
242	{"setpoint", &pid_params.setpoint},
243	{"p_gain_pct", &pid_params.p_gain_pct},
244	{NULL, NULL}
245};
246
247static struct dentry *debugfs_parent;
248static void intel_pstate_debug_expose_params(void)
249{
250	int i = 0;
251
252	debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
253	if (IS_ERR_OR_NULL(debugfs_parent))
254		return;
255	while (pid_files[i].name) {
256		debugfs_create_file(pid_files[i].name, 0660,
257				debugfs_parent, pid_files[i].value,
258				&fops_pid_param);
259		i++;
260	}
261}
262
263/************************** debugfs end ************************/
264
265/************************** sysfs begin ************************/
266#define show_one(file_name, object)					\
267	static ssize_t show_##file_name					\
268	(struct kobject *kobj, struct attribute *attr, char *buf)	\
269	{								\
270		return sprintf(buf, "%u\n", limits.object);		\
271	}
272
273static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
274				const char *buf, size_t count)
275{
276	unsigned int input;
277	int ret;
278	ret = sscanf(buf, "%u", &input);
279	if (ret != 1)
280		return -EINVAL;
281	limits.no_turbo = clamp_t(int, input, 0 , 1);
282
283	return count;
284}
285
286static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
287				const char *buf, size_t count)
288{
289	unsigned int input;
290	int ret;
291	ret = sscanf(buf, "%u", &input);
292	if (ret != 1)
293		return -EINVAL;
294
295	limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
296	limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
297	limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
298	return count;
299}
300
301static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
302				const char *buf, size_t count)
303{
304	unsigned int input;
305	int ret;
306	ret = sscanf(buf, "%u", &input);
307	if (ret != 1)
308		return -EINVAL;
309	limits.min_perf_pct = clamp_t(int, input, 0 , 100);
310	limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
311
312	return count;
313}
314
315show_one(no_turbo, no_turbo);
316show_one(max_perf_pct, max_perf_pct);
317show_one(min_perf_pct, min_perf_pct);
318
319define_one_global_rw(no_turbo);
320define_one_global_rw(max_perf_pct);
321define_one_global_rw(min_perf_pct);
322
323static struct attribute *intel_pstate_attributes[] = {
324	&no_turbo.attr,
325	&max_perf_pct.attr,
326	&min_perf_pct.attr,
327	NULL
328};
329
330static struct attribute_group intel_pstate_attr_group = {
331	.attrs = intel_pstate_attributes,
332};
333static struct kobject *intel_pstate_kobject;
334
335static void intel_pstate_sysfs_expose_params(void)
336{
337	int rc;
338
339	intel_pstate_kobject = kobject_create_and_add("intel_pstate",
340						&cpu_subsys.dev_root->kobj);
341	BUG_ON(!intel_pstate_kobject);
342	rc = sysfs_create_group(intel_pstate_kobject,
343				&intel_pstate_attr_group);
344	BUG_ON(rc);
345}
346
347/************************** sysfs end ************************/
348static int byt_get_min_pstate(void)
349{
350	u64 value;
351	rdmsrl(BYT_RATIOS, value);
352	return value & 0xFF;
353}
354
355static int byt_get_max_pstate(void)
356{
357	u64 value;
358	rdmsrl(BYT_RATIOS, value);
359	return (value >> 16) & 0xFF;
360}
361
362static int core_get_min_pstate(void)
363{
364	u64 value;
365	rdmsrl(MSR_PLATFORM_INFO, value);
366	return (value >> 40) & 0xFF;
367}
368
369static int core_get_max_pstate(void)
370{
371	u64 value;
372	rdmsrl(MSR_PLATFORM_INFO, value);
373	return (value >> 8) & 0xFF;
374}
375
376static int core_get_turbo_pstate(void)
377{
378	u64 value;
379	int nont, ret;
380	rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
381	nont = core_get_max_pstate();
382	ret = ((value) & 255);
383	if (ret <= nont)
384		ret = nont;
385	return ret;
386}
387
388static void core_set_pstate(int pstate)
389{
390	u64 val;
391
392	val = pstate << 8;
393	if (limits.no_turbo)
394		val |= (u64)1 << 32;
395
396	wrmsrl(MSR_IA32_PERF_CTL, val);
397}
398
399static struct cpu_defaults core_params = {
400	.pid_policy = {
401		.sample_rate_ms = 10,
402		.deadband = 0,
403		.setpoint = 97,
404		.p_gain_pct = 20,
405		.d_gain_pct = 0,
406		.i_gain_pct = 0,
407	},
408	.funcs = {
409		.get_max = core_get_max_pstate,
410		.get_min = core_get_min_pstate,
411		.get_turbo = core_get_turbo_pstate,
412		.set = core_set_pstate,
413	},
414};
415
416static struct cpu_defaults byt_params = {
417	.pid_policy = {
418		.sample_rate_ms = 10,
419		.deadband = 0,
420		.setpoint = 97,
421		.p_gain_pct = 14,
422		.d_gain_pct = 0,
423		.i_gain_pct = 4,
424	},
425	.funcs = {
426		.get_max = byt_get_max_pstate,
427		.get_min = byt_get_min_pstate,
428		.get_turbo = byt_get_max_pstate,
429		.set = core_set_pstate,
430	},
431};
432
433
434static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
435{
436	int max_perf = cpu->pstate.turbo_pstate;
437	int min_perf;
438	if (limits.no_turbo)
439		max_perf = cpu->pstate.max_pstate;
440
441	max_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
442	*max = clamp_t(int, max_perf,
443			cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
444
445	min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
446	*min = clamp_t(int, min_perf,
447			cpu->pstate.min_pstate, max_perf);
448}
449
450static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
451{
452	int max_perf, min_perf;
453
454	intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
455
456	pstate = clamp_t(int, pstate, min_perf, max_perf);
457
458	if (pstate == cpu->pstate.current_pstate)
459		return;
460
461	trace_cpu_frequency(pstate * 100000, cpu->cpu);
462
463	cpu->pstate.current_pstate = pstate;
464
465	pstate_funcs.set(pstate);
466}
467
468static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
469{
470	int target;
471	target = cpu->pstate.current_pstate + steps;
472
473	intel_pstate_set_pstate(cpu, target);
474}
475
476static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
477{
478	int target;
479	target = cpu->pstate.current_pstate - steps;
480	intel_pstate_set_pstate(cpu, target);
481}
482
483static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
484{
485	sprintf(cpu->name, "Intel 2nd generation core");
486
487	cpu->pstate.min_pstate = pstate_funcs.get_min();
488	cpu->pstate.max_pstate = pstate_funcs.get_max();
489	cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
490
491	/*
492	 * goto max pstate so we don't slow up boot if we are built-in if we are
493	 * a module we will take care of it during normal operation
494	 */
495	intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
496}
497
498static inline void intel_pstate_calc_busy(struct cpudata *cpu,
499					struct sample *sample)
500{
501	u64 core_pct;
502	core_pct = div64_u64(sample->aperf * 100, sample->mperf);
503	sample->freq = cpu->pstate.max_pstate * core_pct * 1000;
504
505	sample->core_pct_busy = core_pct;
506}
507
508static inline void intel_pstate_sample(struct cpudata *cpu)
509{
510	u64 aperf, mperf;
511
512	rdmsrl(MSR_IA32_APERF, aperf);
513	rdmsrl(MSR_IA32_MPERF, mperf);
514	cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT;
515	cpu->samples[cpu->sample_ptr].aperf = aperf;
516	cpu->samples[cpu->sample_ptr].mperf = mperf;
517	cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf;
518	cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf;
519
520	intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]);
521
522	cpu->prev_aperf = aperf;
523	cpu->prev_mperf = mperf;
524}
525
526static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
527{
528	int sample_time, delay;
529
530	sample_time = pid_params.sample_rate_ms;
531	delay = msecs_to_jiffies(sample_time);
532	mod_timer_pinned(&cpu->timer, jiffies + delay);
533}
534
535static inline int intel_pstate_get_scaled_busy(struct cpudata *cpu)
536{
537	int32_t busy_scaled;
538	int32_t core_busy, max_pstate, current_pstate;
539
540	core_busy = int_tofp(cpu->samples[cpu->sample_ptr].core_pct_busy);
541	max_pstate = int_tofp(cpu->pstate.max_pstate);
542	current_pstate = int_tofp(cpu->pstate.current_pstate);
543	busy_scaled = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
544
545	return fp_toint(busy_scaled);
546}
547
548static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
549{
550	int busy_scaled;
551	struct _pid *pid;
552	signed int ctl = 0;
553	int steps;
554
555	pid = &cpu->pid;
556	busy_scaled = intel_pstate_get_scaled_busy(cpu);
557
558	ctl = pid_calc(pid, busy_scaled);
559
560	steps = abs(ctl);
561	if (ctl < 0)
562		intel_pstate_pstate_increase(cpu, steps);
563	else
564		intel_pstate_pstate_decrease(cpu, steps);
565}
566
567static void intel_pstate_timer_func(unsigned long __data)
568{
569	struct cpudata *cpu = (struct cpudata *) __data;
570
571	intel_pstate_sample(cpu);
572	intel_pstate_adjust_busy_pstate(cpu);
573
574	if (cpu->pstate.current_pstate == cpu->pstate.min_pstate) {
575		cpu->min_pstate_count++;
576		if (!(cpu->min_pstate_count % 5)) {
577			intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
578		}
579	} else
580		cpu->min_pstate_count = 0;
581
582	intel_pstate_set_sample_time(cpu);
583}
584
585#define ICPU(model, policy) \
586	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&policy }
587
588static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
589	ICPU(0x2a, core_params),
590	ICPU(0x2d, core_params),
591	ICPU(0x37, byt_params),
592	ICPU(0x3a, core_params),
593	ICPU(0x3c, core_params),
594	ICPU(0x3e, core_params),
595	ICPU(0x3f, core_params),
596	ICPU(0x45, core_params),
597	ICPU(0x46, core_params),
598	{}
599};
600MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
601
602static int intel_pstate_init_cpu(unsigned int cpunum)
603{
604
605	const struct x86_cpu_id *id;
606	struct cpudata *cpu;
607
608	id = x86_match_cpu(intel_pstate_cpu_ids);
609	if (!id)
610		return -ENODEV;
611
612	all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
613	if (!all_cpu_data[cpunum])
614		return -ENOMEM;
615
616	cpu = all_cpu_data[cpunum];
617
618	intel_pstate_get_cpu_pstates(cpu);
619
620	cpu->cpu = cpunum;
621
622	init_timer_deferrable(&cpu->timer);
623	cpu->timer.function = intel_pstate_timer_func;
624	cpu->timer.data =
625		(unsigned long)cpu;
626	cpu->timer.expires = jiffies + HZ/100;
627	intel_pstate_busy_pid_reset(cpu);
628	intel_pstate_sample(cpu);
629	intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
630
631	add_timer_on(&cpu->timer, cpunum);
632
633	pr_info("Intel pstate controlling: cpu %d\n", cpunum);
634
635	return 0;
636}
637
638static unsigned int intel_pstate_get(unsigned int cpu_num)
639{
640	struct sample *sample;
641	struct cpudata *cpu;
642
643	cpu = all_cpu_data[cpu_num];
644	if (!cpu)
645		return 0;
646	sample = &cpu->samples[cpu->sample_ptr];
647	return sample->freq;
648}
649
650static int intel_pstate_set_policy(struct cpufreq_policy *policy)
651{
652	struct cpudata *cpu;
653
654	cpu = all_cpu_data[policy->cpu];
655
656	if (!policy->cpuinfo.max_freq)
657		return -ENODEV;
658
659	if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
660		limits.min_perf_pct = 100;
661		limits.min_perf = int_tofp(1);
662		limits.max_perf_pct = 100;
663		limits.max_perf = int_tofp(1);
664		limits.no_turbo = 0;
665		return 0;
666	}
667	limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
668	limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
669	limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
670
671	limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
672	limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
673	limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
674	limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
675
676	return 0;
677}
678
679static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
680{
681	cpufreq_verify_within_cpu_limits(policy);
682
683	if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
684		(policy->policy != CPUFREQ_POLICY_PERFORMANCE))
685		return -EINVAL;
686
687	return 0;
688}
689
690static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
691{
692	int cpu = policy->cpu;
693
694	del_timer(&all_cpu_data[cpu]->timer);
695	kfree(all_cpu_data[cpu]);
696	all_cpu_data[cpu] = NULL;
697	return 0;
698}
699
700static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
701{
702	struct cpudata *cpu;
703	int rc;
704
705	rc = intel_pstate_init_cpu(policy->cpu);
706	if (rc)
707		return rc;
708
709	cpu = all_cpu_data[policy->cpu];
710
711	if (!limits.no_turbo &&
712		limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
713		policy->policy = CPUFREQ_POLICY_PERFORMANCE;
714	else
715		policy->policy = CPUFREQ_POLICY_POWERSAVE;
716
717	policy->min = cpu->pstate.min_pstate * 100000;
718	policy->max = cpu->pstate.turbo_pstate * 100000;
719
720	/* cpuinfo and default policy values */
721	policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
722	policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
723	policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
724	cpumask_set_cpu(policy->cpu, policy->cpus);
725
726	return 0;
727}
728
729static struct cpufreq_driver intel_pstate_driver = {
730	.flags		= CPUFREQ_CONST_LOOPS,
731	.verify		= intel_pstate_verify_policy,
732	.setpolicy	= intel_pstate_set_policy,
733	.get		= intel_pstate_get,
734	.init		= intel_pstate_cpu_init,
735	.exit		= intel_pstate_cpu_exit,
736	.name		= "intel_pstate",
737};
738
739static int __initdata no_load;
740
741static int intel_pstate_msrs_not_valid(void)
742{
743	/* Check that all the msr's we are using are valid. */
744	u64 aperf, mperf, tmp;
745
746	rdmsrl(MSR_IA32_APERF, aperf);
747	rdmsrl(MSR_IA32_MPERF, mperf);
748
749	if (!pstate_funcs.get_max() ||
750		!pstate_funcs.get_min() ||
751		!pstate_funcs.get_turbo())
752		return -ENODEV;
753
754	rdmsrl(MSR_IA32_APERF, tmp);
755	if (!(tmp - aperf))
756		return -ENODEV;
757
758	rdmsrl(MSR_IA32_MPERF, tmp);
759	if (!(tmp - mperf))
760		return -ENODEV;
761
762	return 0;
763}
764
765static void copy_pid_params(struct pstate_adjust_policy *policy)
766{
767	pid_params.sample_rate_ms = policy->sample_rate_ms;
768	pid_params.p_gain_pct = policy->p_gain_pct;
769	pid_params.i_gain_pct = policy->i_gain_pct;
770	pid_params.d_gain_pct = policy->d_gain_pct;
771	pid_params.deadband = policy->deadband;
772	pid_params.setpoint = policy->setpoint;
773}
774
775static void copy_cpu_funcs(struct pstate_funcs *funcs)
776{
777	pstate_funcs.get_max   = funcs->get_max;
778	pstate_funcs.get_min   = funcs->get_min;
779	pstate_funcs.get_turbo = funcs->get_turbo;
780	pstate_funcs.set       = funcs->set;
781}
782
783#if IS_ENABLED(CONFIG_ACPI)
784#include <acpi/processor.h>
785
786static bool intel_pstate_no_acpi_pss(void)
787{
788	int i;
789
790	for_each_possible_cpu(i) {
791		acpi_status status;
792		union acpi_object *pss;
793		struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
794		struct acpi_processor *pr = per_cpu(processors, i);
795
796		if (!pr)
797			continue;
798
799		status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
800		if (ACPI_FAILURE(status))
801			continue;
802
803		pss = buffer.pointer;
804		if (pss && pss->type == ACPI_TYPE_PACKAGE) {
805			kfree(pss);
806			return false;
807		}
808
809		kfree(pss);
810	}
811
812	return true;
813}
814
815struct hw_vendor_info {
816	u16  valid;
817	char oem_id[ACPI_OEM_ID_SIZE];
818	char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
819};
820
821/* Hardware vendor-specific info that has its own power management modes */
822static struct hw_vendor_info vendor_info[] = {
823	{1, "HP    ", "ProLiant"},
824	{0, "", ""},
825};
826
827static bool intel_pstate_platform_pwr_mgmt_exists(void)
828{
829	struct acpi_table_header hdr;
830	struct hw_vendor_info *v_info;
831
832	if (acpi_disabled
833	    || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
834		return false;
835
836	for (v_info = vendor_info; v_info->valid; v_info++) {
837		if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
838		    && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
839		    && intel_pstate_no_acpi_pss())
840			return true;
841	}
842
843	return false;
844}
845#else /* CONFIG_ACPI not enabled */
846static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
847#endif /* CONFIG_ACPI */
848
849static int __init intel_pstate_init(void)
850{
851	int cpu, rc = 0;
852	const struct x86_cpu_id *id;
853	struct cpu_defaults *cpu_info;
854
855	if (no_load)
856		return -ENODEV;
857
858	id = x86_match_cpu(intel_pstate_cpu_ids);
859	if (!id)
860		return -ENODEV;
861
862	/*
863	 * The Intel pstate driver will be ignored if the platform
864	 * firmware has its own power management modes.
865	 */
866	if (intel_pstate_platform_pwr_mgmt_exists())
867		return -ENODEV;
868
869	cpu_info = (struct cpu_defaults *)id->driver_data;
870
871	copy_pid_params(&cpu_info->pid_policy);
872	copy_cpu_funcs(&cpu_info->funcs);
873
874	if (intel_pstate_msrs_not_valid())
875		return -ENODEV;
876
877	pr_info("Intel P-state driver initializing.\n");
878
879	all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
880	if (!all_cpu_data)
881		return -ENOMEM;
882
883	rc = cpufreq_register_driver(&intel_pstate_driver);
884	if (rc)
885		goto out;
886
887	intel_pstate_debug_expose_params();
888	intel_pstate_sysfs_expose_params();
889	return rc;
890out:
891	get_online_cpus();
892	for_each_online_cpu(cpu) {
893		if (all_cpu_data[cpu]) {
894			del_timer_sync(&all_cpu_data[cpu]->timer);
895			kfree(all_cpu_data[cpu]);
896		}
897	}
898
899	put_online_cpus();
900	vfree(all_cpu_data);
901	return -ENODEV;
902}
903device_initcall(intel_pstate_init);
904
905static int __init intel_pstate_setup(char *str)
906{
907	if (!str)
908		return -EINVAL;
909
910	if (!strcmp(str, "disable"))
911		no_load = 1;
912	return 0;
913}
914early_param("intel_pstate", intel_pstate_setup);
915
916MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
917MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
918MODULE_LICENSE("GPL");
919