powernow-k8.c revision 29c4bcddaa62e2b9fd2ba85668f6718b0b43f0e3
1/*
2 *   (c) 2003-2012 Advanced Micro Devices, Inc.
3 *  Your use of this code is subject to the terms and conditions of the
4 *  GNU general public license version 2. See "COPYING" or
5 *  http://www.gnu.org/licenses/gpl.html
6 *
7 *  Maintainer:
8 *  Andreas Herrmann <herrmann.der.user@googlemail.com>
9 *
10 *  Based on the powernow-k7.c module written by Dave Jones.
11 *  (C) 2003 Dave Jones on behalf of SuSE Labs
12 *  (C) 2004 Dominik Brodowski <linux@brodo.de>
13 *  (C) 2004 Pavel Machek <pavel@ucw.cz>
14 *  Licensed under the terms of the GNU GPL License version 2.
15 *  Based upon datasheets & sample CPUs kindly provided by AMD.
16 *
17 *  Valuable input gratefully received from Dave Jones, Pavel Machek,
18 *  Dominik Brodowski, Jacob Shin, and others.
19 *  Originally developed by Paul Devriendt.
20 *
21 *  Processor information obtained from Chapter 9 (Power and Thermal
22 *  Management) of the "BIOS and Kernel Developer's Guide (BKDG) for
23 *  the AMD Athlon 64 and AMD Opteron Processors" and section "2.x
24 *  Power Management" in BKDGs for newer AMD CPU families.
25 *
26 *  Tables for specific CPUs can be inferred from AMD's processor
27 *  power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf)
28 */
29
30#include <linux/kernel.h>
31#include <linux/smp.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/cpufreq.h>
35#include <linux/slab.h>
36#include <linux/string.h>
37#include <linux/cpumask.h>
38#include <linux/io.h>
39#include <linux/delay.h>
40
41#include <asm/msr.h>
42#include <asm/cpu_device_id.h>
43
44#include <linux/acpi.h>
45#include <linux/mutex.h>
46#include <acpi/processor.h>
47
48#define PFX "powernow-k8: "
49#define VERSION "version 2.20.00"
50#include "powernow-k8.h"
51
52/* serialize freq changes  */
53static DEFINE_MUTEX(fidvid_mutex);
54
55static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
56
57static struct cpufreq_driver cpufreq_amd64_driver;
58
59#ifndef CONFIG_SMP
60static inline const struct cpumask *cpu_core_mask(int cpu)
61{
62	return cpumask_of(0);
63}
64#endif
65
66/* Return a frequency in MHz, given an input fid */
67static u32 find_freq_from_fid(u32 fid)
68{
69	return 800 + (fid * 100);
70}
71
72/* Return a frequency in KHz, given an input fid */
73static u32 find_khz_freq_from_fid(u32 fid)
74{
75	return 1000 * find_freq_from_fid(fid);
76}
77
78/* Return the vco fid for an input fid
79 *
80 * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
81 * only from corresponding high fids. This returns "high" fid corresponding to
82 * "low" one.
83 */
84static u32 convert_fid_to_vco_fid(u32 fid)
85{
86	if (fid < HI_FID_TABLE_BOTTOM)
87		return 8 + (2 * fid);
88	else
89		return fid;
90}
91
92/*
93 * Return 1 if the pending bit is set. Unless we just instructed the processor
94 * to transition to a new state, seeing this bit set is really bad news.
95 */
96static int pending_bit_stuck(void)
97{
98	u32 lo, hi;
99
100	rdmsr(MSR_FIDVID_STATUS, lo, hi);
101	return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
102}
103
104/*
105 * Update the global current fid / vid values from the status msr.
106 * Returns 1 on error.
107 */
108static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
109{
110	u32 lo, hi;
111	u32 i = 0;
112
113	do {
114		if (i++ > 10000) {
115			pr_debug("detected change pending stuck\n");
116			return 1;
117		}
118		rdmsr(MSR_FIDVID_STATUS, lo, hi);
119	} while (lo & MSR_S_LO_CHANGE_PENDING);
120
121	data->currvid = hi & MSR_S_HI_CURRENT_VID;
122	data->currfid = lo & MSR_S_LO_CURRENT_FID;
123
124	return 0;
125}
126
127/* the isochronous relief time */
128static void count_off_irt(struct powernow_k8_data *data)
129{
130	udelay((1 << data->irt) * 10);
131	return;
132}
133
134/* the voltage stabilization time */
135static void count_off_vst(struct powernow_k8_data *data)
136{
137	udelay(data->vstable * VST_UNITS_20US);
138	return;
139}
140
141/* need to init the control msr to a safe value (for each cpu) */
142static void fidvid_msr_init(void)
143{
144	u32 lo, hi;
145	u8 fid, vid;
146
147	rdmsr(MSR_FIDVID_STATUS, lo, hi);
148	vid = hi & MSR_S_HI_CURRENT_VID;
149	fid = lo & MSR_S_LO_CURRENT_FID;
150	lo = fid | (vid << MSR_C_LO_VID_SHIFT);
151	hi = MSR_C_HI_STP_GNT_BENIGN;
152	pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
153	wrmsr(MSR_FIDVID_CTL, lo, hi);
154}
155
156/* write the new fid value along with the other control fields to the msr */
157static int write_new_fid(struct powernow_k8_data *data, u32 fid)
158{
159	u32 lo;
160	u32 savevid = data->currvid;
161	u32 i = 0;
162
163	if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
164		printk(KERN_ERR PFX "internal error - overflow on fid write\n");
165		return 1;
166	}
167
168	lo = fid;
169	lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
170	lo |= MSR_C_LO_INIT_FID_VID;
171
172	pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
173		fid, lo, data->plllock * PLL_LOCK_CONVERSION);
174
175	do {
176		wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
177		if (i++ > 100) {
178			printk(KERN_ERR PFX
179				"Hardware error - pending bit very stuck - "
180				"no further pstate changes possible\n");
181			return 1;
182		}
183	} while (query_current_values_with_pending_wait(data));
184
185	count_off_irt(data);
186
187	if (savevid != data->currvid) {
188		printk(KERN_ERR PFX
189			"vid change on fid trans, old 0x%x, new 0x%x\n",
190			savevid, data->currvid);
191		return 1;
192	}
193
194	if (fid != data->currfid) {
195		printk(KERN_ERR PFX
196			"fid trans failed, fid 0x%x, curr 0x%x\n", fid,
197			data->currfid);
198		return 1;
199	}
200
201	return 0;
202}
203
204/* Write a new vid to the hardware */
205static int write_new_vid(struct powernow_k8_data *data, u32 vid)
206{
207	u32 lo;
208	u32 savefid = data->currfid;
209	int i = 0;
210
211	if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
212		printk(KERN_ERR PFX "internal error - overflow on vid write\n");
213		return 1;
214	}
215
216	lo = data->currfid;
217	lo |= (vid << MSR_C_LO_VID_SHIFT);
218	lo |= MSR_C_LO_INIT_FID_VID;
219
220	pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
221		vid, lo, STOP_GRANT_5NS);
222
223	do {
224		wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
225		if (i++ > 100) {
226			printk(KERN_ERR PFX "internal error - pending bit "
227					"very stuck - no further pstate "
228					"changes possible\n");
229			return 1;
230		}
231	} while (query_current_values_with_pending_wait(data));
232
233	if (savefid != data->currfid) {
234		printk(KERN_ERR PFX "fid changed on vid trans, old "
235			"0x%x new 0x%x\n",
236		       savefid, data->currfid);
237		return 1;
238	}
239
240	if (vid != data->currvid) {
241		printk(KERN_ERR PFX "vid trans failed, vid 0x%x, "
242				"curr 0x%x\n",
243				vid, data->currvid);
244		return 1;
245	}
246
247	return 0;
248}
249
250/*
251 * Reduce the vid by the max of step or reqvid.
252 * Decreasing vid codes represent increasing voltages:
253 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
254 */
255static int decrease_vid_code_by_step(struct powernow_k8_data *data,
256		u32 reqvid, u32 step)
257{
258	if ((data->currvid - reqvid) > step)
259		reqvid = data->currvid - step;
260
261	if (write_new_vid(data, reqvid))
262		return 1;
263
264	count_off_vst(data);
265
266	return 0;
267}
268
269/* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
270static int transition_fid_vid(struct powernow_k8_data *data,
271		u32 reqfid, u32 reqvid)
272{
273	if (core_voltage_pre_transition(data, reqvid, reqfid))
274		return 1;
275
276	if (core_frequency_transition(data, reqfid))
277		return 1;
278
279	if (core_voltage_post_transition(data, reqvid))
280		return 1;
281
282	if (query_current_values_with_pending_wait(data))
283		return 1;
284
285	if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
286		printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, "
287				"curr 0x%x 0x%x\n",
288				smp_processor_id(),
289				reqfid, reqvid, data->currfid, data->currvid);
290		return 1;
291	}
292
293	pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
294		smp_processor_id(), data->currfid, data->currvid);
295
296	return 0;
297}
298
299/* Phase 1 - core voltage transition ... setup voltage */
300static int core_voltage_pre_transition(struct powernow_k8_data *data,
301		u32 reqvid, u32 reqfid)
302{
303	u32 rvosteps = data->rvo;
304	u32 savefid = data->currfid;
305	u32 maxvid, lo, rvomult = 1;
306
307	pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, "
308		"reqvid 0x%x, rvo 0x%x\n",
309		smp_processor_id(),
310		data->currfid, data->currvid, reqvid, data->rvo);
311
312	if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP))
313		rvomult = 2;
314	rvosteps *= rvomult;
315	rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
316	maxvid = 0x1f & (maxvid >> 16);
317	pr_debug("ph1 maxvid=0x%x\n", maxvid);
318	if (reqvid < maxvid) /* lower numbers are higher voltages */
319		reqvid = maxvid;
320
321	while (data->currvid > reqvid) {
322		pr_debug("ph1: curr 0x%x, req vid 0x%x\n",
323			data->currvid, reqvid);
324		if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
325			return 1;
326	}
327
328	while ((rvosteps > 0) &&
329			((rvomult * data->rvo + data->currvid) > reqvid)) {
330		if (data->currvid == maxvid) {
331			rvosteps = 0;
332		} else {
333			pr_debug("ph1: changing vid for rvo, req 0x%x\n",
334				data->currvid - 1);
335			if (decrease_vid_code_by_step(data, data->currvid-1, 1))
336				return 1;
337			rvosteps--;
338		}
339	}
340
341	if (query_current_values_with_pending_wait(data))
342		return 1;
343
344	if (savefid != data->currfid) {
345		printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n",
346				data->currfid);
347		return 1;
348	}
349
350	pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n",
351		data->currfid, data->currvid);
352
353	return 0;
354}
355
356/* Phase 2 - core frequency transition */
357static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
358{
359	u32 vcoreqfid, vcocurrfid, vcofiddiff;
360	u32 fid_interval, savevid = data->currvid;
361
362	if (data->currfid == reqfid) {
363		printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n",
364				data->currfid);
365		return 0;
366	}
367
368	pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, "
369		"reqfid 0x%x\n",
370		smp_processor_id(),
371		data->currfid, data->currvid, reqfid);
372
373	vcoreqfid = convert_fid_to_vco_fid(reqfid);
374	vcocurrfid = convert_fid_to_vco_fid(data->currfid);
375	vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
376	    : vcoreqfid - vcocurrfid;
377
378	if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP))
379		vcofiddiff = 0;
380
381	while (vcofiddiff > 2) {
382		(data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
383
384		if (reqfid > data->currfid) {
385			if (data->currfid > LO_FID_TABLE_TOP) {
386				if (write_new_fid(data,
387						data->currfid + fid_interval))
388					return 1;
389			} else {
390				if (write_new_fid
391				    (data,
392				     2 + convert_fid_to_vco_fid(data->currfid)))
393					return 1;
394			}
395		} else {
396			if (write_new_fid(data, data->currfid - fid_interval))
397				return 1;
398		}
399
400		vcocurrfid = convert_fid_to_vco_fid(data->currfid);
401		vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
402		    : vcoreqfid - vcocurrfid;
403	}
404
405	if (write_new_fid(data, reqfid))
406		return 1;
407
408	if (query_current_values_with_pending_wait(data))
409		return 1;
410
411	if (data->currfid != reqfid) {
412		printk(KERN_ERR PFX
413			"ph2: mismatch, failed fid transition, "
414			"curr 0x%x, req 0x%x\n",
415			data->currfid, reqfid);
416		return 1;
417	}
418
419	if (savevid != data->currvid) {
420		printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
421			savevid, data->currvid);
422		return 1;
423	}
424
425	pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n",
426		data->currfid, data->currvid);
427
428	return 0;
429}
430
431/* Phase 3 - core voltage transition flow ... jump to the final vid. */
432static int core_voltage_post_transition(struct powernow_k8_data *data,
433		u32 reqvid)
434{
435	u32 savefid = data->currfid;
436	u32 savereqvid = reqvid;
437
438	pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
439		smp_processor_id(),
440		data->currfid, data->currvid);
441
442	if (reqvid != data->currvid) {
443		if (write_new_vid(data, reqvid))
444			return 1;
445
446		if (savefid != data->currfid) {
447			printk(KERN_ERR PFX
448			       "ph3: bad fid change, save 0x%x, curr 0x%x\n",
449			       savefid, data->currfid);
450			return 1;
451		}
452
453		if (data->currvid != reqvid) {
454			printk(KERN_ERR PFX
455			       "ph3: failed vid transition\n, "
456			       "req 0x%x, curr 0x%x",
457			       reqvid, data->currvid);
458			return 1;
459		}
460	}
461
462	if (query_current_values_with_pending_wait(data))
463		return 1;
464
465	if (savereqvid != data->currvid) {
466		pr_debug("ph3 failed, currvid 0x%x\n", data->currvid);
467		return 1;
468	}
469
470	if (savefid != data->currfid) {
471		pr_debug("ph3 failed, currfid changed 0x%x\n",
472			data->currfid);
473		return 1;
474	}
475
476	pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n",
477		data->currfid, data->currvid);
478
479	return 0;
480}
481
482static const struct x86_cpu_id powernow_k8_ids[] = {
483	/* IO based frequency switching */
484	{ X86_VENDOR_AMD, 0xf },
485	{}
486};
487MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids);
488
489static void check_supported_cpu(void *_rc)
490{
491	u32 eax, ebx, ecx, edx;
492	int *rc = _rc;
493
494	*rc = -ENODEV;
495
496	eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
497
498	if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
499		if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
500		    ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
501			printk(KERN_INFO PFX
502				"Processor cpuid %x not supported\n", eax);
503			return;
504		}
505
506		eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
507		if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
508			printk(KERN_INFO PFX
509			       "No frequency change capabilities detected\n");
510			return;
511		}
512
513		cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
514		if ((edx & P_STATE_TRANSITION_CAPABLE)
515			!= P_STATE_TRANSITION_CAPABLE) {
516			printk(KERN_INFO PFX
517				"Power state transitions not supported\n");
518			return;
519		}
520		*rc = 0;
521	}
522}
523
524static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
525		u8 maxvid)
526{
527	unsigned int j;
528	u8 lastfid = 0xff;
529
530	for (j = 0; j < data->numps; j++) {
531		if (pst[j].vid > LEAST_VID) {
532			printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n",
533			       j, pst[j].vid);
534			return -EINVAL;
535		}
536		if (pst[j].vid < data->rvo) {
537			/* vid + rvo >= 0 */
538			printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate"
539			       " %d\n", j);
540			return -ENODEV;
541		}
542		if (pst[j].vid < maxvid + data->rvo) {
543			/* vid + rvo >= maxvid */
544			printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate"
545			       " %d\n", j);
546			return -ENODEV;
547		}
548		if (pst[j].fid > MAX_FID) {
549			printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate"
550			       " %d\n", j);
551			return -ENODEV;
552		}
553		if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
554			/* Only first fid is allowed to be in "low" range */
555			printk(KERN_ERR FW_BUG PFX "two low fids - %d : "
556			       "0x%x\n", j, pst[j].fid);
557			return -EINVAL;
558		}
559		if (pst[j].fid < lastfid)
560			lastfid = pst[j].fid;
561	}
562	if (lastfid & 1) {
563		printk(KERN_ERR FW_BUG PFX "lastfid invalid\n");
564		return -EINVAL;
565	}
566	if (lastfid > LO_FID_TABLE_TOP)
567		printk(KERN_INFO FW_BUG PFX
568			"first fid not from lo freq table\n");
569
570	return 0;
571}
572
573static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
574		unsigned int entry)
575{
576	powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
577}
578
579static void print_basics(struct powernow_k8_data *data)
580{
581	int j;
582	for (j = 0; j < data->numps; j++) {
583		if (data->powernow_table[j].frequency !=
584				CPUFREQ_ENTRY_INVALID) {
585				printk(KERN_INFO PFX
586					"fid 0x%x (%d MHz), vid 0x%x\n",
587					data->powernow_table[j].index & 0xff,
588					data->powernow_table[j].frequency/1000,
589					data->powernow_table[j].index >> 8);
590		}
591	}
592	if (data->batps)
593		printk(KERN_INFO PFX "Only %d pstates on battery\n",
594				data->batps);
595}
596
597static int fill_powernow_table(struct powernow_k8_data *data,
598		struct pst_s *pst, u8 maxvid)
599{
600	struct cpufreq_frequency_table *powernow_table;
601	unsigned int j;
602
603	if (data->batps) {
604		/* use ACPI support to get full speed on mains power */
605		printk(KERN_WARNING PFX
606			"Only %d pstates usable (use ACPI driver for full "
607			"range\n", data->batps);
608		data->numps = data->batps;
609	}
610
611	for (j = 1; j < data->numps; j++) {
612		if (pst[j-1].fid >= pst[j].fid) {
613			printk(KERN_ERR PFX "PST out of sequence\n");
614			return -EINVAL;
615		}
616	}
617
618	if (data->numps < 2) {
619		printk(KERN_ERR PFX "no p states to transition\n");
620		return -ENODEV;
621	}
622
623	if (check_pst_table(data, pst, maxvid))
624		return -EINVAL;
625
626	powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
627		* (data->numps + 1)), GFP_KERNEL);
628	if (!powernow_table) {
629		printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
630		return -ENOMEM;
631	}
632
633	for (j = 0; j < data->numps; j++) {
634		int freq;
635		powernow_table[j].index = pst[j].fid; /* lower 8 bits */
636		powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
637		freq = find_khz_freq_from_fid(pst[j].fid);
638		powernow_table[j].frequency = freq;
639	}
640	powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
641	powernow_table[data->numps].index = 0;
642
643	if (query_current_values_with_pending_wait(data)) {
644		kfree(powernow_table);
645		return -EIO;
646	}
647
648	pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
649	data->powernow_table = powernow_table;
650	if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
651		print_basics(data);
652
653	for (j = 0; j < data->numps; j++)
654		if ((pst[j].fid == data->currfid) &&
655		    (pst[j].vid == data->currvid))
656			return 0;
657
658	pr_debug("currfid/vid do not match PST, ignoring\n");
659	return 0;
660}
661
662/* Find and validate the PSB/PST table in BIOS. */
663static int find_psb_table(struct powernow_k8_data *data)
664{
665	struct psb_s *psb;
666	unsigned int i;
667	u32 mvs;
668	u8 maxvid;
669	u32 cpst = 0;
670	u32 thiscpuid;
671
672	for (i = 0xc0000; i < 0xffff0; i += 0x10) {
673		/* Scan BIOS looking for the signature. */
674		/* It can not be at ffff0 - it is too big. */
675
676		psb = phys_to_virt(i);
677		if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
678			continue;
679
680		pr_debug("found PSB header at 0x%p\n", psb);
681
682		pr_debug("table vers: 0x%x\n", psb->tableversion);
683		if (psb->tableversion != PSB_VERSION_1_4) {
684			printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n");
685			return -ENODEV;
686		}
687
688		pr_debug("flags: 0x%x\n", psb->flags1);
689		if (psb->flags1) {
690			printk(KERN_ERR FW_BUG PFX "unknown flags\n");
691			return -ENODEV;
692		}
693
694		data->vstable = psb->vstable;
695		pr_debug("voltage stabilization time: %d(*20us)\n",
696				data->vstable);
697
698		pr_debug("flags2: 0x%x\n", psb->flags2);
699		data->rvo = psb->flags2 & 3;
700		data->irt = ((psb->flags2) >> 2) & 3;
701		mvs = ((psb->flags2) >> 4) & 3;
702		data->vidmvs = 1 << mvs;
703		data->batps = ((psb->flags2) >> 6) & 3;
704
705		pr_debug("ramp voltage offset: %d\n", data->rvo);
706		pr_debug("isochronous relief time: %d\n", data->irt);
707		pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
708
709		pr_debug("numpst: 0x%x\n", psb->num_tables);
710		cpst = psb->num_tables;
711		if ((psb->cpuid == 0x00000fc0) ||
712		    (psb->cpuid == 0x00000fe0)) {
713			thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
714			if ((thiscpuid == 0x00000fc0) ||
715			    (thiscpuid == 0x00000fe0))
716				cpst = 1;
717		}
718		if (cpst != 1) {
719			printk(KERN_ERR FW_BUG PFX "numpst must be 1\n");
720			return -ENODEV;
721		}
722
723		data->plllock = psb->plllocktime;
724		pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
725		pr_debug("maxfid: 0x%x\n", psb->maxfid);
726		pr_debug("maxvid: 0x%x\n", psb->maxvid);
727		maxvid = psb->maxvid;
728
729		data->numps = psb->numps;
730		pr_debug("numpstates: 0x%x\n", data->numps);
731		return fill_powernow_table(data,
732				(struct pst_s *)(psb+1), maxvid);
733	}
734	/*
735	 * If you see this message, complain to BIOS manufacturer. If
736	 * he tells you "we do not support Linux" or some similar
737	 * nonsense, remember that Windows 2000 uses the same legacy
738	 * mechanism that the old Linux PSB driver uses. Tell them it
739	 * is broken with Windows 2000.
740	 *
741	 * The reference to the AMD documentation is chapter 9 in the
742	 * BIOS and Kernel Developer's Guide, which is available on
743	 * www.amd.com
744	 */
745	printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n");
746	printk(KERN_ERR PFX "Make sure that your BIOS is up to date"
747		" and Cool'N'Quiet support is enabled in BIOS setup\n");
748	return -ENODEV;
749}
750
751static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
752		unsigned int index)
753{
754	u64 control;
755
756	if (!data->acpi_data.state_count)
757		return;
758
759	control = data->acpi_data.states[index].control;
760	data->irt = (control >> IRT_SHIFT) & IRT_MASK;
761	data->rvo = (control >> RVO_SHIFT) & RVO_MASK;
762	data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
763	data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK;
764	data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK);
765	data->vstable = (control >> VST_SHIFT) & VST_MASK;
766}
767
768static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
769{
770	struct cpufreq_frequency_table *powernow_table;
771	int ret_val = -ENODEV;
772	u64 control, status;
773
774	if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
775		pr_debug("register performance failed: bad ACPI data\n");
776		return -EIO;
777	}
778
779	/* verify the data contained in the ACPI structures */
780	if (data->acpi_data.state_count <= 1) {
781		pr_debug("No ACPI P-States\n");
782		goto err_out;
783	}
784
785	control = data->acpi_data.control_register.space_id;
786	status = data->acpi_data.status_register.space_id;
787
788	if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
789	    (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
790		pr_debug("Invalid control/status registers (%llx - %llx)\n",
791			control, status);
792		goto err_out;
793	}
794
795	/* fill in data->powernow_table */
796	powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
797		* (data->acpi_data.state_count + 1)), GFP_KERNEL);
798	if (!powernow_table) {
799		pr_debug("powernow_table memory alloc failure\n");
800		goto err_out;
801	}
802
803	/* fill in data */
804	data->numps = data->acpi_data.state_count;
805	powernow_k8_acpi_pst_values(data, 0);
806
807	ret_val = fill_powernow_table_fidvid(data, powernow_table);
808	if (ret_val)
809		goto err_out_mem;
810
811	powernow_table[data->acpi_data.state_count].frequency =
812		CPUFREQ_TABLE_END;
813	powernow_table[data->acpi_data.state_count].index = 0;
814	data->powernow_table = powernow_table;
815
816	if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
817		print_basics(data);
818
819	/* notify BIOS that we exist */
820	acpi_processor_notify_smm(THIS_MODULE);
821
822	if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
823		printk(KERN_ERR PFX
824				"unable to alloc powernow_k8_data cpumask\n");
825		ret_val = -ENOMEM;
826		goto err_out_mem;
827	}
828
829	return 0;
830
831err_out_mem:
832	kfree(powernow_table);
833
834err_out:
835	acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
836
837	/* data->acpi_data.state_count informs us at ->exit()
838	 * whether ACPI was used */
839	data->acpi_data.state_count = 0;
840
841	return ret_val;
842}
843
844static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
845		struct cpufreq_frequency_table *powernow_table)
846{
847	int i;
848
849	for (i = 0; i < data->acpi_data.state_count; i++) {
850		u32 fid;
851		u32 vid;
852		u32 freq, index;
853		u64 status, control;
854
855		if (data->exttype) {
856			status =  data->acpi_data.states[i].status;
857			fid = status & EXT_FID_MASK;
858			vid = (status >> VID_SHIFT) & EXT_VID_MASK;
859		} else {
860			control =  data->acpi_data.states[i].control;
861			fid = control & FID_MASK;
862			vid = (control >> VID_SHIFT) & VID_MASK;
863		}
864
865		pr_debug("   %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
866
867		index = fid | (vid<<8);
868		powernow_table[i].index = index;
869
870		freq = find_khz_freq_from_fid(fid);
871		powernow_table[i].frequency = freq;
872
873		/* verify frequency is OK */
874		if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
875			pr_debug("invalid freq %u kHz, ignoring\n", freq);
876			invalidate_entry(powernow_table, i);
877			continue;
878		}
879
880		/* verify voltage is OK -
881		 * BIOSs are using "off" to indicate invalid */
882		if (vid == VID_OFF) {
883			pr_debug("invalid vid %u, ignoring\n", vid);
884			invalidate_entry(powernow_table, i);
885			continue;
886		}
887
888		if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
889			printk(KERN_INFO PFX "invalid freq entries "
890				"%u kHz vs. %u kHz\n", freq,
891				(unsigned int)
892				(data->acpi_data.states[i].core_frequency
893				 * 1000));
894			invalidate_entry(powernow_table, i);
895			continue;
896		}
897	}
898	return 0;
899}
900
901static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
902{
903	if (data->acpi_data.state_count)
904		acpi_processor_unregister_performance(&data->acpi_data,
905				data->cpu);
906	free_cpumask_var(data->acpi_data.shared_cpu_map);
907}
908
909static int get_transition_latency(struct powernow_k8_data *data)
910{
911	int max_latency = 0;
912	int i;
913	for (i = 0; i < data->acpi_data.state_count; i++) {
914		int cur_latency = data->acpi_data.states[i].transition_latency
915			+ data->acpi_data.states[i].bus_master_latency;
916		if (cur_latency > max_latency)
917			max_latency = cur_latency;
918	}
919	if (max_latency == 0) {
920		pr_err(FW_WARN PFX "Invalid zero transition latency\n");
921		max_latency = 1;
922	}
923	/* value in usecs, needs to be in nanoseconds */
924	return 1000 * max_latency;
925}
926
927/* Take a frequency, and issue the fid/vid transition command */
928static int transition_frequency_fidvid(struct powernow_k8_data *data,
929		unsigned int index)
930{
931	u32 fid = 0;
932	u32 vid = 0;
933	int res, i;
934	struct cpufreq_freqs freqs;
935
936	pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index);
937
938	/* fid/vid correctness check for k8 */
939	/* fid are the lower 8 bits of the index we stored into
940	 * the cpufreq frequency table in find_psb_table, vid
941	 * are the upper 8 bits.
942	 */
943	fid = data->powernow_table[index].index & 0xFF;
944	vid = (data->powernow_table[index].index & 0xFF00) >> 8;
945
946	pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
947
948	if (query_current_values_with_pending_wait(data))
949		return 1;
950
951	if ((data->currvid == vid) && (data->currfid == fid)) {
952		pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n",
953			fid, vid);
954		return 0;
955	}
956
957	pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n",
958		smp_processor_id(), fid, vid);
959	freqs.old = find_khz_freq_from_fid(data->currfid);
960	freqs.new = find_khz_freq_from_fid(fid);
961
962	for_each_cpu(i, data->available_cores) {
963		freqs.cpu = i;
964		cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
965	}
966
967	res = transition_fid_vid(data, fid, vid);
968	if (res)
969		return res;
970
971	freqs.new = find_khz_freq_from_fid(data->currfid);
972
973	for_each_cpu(i, data->available_cores) {
974		freqs.cpu = i;
975		cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
976	}
977	return res;
978}
979
980struct powernowk8_target_arg {
981	struct cpufreq_policy		*pol;
982	unsigned			targfreq;
983	unsigned			relation;
984};
985
986static long powernowk8_target_fn(void *arg)
987{
988	struct powernowk8_target_arg *pta = arg;
989	struct cpufreq_policy *pol = pta->pol;
990	unsigned targfreq = pta->targfreq;
991	unsigned relation = pta->relation;
992	struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
993	u32 checkfid;
994	u32 checkvid;
995	unsigned int newstate;
996	int ret;
997
998	if (!data)
999		return -EINVAL;
1000
1001	checkfid = data->currfid;
1002	checkvid = data->currvid;
1003
1004	if (pending_bit_stuck()) {
1005		printk(KERN_ERR PFX "failing targ, change pending bit set\n");
1006		return -EIO;
1007	}
1008
1009	pr_debug("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
1010		pol->cpu, targfreq, pol->min, pol->max, relation);
1011
1012	if (query_current_values_with_pending_wait(data))
1013		return -EIO;
1014
1015	pr_debug("targ: curr fid 0x%x, vid 0x%x\n",
1016		 data->currfid, data->currvid);
1017
1018	if ((checkvid != data->currvid) ||
1019	    (checkfid != data->currfid)) {
1020		pr_info(PFX
1021		       "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
1022		       checkfid, data->currfid,
1023		       checkvid, data->currvid);
1024	}
1025
1026	if (cpufreq_frequency_table_target(pol, data->powernow_table,
1027				targfreq, relation, &newstate))
1028		return -EIO;
1029
1030	mutex_lock(&fidvid_mutex);
1031
1032	powernow_k8_acpi_pst_values(data, newstate);
1033
1034	ret = transition_frequency_fidvid(data, newstate);
1035
1036	if (ret) {
1037		printk(KERN_ERR PFX "transition frequency failed\n");
1038		mutex_unlock(&fidvid_mutex);
1039		return 1;
1040	}
1041	mutex_unlock(&fidvid_mutex);
1042
1043	pol->cur = find_khz_freq_from_fid(data->currfid);
1044
1045	return 0;
1046}
1047
1048/* Driver entry point to switch to the target frequency */
1049static int powernowk8_target(struct cpufreq_policy *pol,
1050		unsigned targfreq, unsigned relation)
1051{
1052	struct powernowk8_target_arg pta = { .pol = pol, .targfreq = targfreq,
1053					     .relation = relation };
1054
1055	return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta);
1056}
1057
1058/* Driver entry point to verify the policy and range of frequencies */
1059static int powernowk8_verify(struct cpufreq_policy *pol)
1060{
1061	struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1062
1063	if (!data)
1064		return -EINVAL;
1065
1066	return cpufreq_frequency_table_verify(pol, data->powernow_table);
1067}
1068
1069struct init_on_cpu {
1070	struct powernow_k8_data *data;
1071	int rc;
1072};
1073
1074static void __cpuinit powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
1075{
1076	struct init_on_cpu *init_on_cpu = _init_on_cpu;
1077
1078	if (pending_bit_stuck()) {
1079		printk(KERN_ERR PFX "failing init, change pending bit set\n");
1080		init_on_cpu->rc = -ENODEV;
1081		return;
1082	}
1083
1084	if (query_current_values_with_pending_wait(init_on_cpu->data)) {
1085		init_on_cpu->rc = -ENODEV;
1086		return;
1087	}
1088
1089	fidvid_msr_init();
1090
1091	init_on_cpu->rc = 0;
1092}
1093
1094static const char missing_pss_msg[] =
1095	KERN_ERR
1096	FW_BUG PFX "No compatible ACPI _PSS objects found.\n"
1097	FW_BUG PFX "First, make sure Cool'N'Quiet is enabled in the BIOS.\n"
1098	FW_BUG PFX "If that doesn't help, try upgrading your BIOS.\n";
1099
1100/* per CPU init entry point to the driver */
1101static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
1102{
1103	struct powernow_k8_data *data;
1104	struct init_on_cpu init_on_cpu;
1105	int rc;
1106
1107	if (!cpu_online(pol->cpu))
1108		return -ENODEV;
1109
1110	smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1);
1111	if (rc)
1112		return -ENODEV;
1113
1114	data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
1115	if (!data) {
1116		printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
1117		return -ENOMEM;
1118	}
1119
1120	data->cpu = pol->cpu;
1121
1122	if (powernow_k8_cpu_init_acpi(data)) {
1123		/*
1124		 * Use the PSB BIOS structure. This is only available on
1125		 * an UP version, and is deprecated by AMD.
1126		 */
1127		if (num_online_cpus() != 1) {
1128			printk_once(missing_pss_msg);
1129			goto err_out;
1130		}
1131		if (pol->cpu != 0) {
1132			printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
1133			       "CPU other than CPU0. Complain to your BIOS "
1134			       "vendor.\n");
1135			goto err_out;
1136		}
1137		rc = find_psb_table(data);
1138		if (rc)
1139			goto err_out;
1140
1141		/* Take a crude guess here.
1142		 * That guess was in microseconds, so multiply with 1000 */
1143		pol->cpuinfo.transition_latency = (
1144			 ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
1145			 ((1 << data->irt) * 30)) * 1000;
1146	} else /* ACPI _PSS objects available */
1147		pol->cpuinfo.transition_latency = get_transition_latency(data);
1148
1149	/* only run on specific CPU from here on */
1150	init_on_cpu.data = data;
1151	smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu,
1152				 &init_on_cpu, 1);
1153	rc = init_on_cpu.rc;
1154	if (rc != 0)
1155		goto err_out_exit_acpi;
1156
1157	cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu));
1158	data->available_cores = pol->cpus;
1159
1160	pol->cur = find_khz_freq_from_fid(data->currfid);
1161	pr_debug("policy current frequency %d kHz\n", pol->cur);
1162
1163	/* min/max the cpu is capable of */
1164	if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
1165		printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n");
1166		powernow_k8_cpu_exit_acpi(data);
1167		kfree(data->powernow_table);
1168		kfree(data);
1169		return -EINVAL;
1170	}
1171
1172	cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
1173
1174	pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n",
1175		 data->currfid, data->currvid);
1176
1177	per_cpu(powernow_data, pol->cpu) = data;
1178
1179	return 0;
1180
1181err_out_exit_acpi:
1182	powernow_k8_cpu_exit_acpi(data);
1183
1184err_out:
1185	kfree(data);
1186	return -ENODEV;
1187}
1188
1189static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol)
1190{
1191	struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1192
1193	if (!data)
1194		return -EINVAL;
1195
1196	powernow_k8_cpu_exit_acpi(data);
1197
1198	cpufreq_frequency_table_put_attr(pol->cpu);
1199
1200	kfree(data->powernow_table);
1201	kfree(data);
1202	per_cpu(powernow_data, pol->cpu) = NULL;
1203
1204	return 0;
1205}
1206
1207static void query_values_on_cpu(void *_err)
1208{
1209	int *err = _err;
1210	struct powernow_k8_data *data = __this_cpu_read(powernow_data);
1211
1212	*err = query_current_values_with_pending_wait(data);
1213}
1214
1215static unsigned int powernowk8_get(unsigned int cpu)
1216{
1217	struct powernow_k8_data *data = per_cpu(powernow_data, cpu);
1218	unsigned int khz = 0;
1219	int err;
1220
1221	if (!data)
1222		return 0;
1223
1224	smp_call_function_single(cpu, query_values_on_cpu, &err, true);
1225	if (err)
1226		goto out;
1227
1228	khz = find_khz_freq_from_fid(data->currfid);
1229
1230
1231out:
1232	return khz;
1233}
1234
1235static struct freq_attr *powernow_k8_attr[] = {
1236	&cpufreq_freq_attr_scaling_available_freqs,
1237	NULL,
1238};
1239
1240static struct cpufreq_driver cpufreq_amd64_driver = {
1241	.verify		= powernowk8_verify,
1242	.target		= powernowk8_target,
1243	.bios_limit	= acpi_processor_get_bios_limit,
1244	.init		= powernowk8_cpu_init,
1245	.exit		= __devexit_p(powernowk8_cpu_exit),
1246	.get		= powernowk8_get,
1247	.name		= "powernow-k8",
1248	.owner		= THIS_MODULE,
1249	.attr		= powernow_k8_attr,
1250};
1251
1252/* driver entry point for init */
1253static int __cpuinit powernowk8_init(void)
1254{
1255	unsigned int i, supported_cpus = 0;
1256	int rv;
1257
1258	if (static_cpu_has(X86_FEATURE_HW_PSTATE)) {
1259		pr_warn(PFX "this CPU is not supported anymore, using acpi-cpufreq instead.\n");
1260		request_module("acpi-cpufreq");
1261		return -ENODEV;
1262	}
1263
1264	if (!x86_match_cpu(powernow_k8_ids))
1265		return -ENODEV;
1266
1267	for_each_online_cpu(i) {
1268		int rc;
1269		smp_call_function_single(i, check_supported_cpu, &rc, 1);
1270		if (rc == 0)
1271			supported_cpus++;
1272	}
1273
1274	if (supported_cpus != num_online_cpus())
1275		return -ENODEV;
1276
1277	rv = cpufreq_register_driver(&cpufreq_amd64_driver);
1278
1279	if (!rv)
1280		pr_info(PFX "Found %d %s (%d cpu cores) (" VERSION ")\n",
1281			num_online_nodes(), boot_cpu_data.x86_model_id,
1282			supported_cpus);
1283
1284	return rv;
1285}
1286
1287/* driver entry point for term */
1288static void __exit powernowk8_exit(void)
1289{
1290	pr_debug("exit\n");
1291
1292	cpufreq_unregister_driver(&cpufreq_amd64_driver);
1293}
1294
1295MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and "
1296		"Mark Langsdorf <mark.langsdorf@amd.com>");
1297MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1298MODULE_LICENSE("GPL");
1299
1300late_initcall(powernowk8_init);
1301module_exit(powernowk8_exit);
1302