shdma-base.c revision 1ff8df4f5388ad66bd7d0199b5839a2e3345c055
1/* 2 * Dmaengine driver base library for DMA controllers, found on SH-based SoCs 3 * 4 * extracted from shdma.c 5 * 6 * Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de> 7 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 8 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved. 9 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. 10 * 11 * This is free software; you can redistribute it and/or modify 12 * it under the terms of version 2 of the GNU General Public License as 13 * published by the Free Software Foundation. 14 */ 15 16#include <linux/delay.h> 17#include <linux/shdma-base.h> 18#include <linux/dmaengine.h> 19#include <linux/init.h> 20#include <linux/interrupt.h> 21#include <linux/module.h> 22#include <linux/pm_runtime.h> 23#include <linux/slab.h> 24#include <linux/spinlock.h> 25 26#include "../dmaengine.h" 27 28/* DMA descriptor control */ 29enum shdma_desc_status { 30 DESC_IDLE, 31 DESC_PREPARED, 32 DESC_SUBMITTED, 33 DESC_COMPLETED, /* completed, have to call callback */ 34 DESC_WAITING, /* callback called, waiting for ack / re-submit */ 35}; 36 37#define NR_DESCS_PER_CHANNEL 32 38 39#define to_shdma_chan(c) container_of(c, struct shdma_chan, dma_chan) 40#define to_shdma_dev(d) container_of(d, struct shdma_dev, dma_dev) 41 42/* 43 * For slave DMA we assume, that there is a finite number of DMA slaves in the 44 * system, and that each such slave can only use a finite number of channels. 45 * We use slave channel IDs to make sure, that no such slave channel ID is 46 * allocated more than once. 47 */ 48static unsigned int slave_num = 256; 49module_param(slave_num, uint, 0444); 50 51/* A bitmask with slave_num bits */ 52static unsigned long *shdma_slave_used; 53 54/* Called under spin_lock_irq(&schan->chan_lock") */ 55static void shdma_chan_xfer_ld_queue(struct shdma_chan *schan) 56{ 57 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device); 58 const struct shdma_ops *ops = sdev->ops; 59 struct shdma_desc *sdesc; 60 61 /* DMA work check */ 62 if (ops->channel_busy(schan)) 63 return; 64 65 /* Find the first not transferred descriptor */ 66 list_for_each_entry(sdesc, &schan->ld_queue, node) 67 if (sdesc->mark == DESC_SUBMITTED) { 68 ops->start_xfer(schan, sdesc); 69 break; 70 } 71} 72 73static dma_cookie_t shdma_tx_submit(struct dma_async_tx_descriptor *tx) 74{ 75 struct shdma_desc *chunk, *c, *desc = 76 container_of(tx, struct shdma_desc, async_tx), 77 *last = desc; 78 struct shdma_chan *schan = to_shdma_chan(tx->chan); 79 dma_async_tx_callback callback = tx->callback; 80 dma_cookie_t cookie; 81 bool power_up; 82 83 spin_lock_irq(&schan->chan_lock); 84 85 power_up = list_empty(&schan->ld_queue); 86 87 cookie = dma_cookie_assign(tx); 88 89 /* Mark all chunks of this descriptor as submitted, move to the queue */ 90 list_for_each_entry_safe(chunk, c, desc->node.prev, node) { 91 /* 92 * All chunks are on the global ld_free, so, we have to find 93 * the end of the chain ourselves 94 */ 95 if (chunk != desc && (chunk->mark == DESC_IDLE || 96 chunk->async_tx.cookie > 0 || 97 chunk->async_tx.cookie == -EBUSY || 98 &chunk->node == &schan->ld_free)) 99 break; 100 chunk->mark = DESC_SUBMITTED; 101 /* Callback goes to the last chunk */ 102 chunk->async_tx.callback = NULL; 103 chunk->cookie = cookie; 104 list_move_tail(&chunk->node, &schan->ld_queue); 105 last = chunk; 106 107 dev_dbg(schan->dev, "submit #%d@%p on %d\n", 108 tx->cookie, &last->async_tx, schan->id); 109 } 110 111 last->async_tx.callback = callback; 112 last->async_tx.callback_param = tx->callback_param; 113 114 if (power_up) { 115 int ret; 116 schan->pm_state = SHDMA_PM_BUSY; 117 118 ret = pm_runtime_get(schan->dev); 119 120 spin_unlock_irq(&schan->chan_lock); 121 if (ret < 0) 122 dev_err(schan->dev, "%s(): GET = %d\n", __func__, ret); 123 124 pm_runtime_barrier(schan->dev); 125 126 spin_lock_irq(&schan->chan_lock); 127 128 /* Have we been reset, while waiting? */ 129 if (schan->pm_state != SHDMA_PM_ESTABLISHED) { 130 struct shdma_dev *sdev = 131 to_shdma_dev(schan->dma_chan.device); 132 const struct shdma_ops *ops = sdev->ops; 133 dev_dbg(schan->dev, "Bring up channel %d\n", 134 schan->id); 135 /* 136 * TODO: .xfer_setup() might fail on some platforms. 137 * Make it int then, on error remove chunks from the 138 * queue again 139 */ 140 ops->setup_xfer(schan, schan->slave_id); 141 142 if (schan->pm_state == SHDMA_PM_PENDING) 143 shdma_chan_xfer_ld_queue(schan); 144 schan->pm_state = SHDMA_PM_ESTABLISHED; 145 } 146 } else { 147 /* 148 * Tell .device_issue_pending() not to run the queue, interrupts 149 * will do it anyway 150 */ 151 schan->pm_state = SHDMA_PM_PENDING; 152 } 153 154 spin_unlock_irq(&schan->chan_lock); 155 156 return cookie; 157} 158 159/* Called with desc_lock held */ 160static struct shdma_desc *shdma_get_desc(struct shdma_chan *schan) 161{ 162 struct shdma_desc *sdesc; 163 164 list_for_each_entry(sdesc, &schan->ld_free, node) 165 if (sdesc->mark != DESC_PREPARED) { 166 BUG_ON(sdesc->mark != DESC_IDLE); 167 list_del(&sdesc->node); 168 return sdesc; 169 } 170 171 return NULL; 172} 173 174static int shdma_setup_slave(struct shdma_chan *schan, int slave_id) 175{ 176 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device); 177 const struct shdma_ops *ops = sdev->ops; 178 int ret; 179 180 if (slave_id < 0 || slave_id >= slave_num) 181 return -EINVAL; 182 183 if (test_and_set_bit(slave_id, shdma_slave_used)) 184 return -EBUSY; 185 186 ret = ops->set_slave(schan, slave_id, false); 187 if (ret < 0) { 188 clear_bit(slave_id, shdma_slave_used); 189 return ret; 190 } 191 192 schan->slave_id = slave_id; 193 194 return 0; 195} 196 197/* 198 * This is the standard shdma filter function to be used as a replacement to the 199 * "old" method, using the .private pointer. If for some reason you allocate a 200 * channel without slave data, use something like ERR_PTR(-EINVAL) as a filter 201 * parameter. If this filter is used, the slave driver, after calling 202 * dma_request_channel(), will also have to call dmaengine_slave_config() with 203 * .slave_id, .direction, and either .src_addr or .dst_addr set. 204 * NOTE: this filter doesn't support multiple DMAC drivers with the DMA_SLAVE 205 * capability! If this becomes a requirement, hardware glue drivers, using this 206 * services would have to provide their own filters, which first would check 207 * the device driver, similar to how other DMAC drivers, e.g., sa11x0-dma.c, do 208 * this, and only then, in case of a match, call this common filter. 209 */ 210bool shdma_chan_filter(struct dma_chan *chan, void *arg) 211{ 212 struct shdma_chan *schan = to_shdma_chan(chan); 213 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device); 214 const struct shdma_ops *ops = sdev->ops; 215 int slave_id = (int)arg; 216 int ret; 217 218 if (slave_id < 0) 219 /* No slave requested - arbitrary channel */ 220 return true; 221 222 if (slave_id >= slave_num) 223 return false; 224 225 ret = ops->set_slave(schan, slave_id, true); 226 if (ret < 0) 227 return false; 228 229 return true; 230} 231EXPORT_SYMBOL(shdma_chan_filter); 232 233static int shdma_alloc_chan_resources(struct dma_chan *chan) 234{ 235 struct shdma_chan *schan = to_shdma_chan(chan); 236 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device); 237 const struct shdma_ops *ops = sdev->ops; 238 struct shdma_desc *desc; 239 struct shdma_slave *slave = chan->private; 240 int ret, i; 241 242 /* 243 * This relies on the guarantee from dmaengine that alloc_chan_resources 244 * never runs concurrently with itself or free_chan_resources. 245 */ 246 if (slave) { 247 /* Legacy mode: .private is set in filter */ 248 ret = shdma_setup_slave(schan, slave->slave_id); 249 if (ret < 0) 250 goto esetslave; 251 } else { 252 schan->slave_id = -EINVAL; 253 } 254 255 schan->desc = kcalloc(NR_DESCS_PER_CHANNEL, 256 sdev->desc_size, GFP_KERNEL); 257 if (!schan->desc) { 258 ret = -ENOMEM; 259 goto edescalloc; 260 } 261 schan->desc_num = NR_DESCS_PER_CHANNEL; 262 263 for (i = 0; i < NR_DESCS_PER_CHANNEL; i++) { 264 desc = ops->embedded_desc(schan->desc, i); 265 dma_async_tx_descriptor_init(&desc->async_tx, 266 &schan->dma_chan); 267 desc->async_tx.tx_submit = shdma_tx_submit; 268 desc->mark = DESC_IDLE; 269 270 list_add(&desc->node, &schan->ld_free); 271 } 272 273 return NR_DESCS_PER_CHANNEL; 274 275edescalloc: 276 if (slave) 277esetslave: 278 clear_bit(slave->slave_id, shdma_slave_used); 279 chan->private = NULL; 280 return ret; 281} 282 283static dma_async_tx_callback __ld_cleanup(struct shdma_chan *schan, bool all) 284{ 285 struct shdma_desc *desc, *_desc; 286 /* Is the "exposed" head of a chain acked? */ 287 bool head_acked = false; 288 dma_cookie_t cookie = 0; 289 dma_async_tx_callback callback = NULL; 290 void *param = NULL; 291 unsigned long flags; 292 293 spin_lock_irqsave(&schan->chan_lock, flags); 294 list_for_each_entry_safe(desc, _desc, &schan->ld_queue, node) { 295 struct dma_async_tx_descriptor *tx = &desc->async_tx; 296 297 BUG_ON(tx->cookie > 0 && tx->cookie != desc->cookie); 298 BUG_ON(desc->mark != DESC_SUBMITTED && 299 desc->mark != DESC_COMPLETED && 300 desc->mark != DESC_WAITING); 301 302 /* 303 * queue is ordered, and we use this loop to (1) clean up all 304 * completed descriptors, and to (2) update descriptor flags of 305 * any chunks in a (partially) completed chain 306 */ 307 if (!all && desc->mark == DESC_SUBMITTED && 308 desc->cookie != cookie) 309 break; 310 311 if (tx->cookie > 0) 312 cookie = tx->cookie; 313 314 if (desc->mark == DESC_COMPLETED && desc->chunks == 1) { 315 if (schan->dma_chan.completed_cookie != desc->cookie - 1) 316 dev_dbg(schan->dev, 317 "Completing cookie %d, expected %d\n", 318 desc->cookie, 319 schan->dma_chan.completed_cookie + 1); 320 schan->dma_chan.completed_cookie = desc->cookie; 321 } 322 323 /* Call callback on the last chunk */ 324 if (desc->mark == DESC_COMPLETED && tx->callback) { 325 desc->mark = DESC_WAITING; 326 callback = tx->callback; 327 param = tx->callback_param; 328 dev_dbg(schan->dev, "descriptor #%d@%p on %d callback\n", 329 tx->cookie, tx, schan->id); 330 BUG_ON(desc->chunks != 1); 331 break; 332 } 333 334 if (tx->cookie > 0 || tx->cookie == -EBUSY) { 335 if (desc->mark == DESC_COMPLETED) { 336 BUG_ON(tx->cookie < 0); 337 desc->mark = DESC_WAITING; 338 } 339 head_acked = async_tx_test_ack(tx); 340 } else { 341 switch (desc->mark) { 342 case DESC_COMPLETED: 343 desc->mark = DESC_WAITING; 344 /* Fall through */ 345 case DESC_WAITING: 346 if (head_acked) 347 async_tx_ack(&desc->async_tx); 348 } 349 } 350 351 dev_dbg(schan->dev, "descriptor %p #%d completed.\n", 352 tx, tx->cookie); 353 354 if (((desc->mark == DESC_COMPLETED || 355 desc->mark == DESC_WAITING) && 356 async_tx_test_ack(&desc->async_tx)) || all) { 357 /* Remove from ld_queue list */ 358 desc->mark = DESC_IDLE; 359 360 list_move(&desc->node, &schan->ld_free); 361 362 if (list_empty(&schan->ld_queue)) { 363 dev_dbg(schan->dev, "Bring down channel %d\n", schan->id); 364 pm_runtime_put(schan->dev); 365 schan->pm_state = SHDMA_PM_ESTABLISHED; 366 } 367 } 368 } 369 370 if (all && !callback) 371 /* 372 * Terminating and the loop completed normally: forgive 373 * uncompleted cookies 374 */ 375 schan->dma_chan.completed_cookie = schan->dma_chan.cookie; 376 377 spin_unlock_irqrestore(&schan->chan_lock, flags); 378 379 if (callback) 380 callback(param); 381 382 return callback; 383} 384 385/* 386 * shdma_chan_ld_cleanup - Clean up link descriptors 387 * 388 * Clean up the ld_queue of DMA channel. 389 */ 390static void shdma_chan_ld_cleanup(struct shdma_chan *schan, bool all) 391{ 392 while (__ld_cleanup(schan, all)) 393 ; 394} 395 396/* 397 * shdma_free_chan_resources - Free all resources of the channel. 398 */ 399static void shdma_free_chan_resources(struct dma_chan *chan) 400{ 401 struct shdma_chan *schan = to_shdma_chan(chan); 402 struct shdma_dev *sdev = to_shdma_dev(chan->device); 403 const struct shdma_ops *ops = sdev->ops; 404 LIST_HEAD(list); 405 406 /* Protect against ISR */ 407 spin_lock_irq(&schan->chan_lock); 408 ops->halt_channel(schan); 409 spin_unlock_irq(&schan->chan_lock); 410 411 /* Now no new interrupts will occur */ 412 413 /* Prepared and not submitted descriptors can still be on the queue */ 414 if (!list_empty(&schan->ld_queue)) 415 shdma_chan_ld_cleanup(schan, true); 416 417 if (schan->slave_id >= 0) { 418 /* The caller is holding dma_list_mutex */ 419 clear_bit(schan->slave_id, shdma_slave_used); 420 chan->private = NULL; 421 } 422 423 spin_lock_irq(&schan->chan_lock); 424 425 list_splice_init(&schan->ld_free, &list); 426 schan->desc_num = 0; 427 428 spin_unlock_irq(&schan->chan_lock); 429 430 kfree(schan->desc); 431} 432 433/** 434 * shdma_add_desc - get, set up and return one transfer descriptor 435 * @schan: DMA channel 436 * @flags: DMA transfer flags 437 * @dst: destination DMA address, incremented when direction equals 438 * DMA_DEV_TO_MEM or DMA_MEM_TO_MEM 439 * @src: source DMA address, incremented when direction equals 440 * DMA_MEM_TO_DEV or DMA_MEM_TO_MEM 441 * @len: DMA transfer length 442 * @first: if NULL, set to the current descriptor and cookie set to -EBUSY 443 * @direction: needed for slave DMA to decide which address to keep constant, 444 * equals DMA_MEM_TO_MEM for MEMCPY 445 * Returns 0 or an error 446 * Locks: called with desc_lock held 447 */ 448static struct shdma_desc *shdma_add_desc(struct shdma_chan *schan, 449 unsigned long flags, dma_addr_t *dst, dma_addr_t *src, size_t *len, 450 struct shdma_desc **first, enum dma_transfer_direction direction) 451{ 452 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device); 453 const struct shdma_ops *ops = sdev->ops; 454 struct shdma_desc *new; 455 size_t copy_size = *len; 456 457 if (!copy_size) 458 return NULL; 459 460 /* Allocate the link descriptor from the free list */ 461 new = shdma_get_desc(schan); 462 if (!new) { 463 dev_err(schan->dev, "No free link descriptor available\n"); 464 return NULL; 465 } 466 467 ops->desc_setup(schan, new, *src, *dst, ©_size); 468 469 if (!*first) { 470 /* First desc */ 471 new->async_tx.cookie = -EBUSY; 472 *first = new; 473 } else { 474 /* Other desc - invisible to the user */ 475 new->async_tx.cookie = -EINVAL; 476 } 477 478 dev_dbg(schan->dev, 479 "chaining (%u/%u)@%x -> %x with %p, cookie %d\n", 480 copy_size, *len, *src, *dst, &new->async_tx, 481 new->async_tx.cookie); 482 483 new->mark = DESC_PREPARED; 484 new->async_tx.flags = flags; 485 new->direction = direction; 486 487 *len -= copy_size; 488 if (direction == DMA_MEM_TO_MEM || direction == DMA_MEM_TO_DEV) 489 *src += copy_size; 490 if (direction == DMA_MEM_TO_MEM || direction == DMA_DEV_TO_MEM) 491 *dst += copy_size; 492 493 return new; 494} 495 496/* 497 * shdma_prep_sg - prepare transfer descriptors from an SG list 498 * 499 * Common routine for public (MEMCPY) and slave DMA. The MEMCPY case is also 500 * converted to scatter-gather to guarantee consistent locking and a correct 501 * list manipulation. For slave DMA direction carries the usual meaning, and, 502 * logically, the SG list is RAM and the addr variable contains slave address, 503 * e.g., the FIFO I/O register. For MEMCPY direction equals DMA_MEM_TO_MEM 504 * and the SG list contains only one element and points at the source buffer. 505 */ 506static struct dma_async_tx_descriptor *shdma_prep_sg(struct shdma_chan *schan, 507 struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr, 508 enum dma_transfer_direction direction, unsigned long flags) 509{ 510 struct scatterlist *sg; 511 struct shdma_desc *first = NULL, *new = NULL /* compiler... */; 512 LIST_HEAD(tx_list); 513 int chunks = 0; 514 unsigned long irq_flags; 515 int i; 516 517 for_each_sg(sgl, sg, sg_len, i) 518 chunks += DIV_ROUND_UP(sg_dma_len(sg), schan->max_xfer_len); 519 520 /* Have to lock the whole loop to protect against concurrent release */ 521 spin_lock_irqsave(&schan->chan_lock, irq_flags); 522 523 /* 524 * Chaining: 525 * first descriptor is what user is dealing with in all API calls, its 526 * cookie is at first set to -EBUSY, at tx-submit to a positive 527 * number 528 * if more than one chunk is needed further chunks have cookie = -EINVAL 529 * the last chunk, if not equal to the first, has cookie = -ENOSPC 530 * all chunks are linked onto the tx_list head with their .node heads 531 * only during this function, then they are immediately spliced 532 * back onto the free list in form of a chain 533 */ 534 for_each_sg(sgl, sg, sg_len, i) { 535 dma_addr_t sg_addr = sg_dma_address(sg); 536 size_t len = sg_dma_len(sg); 537 538 if (!len) 539 goto err_get_desc; 540 541 do { 542 dev_dbg(schan->dev, "Add SG #%d@%p[%d], dma %llx\n", 543 i, sg, len, (unsigned long long)sg_addr); 544 545 if (direction == DMA_DEV_TO_MEM) 546 new = shdma_add_desc(schan, flags, 547 &sg_addr, addr, &len, &first, 548 direction); 549 else 550 new = shdma_add_desc(schan, flags, 551 addr, &sg_addr, &len, &first, 552 direction); 553 if (!new) 554 goto err_get_desc; 555 556 new->chunks = chunks--; 557 list_add_tail(&new->node, &tx_list); 558 } while (len); 559 } 560 561 if (new != first) 562 new->async_tx.cookie = -ENOSPC; 563 564 /* Put them back on the free list, so, they don't get lost */ 565 list_splice_tail(&tx_list, &schan->ld_free); 566 567 spin_unlock_irqrestore(&schan->chan_lock, irq_flags); 568 569 return &first->async_tx; 570 571err_get_desc: 572 list_for_each_entry(new, &tx_list, node) 573 new->mark = DESC_IDLE; 574 list_splice(&tx_list, &schan->ld_free); 575 576 spin_unlock_irqrestore(&schan->chan_lock, irq_flags); 577 578 return NULL; 579} 580 581static struct dma_async_tx_descriptor *shdma_prep_memcpy( 582 struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src, 583 size_t len, unsigned long flags) 584{ 585 struct shdma_chan *schan = to_shdma_chan(chan); 586 struct scatterlist sg; 587 588 if (!chan || !len) 589 return NULL; 590 591 BUG_ON(!schan->desc_num); 592 593 sg_init_table(&sg, 1); 594 sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_src)), len, 595 offset_in_page(dma_src)); 596 sg_dma_address(&sg) = dma_src; 597 sg_dma_len(&sg) = len; 598 599 return shdma_prep_sg(schan, &sg, 1, &dma_dest, DMA_MEM_TO_MEM, flags); 600} 601 602static struct dma_async_tx_descriptor *shdma_prep_slave_sg( 603 struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, 604 enum dma_transfer_direction direction, unsigned long flags, void *context) 605{ 606 struct shdma_chan *schan = to_shdma_chan(chan); 607 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device); 608 const struct shdma_ops *ops = sdev->ops; 609 int slave_id = schan->slave_id; 610 dma_addr_t slave_addr; 611 612 if (!chan) 613 return NULL; 614 615 BUG_ON(!schan->desc_num); 616 617 /* Someone calling slave DMA on a generic channel? */ 618 if (slave_id < 0 || !sg_len) { 619 dev_warn(schan->dev, "%s: bad parameter: len=%d, id=%d\n", 620 __func__, sg_len, slave_id); 621 return NULL; 622 } 623 624 slave_addr = ops->slave_addr(schan); 625 626 return shdma_prep_sg(schan, sgl, sg_len, &slave_addr, 627 direction, flags); 628} 629 630static int shdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, 631 unsigned long arg) 632{ 633 struct shdma_chan *schan = to_shdma_chan(chan); 634 struct shdma_dev *sdev = to_shdma_dev(chan->device); 635 const struct shdma_ops *ops = sdev->ops; 636 struct dma_slave_config *config; 637 unsigned long flags; 638 int ret; 639 640 if (!chan) 641 return -EINVAL; 642 643 switch (cmd) { 644 case DMA_TERMINATE_ALL: 645 spin_lock_irqsave(&schan->chan_lock, flags); 646 ops->halt_channel(schan); 647 spin_unlock_irqrestore(&schan->chan_lock, flags); 648 649 shdma_chan_ld_cleanup(schan, true); 650 break; 651 case DMA_SLAVE_CONFIG: 652 /* 653 * So far only .slave_id is used, but the slave drivers are 654 * encouraged to also set a transfer direction and an address. 655 */ 656 if (!arg) 657 return -EINVAL; 658 /* 659 * We could lock this, but you shouldn't be configuring the 660 * channel, while using it... 661 */ 662 config = (struct dma_slave_config *)arg; 663 ret = shdma_setup_slave(schan, config->slave_id); 664 if (ret < 0) 665 return ret; 666 break; 667 default: 668 return -ENXIO; 669 } 670 671 return 0; 672} 673 674static void shdma_issue_pending(struct dma_chan *chan) 675{ 676 struct shdma_chan *schan = to_shdma_chan(chan); 677 678 spin_lock_irq(&schan->chan_lock); 679 if (schan->pm_state == SHDMA_PM_ESTABLISHED) 680 shdma_chan_xfer_ld_queue(schan); 681 else 682 schan->pm_state = SHDMA_PM_PENDING; 683 spin_unlock_irq(&schan->chan_lock); 684} 685 686static enum dma_status shdma_tx_status(struct dma_chan *chan, 687 dma_cookie_t cookie, 688 struct dma_tx_state *txstate) 689{ 690 struct shdma_chan *schan = to_shdma_chan(chan); 691 enum dma_status status; 692 unsigned long flags; 693 694 shdma_chan_ld_cleanup(schan, false); 695 696 spin_lock_irqsave(&schan->chan_lock, flags); 697 698 status = dma_cookie_status(chan, cookie, txstate); 699 700 /* 701 * If we don't find cookie on the queue, it has been aborted and we have 702 * to report error 703 */ 704 if (status != DMA_SUCCESS) { 705 struct shdma_desc *sdesc; 706 status = DMA_ERROR; 707 list_for_each_entry(sdesc, &schan->ld_queue, node) 708 if (sdesc->cookie == cookie) { 709 status = DMA_IN_PROGRESS; 710 break; 711 } 712 } 713 714 spin_unlock_irqrestore(&schan->chan_lock, flags); 715 716 return status; 717} 718 719/* Called from error IRQ or NMI */ 720bool shdma_reset(struct shdma_dev *sdev) 721{ 722 const struct shdma_ops *ops = sdev->ops; 723 struct shdma_chan *schan; 724 unsigned int handled = 0; 725 int i; 726 727 /* Reset all channels */ 728 shdma_for_each_chan(schan, sdev, i) { 729 struct shdma_desc *sdesc; 730 LIST_HEAD(dl); 731 732 if (!schan) 733 continue; 734 735 spin_lock(&schan->chan_lock); 736 737 /* Stop the channel */ 738 ops->halt_channel(schan); 739 740 list_splice_init(&schan->ld_queue, &dl); 741 742 if (!list_empty(&dl)) { 743 dev_dbg(schan->dev, "Bring down channel %d\n", schan->id); 744 pm_runtime_put(schan->dev); 745 } 746 schan->pm_state = SHDMA_PM_ESTABLISHED; 747 748 spin_unlock(&schan->chan_lock); 749 750 /* Complete all */ 751 list_for_each_entry(sdesc, &dl, node) { 752 struct dma_async_tx_descriptor *tx = &sdesc->async_tx; 753 sdesc->mark = DESC_IDLE; 754 if (tx->callback) 755 tx->callback(tx->callback_param); 756 } 757 758 spin_lock(&schan->chan_lock); 759 list_splice(&dl, &schan->ld_free); 760 spin_unlock(&schan->chan_lock); 761 762 handled++; 763 } 764 765 return !!handled; 766} 767EXPORT_SYMBOL(shdma_reset); 768 769static irqreturn_t chan_irq(int irq, void *dev) 770{ 771 struct shdma_chan *schan = dev; 772 const struct shdma_ops *ops = 773 to_shdma_dev(schan->dma_chan.device)->ops; 774 irqreturn_t ret; 775 776 spin_lock(&schan->chan_lock); 777 778 ret = ops->chan_irq(schan, irq) ? IRQ_WAKE_THREAD : IRQ_NONE; 779 780 spin_unlock(&schan->chan_lock); 781 782 return ret; 783} 784 785static irqreturn_t chan_irqt(int irq, void *dev) 786{ 787 struct shdma_chan *schan = dev; 788 const struct shdma_ops *ops = 789 to_shdma_dev(schan->dma_chan.device)->ops; 790 struct shdma_desc *sdesc; 791 792 spin_lock_irq(&schan->chan_lock); 793 list_for_each_entry(sdesc, &schan->ld_queue, node) { 794 if (sdesc->mark == DESC_SUBMITTED && 795 ops->desc_completed(schan, sdesc)) { 796 dev_dbg(schan->dev, "done #%d@%p\n", 797 sdesc->async_tx.cookie, &sdesc->async_tx); 798 sdesc->mark = DESC_COMPLETED; 799 break; 800 } 801 } 802 /* Next desc */ 803 shdma_chan_xfer_ld_queue(schan); 804 spin_unlock_irq(&schan->chan_lock); 805 806 shdma_chan_ld_cleanup(schan, false); 807 808 return IRQ_HANDLED; 809} 810 811int shdma_request_irq(struct shdma_chan *schan, int irq, 812 unsigned long flags, const char *name) 813{ 814 int ret = request_threaded_irq(irq, chan_irq, chan_irqt, 815 flags, name, schan); 816 817 schan->irq = ret < 0 ? ret : irq; 818 819 return ret; 820} 821EXPORT_SYMBOL(shdma_request_irq); 822 823void shdma_free_irq(struct shdma_chan *schan) 824{ 825 if (schan->irq >= 0) 826 free_irq(schan->irq, schan); 827} 828EXPORT_SYMBOL(shdma_free_irq); 829 830void shdma_chan_probe(struct shdma_dev *sdev, 831 struct shdma_chan *schan, int id) 832{ 833 schan->pm_state = SHDMA_PM_ESTABLISHED; 834 835 /* reference struct dma_device */ 836 schan->dma_chan.device = &sdev->dma_dev; 837 dma_cookie_init(&schan->dma_chan); 838 839 schan->dev = sdev->dma_dev.dev; 840 schan->id = id; 841 842 if (!schan->max_xfer_len) 843 schan->max_xfer_len = PAGE_SIZE; 844 845 spin_lock_init(&schan->chan_lock); 846 847 /* Init descripter manage list */ 848 INIT_LIST_HEAD(&schan->ld_queue); 849 INIT_LIST_HEAD(&schan->ld_free); 850 851 /* Add the channel to DMA device channel list */ 852 list_add_tail(&schan->dma_chan.device_node, 853 &sdev->dma_dev.channels); 854 sdev->schan[sdev->dma_dev.chancnt++] = schan; 855} 856EXPORT_SYMBOL(shdma_chan_probe); 857 858void shdma_chan_remove(struct shdma_chan *schan) 859{ 860 list_del(&schan->dma_chan.device_node); 861} 862EXPORT_SYMBOL(shdma_chan_remove); 863 864int shdma_init(struct device *dev, struct shdma_dev *sdev, 865 int chan_num) 866{ 867 struct dma_device *dma_dev = &sdev->dma_dev; 868 869 /* 870 * Require all call-backs for now, they can trivially be made optional 871 * later as required 872 */ 873 if (!sdev->ops || 874 !sdev->desc_size || 875 !sdev->ops->embedded_desc || 876 !sdev->ops->start_xfer || 877 !sdev->ops->setup_xfer || 878 !sdev->ops->set_slave || 879 !sdev->ops->desc_setup || 880 !sdev->ops->slave_addr || 881 !sdev->ops->channel_busy || 882 !sdev->ops->halt_channel || 883 !sdev->ops->desc_completed) 884 return -EINVAL; 885 886 sdev->schan = kcalloc(chan_num, sizeof(*sdev->schan), GFP_KERNEL); 887 if (!sdev->schan) 888 return -ENOMEM; 889 890 INIT_LIST_HEAD(&dma_dev->channels); 891 892 /* Common and MEMCPY operations */ 893 dma_dev->device_alloc_chan_resources 894 = shdma_alloc_chan_resources; 895 dma_dev->device_free_chan_resources = shdma_free_chan_resources; 896 dma_dev->device_prep_dma_memcpy = shdma_prep_memcpy; 897 dma_dev->device_tx_status = shdma_tx_status; 898 dma_dev->device_issue_pending = shdma_issue_pending; 899 900 /* Compulsory for DMA_SLAVE fields */ 901 dma_dev->device_prep_slave_sg = shdma_prep_slave_sg; 902 dma_dev->device_control = shdma_control; 903 904 dma_dev->dev = dev; 905 906 return 0; 907} 908EXPORT_SYMBOL(shdma_init); 909 910void shdma_cleanup(struct shdma_dev *sdev) 911{ 912 kfree(sdev->schan); 913} 914EXPORT_SYMBOL(shdma_cleanup); 915 916static int __init shdma_enter(void) 917{ 918 shdma_slave_used = kzalloc(DIV_ROUND_UP(slave_num, BITS_PER_LONG) * 919 sizeof(long), GFP_KERNEL); 920 if (!shdma_slave_used) 921 return -ENOMEM; 922 return 0; 923} 924module_init(shdma_enter); 925 926static void __exit shdma_exit(void) 927{ 928 kfree(shdma_slave_used); 929} 930module_exit(shdma_exit); 931 932MODULE_LICENSE("GPL v2"); 933MODULE_DESCRIPTION("SH-DMA driver base library"); 934MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>"); 935