1/* 2 * PCA953x 4/8/16/24/40 bit I/O ports 3 * 4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> 5 * Copyright (C) 2007 Marvell International Ltd. 6 * 7 * Derived from drivers/i2c/chips/pca9539.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; version 2 of the License. 12 */ 13 14#include <linux/module.h> 15#include <linux/init.h> 16#include <linux/gpio.h> 17#include <linux/interrupt.h> 18#include <linux/i2c.h> 19#include <linux/platform_data/pca953x.h> 20#include <linux/slab.h> 21#ifdef CONFIG_OF_GPIO 22#include <linux/of_platform.h> 23#endif 24 25#define PCA953X_INPUT 0 26#define PCA953X_OUTPUT 1 27#define PCA953X_INVERT 2 28#define PCA953X_DIRECTION 3 29 30#define REG_ADDR_AI 0x80 31 32#define PCA957X_IN 0 33#define PCA957X_INVRT 1 34#define PCA957X_BKEN 2 35#define PCA957X_PUPD 3 36#define PCA957X_CFG 4 37#define PCA957X_OUT 5 38#define PCA957X_MSK 6 39#define PCA957X_INTS 7 40 41#define PCA_GPIO_MASK 0x00FF 42#define PCA_INT 0x0100 43#define PCA953X_TYPE 0x1000 44#define PCA957X_TYPE 0x2000 45 46static const struct i2c_device_id pca953x_id[] = { 47 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, 48 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 49 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 50 { "pca9536", 4 | PCA953X_TYPE, }, 51 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, 52 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, 53 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, 54 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, 55 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, 56 { "pca9556", 8 | PCA953X_TYPE, }, 57 { "pca9557", 8 | PCA953X_TYPE, }, 58 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, 59 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, 60 { "pca9698", 40 | PCA953X_TYPE, }, 61 62 { "max7310", 8 | PCA953X_TYPE, }, 63 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 64 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 65 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 66 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 67 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 68 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 69 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, 70 { "xra1202", 8 | PCA953X_TYPE }, 71 { } 72}; 73MODULE_DEVICE_TABLE(i2c, pca953x_id); 74 75#define MAX_BANK 5 76#define BANK_SZ 8 77 78#define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ) 79 80struct pca953x_chip { 81 unsigned gpio_start; 82 u8 reg_output[MAX_BANK]; 83 u8 reg_direction[MAX_BANK]; 84 struct mutex i2c_lock; 85 86#ifdef CONFIG_GPIO_PCA953X_IRQ 87 struct mutex irq_lock; 88 u8 irq_mask[MAX_BANK]; 89 u8 irq_stat[MAX_BANK]; 90 u8 irq_trig_raise[MAX_BANK]; 91 u8 irq_trig_fall[MAX_BANK]; 92#endif 93 94 struct i2c_client *client; 95 struct gpio_chip gpio_chip; 96 const char *const *names; 97 int chip_type; 98}; 99 100static inline struct pca953x_chip *to_pca(struct gpio_chip *gc) 101{ 102 return container_of(gc, struct pca953x_chip, gpio_chip); 103} 104 105static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, 106 int off) 107{ 108 int ret; 109 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 110 int offset = off / BANK_SZ; 111 112 ret = i2c_smbus_read_byte_data(chip->client, 113 (reg << bank_shift) + offset); 114 *val = ret; 115 116 if (ret < 0) { 117 dev_err(&chip->client->dev, "failed reading register\n"); 118 return ret; 119 } 120 121 return 0; 122} 123 124static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, 125 int off) 126{ 127 int ret = 0; 128 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 129 int offset = off / BANK_SZ; 130 131 ret = i2c_smbus_write_byte_data(chip->client, 132 (reg << bank_shift) + offset, val); 133 134 if (ret < 0) { 135 dev_err(&chip->client->dev, "failed writing register\n"); 136 return ret; 137 } 138 139 return 0; 140} 141 142static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) 143{ 144 int ret = 0; 145 146 if (chip->gpio_chip.ngpio <= 8) 147 ret = i2c_smbus_write_byte_data(chip->client, reg, *val); 148 else if (chip->gpio_chip.ngpio >= 24) { 149 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 150 ret = i2c_smbus_write_i2c_block_data(chip->client, 151 (reg << bank_shift) | REG_ADDR_AI, 152 NBANK(chip), val); 153 } else { 154 switch (chip->chip_type) { 155 case PCA953X_TYPE: 156 ret = i2c_smbus_write_word_data(chip->client, 157 reg << 1, (u16) *val); 158 break; 159 case PCA957X_TYPE: 160 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, 161 val[0]); 162 if (ret < 0) 163 break; 164 ret = i2c_smbus_write_byte_data(chip->client, 165 (reg << 1) + 1, 166 val[1]); 167 break; 168 } 169 } 170 171 if (ret < 0) { 172 dev_err(&chip->client->dev, "failed writing register\n"); 173 return ret; 174 } 175 176 return 0; 177} 178 179static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) 180{ 181 int ret; 182 183 if (chip->gpio_chip.ngpio <= 8) { 184 ret = i2c_smbus_read_byte_data(chip->client, reg); 185 *val = ret; 186 } else if (chip->gpio_chip.ngpio >= 24) { 187 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 188 189 ret = i2c_smbus_read_i2c_block_data(chip->client, 190 (reg << bank_shift) | REG_ADDR_AI, 191 NBANK(chip), val); 192 } else { 193 ret = i2c_smbus_read_word_data(chip->client, reg << 1); 194 val[0] = (u16)ret & 0xFF; 195 val[1] = (u16)ret >> 8; 196 } 197 if (ret < 0) { 198 dev_err(&chip->client->dev, "failed reading register\n"); 199 return ret; 200 } 201 202 return 0; 203} 204 205static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 206{ 207 struct pca953x_chip *chip = to_pca(gc); 208 u8 reg_val; 209 int ret, offset = 0; 210 211 mutex_lock(&chip->i2c_lock); 212 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); 213 214 switch (chip->chip_type) { 215 case PCA953X_TYPE: 216 offset = PCA953X_DIRECTION; 217 break; 218 case PCA957X_TYPE: 219 offset = PCA957X_CFG; 220 break; 221 } 222 ret = pca953x_write_single(chip, offset, reg_val, off); 223 if (ret) 224 goto exit; 225 226 chip->reg_direction[off / BANK_SZ] = reg_val; 227 ret = 0; 228exit: 229 mutex_unlock(&chip->i2c_lock); 230 return ret; 231} 232 233static int pca953x_gpio_direction_output(struct gpio_chip *gc, 234 unsigned off, int val) 235{ 236 struct pca953x_chip *chip = to_pca(gc); 237 u8 reg_val; 238 int ret, offset = 0; 239 240 mutex_lock(&chip->i2c_lock); 241 /* set output level */ 242 if (val) 243 reg_val = chip->reg_output[off / BANK_SZ] 244 | (1u << (off % BANK_SZ)); 245 else 246 reg_val = chip->reg_output[off / BANK_SZ] 247 & ~(1u << (off % BANK_SZ)); 248 249 switch (chip->chip_type) { 250 case PCA953X_TYPE: 251 offset = PCA953X_OUTPUT; 252 break; 253 case PCA957X_TYPE: 254 offset = PCA957X_OUT; 255 break; 256 } 257 ret = pca953x_write_single(chip, offset, reg_val, off); 258 if (ret) 259 goto exit; 260 261 chip->reg_output[off / BANK_SZ] = reg_val; 262 263 /* then direction */ 264 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); 265 switch (chip->chip_type) { 266 case PCA953X_TYPE: 267 offset = PCA953X_DIRECTION; 268 break; 269 case PCA957X_TYPE: 270 offset = PCA957X_CFG; 271 break; 272 } 273 ret = pca953x_write_single(chip, offset, reg_val, off); 274 if (ret) 275 goto exit; 276 277 chip->reg_direction[off / BANK_SZ] = reg_val; 278 ret = 0; 279exit: 280 mutex_unlock(&chip->i2c_lock); 281 return ret; 282} 283 284static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) 285{ 286 struct pca953x_chip *chip = to_pca(gc); 287 u32 reg_val; 288 int ret, offset = 0; 289 290 mutex_lock(&chip->i2c_lock); 291 switch (chip->chip_type) { 292 case PCA953X_TYPE: 293 offset = PCA953X_INPUT; 294 break; 295 case PCA957X_TYPE: 296 offset = PCA957X_IN; 297 break; 298 } 299 ret = pca953x_read_single(chip, offset, ®_val, off); 300 mutex_unlock(&chip->i2c_lock); 301 if (ret < 0) { 302 /* NOTE: diagnostic already emitted; that's all we should 303 * do unless gpio_*_value_cansleep() calls become different 304 * from their nonsleeping siblings (and report faults). 305 */ 306 return 0; 307 } 308 309 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0; 310} 311 312static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 313{ 314 struct pca953x_chip *chip = to_pca(gc); 315 u8 reg_val; 316 int ret, offset = 0; 317 318 mutex_lock(&chip->i2c_lock); 319 if (val) 320 reg_val = chip->reg_output[off / BANK_SZ] 321 | (1u << (off % BANK_SZ)); 322 else 323 reg_val = chip->reg_output[off / BANK_SZ] 324 & ~(1u << (off % BANK_SZ)); 325 326 switch (chip->chip_type) { 327 case PCA953X_TYPE: 328 offset = PCA953X_OUTPUT; 329 break; 330 case PCA957X_TYPE: 331 offset = PCA957X_OUT; 332 break; 333 } 334 ret = pca953x_write_single(chip, offset, reg_val, off); 335 if (ret) 336 goto exit; 337 338 chip->reg_output[off / BANK_SZ] = reg_val; 339exit: 340 mutex_unlock(&chip->i2c_lock); 341} 342 343static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) 344{ 345 struct gpio_chip *gc; 346 347 gc = &chip->gpio_chip; 348 349 gc->direction_input = pca953x_gpio_direction_input; 350 gc->direction_output = pca953x_gpio_direction_output; 351 gc->get = pca953x_gpio_get_value; 352 gc->set = pca953x_gpio_set_value; 353 gc->can_sleep = true; 354 355 gc->base = chip->gpio_start; 356 gc->ngpio = gpios; 357 gc->label = chip->client->name; 358 gc->dev = &chip->client->dev; 359 gc->owner = THIS_MODULE; 360 gc->names = chip->names; 361} 362 363#ifdef CONFIG_GPIO_PCA953X_IRQ 364static void pca953x_irq_mask(struct irq_data *d) 365{ 366 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 367 struct pca953x_chip *chip = to_pca(gc); 368 369 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); 370} 371 372static void pca953x_irq_unmask(struct irq_data *d) 373{ 374 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 375 struct pca953x_chip *chip = to_pca(gc); 376 377 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); 378} 379 380static void pca953x_irq_bus_lock(struct irq_data *d) 381{ 382 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 383 struct pca953x_chip *chip = to_pca(gc); 384 385 mutex_lock(&chip->irq_lock); 386} 387 388static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 389{ 390 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 391 struct pca953x_chip *chip = to_pca(gc); 392 u8 new_irqs; 393 int level, i; 394 395 /* Look for any newly setup interrupt */ 396 for (i = 0; i < NBANK(chip); i++) { 397 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; 398 new_irqs &= ~chip->reg_direction[i]; 399 400 while (new_irqs) { 401 level = __ffs(new_irqs); 402 pca953x_gpio_direction_input(&chip->gpio_chip, 403 level + (BANK_SZ * i)); 404 new_irqs &= ~(1 << level); 405 } 406 } 407 408 mutex_unlock(&chip->irq_lock); 409} 410 411static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 412{ 413 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 414 struct pca953x_chip *chip = to_pca(gc); 415 int bank_nb = d->hwirq / BANK_SZ; 416 u8 mask = 1 << (d->hwirq % BANK_SZ); 417 418 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 419 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 420 d->irq, type); 421 return -EINVAL; 422 } 423 424 if (type & IRQ_TYPE_EDGE_FALLING) 425 chip->irq_trig_fall[bank_nb] |= mask; 426 else 427 chip->irq_trig_fall[bank_nb] &= ~mask; 428 429 if (type & IRQ_TYPE_EDGE_RISING) 430 chip->irq_trig_raise[bank_nb] |= mask; 431 else 432 chip->irq_trig_raise[bank_nb] &= ~mask; 433 434 return 0; 435} 436 437static struct irq_chip pca953x_irq_chip = { 438 .name = "pca953x", 439 .irq_mask = pca953x_irq_mask, 440 .irq_unmask = pca953x_irq_unmask, 441 .irq_bus_lock = pca953x_irq_bus_lock, 442 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, 443 .irq_set_type = pca953x_irq_set_type, 444}; 445 446static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) 447{ 448 u8 cur_stat[MAX_BANK]; 449 u8 old_stat[MAX_BANK]; 450 u8 pendings = 0; 451 u8 trigger[MAX_BANK], triggers = 0; 452 int ret, i, offset = 0; 453 454 switch (chip->chip_type) { 455 case PCA953X_TYPE: 456 offset = PCA953X_INPUT; 457 break; 458 case PCA957X_TYPE: 459 offset = PCA957X_IN; 460 break; 461 } 462 ret = pca953x_read_regs(chip, offset, cur_stat); 463 if (ret) 464 return 0; 465 466 /* Remove output pins from the equation */ 467 for (i = 0; i < NBANK(chip); i++) 468 cur_stat[i] &= chip->reg_direction[i]; 469 470 memcpy(old_stat, chip->irq_stat, NBANK(chip)); 471 472 for (i = 0; i < NBANK(chip); i++) { 473 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i]; 474 triggers += trigger[i]; 475 } 476 477 if (!triggers) 478 return 0; 479 480 memcpy(chip->irq_stat, cur_stat, NBANK(chip)); 481 482 for (i = 0; i < NBANK(chip); i++) { 483 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) | 484 (cur_stat[i] & chip->irq_trig_raise[i]); 485 pending[i] &= trigger[i]; 486 pendings += pending[i]; 487 } 488 489 return pendings; 490} 491 492static irqreturn_t pca953x_irq_handler(int irq, void *devid) 493{ 494 struct pca953x_chip *chip = devid; 495 u8 pending[MAX_BANK]; 496 u8 level; 497 unsigned nhandled = 0; 498 int i; 499 500 if (!pca953x_irq_pending(chip, pending)) 501 return IRQ_NONE; 502 503 for (i = 0; i < NBANK(chip); i++) { 504 while (pending[i]) { 505 level = __ffs(pending[i]); 506 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain, 507 level + (BANK_SZ * i))); 508 pending[i] &= ~(1 << level); 509 nhandled++; 510 } 511 } 512 513 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE; 514} 515 516static int pca953x_irq_setup(struct pca953x_chip *chip, 517 const struct i2c_device_id *id, 518 int irq_base) 519{ 520 struct i2c_client *client = chip->client; 521 int ret, i, offset = 0; 522 523 if (client->irq && irq_base != -1 524 && (id->driver_data & PCA_INT)) { 525 526 switch (chip->chip_type) { 527 case PCA953X_TYPE: 528 offset = PCA953X_INPUT; 529 break; 530 case PCA957X_TYPE: 531 offset = PCA957X_IN; 532 break; 533 } 534 ret = pca953x_read_regs(chip, offset, chip->irq_stat); 535 if (ret) 536 return ret; 537 538 /* 539 * There is no way to know which GPIO line generated the 540 * interrupt. We have to rely on the previous read for 541 * this purpose. 542 */ 543 for (i = 0; i < NBANK(chip); i++) 544 chip->irq_stat[i] &= chip->reg_direction[i]; 545 mutex_init(&chip->irq_lock); 546 547 ret = devm_request_threaded_irq(&client->dev, 548 client->irq, 549 NULL, 550 pca953x_irq_handler, 551 IRQF_TRIGGER_LOW | IRQF_ONESHOT | 552 IRQF_SHARED, 553 dev_name(&client->dev), chip); 554 if (ret) { 555 dev_err(&client->dev, "failed to request irq %d\n", 556 client->irq); 557 return ret; 558 } 559 560 ret = gpiochip_irqchip_add(&chip->gpio_chip, 561 &pca953x_irq_chip, 562 irq_base, 563 handle_simple_irq, 564 IRQ_TYPE_NONE); 565 if (ret) { 566 dev_err(&client->dev, 567 "could not connect irqchip to gpiochip\n"); 568 return ret; 569 } 570 } 571 572 return 0; 573} 574 575#else /* CONFIG_GPIO_PCA953X_IRQ */ 576static int pca953x_irq_setup(struct pca953x_chip *chip, 577 const struct i2c_device_id *id, 578 int irq_base) 579{ 580 struct i2c_client *client = chip->client; 581 582 if (irq_base != -1 && (id->driver_data & PCA_INT)) 583 dev_warn(&client->dev, "interrupt support not compiled in\n"); 584 585 return 0; 586} 587#endif 588 589static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) 590{ 591 int ret; 592 u8 val[MAX_BANK]; 593 594 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output); 595 if (ret) 596 goto out; 597 598 ret = pca953x_read_regs(chip, PCA953X_DIRECTION, 599 chip->reg_direction); 600 if (ret) 601 goto out; 602 603 /* set platform specific polarity inversion */ 604 if (invert) 605 memset(val, 0xFF, NBANK(chip)); 606 else 607 memset(val, 0, NBANK(chip)); 608 609 ret = pca953x_write_regs(chip, PCA953X_INVERT, val); 610out: 611 return ret; 612} 613 614static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 615{ 616 int ret; 617 u8 val[MAX_BANK]; 618 619 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output); 620 if (ret) 621 goto out; 622 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction); 623 if (ret) 624 goto out; 625 626 /* set platform specific polarity inversion */ 627 if (invert) 628 memset(val, 0xFF, NBANK(chip)); 629 else 630 memset(val, 0, NBANK(chip)); 631 pca953x_write_regs(chip, PCA957X_INVRT, val); 632 633 /* To enable register 6, 7 to controll pull up and pull down */ 634 memset(val, 0x02, NBANK(chip)); 635 pca953x_write_regs(chip, PCA957X_BKEN, val); 636 637 return 0; 638out: 639 return ret; 640} 641 642static int pca953x_probe(struct i2c_client *client, 643 const struct i2c_device_id *id) 644{ 645 struct pca953x_platform_data *pdata; 646 struct pca953x_chip *chip; 647 int irq_base = 0; 648 int ret; 649 u32 invert = 0; 650 651 chip = devm_kzalloc(&client->dev, 652 sizeof(struct pca953x_chip), GFP_KERNEL); 653 if (chip == NULL) 654 return -ENOMEM; 655 656 pdata = dev_get_platdata(&client->dev); 657 if (pdata) { 658 irq_base = pdata->irq_base; 659 chip->gpio_start = pdata->gpio_base; 660 invert = pdata->invert; 661 chip->names = pdata->names; 662 } else { 663 chip->gpio_start = -1; 664 irq_base = 0; 665 } 666 667 chip->client = client; 668 669 chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE); 670 671 mutex_init(&chip->i2c_lock); 672 673 /* initialize cached registers from their original values. 674 * we can't share this chip with another i2c master. 675 */ 676 pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK); 677 678 if (chip->chip_type == PCA953X_TYPE) 679 ret = device_pca953x_init(chip, invert); 680 else 681 ret = device_pca957x_init(chip, invert); 682 if (ret) 683 return ret; 684 685 ret = gpiochip_add(&chip->gpio_chip); 686 if (ret) 687 return ret; 688 689 ret = pca953x_irq_setup(chip, id, irq_base); 690 if (ret) 691 return ret; 692 693 if (pdata && pdata->setup) { 694 ret = pdata->setup(client, chip->gpio_chip.base, 695 chip->gpio_chip.ngpio, pdata->context); 696 if (ret < 0) 697 dev_warn(&client->dev, "setup failed, %d\n", ret); 698 } 699 700 i2c_set_clientdata(client, chip); 701 return 0; 702} 703 704static int pca953x_remove(struct i2c_client *client) 705{ 706 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); 707 struct pca953x_chip *chip = i2c_get_clientdata(client); 708 int ret = 0; 709 710 if (pdata && pdata->teardown) { 711 ret = pdata->teardown(client, chip->gpio_chip.base, 712 chip->gpio_chip.ngpio, pdata->context); 713 if (ret < 0) { 714 dev_err(&client->dev, "%s failed, %d\n", 715 "teardown", ret); 716 return ret; 717 } 718 } 719 720 gpiochip_remove(&chip->gpio_chip); 721 722 return 0; 723} 724 725static const struct of_device_id pca953x_dt_ids[] = { 726 { .compatible = "nxp,pca9505", }, 727 { .compatible = "nxp,pca9534", }, 728 { .compatible = "nxp,pca9535", }, 729 { .compatible = "nxp,pca9536", }, 730 { .compatible = "nxp,pca9537", }, 731 { .compatible = "nxp,pca9538", }, 732 { .compatible = "nxp,pca9539", }, 733 { .compatible = "nxp,pca9554", }, 734 { .compatible = "nxp,pca9555", }, 735 { .compatible = "nxp,pca9556", }, 736 { .compatible = "nxp,pca9557", }, 737 { .compatible = "nxp,pca9574", }, 738 { .compatible = "nxp,pca9575", }, 739 { .compatible = "nxp,pca9698", }, 740 741 { .compatible = "maxim,max7310", }, 742 { .compatible = "maxim,max7312", }, 743 { .compatible = "maxim,max7313", }, 744 { .compatible = "maxim,max7315", }, 745 746 { .compatible = "ti,pca6107", }, 747 { .compatible = "ti,tca6408", }, 748 { .compatible = "ti,tca6416", }, 749 { .compatible = "ti,tca6424", }, 750 751 { .compatible = "exar,xra1202", }, 752 { } 753}; 754 755MODULE_DEVICE_TABLE(of, pca953x_dt_ids); 756 757static struct i2c_driver pca953x_driver = { 758 .driver = { 759 .name = "pca953x", 760 .of_match_table = pca953x_dt_ids, 761 }, 762 .probe = pca953x_probe, 763 .remove = pca953x_remove, 764 .id_table = pca953x_id, 765}; 766 767static int __init pca953x_init(void) 768{ 769 return i2c_add_driver(&pca953x_driver); 770} 771/* register after i2c postcore initcall and before 772 * subsys initcalls that may rely on these GPIOs 773 */ 774subsys_initcall(pca953x_init); 775 776static void __exit pca953x_exit(void) 777{ 778 i2c_del_driver(&pca953x_driver); 779} 780module_exit(pca953x_exit); 781 782MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); 783MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); 784MODULE_LICENSE("GPL"); 785