tda998x_drv.c revision a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6
1e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* 2e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * Copyright (C) 2012 Texas Instruments 3e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * Author: Rob Clark <robdclark@gmail.com> 4e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * 5e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * This program is free software; you can redistribute it and/or modify it 6e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * under the terms of the GNU General Public License version 2 as published by 7e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * the Free Software Foundation. 8e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * 9e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * This program is distributed in the hope that it will be useful, but WITHOUT 10e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * more details. 13e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * 14e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * You should have received a copy of the GNU General Public License along with 15e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * this program. If not, see <http://www.gnu.org/licenses/>. 16e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark */ 17e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 18e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 19e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 20893c3e538dc338509b0c1121173355e8cfa34ff0Russell King#include <linux/hdmi.h> 21e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#include <linux/module.h> 2212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine#include <linux/irq.h> 23f0b33b282c17337276504d6a700d0f558f1a6891Jean-Francois Moine#include <sound/asoundef.h> 24e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 25e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#include <drm/drmP.h> 26e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#include <drm/drm_crtc_helper.h> 27e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#include <drm/drm_encoder_slave.h> 28e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#include <drm/drm_edid.h> 29c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#include <drm/i2c/tda998x.h> 30e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 31e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__) 32e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 33e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstruct tda998x_priv { 34e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark struct i2c_client *cec; 352f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine struct i2c_client *hdmi; 36e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint16_t rev; 37e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t current_page; 38e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark int dpms; 39c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King bool is_hdmi_sink; 405e74c22cd1e0f9e49573fe580de47e198ee04975Russell King u8 vip_cntrl_0; 415e74c22cd1e0f9e49573fe580de47e198ee04975Russell King u8 vip_cntrl_1; 425e74c22cd1e0f9e49573fe580de47e198ee04975Russell King u8 vip_cntrl_2; 43c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King struct tda998x_encoder_params params; 4412473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine 4512473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine wait_queue_head_t wq_edid; 4612473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine volatile int wq_edid_wait; 4712473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine struct drm_encoder *encoder; 48e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark}; 49e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 50e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define to_tda998x_priv(x) ((struct tda998x_priv *)to_encoder_slave(x)->slave_priv) 51e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 52e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* The TDA9988 series of devices use a paged register scheme.. to simplify 53e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * things we encode the page # in upper bits of the register #. To read/ 54e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * write a given register, we need to make sure CURPAGE register is set 55e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * appropriately. Which implies reads/writes are not atomic. Fun! 56e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark */ 57e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 58e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG(page, addr) (((page) << 8) | (addr)) 59e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG2ADDR(reg) ((reg) & 0xff) 60e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG2PAGE(reg) (((reg) >> 8) & 0xff) 61e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 62e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_CURPAGE 0xff /* write */ 63e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 64e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 65e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* Page 00h: General Control */ 66e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VERSION_LSB REG(0x00, 0x00) /* read */ 67e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_MAIN_CNTRL0 REG(0x00, 0x01) /* read/write */ 68e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define MAIN_CNTRL0_SR (1 << 0) 69e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define MAIN_CNTRL0_DECS (1 << 1) 70e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define MAIN_CNTRL0_DEHS (1 << 2) 71e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define MAIN_CNTRL0_CECS (1 << 3) 72e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define MAIN_CNTRL0_CEHS (1 << 4) 73e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define MAIN_CNTRL0_SCALER (1 << 7) 74e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VERSION_MSB REG(0x00, 0x02) /* read */ 75e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_SOFTRESET REG(0x00, 0x0a) /* write */ 76e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define SOFTRESET_AUDIO (1 << 0) 77e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define SOFTRESET_I2C_MASTER (1 << 1) 78e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_DDC_DISABLE REG(0x00, 0x0b) /* read/write */ 79e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_CCLK_ON REG(0x00, 0x0c) /* read/write */ 80e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_I2C_MASTER REG(0x00, 0x0d) /* read/write */ 81e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define I2C_MASTER_DIS_MM (1 << 0) 82e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define I2C_MASTER_DIS_FILT (1 << 1) 83e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define I2C_MASTER_APP_STRT_LAT (1 << 2) 84c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_FEAT_POWERDOWN REG(0x00, 0x0e) /* read/write */ 85c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define FEAT_POWERDOWN_SPDIF (1 << 3) 86e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_INT_FLAGS_0 REG(0x00, 0x0f) /* read/write */ 87e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_INT_FLAGS_1 REG(0x00, 0x10) /* read/write */ 88e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_INT_FLAGS_2 REG(0x00, 0x11) /* read/write */ 89e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define INT_FLAGS_2_EDID_BLK_RD (1 << 1) 90c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_ENA_ACLK REG(0x00, 0x16) /* read/write */ 91e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_ENA_VP_0 REG(0x00, 0x18) /* read/write */ 92e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_ENA_VP_1 REG(0x00, 0x19) /* read/write */ 93e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_ENA_VP_2 REG(0x00, 0x1a) /* read/write */ 94e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_ENA_AP REG(0x00, 0x1e) /* read/write */ 95e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VIP_CNTRL_0 REG(0x00, 0x20) /* write */ 96e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_0_MIRR_A (1 << 7) 97e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_0_SWAP_A(x) (((x) & 7) << 4) 98e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_0_MIRR_B (1 << 3) 99e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_0_SWAP_B(x) (((x) & 7) << 0) 100e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VIP_CNTRL_1 REG(0x00, 0x21) /* write */ 101e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_1_MIRR_C (1 << 7) 102e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_1_SWAP_C(x) (((x) & 7) << 4) 103e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_1_MIRR_D (1 << 3) 104e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_1_SWAP_D(x) (((x) & 7) << 0) 105e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VIP_CNTRL_2 REG(0x00, 0x22) /* write */ 106e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_2_MIRR_E (1 << 7) 107e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_2_SWAP_E(x) (((x) & 7) << 4) 108e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_2_MIRR_F (1 << 3) 109e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_2_SWAP_F(x) (((x) & 7) << 0) 110e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VIP_CNTRL_3 REG(0x00, 0x23) /* write */ 111e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_3_X_TGL (1 << 0) 112e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_3_H_TGL (1 << 1) 113e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_3_V_TGL (1 << 2) 114e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_3_EMB (1 << 3) 115e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_3_SYNC_DE (1 << 4) 116e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_3_SYNC_HS (1 << 5) 117e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_3_DE_INT (1 << 6) 118e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_3_EDGE (1 << 7) 119e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VIP_CNTRL_4 REG(0x00, 0x24) /* write */ 120e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_4_BLC(x) (((x) & 3) << 0) 121e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_4_BLANKIT(x) (((x) & 3) << 2) 122e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_4_CCIR656 (1 << 4) 123e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_4_656_ALT (1 << 5) 124e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_4_TST_656 (1 << 6) 125e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_4_TST_PAT (1 << 7) 126e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VIP_CNTRL_5 REG(0x00, 0x25) /* write */ 127e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_5_CKCASE (1 << 0) 128e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define VIP_CNTRL_5_SP_CNT(x) (((x) & 3) << 1) 129c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_MUX_AP REG(0x00, 0x26) /* read/write */ 13010df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine# define MUX_AP_SELECT_I2S 0x64 13110df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine# define MUX_AP_SELECT_SPDIF 0x40 132bcb2481df01a9aee7a09b20d43194011edd35754Russell King#define REG_MUX_VP_VIP_OUT REG(0x00, 0x27) /* read/write */ 133e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_MAT_CONTRL REG(0x00, 0x80) /* write */ 134e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define MAT_CONTRL_MAT_SC(x) (((x) & 3) << 0) 135e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define MAT_CONTRL_MAT_BP (1 << 2) 136e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VIDFORMAT REG(0x00, 0xa0) /* write */ 137e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_REFPIX_MSB REG(0x00, 0xa1) /* write */ 138e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_REFPIX_LSB REG(0x00, 0xa2) /* write */ 139e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_REFLINE_MSB REG(0x00, 0xa3) /* write */ 140e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_REFLINE_LSB REG(0x00, 0xa4) /* write */ 141e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_NPIX_MSB REG(0x00, 0xa5) /* write */ 142e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_NPIX_LSB REG(0x00, 0xa6) /* write */ 143e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_NLINE_MSB REG(0x00, 0xa7) /* write */ 144e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_NLINE_LSB REG(0x00, 0xa8) /* write */ 145e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_LINE_STRT_1_MSB REG(0x00, 0xa9) /* write */ 146e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_LINE_STRT_1_LSB REG(0x00, 0xaa) /* write */ 147e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_PIX_STRT_1_MSB REG(0x00, 0xab) /* write */ 148e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_PIX_STRT_1_LSB REG(0x00, 0xac) /* write */ 149e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_LINE_END_1_MSB REG(0x00, 0xad) /* write */ 150e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_LINE_END_1_LSB REG(0x00, 0xae) /* write */ 151e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_PIX_END_1_MSB REG(0x00, 0xaf) /* write */ 152e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_PIX_END_1_LSB REG(0x00, 0xb0) /* write */ 153088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth#define REG_VS_LINE_STRT_2_MSB REG(0x00, 0xb1) /* write */ 154088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth#define REG_VS_LINE_STRT_2_LSB REG(0x00, 0xb2) /* write */ 155e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_PIX_STRT_2_MSB REG(0x00, 0xb3) /* write */ 156e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_PIX_STRT_2_LSB REG(0x00, 0xb4) /* write */ 157088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth#define REG_VS_LINE_END_2_MSB REG(0x00, 0xb5) /* write */ 158088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth#define REG_VS_LINE_END_2_LSB REG(0x00, 0xb6) /* write */ 159e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_PIX_END_2_MSB REG(0x00, 0xb7) /* write */ 160e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VS_PIX_END_2_LSB REG(0x00, 0xb8) /* write */ 161e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_HS_PIX_START_MSB REG(0x00, 0xb9) /* write */ 162e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_HS_PIX_START_LSB REG(0x00, 0xba) /* write */ 163e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_HS_PIX_STOP_MSB REG(0x00, 0xbb) /* write */ 164e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_HS_PIX_STOP_LSB REG(0x00, 0xbc) /* write */ 165e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VWIN_START_1_MSB REG(0x00, 0xbd) /* write */ 166e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VWIN_START_1_LSB REG(0x00, 0xbe) /* write */ 167e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VWIN_END_1_MSB REG(0x00, 0xbf) /* write */ 168e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_VWIN_END_1_LSB REG(0x00, 0xc0) /* write */ 169088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth#define REG_VWIN_START_2_MSB REG(0x00, 0xc1) /* write */ 170088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth#define REG_VWIN_START_2_LSB REG(0x00, 0xc2) /* write */ 171088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth#define REG_VWIN_END_2_MSB REG(0x00, 0xc3) /* write */ 172088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth#define REG_VWIN_END_2_LSB REG(0x00, 0xc4) /* write */ 173e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_DE_START_MSB REG(0x00, 0xc5) /* write */ 174e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_DE_START_LSB REG(0x00, 0xc6) /* write */ 175e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_DE_STOP_MSB REG(0x00, 0xc7) /* write */ 176e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_DE_STOP_LSB REG(0x00, 0xc8) /* write */ 177e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_TBG_CNTRL_0 REG(0x00, 0xca) /* write */ 178088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth# define TBG_CNTRL_0_TOP_TGL (1 << 0) 179088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth# define TBG_CNTRL_0_TOP_SEL (1 << 1) 180088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth# define TBG_CNTRL_0_DE_EXT (1 << 2) 181088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth# define TBG_CNTRL_0_TOP_EXT (1 << 3) 182e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define TBG_CNTRL_0_FRAME_DIS (1 << 5) 183e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define TBG_CNTRL_0_SYNC_MTHD (1 << 6) 184e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define TBG_CNTRL_0_SYNC_ONCE (1 << 7) 185e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_TBG_CNTRL_1 REG(0x00, 0xcb) /* write */ 186088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth# define TBG_CNTRL_1_H_TGL (1 << 0) 187088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth# define TBG_CNTRL_1_V_TGL (1 << 1) 188088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth# define TBG_CNTRL_1_TGL_EN (1 << 2) 189088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth# define TBG_CNTRL_1_X_EXT (1 << 3) 190088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth# define TBG_CNTRL_1_H_EXT (1 << 4) 191088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth# define TBG_CNTRL_1_V_EXT (1 << 5) 192e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define TBG_CNTRL_1_DWIN_DIS (1 << 6) 193e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_ENABLE_SPACE REG(0x00, 0xd6) /* write */ 194e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_HVF_CNTRL_0 REG(0x00, 0xe4) /* write */ 195e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define HVF_CNTRL_0_SM (1 << 7) 196e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define HVF_CNTRL_0_RWB (1 << 6) 197e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define HVF_CNTRL_0_PREFIL(x) (((x) & 3) << 2) 198e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define HVF_CNTRL_0_INTPOL(x) (((x) & 3) << 0) 199e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_HVF_CNTRL_1 REG(0x00, 0xe5) /* write */ 200e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define HVF_CNTRL_1_FOR (1 << 0) 201e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define HVF_CNTRL_1_YUVBLK (1 << 1) 202e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define HVF_CNTRL_1_VQR(x) (((x) & 3) << 2) 203e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define HVF_CNTRL_1_PAD(x) (((x) & 3) << 4) 204e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define HVF_CNTRL_1_SEMI_PLANAR (1 << 6) 205e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_RPT_CNTRL REG(0x00, 0xf0) /* write */ 206c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_I2S_FORMAT REG(0x00, 0xfc) /* read/write */ 207c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define I2S_FORMAT(x) (((x) & 3) << 0) 208c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_AIP_CLKSEL REG(0x00, 0xfd) /* write */ 20910df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine# define AIP_CLKSEL_AIP_SPDIF (0 << 3) 21010df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine# define AIP_CLKSEL_AIP_I2S (1 << 3) 21110df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine# define AIP_CLKSEL_FS_ACLK (0 << 0) 21210df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine# define AIP_CLKSEL_FS_MCLK (1 << 0) 21310df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine# define AIP_CLKSEL_FS_FS64SPDIF (2 << 0) 214e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 215e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* Page 02h: PLL settings */ 216e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_PLL_SERIAL_1 REG(0x02, 0x00) /* read/write */ 217e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define PLL_SERIAL_1_SRL_FDN (1 << 0) 218e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define PLL_SERIAL_1_SRL_IZ(x) (((x) & 3) << 1) 219e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define PLL_SERIAL_1_SRL_MAN_IZ (1 << 6) 220e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_PLL_SERIAL_2 REG(0x02, 0x01) /* read/write */ 2213ae471f73a1d581e078b5b06d08d7b82833a093fJean-Francois Moine# define PLL_SERIAL_2_SRL_NOSC(x) ((x) << 0) 222e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define PLL_SERIAL_2_SRL_PR(x) (((x) & 0xf) << 4) 223e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_PLL_SERIAL_3 REG(0x02, 0x02) /* read/write */ 224e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define PLL_SERIAL_3_SRL_CCIR (1 << 0) 225e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define PLL_SERIAL_3_SRL_DE (1 << 2) 226e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define PLL_SERIAL_3_SRL_PXIN_SEL (1 << 4) 227e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_SERIALIZER REG(0x02, 0x03) /* read/write */ 228e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_BUFFER_OUT REG(0x02, 0x04) /* read/write */ 229e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_PLL_SCG1 REG(0x02, 0x05) /* read/write */ 230e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_PLL_SCG2 REG(0x02, 0x06) /* read/write */ 231e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_PLL_SCGN1 REG(0x02, 0x07) /* read/write */ 232e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_PLL_SCGN2 REG(0x02, 0x08) /* read/write */ 233e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_PLL_SCGR1 REG(0x02, 0x09) /* read/write */ 234e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_PLL_SCGR2 REG(0x02, 0x0a) /* read/write */ 235e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_AUDIO_DIV REG(0x02, 0x0e) /* read/write */ 236c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define AUDIO_DIV_SERCLK_1 0 237c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define AUDIO_DIV_SERCLK_2 1 238c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define AUDIO_DIV_SERCLK_4 2 239c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define AUDIO_DIV_SERCLK_8 3 240c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define AUDIO_DIV_SERCLK_16 4 241c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define AUDIO_DIV_SERCLK_32 5 242e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_SEL_CLK REG(0x02, 0x11) /* read/write */ 243e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define SEL_CLK_SEL_CLK1 (1 << 0) 244e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define SEL_CLK_SEL_VRF_CLK(x) (((x) & 3) << 1) 245e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define SEL_CLK_ENA_SC_CLK (1 << 3) 246e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_ANA_GENERAL REG(0x02, 0x12) /* read/write */ 247e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 248e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 249e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* Page 09h: EDID Control */ 250e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_EDID_DATA_0 REG(0x09, 0x00) /* read */ 251e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* next 127 successive registers are the EDID block */ 252e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_EDID_CTRL REG(0x09, 0xfa) /* read/write */ 253e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_DDC_ADDR REG(0x09, 0xfb) /* read/write */ 254e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_DDC_OFFS REG(0x09, 0xfc) /* read/write */ 255e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_DDC_SEGM_ADDR REG(0x09, 0xfd) /* read/write */ 256e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_DDC_SEGM REG(0x09, 0xfe) /* read/write */ 257e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 258e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 259e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* Page 10h: information frames and packets */ 260c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_IF1_HB0 REG(0x10, 0x20) /* read/write */ 261c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_IF2_HB0 REG(0x10, 0x40) /* read/write */ 262c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_IF3_HB0 REG(0x10, 0x60) /* read/write */ 263c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_IF4_HB0 REG(0x10, 0x80) /* read/write */ 264c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_IF5_HB0 REG(0x10, 0xa0) /* read/write */ 265e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 266e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 267e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* Page 11h: audio settings and content info packets */ 268e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_AIP_CNTRL_0 REG(0x11, 0x00) /* read/write */ 269e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define AIP_CNTRL_0_RST_FIFO (1 << 0) 270e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define AIP_CNTRL_0_SWAP (1 << 1) 271e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define AIP_CNTRL_0_LAYOUT (1 << 2) 272e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define AIP_CNTRL_0_ACR_MAN (1 << 5) 273e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define AIP_CNTRL_0_RST_CTS (1 << 6) 274c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_CA_I2S REG(0x11, 0x01) /* read/write */ 275c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define CA_I2S_CA_I2S(x) (((x) & 31) << 0) 276c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define CA_I2S_HBR_CHSTAT (1 << 6) 277c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_LATENCY_RD REG(0x11, 0x04) /* read/write */ 278c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_ACR_CTS_0 REG(0x11, 0x05) /* read/write */ 279c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_ACR_CTS_1 REG(0x11, 0x06) /* read/write */ 280c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_ACR_CTS_2 REG(0x11, 0x07) /* read/write */ 281c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_ACR_N_0 REG(0x11, 0x08) /* read/write */ 282c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_ACR_N_1 REG(0x11, 0x09) /* read/write */ 283c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_ACR_N_2 REG(0x11, 0x0a) /* read/write */ 284c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_CTS_N REG(0x11, 0x0c) /* read/write */ 285c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define CTS_N_K(x) (((x) & 7) << 0) 286c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define CTS_N_M(x) (((x) & 3) << 4) 287e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_ENC_CNTRL REG(0x11, 0x0d) /* read/write */ 288e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define ENC_CNTRL_RST_ENC (1 << 0) 289e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define ENC_CNTRL_RST_SEL (1 << 1) 290e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define ENC_CNTRL_CTL_CODE(x) (((x) & 3) << 2) 291c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_DIP_FLAGS REG(0x11, 0x0e) /* read/write */ 292c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define DIP_FLAGS_ACR (1 << 0) 293c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define DIP_FLAGS_GC (1 << 1) 294c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_DIP_IF_FLAGS REG(0x11, 0x0f) /* read/write */ 295c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define DIP_IF_FLAGS_IF1 (1 << 1) 296c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define DIP_IF_FLAGS_IF2 (1 << 2) 297c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define DIP_IF_FLAGS_IF3 (1 << 3) 298c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define DIP_IF_FLAGS_IF4 (1 << 4) 299c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King# define DIP_IF_FLAGS_IF5 (1 << 5) 300c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define REG_CH_STAT_B(x) REG(0x11, 0x14 + (x)) /* read/write */ 301e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 302e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 303e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* Page 12h: HDCP and OTP */ 304e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_TX3 REG(0x12, 0x9a) /* read/write */ 305063b472fbb44ac562797a630ac3516720f588140Russell King#define REG_TX4 REG(0x12, 0x9b) /* read/write */ 306063b472fbb44ac562797a630ac3516720f588140Russell King# define TX4_PD_RAM (1 << 1) 307e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_TX33 REG(0x12, 0xb8) /* read/write */ 308e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define TX33_HDMI (1 << 1) 309e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 310e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 311e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* Page 13h: Gamut related metadata packets */ 312e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 313e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 314e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 315e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* CEC registers: (not paged) 316e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark */ 31712473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine#define REG_CEC_INTSTATUS 0xee /* read */ 31812473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine# define CEC_INTSTATUS_CEC (1 << 0) 31912473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine# define CEC_INTSTATUS_HDMI (1 << 1) 320e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_CEC_FRO_IM_CLK_CTRL 0xfb /* read/write */ 321e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define CEC_FRO_IM_CLK_CTRL_GHOST_DIS (1 << 7) 322e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define CEC_FRO_IM_CLK_CTRL_ENA_OTP (1 << 6) 323e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define CEC_FRO_IM_CLK_CTRL_IMCLK_SEL (1 << 1) 324e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define CEC_FRO_IM_CLK_CTRL_FRO_DIV (1 << 0) 32512473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine#define REG_CEC_RXSHPDINTENA 0xfc /* read/write */ 32612473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine#define REG_CEC_RXSHPDINT 0xfd /* read */ 327e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_CEC_RXSHPDLEV 0xfe /* read */ 328e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define CEC_RXSHPDLEV_RXSENS (1 << 0) 329e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define CEC_RXSHPDLEV_HPD (1 << 1) 330e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 331e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define REG_CEC_ENAMODS 0xff /* read/write */ 332e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define CEC_ENAMODS_DIS_FRO (1 << 6) 333e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define CEC_ENAMODS_DIS_CCLK (1 << 5) 334e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define CEC_ENAMODS_EN_RXSENS (1 << 2) 335e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define CEC_ENAMODS_EN_HDMI (1 << 1) 336e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark# define CEC_ENAMODS_EN_CEC (1 << 0) 337e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 338e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 339e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* Device versions: */ 340e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define TDA9989N2 0x0101 341e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define TDA19989 0x0201 342e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define TDA19989N2 0x0202 343e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark#define TDA19988 0x0301 344e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 345e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic void 3462f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinecec_write(struct tda998x_priv *priv, uint16_t addr, uint8_t val) 347e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 3482f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine struct i2c_client *client = priv->cec; 349e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t buf[] = {addr, val}; 350e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark int ret; 351e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 352704d63f59900968b9b5ae92549c49db0686b87e3Jean-Francois Moine ret = i2c_master_send(client, buf, sizeof(buf)); 353e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (ret < 0) 354e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark dev_err(&client->dev, "Error %d writing to cec:0x%x\n", ret, addr); 355e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 356e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 357e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic uint8_t 3582f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinecec_read(struct tda998x_priv *priv, uint8_t addr) 359e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 3602f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine struct i2c_client *client = priv->cec; 361e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t val; 362e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark int ret; 363e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 364e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark ret = i2c_master_send(client, &addr, sizeof(addr)); 365e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (ret < 0) 366e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark goto fail; 367e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 368e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark ret = i2c_master_recv(client, &val, sizeof(val)); 369e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (ret < 0) 370e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark goto fail; 371e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 372e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return val; 373e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 374e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkfail: 375e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark dev_err(&client->dev, "Error %d reading from cec:0x%x\n", ret, addr); 376e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return 0; 377e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 378e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 3797d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moinestatic int 3802f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moineset_page(struct tda998x_priv *priv, uint16_t reg) 381e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 382e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (REG2PAGE(reg) != priv->current_page) { 3832f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine struct i2c_client *client = priv->hdmi; 384e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t buf[] = { 385e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark REG_CURPAGE, REG2PAGE(reg) 386e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark }; 387e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark int ret = i2c_master_send(client, buf, sizeof(buf)); 3887d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine if (ret < 0) { 389704d63f59900968b9b5ae92549c49db0686b87e3Jean-Francois Moine dev_err(&client->dev, "setpage %04x err %d\n", 390704d63f59900968b9b5ae92549c49db0686b87e3Jean-Francois Moine reg, ret); 3917d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine return ret; 3927d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine } 393e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 394e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark priv->current_page = REG2PAGE(reg); 395e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark } 3967d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine return 0; 397e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 398e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 399e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic int 4002f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinereg_read_range(struct tda998x_priv *priv, uint16_t reg, char *buf, int cnt) 401e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 4022f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine struct i2c_client *client = priv->hdmi; 403e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t addr = REG2ADDR(reg); 404e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark int ret; 405e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 4067d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine ret = set_page(priv, reg); 4077d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine if (ret < 0) 4087d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine return ret; 409e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 410e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark ret = i2c_master_send(client, &addr, sizeof(addr)); 411e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (ret < 0) 412e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark goto fail; 413e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 414e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark ret = i2c_master_recv(client, buf, cnt); 415e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (ret < 0) 416e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark goto fail; 417e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 418e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return ret; 419e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 420e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkfail: 421e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark dev_err(&client->dev, "Error %d reading from 0x%x\n", ret, reg); 422e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return ret; 423e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 424e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 425c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell Kingstatic void 4262f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinereg_write_range(struct tda998x_priv *priv, uint16_t reg, uint8_t *p, int cnt) 427c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King{ 4282f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine struct i2c_client *client = priv->hdmi; 429c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King uint8_t buf[cnt+1]; 430c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King int ret; 431c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 432c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[0] = REG2ADDR(reg); 433c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King memcpy(&buf[1], p, cnt); 434c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 4357d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine ret = set_page(priv, reg); 4367d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine if (ret < 0) 4377d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine return; 438c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 439c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King ret = i2c_master_send(client, buf, cnt + 1); 440c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King if (ret < 0) 441c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King dev_err(&client->dev, "Error %d writing to 0x%x\n", ret, reg); 442c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King} 443c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 4447d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moinestatic int 4452f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinereg_read(struct tda998x_priv *priv, uint16_t reg) 446e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 447e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t val = 0; 4487d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine int ret; 4497d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine 4507d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine ret = reg_read_range(priv, reg, &val, sizeof(val)); 4517d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine if (ret < 0) 4527d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine return ret; 453e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return val; 454e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 455e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 456e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic void 4572f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinereg_write(struct tda998x_priv *priv, uint16_t reg, uint8_t val) 458e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 4592f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine struct i2c_client *client = priv->hdmi; 460e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t buf[] = {REG2ADDR(reg), val}; 461e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark int ret; 462e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 4637d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine ret = set_page(priv, reg); 4647d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine if (ret < 0) 4657d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine return; 466e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 467704d63f59900968b9b5ae92549c49db0686b87e3Jean-Francois Moine ret = i2c_master_send(client, buf, sizeof(buf)); 468e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (ret < 0) 469e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark dev_err(&client->dev, "Error %d writing to 0x%x\n", ret, reg); 470e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 471e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 472e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic void 4732f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinereg_write16(struct tda998x_priv *priv, uint16_t reg, uint16_t val) 474e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 4752f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine struct i2c_client *client = priv->hdmi; 476e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t buf[] = {REG2ADDR(reg), val >> 8, val}; 477e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark int ret; 478e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 4797d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine ret = set_page(priv, reg); 4807d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine if (ret < 0) 4817d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine return; 482e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 483704d63f59900968b9b5ae92549c49db0686b87e3Jean-Francois Moine ret = i2c_master_send(client, buf, sizeof(buf)); 484e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (ret < 0) 485e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark dev_err(&client->dev, "Error %d writing to 0x%x\n", ret, reg); 486e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 487e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 488e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic void 4892f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinereg_set(struct tda998x_priv *priv, uint16_t reg, uint8_t val) 490e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 4917d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine int old_val; 4927d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine 4937d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine old_val = reg_read(priv, reg); 4947d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine if (old_val >= 0) 4957d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine reg_write(priv, reg, old_val | val); 496e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 497e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 498e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic void 4992f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinereg_clear(struct tda998x_priv *priv, uint16_t reg, uint8_t val) 500e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 5017d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine int old_val; 5027d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine 5037d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine old_val = reg_read(priv, reg); 5047d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine if (old_val >= 0) 5057d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine reg_write(priv, reg, old_val & ~val); 506e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 507e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 508e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic void 5092f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinetda998x_reset(struct tda998x_priv *priv) 510e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 511e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* reset audio and i2c master: */ 51281b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg_write(priv, REG_SOFTRESET, SOFTRESET_AUDIO | SOFTRESET_I2C_MASTER); 513e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark msleep(50); 51481b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg_write(priv, REG_SOFTRESET, 0); 515e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark msleep(50); 516e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 517e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* reset transmitter: */ 5182f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_set(priv, REG_MAIN_CNTRL0, MAIN_CNTRL0_SR); 5192f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_clear(priv, REG_MAIN_CNTRL0, MAIN_CNTRL0_SR); 520e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 521e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* PLL registers common configuration */ 5222f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_PLL_SERIAL_1, 0x00); 5232f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_PLL_SERIAL_2, PLL_SERIAL_2_SRL_NOSC(1)); 5242f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_PLL_SERIAL_3, 0x00); 5252f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_SERIALIZER, 0x00); 5262f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_BUFFER_OUT, 0x00); 5272f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_PLL_SCG1, 0x00); 5282f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_AUDIO_DIV, AUDIO_DIV_SERCLK_8); 5292f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_SEL_CLK, SEL_CLK_SEL_CLK1 | SEL_CLK_ENA_SC_CLK); 5302f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_PLL_SCGN1, 0xfa); 5312f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_PLL_SCGN2, 0x00); 5322f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_PLL_SCGR1, 0x5b); 5332f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_PLL_SCGR2, 0x00); 5342f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_PLL_SCG2, 0x10); 535bcb2481df01a9aee7a09b20d43194011edd35754Russell King 536bcb2481df01a9aee7a09b20d43194011edd35754Russell King /* Write the default value MUX register */ 5372f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_MUX_VP_VIP_OUT, 0x24); 538e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 539e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 54012473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine/* 54112473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine * only 2 interrupts may occur: screen plug/unplug and EDID read 54212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine */ 54312473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moinestatic irqreturn_t tda998x_irq_thread(int irq, void *data) 54412473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine{ 54512473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine struct tda998x_priv *priv = data; 54612473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine u8 sta, cec, lvl, flag0, flag1, flag2; 54712473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine 54812473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if (!priv) 54912473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine return IRQ_HANDLED; 55012473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine sta = cec_read(priv, REG_CEC_INTSTATUS); 55112473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine cec = cec_read(priv, REG_CEC_RXSHPDINT); 55212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine lvl = cec_read(priv, REG_CEC_RXSHPDLEV); 55312473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine flag0 = reg_read(priv, REG_INT_FLAGS_0); 55412473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine flag1 = reg_read(priv, REG_INT_FLAGS_1); 55512473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine flag2 = reg_read(priv, REG_INT_FLAGS_2); 55612473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine DRM_DEBUG_DRIVER( 55712473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine "tda irq sta %02x cec %02x lvl %02x f0 %02x f1 %02x f2 %02x\n", 55812473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine sta, cec, lvl, flag0, flag1, flag2); 55912473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if ((flag2 & INT_FLAGS_2_EDID_BLK_RD) && priv->wq_edid_wait) { 56012473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine priv->wq_edid_wait = 0; 56112473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine wake_up(&priv->wq_edid); 56212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine } else if (cec != 0) { /* HPD change */ 56312473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if (priv->encoder && priv->encoder->dev) 56412473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine drm_helper_hpd_irq_event(priv->encoder->dev); 56512473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine } 56612473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine return IRQ_HANDLED; 56712473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine} 56812473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine 569c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell Kingstatic uint8_t tda998x_cksum(uint8_t *buf, size_t bytes) 570c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King{ 571c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King uint8_t sum = 0; 572c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 573c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King while (bytes--) 574c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King sum += *buf++; 575c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King return (255 - sum) + 1; 576c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King} 577c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 578c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define HB(x) (x) 579c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King#define PB(x) (HB(2) + 1 + (x)) 580c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 581c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell Kingstatic void 5822f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinetda998x_write_if(struct tda998x_priv *priv, uint8_t bit, uint16_t addr, 583c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King uint8_t *buf, size_t size) 584c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King{ 585c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[PB(0)] = tda998x_cksum(buf, size); 586c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 5872f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_clear(priv, REG_DIP_IF_FLAGS, bit); 5882f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write_range(priv, addr, buf, size); 5892f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_set(priv, REG_DIP_IF_FLAGS, bit); 590c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King} 591c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 592c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell Kingstatic void 5932f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinetda998x_write_aif(struct tda998x_priv *priv, struct tda998x_encoder_params *p) 594c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King{ 5959e541466eed411cb5462fa9e6181c4d409e7e2efJean-Francois Moine u8 buf[PB(HDMI_AUDIO_INFOFRAME_SIZE) + 1]; 596c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 5977288ca07b638db485abec5752bd6b1faed1c33efJean-Francois Moine memset(buf, 0, sizeof(buf)); 5989e541466eed411cb5462fa9e6181c4d409e7e2efJean-Francois Moine buf[HB(0)] = HDMI_INFOFRAME_TYPE_AUDIO; 599c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[HB(1)] = 0x01; 6009e541466eed411cb5462fa9e6181c4d409e7e2efJean-Francois Moine buf[HB(2)] = HDMI_AUDIO_INFOFRAME_SIZE; 601c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[PB(1)] = p->audio_frame[1] & 0x07; /* CC */ 602c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[PB(2)] = p->audio_frame[2] & 0x1c; /* SF */ 603c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[PB(4)] = p->audio_frame[4]; 604c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[PB(5)] = p->audio_frame[5] & 0xf8; /* DM_INH + LSV */ 605c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 6062f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine tda998x_write_if(priv, DIP_IF_FLAGS_IF4, REG_IF4_HB0, buf, 607c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King sizeof(buf)); 608c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King} 609c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 610c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell Kingstatic void 6112f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinetda998x_write_avi(struct tda998x_priv *priv, struct drm_display_mode *mode) 612c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King{ 6139e541466eed411cb5462fa9e6181c4d409e7e2efJean-Francois Moine u8 buf[PB(HDMI_AVI_INFOFRAME_SIZE) + 1]; 614c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 615c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King memset(buf, 0, sizeof(buf)); 6169e541466eed411cb5462fa9e6181c4d409e7e2efJean-Francois Moine buf[HB(0)] = HDMI_INFOFRAME_TYPE_AVI; 617c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[HB(1)] = 0x02; 6189e541466eed411cb5462fa9e6181c4d409e7e2efJean-Francois Moine buf[HB(2)] = HDMI_AVI_INFOFRAME_SIZE; 619893c3e538dc338509b0c1121173355e8cfa34ff0Russell King buf[PB(1)] = HDMI_SCAN_MODE_UNDERSCAN; 620bdf6345b3262d0ddbc6405fbc0fedd2941bec08eJean-Francois Moine buf[PB(2)] = HDMI_ACTIVE_ASPECT_PICTURE; 621893c3e538dc338509b0c1121173355e8cfa34ff0Russell King buf[PB(3)] = HDMI_QUANTIZATION_RANGE_FULL << 2; 622c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[PB(4)] = drm_match_cea_mode(mode); 623c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 6242f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine tda998x_write_if(priv, DIP_IF_FLAGS_IF2, REG_IF2_HB0, buf, 625c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King sizeof(buf)); 626c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King} 627c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 6282f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinestatic void tda998x_audio_mute(struct tda998x_priv *priv, bool on) 629c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King{ 630c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King if (on) { 6312f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_set(priv, REG_SOFTRESET, SOFTRESET_AUDIO); 6322f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_clear(priv, REG_SOFTRESET, SOFTRESET_AUDIO); 6332f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); 634c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King } else { 6352f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); 636c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King } 637c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King} 638c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 639c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell Kingstatic void 6402f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moinetda998x_configure_audio(struct tda998x_priv *priv, 641c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King struct drm_display_mode *mode, struct tda998x_encoder_params *p) 642c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King{ 64385c988bb26a3da46c04284bc43f93d732986547bJean-Francois Moine uint8_t buf[6], clksel_aip, clksel_fs, cts_n, adiv; 644c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King uint32_t n; 645c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 646c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* Enable audio ports */ 6472f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ENA_AP, p->audio_cfg); 6482f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ENA_ACLK, p->audio_clk_cfg); 649c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 650c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* Set audio input source */ 651c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King switch (p->audio_format) { 652c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King case AFMT_SPDIF: 65310df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine reg_write(priv, REG_MUX_AP, MUX_AP_SELECT_SPDIF); 65410df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine clksel_aip = AIP_CLKSEL_AIP_SPDIF; 65510df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine clksel_fs = AIP_CLKSEL_FS_FS64SPDIF; 656c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King cts_n = CTS_N_M(3) | CTS_N_K(3); 657c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King break; 658c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 659c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King case AFMT_I2S: 66010df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine reg_write(priv, REG_MUX_AP, MUX_AP_SELECT_I2S); 66110df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine clksel_aip = AIP_CLKSEL_AIP_I2S; 66210df1a95d6457ead03ed804c9abece79023f3f77Jean-Francois Moine clksel_fs = AIP_CLKSEL_FS_ACLK; 663c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King cts_n = CTS_N_M(3) | CTS_N_K(3); 664c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King break; 6653b28802e37bb1ca1cab584f679c42e72a7e384f8David Herrmann 6663b28802e37bb1ca1cab584f679c42e72a7e384f8David Herrmann default: 6673b28802e37bb1ca1cab584f679c42e72a7e384f8David Herrmann BUG(); 6683b28802e37bb1ca1cab584f679c42e72a7e384f8David Herrmann return; 669c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King } 670c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 6712f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_AIP_CLKSEL, clksel_aip); 672a8b517e5312124e2dd7b6d6d9afac458aaecfbf3Jean-Francois Moine reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_LAYOUT | 673a8b517e5312124e2dd7b6d6d9afac458aaecfbf3Jean-Francois Moine AIP_CNTRL_0_ACR_MAN); /* auto CTS */ 6742f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_CTS_N, cts_n); 675c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 676c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* 677c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King * Audio input somehow depends on HDMI line rate which is 678c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King * related to pixclk. Testing showed that modes with pixclk 679c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King * >100MHz need a larger divider while <40MHz need the default. 680c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King * There is no detailed info in the datasheet, so we just 681c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King * assume 100MHz requires larger divider. 682c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King */ 6832470feccbf030652380c2d73304576137b0fb12eJean-Francois Moine adiv = AUDIO_DIV_SERCLK_8; 684c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King if (mode->clock > 100000) 6852470feccbf030652380c2d73304576137b0fb12eJean-Francois Moine adiv++; /* AUDIO_DIV_SERCLK_16 */ 6862470feccbf030652380c2d73304576137b0fb12eJean-Francois Moine 6872470feccbf030652380c2d73304576137b0fb12eJean-Francois Moine /* S/PDIF asks for a larger divider */ 6882470feccbf030652380c2d73304576137b0fb12eJean-Francois Moine if (p->audio_format == AFMT_SPDIF) 6892470feccbf030652380c2d73304576137b0fb12eJean-Francois Moine adiv++; /* AUDIO_DIV_SERCLK_16 or _32 */ 6902470feccbf030652380c2d73304576137b0fb12eJean-Francois Moine 6912f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_AUDIO_DIV, adiv); 692c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 693c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* 694c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King * This is the approximate value of N, which happens to be 695c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King * the recommended values for non-coherent clocks. 696c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King */ 697c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King n = 128 * p->audio_sample_rate / 1000; 698c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 699c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* Write the CTS and N values */ 700c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[0] = 0x44; 701c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[1] = 0x42; 702c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[2] = 0x01; 703c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[3] = n; 704c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[4] = n >> 8; 705c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[5] = n >> 16; 7062f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write_range(priv, REG_ACR_CTS_0, buf, 6); 707c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 708c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* Set CTS clock reference */ 7092f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_AIP_CLKSEL, clksel_aip | clksel_fs); 710c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 711c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* Reset CTS generator */ 7122f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS); 7132f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS); 714c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 715c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* Write the channel status */ 716f0b33b282c17337276504d6a700d0f558f1a6891Jean-Francois Moine buf[0] = IEC958_AES0_CON_NOT_COPYRIGHT; 717c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King buf[1] = 0x00; 718f0b33b282c17337276504d6a700d0f558f1a6891Jean-Francois Moine buf[2] = IEC958_AES3_CON_FS_NOTID; 719f0b33b282c17337276504d6a700d0f558f1a6891Jean-Francois Moine buf[3] = IEC958_AES4_CON_ORIGFS_NOTID | 720f0b33b282c17337276504d6a700d0f558f1a6891Jean-Francois Moine IEC958_AES4_CON_MAX_WORDLEN_24; 7212f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write_range(priv, REG_CH_STAT_B(0), buf, 4); 722c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 7232f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine tda998x_audio_mute(priv, true); 72473d5e253ac641bf95f5836c064128be78f43cd0bJean-Francois Moine msleep(20); 7252f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine tda998x_audio_mute(priv, false); 726c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 727c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* Write the audio information packet */ 7282f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine tda998x_write_aif(priv, p); 729c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King} 730c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 731e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* DRM encoder functions */ 732e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 733a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic void tda998x_encoder_set_config(struct tda998x_priv *priv, 734a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King const struct tda998x_encoder_params *p) 735e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 736c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King priv->vip_cntrl_0 = VIP_CNTRL_0_SWAP_A(p->swap_a) | 737c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King (p->mirr_a ? VIP_CNTRL_0_MIRR_A : 0) | 738c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King VIP_CNTRL_0_SWAP_B(p->swap_b) | 739c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King (p->mirr_b ? VIP_CNTRL_0_MIRR_B : 0); 740c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King priv->vip_cntrl_1 = VIP_CNTRL_1_SWAP_C(p->swap_c) | 741c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King (p->mirr_c ? VIP_CNTRL_1_MIRR_C : 0) | 742c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King VIP_CNTRL_1_SWAP_D(p->swap_d) | 743c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King (p->mirr_d ? VIP_CNTRL_1_MIRR_D : 0); 744c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King priv->vip_cntrl_2 = VIP_CNTRL_2_SWAP_E(p->swap_e) | 745c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King (p->mirr_e ? VIP_CNTRL_2_MIRR_E : 0) | 746c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King VIP_CNTRL_2_SWAP_F(p->swap_f) | 747c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King (p->mirr_f ? VIP_CNTRL_2_MIRR_F : 0); 748c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 749c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King priv->params = *p; 750e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 751e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 752a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic void tda998x_encoder_dpms(struct tda998x_priv *priv, int mode) 753e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 754e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* we only care about on or off: */ 755e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (mode != DRM_MODE_DPMS_ON) 756e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark mode = DRM_MODE_DPMS_OFF; 757e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 758e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (mode == priv->dpms) 759e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return; 760e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 761e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark switch (mode) { 762e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark case DRM_MODE_DPMS_ON: 763c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* enable video ports, audio will be enabled later */ 7642f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ENA_VP_0, 0xff); 7652f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ENA_VP_1, 0xff); 7662f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ENA_VP_2, 0xff); 767e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* set muxing after enabling ports: */ 7682f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_VIP_CNTRL_0, priv->vip_cntrl_0); 7692f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_VIP_CNTRL_1, priv->vip_cntrl_1); 7702f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_VIP_CNTRL_2, priv->vip_cntrl_2); 771e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark break; 772e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark case DRM_MODE_DPMS_OFF: 773db6aaf4d55f95dcb6b162c3a59b56eb1e85ccdfeRussell King /* disable video ports */ 7742f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ENA_VP_0, 0x00); 7752f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ENA_VP_1, 0x00); 7762f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ENA_VP_2, 0x00); 777e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark break; 778e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark } 779e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 780e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark priv->dpms = mode; 781e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 782e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 783e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic void 784e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarktda998x_encoder_save(struct drm_encoder *encoder) 785e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 786e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark DBG(""); 787e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 788e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 789e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic void 790e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarktda998x_encoder_restore(struct drm_encoder *encoder) 791e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 792e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark DBG(""); 793e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 794e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 795e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic bool 796e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarktda998x_encoder_mode_fixup(struct drm_encoder *encoder, 797e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark const struct drm_display_mode *mode, 798e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark struct drm_display_mode *adjusted_mode) 799e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 800e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return true; 801e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 802e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 803a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic int tda998x_encoder_mode_valid(struct tda998x_priv *priv, 804a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_display_mode *mode) 805e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 80692fbdfcd7d6b9db6b0a738c5bd85a4a9d731629dRussell King if (mode->clock > 150000) 80792fbdfcd7d6b9db6b0a738c5bd85a4a9d731629dRussell King return MODE_CLOCK_HIGH; 80892fbdfcd7d6b9db6b0a738c5bd85a4a9d731629dRussell King if (mode->htotal >= BIT(13)) 80992fbdfcd7d6b9db6b0a738c5bd85a4a9d731629dRussell King return MODE_BAD_HVALUE; 81092fbdfcd7d6b9db6b0a738c5bd85a4a9d731629dRussell King if (mode->vtotal >= BIT(11)) 81192fbdfcd7d6b9db6b0a738c5bd85a4a9d731629dRussell King return MODE_BAD_VVALUE; 812e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return MODE_OK; 813e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 814e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 815e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic void 816a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingtda998x_encoder_mode_set(struct tda998x_priv *priv, 817a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_display_mode *mode, 818a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_display_mode *adjusted_mode) 819e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 820088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth uint16_t ref_pix, ref_line, n_pix, n_line; 821088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth uint16_t hs_pix_s, hs_pix_e; 822088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth uint16_t vs1_pix_s, vs1_pix_e, vs1_line_s, vs1_line_e; 823088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth uint16_t vs2_pix_s, vs2_pix_e, vs2_line_s, vs2_line_e; 824088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth uint16_t vwin1_line_s, vwin1_line_e; 825088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth uint16_t vwin2_line_s, vwin2_line_e; 826088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth uint16_t de_pix_s, de_pix_e; 827e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t reg, div, rep; 828e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 829088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth /* 830088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * Internally TDA998x is using ITU-R BT.656 style sync but 831088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * we get VESA style sync. TDA998x is using a reference pixel 832088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * relative to ITU to sync to the input frame and for output 833088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * sync generation. Currently, we are using reference detection 834088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * from HS/VS, i.e. REFPIX/REFLINE denote frame start sync point 835088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * which is position of rising VS with coincident rising HS. 836088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * 837088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * Now there is some issues to take care of: 838088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * - HDMI data islands require sync-before-active 839088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * - TDA998x register values must be > 0 to be enabled 840088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * - REFLINE needs an additional offset of +1 841088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * - REFPIX needs an addtional offset of +1 for UYUV and +3 for RGB 842088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * 843088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * So we add +1 to all horizontal and vertical register values, 844088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * plus an additional +3 for REFPIX as we are using RGB input only. 845e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark */ 846088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth n_pix = mode->htotal; 847088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth n_line = mode->vtotal; 848088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth 849088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth hs_pix_e = mode->hsync_end - mode->hdisplay; 850088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth hs_pix_s = mode->hsync_start - mode->hdisplay; 851088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth de_pix_e = mode->htotal; 852088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth de_pix_s = mode->htotal - mode->hdisplay; 853088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth ref_pix = 3 + hs_pix_s; 854088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth 855179f1aa407b466c06a94f9e54abc948d1e1146e7Sebastian Hesselbarth /* 856179f1aa407b466c06a94f9e54abc948d1e1146e7Sebastian Hesselbarth * Attached LCD controllers may generate broken sync. Allow 857179f1aa407b466c06a94f9e54abc948d1e1146e7Sebastian Hesselbarth * those to adjust the position of the rising VS edge by adding 858179f1aa407b466c06a94f9e54abc948d1e1146e7Sebastian Hesselbarth * HSKEW to ref_pix. 859179f1aa407b466c06a94f9e54abc948d1e1146e7Sebastian Hesselbarth */ 860179f1aa407b466c06a94f9e54abc948d1e1146e7Sebastian Hesselbarth if (adjusted_mode->flags & DRM_MODE_FLAG_HSKEW) 861179f1aa407b466c06a94f9e54abc948d1e1146e7Sebastian Hesselbarth ref_pix += adjusted_mode->hskew; 862179f1aa407b466c06a94f9e54abc948d1e1146e7Sebastian Hesselbarth 863088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth if ((mode->flags & DRM_MODE_FLAG_INTERLACE) == 0) { 864088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth ref_line = 1 + mode->vsync_start - mode->vdisplay; 865088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vwin1_line_s = mode->vtotal - mode->vdisplay - 1; 866088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vwin1_line_e = vwin1_line_s + mode->vdisplay; 867088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vs1_pix_s = vs1_pix_e = hs_pix_s; 868088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vs1_line_s = mode->vsync_start - mode->vdisplay; 869088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vs1_line_e = vs1_line_s + 870088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth mode->vsync_end - mode->vsync_start; 871088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vwin2_line_s = vwin2_line_e = 0; 872088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vs2_pix_s = vs2_pix_e = 0; 873088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vs2_line_s = vs2_line_e = 0; 874088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth } else { 875088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth ref_line = 1 + (mode->vsync_start - mode->vdisplay)/2; 876088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vwin1_line_s = (mode->vtotal - mode->vdisplay)/2; 877088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vwin1_line_e = vwin1_line_s + mode->vdisplay/2; 878088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vs1_pix_s = vs1_pix_e = hs_pix_s; 879088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vs1_line_s = (mode->vsync_start - mode->vdisplay)/2; 880088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vs1_line_e = vs1_line_s + 881088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth (mode->vsync_end - mode->vsync_start)/2; 882088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vwin2_line_s = vwin1_line_s + mode->vtotal/2; 883088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vwin2_line_e = vwin2_line_s + mode->vdisplay/2; 884088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vs2_pix_s = vs2_pix_e = hs_pix_s + mode->htotal/2; 885088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vs2_line_s = vs1_line_s + mode->vtotal/2 ; 886088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth vs2_line_e = vs2_line_s + 887088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth (mode->vsync_end - mode->vsync_start)/2; 888088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth } 889e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 890e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark div = 148500 / mode->clock; 8913ae471f73a1d581e078b5b06d08d7b82833a093fJean-Francois Moine if (div != 0) { 8923ae471f73a1d581e078b5b06d08d7b82833a093fJean-Francois Moine div--; 8933ae471f73a1d581e078b5b06d08d7b82833a093fJean-Francois Moine if (div > 3) 8943ae471f73a1d581e078b5b06d08d7b82833a093fJean-Francois Moine div = 3; 8953ae471f73a1d581e078b5b06d08d7b82833a093fJean-Francois Moine } 896e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 897e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* mute the audio FIFO: */ 8982f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); 899e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 900e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* set HDMI HDCP mode off: */ 90181b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg_write(priv, REG_TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS); 9022f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_clear(priv, REG_TX33, TX33_HDMI); 9032f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(0)); 904e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 905e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* no pre-filter or interpolator: */ 9062f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_HVF_CNTRL_0, HVF_CNTRL_0_PREFIL(0) | 907e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark HVF_CNTRL_0_INTPOL(0)); 9082f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_VIP_CNTRL_5, VIP_CNTRL_5_SP_CNT(0)); 9092f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_VIP_CNTRL_4, VIP_CNTRL_4_BLANKIT(0) | 910e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark VIP_CNTRL_4_BLC(0)); 911e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 9122f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_clear(priv, REG_PLL_SERIAL_1, PLL_SERIAL_1_SRL_MAN_IZ); 913a8b517e5312124e2dd7b6d6d9afac458aaecfbf3Jean-Francois Moine reg_clear(priv, REG_PLL_SERIAL_3, PLL_SERIAL_3_SRL_CCIR | 914a8b517e5312124e2dd7b6d6d9afac458aaecfbf3Jean-Francois Moine PLL_SERIAL_3_SRL_DE); 9152f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_SERIALIZER, 0); 9162f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_HVF_CNTRL_1, HVF_CNTRL_1_VQR(0)); 917e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 918e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* TODO enable pixel repeat for pixel rates less than 25Msamp/s */ 919e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark rep = 0; 9202f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_RPT_CNTRL, 0); 9212f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_SEL_CLK, SEL_CLK_SEL_VRF_CLK(0) | 922e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark SEL_CLK_SEL_CLK1 | SEL_CLK_ENA_SC_CLK); 923e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 9242f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_PLL_SERIAL_2, PLL_SERIAL_2_SRL_NOSC(div) | 925e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark PLL_SERIAL_2_SRL_PR(rep)); 926e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 927e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* set color matrix bypass flag: */ 92881b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg_write(priv, REG_MAT_CONTRL, MAT_CONTRL_MAT_BP | 92981b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine MAT_CONTRL_MAT_SC(1)); 930e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 931e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* set BIAS tmds value: */ 9322f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ANA_GENERAL, 0x09); 933e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 934088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth /* 935088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * Sync on rising HSYNC/VSYNC 936088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth */ 93781b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg = VIP_CNTRL_3_SYNC_HS; 938088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth 939088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth /* 940088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * TDA19988 requires high-active sync at input stage, 941088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth * so invert low-active sync provided by master encoder here 942088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth */ 943088d61d1fdfde56850c157138a6dc08880c1853dSebastian Hesselbarth if (mode->flags & DRM_MODE_FLAG_NHSYNC) 94481b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg |= VIP_CNTRL_3_H_TGL; 945e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (mode->flags & DRM_MODE_FLAG_NVSYNC) 94681b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg |= VIP_CNTRL_3_V_TGL; 94781b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg_write(priv, REG_VIP_CNTRL_3, reg); 9482f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine 9492f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_VIDFORMAT, 0x00); 9502f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_REFPIX_MSB, ref_pix); 9512f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_REFLINE_MSB, ref_line); 9522f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_NPIX_MSB, n_pix); 9532f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_NLINE_MSB, n_line); 9542f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VS_LINE_STRT_1_MSB, vs1_line_s); 9552f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VS_PIX_STRT_1_MSB, vs1_pix_s); 9562f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VS_LINE_END_1_MSB, vs1_line_e); 9572f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VS_PIX_END_1_MSB, vs1_pix_e); 9582f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VS_LINE_STRT_2_MSB, vs2_line_s); 9592f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VS_PIX_STRT_2_MSB, vs2_pix_s); 9602f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VS_LINE_END_2_MSB, vs2_line_e); 9612f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VS_PIX_END_2_MSB, vs2_pix_e); 9622f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_HS_PIX_START_MSB, hs_pix_s); 9632f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_HS_PIX_STOP_MSB, hs_pix_e); 9642f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VWIN_START_1_MSB, vwin1_line_s); 9652f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VWIN_END_1_MSB, vwin1_line_e); 9662f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VWIN_START_2_MSB, vwin2_line_s); 9672f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_VWIN_END_2_MSB, vwin2_line_e); 9682f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_DE_START_MSB, de_pix_s); 9692f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write16(priv, REG_DE_STOP_MSB, de_pix_e); 970e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 971e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (priv->rev == TDA19988) { 972e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* let incoming pixels fill the active space (if any) */ 9732f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ENABLE_SPACE, 0x00); 974e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark } 975e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 97681b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine /* 97781b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine * Always generate sync polarity relative to input sync and 97881b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine * revert input stage toggled sync at output stage 97981b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine */ 98081b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg = TBG_CNTRL_1_DWIN_DIS | TBG_CNTRL_1_TGL_EN; 98181b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine if (mode->flags & DRM_MODE_FLAG_NHSYNC) 98281b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg |= TBG_CNTRL_1_H_TGL; 98381b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine if (mode->flags & DRM_MODE_FLAG_NVSYNC) 98481b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg |= TBG_CNTRL_1_V_TGL; 98581b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg_write(priv, REG_TBG_CNTRL_1, reg); 98681b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine 987e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* must be last register set: */ 98881b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg_write(priv, REG_TBG_CNTRL_0, 0); 989c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 990c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* Only setup the info frames if the sink is HDMI */ 991c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King if (priv->is_hdmi_sink) { 992c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King /* We need to turn HDMI HDCP stuff on to get audio through */ 99381b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg &= ~TBG_CNTRL_1_DWIN_DIS; 99481b53a166f5cdf4e5bec47fc8884c994de82dc6bJean-Francois Moine reg_write(priv, REG_TBG_CNTRL_1, reg); 9952f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(1)); 9962f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_set(priv, REG_TX33, TX33_HDMI); 997c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 9982f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine tda998x_write_avi(priv, adjusted_mode); 999c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King 1000c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King if (priv->params.audio_cfg) 10012f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine tda998x_configure_audio(priv, adjusted_mode, 1002c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King &priv->params); 1003c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King } 1004e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1005e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1006e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic enum drm_connector_status 1007a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingtda998x_encoder_detect(struct tda998x_priv *priv) 1008e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 10092f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine uint8_t val = cec_read(priv, REG_CEC_RXSHPDLEV); 10102f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine 1011e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return (val & CEC_RXSHPDLEV_HPD) ? connector_status_connected : 1012e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark connector_status_disconnected; 1013e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1014e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1015a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic int read_edid_block(struct tda998x_priv *priv, uint8_t *buf, int blk) 1016e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 1017e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t offset, segptr; 1018e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark int ret, i; 1019e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1020e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark offset = (blk & 1) ? 128 : 0; 1021e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark segptr = blk / 2; 1022e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 10232f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_DDC_ADDR, 0xa0); 10242f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_DDC_OFFS, offset); 10252f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_DDC_SEGM_ADDR, 0x60); 10262f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_DDC_SEGM, segptr); 1027e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1028e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* enable reading EDID: */ 102912473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine priv->wq_edid_wait = 1; 10302f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_EDID_CTRL, 0x1); 1031e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1032e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* flag must be cleared by sw: */ 10332f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_EDID_CTRL, 0x0); 1034e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1035e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* wait for block read to complete: */ 103612473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if (priv->hdmi->irq) { 103712473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine i = wait_event_timeout(priv->wq_edid, 103812473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine !priv->wq_edid_wait, 103912473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine msecs_to_jiffies(100)); 104012473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if (i < 0) { 10415e7fe2fef4347d7a09bb15588d8bbe3cb83b6ed4Russell King dev_err(&priv->hdmi->dev, "read edid wait err %d\n", i); 104212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine return i; 104312473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine } 104412473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine } else { 1045713456db179356c6b32a50ea1910fc509615c457Russell King for (i = 100; i > 0; i--) { 1046713456db179356c6b32a50ea1910fc509615c457Russell King msleep(1); 104712473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine ret = reg_read(priv, REG_INT_FLAGS_2); 104812473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if (ret < 0) 104912473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine return ret; 105012473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if (ret & INT_FLAGS_2_EDID_BLK_RD) 105112473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine break; 105212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine } 1053e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark } 1054e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 105512473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if (i == 0) { 10565e7fe2fef4347d7a09bb15588d8bbe3cb83b6ed4Russell King dev_err(&priv->hdmi->dev, "read edid timeout\n"); 1057e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return -ETIMEDOUT; 105812473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine } 1059e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 10602f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine ret = reg_read_range(priv, REG_EDID_DATA_0, buf, EDID_LENGTH); 1061e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (ret != EDID_LENGTH) { 10625e7fe2fef4347d7a09bb15588d8bbe3cb83b6ed4Russell King dev_err(&priv->hdmi->dev, "failed to read edid block %d: %d\n", 10635e7fe2fef4347d7a09bb15588d8bbe3cb83b6ed4Russell King blk, ret); 1064e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return ret; 1065e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark } 1066e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1067e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return 0; 1068e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1069e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1070a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic uint8_t *do_get_edid(struct tda998x_priv *priv) 1071e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 1072704d63f59900968b9b5ae92549c49db0686b87e3Jean-Francois Moine int j, valid_extensions = 0; 1073e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t *block, *new; 1074e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark bool print_bad_edid = drm_debug & DRM_UT_KMS; 1075e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1076e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) 1077e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return NULL; 1078e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1079063b472fbb44ac562797a630ac3516720f588140Russell King if (priv->rev == TDA19988) 10802f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_clear(priv, REG_TX4, TX4_PD_RAM); 1081063b472fbb44ac562797a630ac3516720f588140Russell King 1082e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* base block fetch */ 1083a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King if (read_edid_block(priv, block, 0)) 1084e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark goto fail; 1085e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1086e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (!drm_edid_block_valid(block, 0, print_bad_edid)) 1087e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark goto fail; 1088e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1089e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* if there's no extensions, we're done */ 1090e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (block[0x7e] == 0) 1091063b472fbb44ac562797a630ac3516720f588140Russell King goto done; 1092e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1093e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); 1094e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (!new) 1095e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark goto fail; 1096e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark block = new; 1097e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1098e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark for (j = 1; j <= block[0x7e]; j++) { 1099e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint8_t *ext_block = block + (valid_extensions + 1) * EDID_LENGTH; 1100a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King if (read_edid_block(priv, ext_block, j)) 1101e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark goto fail; 1102e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1103e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (!drm_edid_block_valid(ext_block, j, print_bad_edid)) 1104e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark goto fail; 1105e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1106e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark valid_extensions++; 1107e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark } 1108e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1109e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (valid_extensions != block[0x7e]) { 1110e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; 1111e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark block[0x7e] = valid_extensions; 1112e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); 1113e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (!new) 1114e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark goto fail; 1115e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark block = new; 1116e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark } 1117e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1118063b472fbb44ac562797a630ac3516720f588140Russell Kingdone: 1119063b472fbb44ac562797a630ac3516720f588140Russell King if (priv->rev == TDA19988) 11202f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_set(priv, REG_TX4, TX4_PD_RAM); 1121063b472fbb44ac562797a630ac3516720f588140Russell King 1122e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return block; 1123e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1124e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkfail: 1125063b472fbb44ac562797a630ac3516720f588140Russell King if (priv->rev == TDA19988) 11262f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_set(priv, REG_TX4, TX4_PD_RAM); 11275e7fe2fef4347d7a09bb15588d8bbe3cb83b6ed4Russell King dev_warn(&priv->hdmi->dev, "failed to read EDID\n"); 1128e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark kfree(block); 1129e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return NULL; 1130e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1131e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1132e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic int 1133a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingtda998x_encoder_get_modes(struct tda998x_priv *priv, 1134a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_connector *connector) 1135e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 1136a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct edid *edid = (struct edid *)do_get_edid(priv); 1137e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark int n = 0; 1138e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1139e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (edid) { 1140e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark drm_mode_connector_update_edid_property(connector, edid); 1141e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark n = drm_add_edid_modes(connector, edid); 1142c4c11dd160a8cc98f402c4e12f94b1572e822ffdRussell King priv->is_hdmi_sink = drm_detect_hdmi_monitor(edid); 1143e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark kfree(edid); 1144e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark } 1145e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1146e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return n; 1147e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1148e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1149a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic void tda998x_encoder_set_polling(struct tda998x_priv *priv, 1150a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_connector *connector) 1151e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 115212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if (priv->hdmi->irq) 115312473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine connector->polled = DRM_CONNECTOR_POLL_HPD; 115412473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine else 115512473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine connector->polled = DRM_CONNECTOR_POLL_CONNECT | 115612473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine DRM_CONNECTOR_POLL_DISCONNECT; 1157e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1158e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1159e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic int 1160e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarktda998x_encoder_set_property(struct drm_encoder *encoder, 1161e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark struct drm_connector *connector, 1162e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark struct drm_property *property, 1163e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark uint64_t val) 1164e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 1165e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark DBG(""); 1166e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return 0; 1167e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1168e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1169a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic void tda998x_destroy(struct tda998x_priv *priv) 1170e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 117112473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine /* disable all IRQs and free the IRQ handler */ 117212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine cec_write(priv, REG_CEC_RXSHPDINTENA, 0); 117312473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine reg_clear(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD); 117412473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if (priv->hdmi->irq) 117512473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine free_irq(priv->hdmi->irq, priv); 117612473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine 1177fc275a74eb816c12d4fc226344e734872ed0b2f9Jean-Francois Moine if (priv->cec) 1178fc275a74eb816c12d4fc226344e734872ed0b2f9Jean-Francois Moine i2c_unregister_device(priv->cec); 1179a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King} 1180a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1181a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King/* Slave encoder support */ 1182a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1183a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic void 1184a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingtda998x_encoder_slave_set_config(struct drm_encoder *encoder, void *params) 1185a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King{ 1186a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King tda998x_encoder_set_config(to_tda998x_priv(encoder), params); 1187a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King} 1188a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1189a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic void tda998x_encoder_slave_destroy(struct drm_encoder *encoder) 1190a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King{ 1191a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct tda998x_priv *priv = to_tda998x_priv(encoder); 1192a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1193a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King tda998x_destroy(priv); 11942e48cecb55435e10c93c6aface1a1c7ef32f4e71Guido MartÃnez drm_i2c_encoder_destroy(encoder); 1195e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark kfree(priv); 1196e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1197e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1198a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic void tda998x_encoder_slave_dpms(struct drm_encoder *encoder, int mode) 1199a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King{ 1200a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King tda998x_encoder_dpms(to_tda998x_priv(encoder), mode); 1201a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King} 1202a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1203a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic int tda998x_encoder_slave_mode_valid(struct drm_encoder *encoder, 1204a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_display_mode *mode) 1205a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King{ 1206a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King return tda998x_encoder_mode_valid(to_tda998x_priv(encoder), mode); 1207a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King} 1208a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1209a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic void 1210a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingtda998x_encoder_slave_mode_set(struct drm_encoder *encoder, 1211a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_display_mode *mode, 1212a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_display_mode *adjusted_mode) 1213a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King{ 1214a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King tda998x_encoder_mode_set(to_tda998x_priv(encoder), mode, adjusted_mode); 1215a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King} 1216a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1217a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic enum drm_connector_status 1218a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingtda998x_encoder_slave_detect(struct drm_encoder *encoder, 1219a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_connector *connector) 1220a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King{ 1221a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King return tda998x_encoder_detect(to_tda998x_priv(encoder)); 1222a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King} 1223a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1224a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic int tda998x_encoder_slave_get_modes(struct drm_encoder *encoder, 1225a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_connector *connector) 1226a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King{ 1227a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King return tda998x_encoder_get_modes(to_tda998x_priv(encoder), connector); 1228a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King} 1229a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1230a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic int 1231a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingtda998x_encoder_slave_create_resources(struct drm_encoder *encoder, 1232a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_connector *connector) 1233a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King{ 1234a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King tda998x_encoder_set_polling(to_tda998x_priv(encoder), connector); 1235a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King return 0; 1236a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King} 1237a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1238a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic struct drm_encoder_slave_funcs tda998x_encoder_slave_funcs = { 1239a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King .set_config = tda998x_encoder_slave_set_config, 1240a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King .destroy = tda998x_encoder_slave_destroy, 1241a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King .dpms = tda998x_encoder_slave_dpms, 1242e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark .save = tda998x_encoder_save, 1243e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark .restore = tda998x_encoder_restore, 1244e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark .mode_fixup = tda998x_encoder_mode_fixup, 1245a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King .mode_valid = tda998x_encoder_slave_mode_valid, 1246a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King .mode_set = tda998x_encoder_slave_mode_set, 1247a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King .detect = tda998x_encoder_slave_detect, 1248a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King .get_modes = tda998x_encoder_slave_get_modes, 1249a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King .create_resources = tda998x_encoder_slave_create_resources, 1250e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark .set_property = tda998x_encoder_set_property, 1251e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark}; 1252e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1253e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* I2C driver functions */ 1254e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1255e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic int 1256e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarktda998x_probe(struct i2c_client *client, const struct i2c_device_id *id) 1257e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 1258e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return 0; 1259e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1260e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1261e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic int 1262e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarktda998x_remove(struct i2c_client *client) 1263e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 1264e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return 0; 1265e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1266e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1267a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic int tda998x_create(struct i2c_client *client, struct tda998x_priv *priv) 1268e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 12690d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine struct device_node *np = client->dev.of_node; 12700d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine u32 video; 1271fb7544d7732f780df989fabf31c5852be953daadRussell King int rev_lo, rev_hi, ret; 1272e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 12735e74c22cd1e0f9e49573fe580de47e198ee04975Russell King priv->vip_cntrl_0 = VIP_CNTRL_0_SWAP_A(2) | VIP_CNTRL_0_SWAP_B(3); 12745e74c22cd1e0f9e49573fe580de47e198ee04975Russell King priv->vip_cntrl_1 = VIP_CNTRL_1_SWAP_C(0) | VIP_CNTRL_1_SWAP_D(1); 12755e74c22cd1e0f9e49573fe580de47e198ee04975Russell King priv->vip_cntrl_2 = VIP_CNTRL_2_SWAP_E(4) | VIP_CNTRL_2_SWAP_F(5); 12765e74c22cd1e0f9e49573fe580de47e198ee04975Russell King 12772eb4c7b1e7f275fe833aabe0a251b8e3f767fb08Jean-Francois Moine priv->current_page = 0xff; 12782f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine priv->hdmi = client; 1279e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark priv->cec = i2c_new_dummy(client->adapter, 0x34); 1280a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King if (!priv->cec) 12816ae668cc19e8b18df28cd67b3448d9abd79284a4Jean-Francois Moine return -ENODEV; 128212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine 1283e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark priv->dpms = DRM_MODE_DPMS_OFF; 1284e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1285e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* wake up the device: */ 12862f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine cec_write(priv, REG_CEC_ENAMODS, 1287e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark CEC_ENAMODS_EN_RXSENS | CEC_ENAMODS_EN_HDMI); 1288e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 12892f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine tda998x_reset(priv); 1290e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1291e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* read version: */ 1292fb7544d7732f780df989fabf31c5852be953daadRussell King rev_lo = reg_read(priv, REG_VERSION_LSB); 1293fb7544d7732f780df989fabf31c5852be953daadRussell King rev_hi = reg_read(priv, REG_VERSION_MSB); 1294fb7544d7732f780df989fabf31c5852be953daadRussell King if (rev_lo < 0 || rev_hi < 0) { 1295fb7544d7732f780df989fabf31c5852be953daadRussell King ret = rev_lo < 0 ? rev_lo : rev_hi; 12967d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256Jean-Francois Moine goto fail; 1297fb7544d7732f780df989fabf31c5852be953daadRussell King } 1298fb7544d7732f780df989fabf31c5852be953daadRussell King 1299fb7544d7732f780df989fabf31c5852be953daadRussell King priv->rev = rev_lo | rev_hi << 8; 1300e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1301e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* mask off feature bits: */ 1302e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark priv->rev &= ~0x30; /* not-hdcp and not-scalar bit */ 1303e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1304e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark switch (priv->rev) { 1305b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine case TDA9989N2: 1306b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine dev_info(&client->dev, "found TDA9989 n2"); 1307b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine break; 1308b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine case TDA19989: 1309b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine dev_info(&client->dev, "found TDA19989"); 1310b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine break; 1311b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine case TDA19989N2: 1312b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine dev_info(&client->dev, "found TDA19989 n2"); 1313b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine break; 1314b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine case TDA19988: 1315b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine dev_info(&client->dev, "found TDA19988"); 1316b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine break; 1317e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark default: 1318b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine dev_err(&client->dev, "found unsupported device: %04x\n", 1319b728fab7026b9db5a9bb60c7638765cfa4ee50c1Jean-Francois Moine priv->rev); 1320e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark goto fail; 1321e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark } 1322e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1323e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* after reset, enable DDC: */ 13242f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_DDC_DISABLE, 0x00); 1325e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1326e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* set clock on DDC channel: */ 13272f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_write(priv, REG_TX3, 39); 1328e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1329e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* if necessary, disable multi-master: */ 1330e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (priv->rev == TDA19989) 13312f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine reg_set(priv, REG_I2C_MASTER, I2C_MASTER_DIS_MM); 1332e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 13332f7f730a4f0fd3376dda9266203f29ceccd0a67fJean-Francois Moine cec_write(priv, REG_CEC_FRO_IM_CLK_CTRL, 1334e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark CEC_FRO_IM_CLK_CTRL_GHOST_DIS | CEC_FRO_IM_CLK_CTRL_IMCLK_SEL); 1335e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 133612473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine /* initialize the optional IRQ */ 133712473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if (client->irq) { 133812473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine int irqf_trigger; 133912473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine 134012473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine /* init read EDID waitqueue */ 134112473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine init_waitqueue_head(&priv->wq_edid); 134212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine 134312473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine /* clear pending interrupts */ 134412473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine reg_read(priv, REG_INT_FLAGS_0); 134512473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine reg_read(priv, REG_INT_FLAGS_1); 134612473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine reg_read(priv, REG_INT_FLAGS_2); 134712473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine 134812473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine irqf_trigger = 134912473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine irqd_get_trigger_type(irq_get_irq_data(client->irq)); 135012473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine ret = request_threaded_irq(client->irq, NULL, 135112473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine tda998x_irq_thread, 135212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine irqf_trigger | IRQF_ONESHOT, 135312473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine "tda998x", priv); 135412473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine if (ret) { 135512473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine dev_err(&client->dev, 135612473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine "failed to request IRQ#%u: %d\n", 135712473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine client->irq, ret); 135812473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine goto fail; 135912473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine } 136012473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine 136112473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine /* enable HPD irq */ 136212473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine cec_write(priv, REG_CEC_RXSHPDINTENA, CEC_RXSHPDLEV_HPD); 136312473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine } 136412473b7d8e6074c7d4c2816afa6027354ce9a502Jean-Francois Moine 1365e47826274e8871bc6b35f82d35aea53db0f4ae31Jean-Francois Moine /* enable EDID read irq: */ 1366e47826274e8871bc6b35f82d35aea53db0f4ae31Jean-Francois Moine reg_set(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD); 1367e47826274e8871bc6b35f82d35aea53db0f4ae31Jean-Francois Moine 13680d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine if (!np) 13690d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine return 0; /* non-DT */ 13700d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine 13710d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine /* get the optional video properties */ 13720d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine ret = of_property_read_u32(np, "video-ports", &video); 13730d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine if (ret == 0) { 13740d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine priv->vip_cntrl_0 = video >> 16; 13750d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine priv->vip_cntrl_1 = video >> 8; 13760d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine priv->vip_cntrl_2 = video; 13770d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine } 13780d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine 1379e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return 0; 1380e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1381e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkfail: 1382e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark /* if encoder_init fails, the encoder slave is never registered, 1383e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark * so cleanup here: 1384e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark */ 1385e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark if (priv->cec) 1386e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark i2c_unregister_device(priv->cec); 1387e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return -ENXIO; 1388e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1389e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1390a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell Kingstatic int tda998x_encoder_init(struct i2c_client *client, 1391a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_device *dev, 1392a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct drm_encoder_slave *encoder_slave) 1393a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King{ 1394a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King struct tda998x_priv *priv; 1395a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King int ret; 1396a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1397a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King priv = kzalloc(sizeof(*priv), GFP_KERNEL); 1398a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King if (!priv) 1399a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King return -ENOMEM; 1400a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1401a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King priv->encoder = &encoder_slave->base; 1402a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1403a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King ret = tda998x_create(client, priv); 1404a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King if (ret) { 1405a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King kfree(priv); 1406a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King return ret; 1407a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King } 1408a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1409a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King encoder_slave->slave_priv = priv; 1410a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King encoder_slave->slave_funcs = &tda998x_encoder_slave_funcs; 1411a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 1412a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King return 0; 1413a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King} 1414a8f4d4d63739e4bca459ff40636f1d9e4b7ef5e6Russell King 14150d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine#ifdef CONFIG_OF 14160d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moinestatic const struct of_device_id tda998x_dt_ids[] = { 14170d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine { .compatible = "nxp,tda998x", }, 14180d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine { } 14190d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine}; 14200d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois MoineMODULE_DEVICE_TABLE(of, tda998x_dt_ids); 14210d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine#endif 14220d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine 1423e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic struct i2c_device_id tda998x_ids[] = { 1424e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark { "tda998x", 0 }, 1425e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark { } 1426e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark}; 1427e7792ce2da5ded80861db787ace9b57ecf7bc96cRob ClarkMODULE_DEVICE_TABLE(i2c, tda998x_ids); 1428e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1429e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic struct drm_i2c_encoder_driver tda998x_driver = { 1430e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark .i2c_driver = { 1431e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark .probe = tda998x_probe, 1432e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark .remove = tda998x_remove, 1433e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark .driver = { 1434e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark .name = "tda998x", 14350d44ea190387e21a7e6f6d7c9dd44df2e85d007aJean-Francois Moine .of_match_table = of_match_ptr(tda998x_dt_ids), 1436e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark }, 1437e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark .id_table = tda998x_ids, 1438e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark }, 1439e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark .encoder_init = tda998x_encoder_init, 1440e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark}; 1441e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1442e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark/* Module initialization */ 1443e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1444e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic int __init 1445e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarktda998x_init(void) 1446e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 1447e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark DBG(""); 1448e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark return drm_i2c_encoder_register(THIS_MODULE, &tda998x_driver); 1449e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1450e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1451e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkstatic void __exit 1452e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarktda998x_exit(void) 1453e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark{ 1454e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark DBG(""); 1455e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark drm_i2c_encoder_unregister(&tda998x_driver); 1456e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark} 1457e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1458e7792ce2da5ded80861db787ace9b57ecf7bc96cRob ClarkMODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); 1459e7792ce2da5ded80861db787ace9b57ecf7bc96cRob ClarkMODULE_DESCRIPTION("NXP Semiconductors TDA998X HDMI Encoder"); 1460e7792ce2da5ded80861db787ace9b57ecf7bc96cRob ClarkMODULE_LICENSE("GPL"); 1461e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clark 1462e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkmodule_init(tda998x_init); 1463e7792ce2da5ded80861db787ace9b57ecf7bc96cRob Clarkmodule_exit(tda998x_exit); 1464