11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* mga_irq.c -- IRQ handling for radeon -*- linux-c -*- 20a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes */ 30a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes/* 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. 5b5e89ed53ed8d24f83ba1941c07382af00ed238eDave Airlie * 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The Weather Channel (TM) funded Tungsten Graphics to develop the 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * initial release of the Radeon 8500 driver under the XFree86 license. 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This notice must be preserved. 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Permission is hereby granted, free of charge, to any person obtaining a 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * copy of this software and associated documentation files (the "Software"), 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * to deal in the Software without restriction, including without limitation 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the rights to use, copy, modify, merge, publish, distribute, sublicense, 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * and/or sell copies of the Software, and to permit persons to whom the 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Software is furnished to do so, subject to the following conditions: 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The above copyright notice and this permission notice (including the next 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * paragraph) shall be included in all copies or substantial portions of the 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Software. 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * DEALINGS IN THE SOFTWARE. 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Authors: 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Keith Whitwell <keith@tungstengraphics.com> 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Eric Anholt <anholt@FreeBSD.org> 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 34760285e7e7ab282c25b5e90816f7c47000557f4fDavid Howells#include <drm/drmP.h> 35760285e7e7ab282c25b5e90816f7c47000557f4fDavid Howells#include <drm/mga_drm.h> 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "mga_drv.h" 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 380a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnesu32 mga_get_vblank_counter(struct drm_device *dev, int crtc) 390a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes{ 400a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes const drm_mga_private_t *const dev_priv = 410a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes (drm_mga_private_t *) dev->dev_private; 420a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes 430a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes if (crtc != 0) 440a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes return 0; 450a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes 460a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes return atomic_read(&dev_priv->vbl_received); 470a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes} 480a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes 490a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes 50e9f0d76f3bcd4dda7136baaaaf45bda3b13ff40fDaniel Vetterirqreturn_t mga_driver_irq_handler(int irq, void *arg) 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 52eddca551a3e7be2fed54282f255f18efe9ead131Dave Airlie struct drm_device *dev = (struct drm_device *) arg; 53b5e89ed53ed8d24f83ba1941c07382af00ed238eDave Airlie drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int status; 556795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie int handled = 0; 566795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie 576795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie status = MGA_READ(MGA_STATUS); 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* VBLANK interrupt */ 60b5e89ed53ed8d24f83ba1941c07382af00ed238eDave Airlie if (status & MGA_VLINEPEN) { 61b5e89ed53ed8d24f83ba1941c07382af00ed238eDave Airlie MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR); 620a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes atomic_inc(&dev_priv->vbl_received); 630a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes drm_handle_vblank(dev, 0); 646795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie handled = 1; 656795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie } 666795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie 676795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie /* SOFTRAP interrupt */ 686795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie if (status & MGA_SOFTRAPEN) { 696795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie const u32 prim_start = MGA_READ(MGA_PRIMADDRESS); 70b5e89ed53ed8d24f83ba1941c07382af00ed238eDave Airlie const u32 prim_end = MGA_READ(MGA_PRIMEND); 716795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie 720a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes 736795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR); 746795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie 756795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie /* In addition to clearing the interrupt-pending bit, we 766795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie * have to write to MGA_PRIMEND to re-start the DMA operation. 776795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie */ 78f2b2cb790ee873b6853ec99478d68dd9cd083132Nicolas Kaiser if ((prim_start & ~0x03) != (prim_end & ~0x03)) 796795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie MGA_WRITE(MGA_PRIMEND, prim_end); 806795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie 816795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie atomic_inc(&dev_priv->last_fence_retired); 8257ed0f7b4375f4cb0ec3eccbc81f262294eefbcdDaniel Vetter wake_up(&dev_priv->fence_queue); 836795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie handled = 1; 846795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie } 856795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie 860a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes if (handled) 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return IRQ_HANDLED; 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return IRQ_NONE; 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 910a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnesint mga_enable_vblank(struct drm_device *dev, int crtc) 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 930a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 950a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes if (crtc != 0) { 960a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes DRM_ERROR("tried to enable vblank on non-existent crtc %d\n", 970a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes crtc); 980a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes return 0; 990a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes } 100ac741ab71bb39e6977694ac0cc26678d8673cda4Jesse Barnes 1010a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); 1020a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes return 0; 1030a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes} 104ac741ab71bb39e6977694ac0cc26678d8673cda4Jesse Barnes 1050a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes 1060a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnesvoid mga_disable_vblank(struct drm_device *dev, int crtc) 1070a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes{ 1080a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes if (crtc != 0) { 1090a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes DRM_ERROR("tried to disable vblank on non-existent crtc %d\n", 1100a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes crtc); 1110a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes } 1120a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes 1130a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes /* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have 1140a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes * a nice hardware counter that tracks the number of refreshes when 1150a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes * the interrupt is disabled, and the kernel doesn't know the refresh 1160a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes * rate to calculate an estimate. 1170a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes */ 1180a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */ 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 121f2b2cb790ee873b6853ec99478d68dd9cd083132Nicolas Kaiserint mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence) 1226795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie{ 1236795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 1246795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie unsigned int cur_fence; 1256795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie int ret = 0; 1266795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie 1276795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie /* Assume that the user has missed the current sequence number 1286795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie * by about a day rather than she wants to wait for years 1296795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie * using fences. 1306795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie */ 131bfd8303af0c46bd094289ee4e65f1e4bcc4fb7d3Daniel Vetter DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * HZ, 1326795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie (((cur_fence = atomic_read(&dev_priv->last_fence_retired)) 1336795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie - *sequence) <= (1 << 23))); 1346795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie 1356795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie *sequence = cur_fence; 1366795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie 1376795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie return ret; 1386795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie} 1396795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie 140f2b2cb790ee873b6853ec99478d68dd9cd083132Nicolas Kaiservoid mga_driver_irq_preinstall(struct drm_device *dev) 1416795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie{ 1426795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Disable *all* interrupts */ 145b5e89ed53ed8d24f83ba1941c07382af00ed238eDave Airlie MGA_WRITE(MGA_IEN, 0); 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Clear bits if they're already high */ 147b5e89ed53ed8d24f83ba1941c07382af00ed238eDave Airlie MGA_WRITE(MGA_ICLEAR, ~0); 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1500a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnesint mga_driver_irq_postinstall(struct drm_device *dev) 1516795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie{ 1526795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 1536795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie 15457ed0f7b4375f4cb0ec3eccbc81f262294eefbcdDaniel Vetter init_waitqueue_head(&dev_priv->fence_queue); 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1560a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes /* Turn on soft trap interrupt. Vertical blank interrupts are enabled 1570a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes * in mga_enable_vblank. 1580a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes */ 1590a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN); 1600a3e67a4caac273a3bfc4ced3da364830b1ab241Jesse Barnes return 0; 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 163f2b2cb790ee873b6853ec99478d68dd9cd083132Nicolas Kaiservoid mga_driver_irq_uninstall(struct drm_device *dev) 164b5e89ed53ed8d24f83ba1941c07382af00ed238eDave Airlie{ 165b5e89ed53ed8d24f83ba1941c07382af00ed238eDave Airlie drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!dev_priv) 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Disable *all* interrupts */ 1706795c985a648d1e90b367cc1387c18205ecca4b8Dave Airlie MGA_WRITE(MGA_IEN, 0); 171b5e89ed53ed8d24f83ba1941c07382af00ed238eDave Airlie 1724423843cde65232c1d553df220e1d133f4a0fa2bVille Syrjälä dev->irq_enabled = false; 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 174