ramnve0.c revision 334565abfea84d424d7721d9c9f9ca1227d14bd8
1aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs/* 2aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * Copyright 2013 Red Hat Inc. 3aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * 4aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * Permission is hereby granted, free of charge, to any person obtaining a 5aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * copy of this software and associated documentation files (the "Software"), 6aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * to deal in the Software without restriction, including without limitation 7aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * and/or sell copies of the Software, and to permit persons to whom the 9aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * Software is furnished to do so, subject to the following conditions: 10aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * 11aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * The above copyright notice and this permission notice shall be included in 12aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * all copies or substantial portions of the Software. 13aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * 14aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * OTHER DEALINGS IN THE SOFTWARE. 21aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * 22aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * Authors: Ben Skeggs 23aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs */ 24aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 25aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include <subdev/gpio.h> 26aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 27aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include <subdev/bios.h> 28aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include <subdev/bios/pll.h> 29aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include <subdev/bios/init.h> 30aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include <subdev/bios/rammap.h> 31aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include <subdev/bios/timing.h> 32aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 33aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include <subdev/clock.h> 34aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include <subdev/clock/pll.h> 35aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 36aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include <subdev/timer.h> 37aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 38aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include <core/option.h> 39aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 40aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include "nvc0.h" 41aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 42aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs#include "ramfuc.h" 43aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 44aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstruct nve0_ramfuc { 45aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc base; 46aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 47aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nvbios_pll refpll; 48aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nvbios_pll mempll; 49aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 50aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_gpioMV; 51aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 r_funcMV[2]; 52aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_gpio2E; 53aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 r_func2E[2]; 54aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_gpiotrig; 55aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 56aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x132020; 57aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x132028; 58aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x132024; 59aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x132030; 60aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x132034; 61aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x132000; 62aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x132004; 63aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x132040; 64aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 65aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f248; 66aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f290; 67aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f294; 68aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f298; 69aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f29c; 70aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f2a0; 71aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f2a4; 72aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f2a8; 73aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f2ac; 74aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f2cc; 75aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f2e8; 76aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f250; 77aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f24c; 78aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10fec4; 79aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10fec8; 80aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f604; 81aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f614; 82aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f610; 83aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x100770; 84aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x100778; 85aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f224; 86aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 87aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f870; 88aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f698; 89aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f694; 90aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f6b8; 91aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f808; 92aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f670; 93aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f60c; 94aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f830; 95aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x1373ec; 96aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f800; 97aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f82c; 98aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 99aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f978; 100aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f910; 101aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f914; 102aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 103aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_mr[16]; /* MR0 - MR8, MR15 */ 104aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 105aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x62c000; 106d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs 107aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f200; 108d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs 109aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f210; 110aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f310; 111aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f314; 112aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f318; 113aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f090; 114aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f69c; 115aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f824; 116aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x1373f0; 117aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x1373f4; 118aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x137320; 119aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f65c; 120aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x10f6bc; 121aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct ramfuc_reg r_0x100710; 122dd95c8f782a053db361855298778a7d31de04a48Ben Skeggs struct ramfuc_reg r_0x100750; 123aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs}; 124aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 125aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstruct nve0_ram { 126aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_ram base; 127aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ramfuc fuc; 128d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs 129d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 parts; 130d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 pmask; 131d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 pnuts; 132d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs 133aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs int from; 134aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs int mode; 135aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs int N1, fN1, M1, P1; 136aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs int N2, M2, P2; 137aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs}; 138aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 139aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs/******************************************************************************* 140aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * GDDR5 141aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ******************************************************************************/ 142aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstatic void 14301891690e8e0d1230b8b3d96a42810b3ab8b38c1Ben Skeggsnve0_ram_train(struct nve0_ramfuc *fuc, u32 mask, u32 data) 144aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs{ 145aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ram *ram = container_of(fuc, typeof(*ram), fuc); 146d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 addr = 0x110974, i; 147aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 14801891690e8e0d1230b8b3d96a42810b3ab8b38c1Ben Skeggs ram_mask(fuc, 0x10f910, mask, data); 14901891690e8e0d1230b8b3d96a42810b3ab8b38c1Ben Skeggs ram_mask(fuc, 0x10f914, mask, data); 1505905439224043465309e9989bfd9369efb9220abBen Skeggs 15101891690e8e0d1230b8b3d96a42810b3ab8b38c1Ben Skeggs for (i = 0; (data & 0x80000000) && i < ram->parts; addr += 0x1000, i++) { 152d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs if (ram->pmask & (1 << i)) 1535905439224043465309e9989bfd9369efb9220abBen Skeggs continue; 154aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wait(fuc, addr, 0x0000000f, 0x00000000, 500000); 155aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 156aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs} 157aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 158aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstatic void 159aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsr1373f4_init(struct nve0_ramfuc *fuc) 160aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs{ 161aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ram *ram = container_of(fuc, typeof(*ram), fuc); 162aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 mcoef = ((--ram->P2 << 28) | (ram->N2 << 8) | ram->M2); 163aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1); 164aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 runk0 = ram->fN1 << 16; 165aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 runk1 = ram->fN1; 166aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 167aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->from == 2) { 168aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000000, 0x00001100); 169aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000000, 0x00000010); 170aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } else { 171aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000000, 0x00010010); 172aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 173aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 174aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000003, 0x00000000); 175aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000010, 0x00000000); 176aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 177aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* (re)program refpll, if required */ 178aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if ((ram_rd32(fuc, 0x132024) & 0xffffffff) != rcoef || 179aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs (ram_rd32(fuc, 0x132034) & 0x0000ffff) != runk1) { 180aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132000, 0x00000001, 0x00000000); 181aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132020, 0x00000001, 0x00000000); 182aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x137320, 0x00000000); 183aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132030, 0xffff0000, runk0); 184aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132034, 0x0000ffff, runk1); 185aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x132024, rcoef); 186aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132028, 0x00080000, 0x00080000); 187aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132020, 0x00000001, 0x00000001); 188aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wait(fuc, 0x137390, 0x00020000, 0x00020000, 64000); 189aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132028, 0x00080000, 0x00000000); 190aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 191aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 192aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* (re)program mempll, if required */ 193aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode == 2) { 194aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00010000, 0x00000000); 195aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132000, 0x00000001, 0x00000000); 196aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132004, 0x103fffff, mcoef); 197aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132000, 0x00000001, 0x00000001); 198aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wait(fuc, 0x137390, 0x00000002, 0x00000002, 64000); 199aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000000, 0x00001100); 200aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } else { 201aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000000, 0x00010100); 202aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 203aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 204aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000000, 0x00000010); 205aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs} 206aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 207aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstatic void 208aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsr1373f4_fini(struct nve0_ramfuc *fuc, u32 ramcfg) 209aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs{ 210aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ram *ram = container_of(fuc, typeof(*ram), fuc); 211aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_bios *bios = nouveau_bios(ram); 212aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u8 v0 = (nv_ro08(bios, ramcfg + 0x03) & 0xc0) >> 6; 213aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u8 v1 = (nv_ro08(bios, ramcfg + 0x03) & 0x30) >> 4; 214aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 tmp; 215aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 216aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs tmp = ram_rd32(fuc, 0x1373ec) & ~0x00030000; 217aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x1373ec, tmp | (v1 << 16)); 218aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f0, (~ram->mode & 3), 0x00000000); 219aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode == 2) { 220aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000003, 0x000000002); 221aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00001100, 0x000000000); 222aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } else { 223aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000003, 0x000000001); 224aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00010000, 0x000000000); 225aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 226aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f800, 0x00000030, (v0 ^ v1) << 4); 227aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs} 228aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 229d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggsstatic void 230d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggsnve0_ram_nuts(struct nve0_ram *ram, struct ramfuc_reg *reg, 231d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 _mask, u32 _data, u32 _copy) 232d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs{ 233d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs struct nve0_fb_priv *priv = (void *)nouveau_fb(ram); 234d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs struct ramfuc *fuc = &ram->fuc.base; 235d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 addr = 0x110000 + (reg->addr[0] & 0xfff); 236d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 mask = _mask | _copy; 237d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 data = (_data & _mask) | (reg->data & _copy); 238d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 i; 239d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs 240d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs for (i = 0; i < 16; i++, addr += 0x1000) { 241d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs if (ram->pnuts & (1 << i)) { 242d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 prev = nv_rd32(priv, addr); 243d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 next = (prev & ~mask) | data; 244d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs nouveau_memx_wr32(fuc->memx, addr, next); 245d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs } 246d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs } 247d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs} 248d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs#define ram_nuts(s,r,m,d,c) \ 249d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs nve0_ram_nuts((s), &(s)->fuc.r_##r, (m), (d), (c)) 250d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs 251aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstatic int 252aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsnve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq) 253aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs{ 254aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_bios *bios = nouveau_bios(pfb); 255aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ram *ram = (void *)pfb->ram; 256aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ramfuc *fuc = &ram->fuc; 257aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 rammap = ram->base.rammap.data; 258aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 ramcfg = ram->base.ramcfg.data; 259aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 timing = ram->base.timing.data; 260aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs int vc = !(nv_ro08(bios, ramcfg + 0x02) & 0x08); 261aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs int mv = 1; /*XXX*/ 262d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 mask, data, i; 263aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 264aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000); 265aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x62c000, 0x0f0f0000); 266aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 267aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* MR1: turn termination on early, for some reason.. */ 268d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs if ((ram->base.mr[1] & 0x03c) != 0x030) { 269aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, mr[1], 0x03c, ram->base.mr[1] & 0x03c); 270d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs ram_nuts(ram, mr[1], 0x03c, ram->base.mr1_nuts & 0x03c, 0x000); 271d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs } 272aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 273aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (vc == 1 && ram_have(fuc, gpio2E)) { 274aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 temp = ram_mask(fuc, gpio2E, 0x3000, fuc->r_func2E[1]); 275aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (temp != ram_rd32(fuc, gpio2E)) { 276aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, gpiotrig, 1); 277aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 20000); 278aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 279aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 280aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 281aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x00000800, 0x00000000); 282aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 28301891690e8e0d1230b8b3d96a42810b3ab8b38c1Ben Skeggs nve0_ram_train(fuc, 0x01020000, 0x000c0000); 284aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 285aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f210, 0x00000000); /* REFRESH_AUTO = 0 */ 286aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 287aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f310, 0x00000001); /* REFRESH */ 288aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 289aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 290aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x80000000, 0x80000000); 291aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f314, 0x00000001); /* PRECHARGE */ 292aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x80000000, 0x00000000); 293aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f090, 0x00000061); 294aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f090, 0xc000007f); 295aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 296aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 297aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f698, 0x00000000); 298aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f69c, 0x00000000); 299aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 300aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /*XXX: there does appear to be some kind of condition here, simply 301aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * modifying these bits in the vbios from the default pl0 302aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * entries shows no change. however, the data does appear to 303aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * be correct and may be required for the transition back 304aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs */ 305aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask = 0x800f07e0; 306aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00030000; 307aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram_rd32(fuc, 0x10f978) & 0x00800000) 308aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00040000; 309aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 310aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (1) { 311aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x800807e0; 312aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs switch (nv_ro08(bios, ramcfg + 0x03) & 0xc0) { 313aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0xc0: data &= ~0x00000040; break; 314aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x80: data &= ~0x00000100; break; 315aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x40: data &= ~0x80000000; break; 316aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x00: data &= ~0x00000400; break; 317aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 318aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 319aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs switch (nv_ro08(bios, ramcfg + 0x03) & 0x30) { 320aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x30: data &= ~0x00000020; break; 321aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x20: data &= ~0x00000080; break; 322aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x10: data &= ~0x00080000; break; 323aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x00: data &= ~0x00000200; break; 324aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 325aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 326aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 327aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x02) & 0x80) 328aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x03000000; 329aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x02) & 0x40) 330aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x00002000; 331aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x07) & 0x10) 332aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x00004000; 333aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x07) & 0x08) 334aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x00000003; 335aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else { 336aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x34000000; 337aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram_rd32(fuc, 0x10f978) & 0x00800000) 338aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x40000000; 339aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 340aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f824, mask, data); 341aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 342aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132040, 0x00010000, 0x00000000); 343aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 344aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->from == 2 && ram->mode != 2) { 345aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f808, 0x00080000, 0x00000000); 346aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x00008000, 0x00008000); 347aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f800, 0x00000000, 0x00000004); 348aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f830, 0x00008000, 0x01040010); 349aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f830, 0x01000000, 0x00000000); 350aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs r1373f4_init(fuc); 351aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f0, 0x00000002, 0x00000001); 352aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs r1373f4_fini(fuc, ramcfg); 353aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f830, 0x00c00000, 0x00240001); 354aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } else 355aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->from != 2 && ram->mode != 2) { 356aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs r1373f4_init(fuc); 357aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs r1373f4_fini(fuc, ramcfg); 358aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 359aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 360aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram_have(fuc, gpioMV)) { 361aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 temp = ram_mask(fuc, gpioMV, 0x3000, fuc->r_funcMV[mv]); 362aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (temp != ram_rd32(fuc, gpioMV)) { 363aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, gpiotrig, 1); 364aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 64000); 365aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 366aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 367aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 368aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if ( (nv_ro08(bios, ramcfg + 0x02) & 0x40) || 369aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs (nv_ro08(bios, ramcfg + 0x07) & 0x10)) { 370aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132040, 0x00010000, 0x00010000); 371aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 20000); 372aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 373aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 374aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->from != 2 && ram->mode == 2) { 375aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f800, 0x00000004, 0x00000000); 376aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f0, 0x00000000, 0x00000002); 377aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f830, 0x00800001, 0x00408010); 378aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs r1373f4_init(fuc); 379aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs r1373f4_fini(fuc, ramcfg); 380aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f808, 0x00000000, 0x00080000); 381aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x00808000, 0x00800000); 382aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } else 383aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->from == 2 && ram->mode == 2) { 384aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f800, 0x00000004, 0x00000000); 385aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs r1373f4_init(fuc); 386aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs r1373f4_fini(fuc, ramcfg); 387aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 388aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 389aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode != 2) /*XXX*/ { 390aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x07) & 0x40) 391aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f670, 0x80000000, 0x80000000); 392aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 393aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 394aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = (nv_ro08(bios, rammap + 0x11) & 0x0c) >> 2; 395aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f65c, 0x00000011 * data); 396aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f6b8, 0x01010101 * nv_ro08(bios, ramcfg + 0x09)); 397aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f6bc, 0x01010101 * nv_ro08(bios, ramcfg + 0x09)); 398aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 399aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = nv_ro08(bios, ramcfg + 0x04); 400aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x08)) { 401aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f698, 0x01010101 * data); 402aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f69c, 0x01010101 * data); 403aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 404aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 405aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode != 2) { 406aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 temp = ram_rd32(fuc, 0x10f694) & ~0xff00ff00; 407aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f694, temp | (0x01000100 * data)); 408aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 409aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 410aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode == 2 && (nv_ro08(bios, ramcfg + 0x08) & 0x10)) 411aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000080; 412aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 413aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000000; 414aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f60c, 0x00000080, data); 415aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 416aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask = 0x00070000; 417aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000000; 418aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x02) & 0x80)) 419aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x03000000; 420aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x02) & 0x40)) 421aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00002000; 422aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x10)) 423aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00004000; 424aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x08)) 425aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00000003; 426aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 427aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x74000000; 428aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f824, mask, data); 429aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 430aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x01) & 0x08) 431aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000000; 432aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 433aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00001000; 434aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x00001000, data); 435aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 436aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram_rd32(fuc, 0x10f670) & 0x80000000) { 437aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 10000); 438aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f670, 0x80000000, 0x00000000); 439aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 440aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 441aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x08) & 0x01) 442aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00100000; 443aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 444aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000000; 445aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f82c, 0x00100000, data); 446aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 447aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000000; 448aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x08) & 0x08) 449aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00002000; 450aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x08) & 0x04) 451aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00001000; 452aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x08) & 0x02) 453aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00004000; 454aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f830, 0x00007000, data); 455aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 456aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* PFB timing */ 457aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f248, 0xffffffff, nv_ro32(bios, timing + 0x28)); 458aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f290, 0xffffffff, nv_ro32(bios, timing + 0x00)); 459aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f294, 0xffffffff, nv_ro32(bios, timing + 0x04)); 460aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f298, 0xffffffff, nv_ro32(bios, timing + 0x08)); 461aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f29c, 0xffffffff, nv_ro32(bios, timing + 0x0c)); 462aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2a0, 0xffffffff, nv_ro32(bios, timing + 0x10)); 463aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2a4, 0xffffffff, nv_ro32(bios, timing + 0x14)); 464aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2a8, 0xffffffff, nv_ro32(bios, timing + 0x18)); 465aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2ac, 0xffffffff, nv_ro32(bios, timing + 0x1c)); 466aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2cc, 0xffffffff, nv_ro32(bios, timing + 0x20)); 467aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2e8, 0xffffffff, nv_ro32(bios, timing + 0x24)); 468aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 469aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = (nv_ro08(bios, ramcfg + 0x02) & 0x03) << 8; 470aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x01) & 0x10) 471aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x70000000; 472aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f604, 0x70000300, data); 473aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 474aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = (nv_ro08(bios, timing + 0x30) & 0x07) << 28; 475aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x01) & 0x01) 476aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00000100; 477aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f614, 0x70000000, data); 478aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 479aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = (nv_ro08(bios, timing + 0x30) & 0x07) << 28; 480aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x01) & 0x02) 481aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00000100; 482aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f610, 0x70000000, data); 483aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 484aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask = 0x33f00000; 485aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000000; 486aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x01) & 0x04)) 487aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x20200000; 488aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x80)) 489aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x12800000; 490aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /*XXX: see note above about there probably being some condition 491aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * for the 10f824 stuff that uses ramcfg 3... 492aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs */ 493aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if ( (nv_ro08(bios, ramcfg + 0x03) & 0xf0)) { 494aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, rammap + 0x08) & 0x0c) { 495aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x80)) 496aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x00000020; 497aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 498aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00000020; 499aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x00000004; 500aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 501aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } else { 502aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x40000020; 503aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00000004; 504aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 505aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 506aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f808, mask, data); 507aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 508aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = nv_ro08(bios, ramcfg + 0x03) & 0x0f; 509aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f870, 0x11111111 * data); 510aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 511aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = nv_ro08(bios, ramcfg + 0x02) & 0x03; 512aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x01) & 0x10) 513aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00000004; 514dd95c8f782a053db361855298778a7d31de04a48Ben Skeggs if ((ram_rd32(fuc, 0x100770) & 0x00000004) != (data & 0x00000004)) { 515dd95c8f782a053db361855298778a7d31de04a48Ben Skeggs ram_wr32(fuc, 0x100750, 0x04000009); 516aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x100710, 0x00000000); 517aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wait(fuc, 0x100710, 0x80000000, 0x80000000, 200000); 518aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 519aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x100770, 0x00000007, data); 520aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 521aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = (nv_ro08(bios, timing + 0x30) & 0x07) << 8; 522aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x01) & 0x01) 523aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x80000000; 524aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x100778, 0x00000700, data); 525aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 526aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = nv_ro16(bios, timing + 0x2c); 527aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f250, 0x000003f0, (data & 0x003f) << 4); 528aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f24c, 0x7f000000, (data & 0x1fc0) << 18); 529aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 530aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = nv_ro08(bios, timing + 0x30); 531aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f224, 0x001f0000, (data & 0xf8) << 13); 532aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 533aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = nv_ro16(bios, timing + 0x31); 534aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10fec4, 0x041e0f07, (data & 0x0800) << 15 | 535aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs (data & 0x0780) << 10 | 536aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs (data & 0x0078) << 5 | 537aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs (data & 0x0007)); 538aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10fec8, 0x00000027, (data & 0x8000) >> 10 | 539aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs (data & 0x7000) >> 12); 540aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 541aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f090, 0x4000007e); 542aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 543aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f314, 0x00000001); /* PRECHARGE */ 544aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f310, 0x00000001); /* REFRESH */ 545aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 2000); 546aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f210, 0x80000000); /* REFRESH_AUTO = 1 */ 547aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 548aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if ((nv_ro08(bios, ramcfg + 0x08) & 0x10) && (ram->mode == 2) /*XXX*/) { 549aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 temp = ram_mask(fuc, 0x10f294, 0xff000000, 0x24000000); 55001891690e8e0d1230b8b3d96a42810b3ab8b38c1Ben Skeggs nve0_ram_train(fuc, 0xbc0e0000, 0xa4010000); /*XXX*/ 551aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 552aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f294, temp); 553aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 554aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 555aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, mr[3], 0xfff, ram->base.mr[3]); 556aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, mr[0], ram->base.mr[0]); 557aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, mr[8], 0xfff, ram->base.mr[8]); 558aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 559aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, mr[1], 0xfff, ram->base.mr[1]); 5602daaf5b0e4fbed1fa9524881272c9a956a0aaf78Ben Skeggs ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5] & ~0x004); /* LP3 later */ 561aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, mr[6], 0xfff, ram->base.mr[6]); 562aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, mr[7], 0xfff, ram->base.mr[7]); 563aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 564aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (vc == 0 && ram_have(fuc, gpio2E)) { 565aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 temp = ram_mask(fuc, gpio2E, 0x3000, fuc->r_func2E[0]); 566aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (temp != ram_rd32(fuc, gpio2E)) { 567aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, gpiotrig, 1); 568aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 20000); 569aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 570aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 571aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 572aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x80000000, 0x80000000); 573aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f318, 0x00000001); /* NOP? */ 574aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x80000000, 0x00000000); 575aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 576d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs ram_nuts(ram, 0x10f200, 0x00808800, 0x00000000, 0x00808800); 577aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 578aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = ram_rd32(fuc, 0x10f978); 579aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data &= ~0x00046144; 580aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x0000000b; 581aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x08)) { 582aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x04)) 583aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x0000200c; 584aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 585aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00000000; 586aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } else { 587aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00040044; 588aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 589aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f978, data); 590aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 591aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode == 1) { 592aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = ram_rd32(fuc, 0x10f830) | 0x00000001; 593aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f830, data); 594aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 595aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 596aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x08)) { 597aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x88020000; 598aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if ( (nv_ro08(bios, ramcfg + 0x07) & 0x04)) 599aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x10000000; 600aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, rammap + 0x08) & 0x10)) 601aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00080000; 602aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } else { 603aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0xa40e0000; 604aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 605334565abfea84d424d7721d9c9f9ca1227d14bd8Ben Skeggs nve0_ram_train(fuc, 0xbc0f0000, data); 606aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 607aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 608aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode == 2) { /*XXX*/ 609aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f800, 0x00000004, 0x00000004); 610aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 611aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 612aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* MR5: (re)enable LP3 if necessary 613aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * XXX: need to find the switch, keeping off for now 614aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs */ 6152daaf5b0e4fbed1fa9524881272c9a956a0aaf78Ben Skeggs ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5]); 616aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 617aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode != 2) { 618aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f830, 0x01000000, 0x01000000); 619aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f830, 0x01000000, 0x00000000); 620aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 621aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 62201891690e8e0d1230b8b3d96a42810b3ab8b38c1Ben Skeggs if (nv_ro08(bios, ramcfg + 0x07) & 0x02) 62301891690e8e0d1230b8b3d96a42810b3ab8b38c1Ben Skeggs nve0_ram_train(fuc, 0x80020000, 0x01000000); 624aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 625aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x62c000, 0x0f0f0f00); 626aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 627aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, rammap + 0x08) & 0x01) 628aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000800; 629aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 630aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000000; 631aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x00000800, data); 632d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs ram_nuts(ram, 0x10f200, 0x00808800, data, 0x00808800); 633aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return 0; 634aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs} 635aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 636aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs/******************************************************************************* 637aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * DDR3 638aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ******************************************************************************/ 639aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 640aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstatic int 641aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsnve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq) 642aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs{ 643aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_bios *bios = nouveau_bios(pfb); 644aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ram *ram = (void *)pfb->ram; 645aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ramfuc *fuc = &ram->fuc; 646aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1); 647aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 runk0 = ram->fN1 << 16; 648aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 runk1 = ram->fN1; 649aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 rammap = ram->base.rammap.data; 650aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 ramcfg = ram->base.ramcfg.data; 651aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs const u32 timing = ram->base.timing.data; 652aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs int vc = !(nv_ro08(bios, ramcfg + 0x02) & 0x08); 653aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs int mv = 1; /*XXX*/ 654aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 mask, data; 655aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 656aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000); 657aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x62c000, 0x0f0f0000); 658aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 659aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (vc == 1 && ram_have(fuc, gpio2E)) { 660aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 temp = ram_mask(fuc, gpio2E, 0x3000, fuc->r_func2E[1]); 661aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (temp != ram_rd32(fuc, gpio2E)) { 662aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, gpiotrig, 1); 663aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 20000); 664aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 665aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 666aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 667aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x00000800, 0x00000000); 668aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if ((nv_ro08(bios, ramcfg + 0x03) & 0xf0)) 669aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f808, 0x04000000, 0x04000000); 670aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 671aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f314, 0x00000001); /* PRECHARGE */ 672aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f210, 0x00000000); /* REFRESH_AUTO = 0 */ 673aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f310, 0x00000001); /* REFRESH */ 674aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x80000000, 0x80000000); 675aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f310, 0x00000001); /* REFRESH */ 676aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x80000000, 0x00000000); 677aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 678aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 679aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f090, 0x00000060); 680aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f090, 0xc000007e); 681aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 682aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /*XXX: there does appear to be some kind of condition here, simply 683aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * modifying these bits in the vbios from the default pl0 684aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * entries shows no change. however, the data does appear to 685aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * be correct and may be required for the transition back 686aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs */ 687aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask = 0x00010000; 688aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00010000; 689aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 690aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (1) { 691aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x800807e0; 692aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x800807e0; 693aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs switch (nv_ro08(bios, ramcfg + 0x03) & 0xc0) { 694aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0xc0: data &= ~0x00000040; break; 695aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x80: data &= ~0x00000100; break; 696aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x40: data &= ~0x80000000; break; 697aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x00: data &= ~0x00000400; break; 698aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 699aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 700aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs switch (nv_ro08(bios, ramcfg + 0x03) & 0x30) { 701aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x30: data &= ~0x00000020; break; 702aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x20: data &= ~0x00000080; break; 703aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x10: data &= ~0x00080000; break; 704aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case 0x00: data &= ~0x00000200; break; 705aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 706aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 707aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 708aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x02) & 0x80) 709aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x03000000; 710aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x02) & 0x40) 711aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x00002000; 712aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x07) & 0x10) 713aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x00004000; 714aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x07) & 0x08) 715aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x00000003; 716aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 717aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x14000000; 718aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f824, mask, data); 719aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 720aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132040, 0x00010000, 0x00000000); 721aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 722aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000000, 0x00010010); 723aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = ram_rd32(fuc, 0x1373ec) & ~0x00030000; 724aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= (nv_ro08(bios, ramcfg + 0x03) & 0x30) << 12; 725aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x1373ec, data); 726aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000003, 0x00000000); 727aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000010, 0x00000000); 728aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 729aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* (re)program refpll, if required */ 730aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if ((ram_rd32(fuc, 0x132024) & 0xffffffff) != rcoef || 731aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs (ram_rd32(fuc, 0x132034) & 0x0000ffff) != runk1) { 732aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132000, 0x00000001, 0x00000000); 733aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132020, 0x00000001, 0x00000000); 734aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x137320, 0x00000000); 735aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132030, 0xffff0000, runk0); 736aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132034, 0x0000ffff, runk1); 737aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x132024, rcoef); 738aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132028, 0x00080000, 0x00080000); 739aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132020, 0x00000001, 0x00000001); 740aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wait(fuc, 0x137390, 0x00020000, 0x00020000, 64000); 741aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132028, 0x00080000, 0x00000000); 742aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 743aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 744aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000010, 0x00000010); 745aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00000003, 0x00000001); 746aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x1373f4, 0x00010000, 0x00000000); 747aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 748aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram_have(fuc, gpioMV)) { 749aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 temp = ram_mask(fuc, gpioMV, 0x3000, fuc->r_funcMV[mv]); 750aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (temp != ram_rd32(fuc, gpioMV)) { 751aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, gpiotrig, 1); 752aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 64000); 753aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 754aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 755aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 756aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if ( (nv_ro08(bios, ramcfg + 0x02) & 0x40) || 757aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs (nv_ro08(bios, ramcfg + 0x07) & 0x10)) { 758aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x132040, 0x00010000, 0x00010000); 759aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 20000); 760aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 761aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 762aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode != 2) /*XXX*/ { 763aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x07) & 0x40) 764aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f670, 0x80000000, 0x80000000); 765aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 766aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 767aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = (nv_ro08(bios, rammap + 0x11) & 0x0c) >> 2; 768aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f65c, 0x00000011 * data); 769aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f6b8, 0x01010101 * nv_ro08(bios, ramcfg + 0x09)); 770aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f6bc, 0x01010101 * nv_ro08(bios, ramcfg + 0x09)); 771aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 772aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask = 0x00010000; 773aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000000; 774aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x02) & 0x80)) 775aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x03000000; 776aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x02) & 0x40)) 777aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00002000; 778aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x10)) 779aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00004000; 780aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x08)) 781aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00000003; 782aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 783aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x14000000; 784aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f824, mask, data); 785aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 786aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 787aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, ramcfg + 0x08) & 0x01) 788aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00100000; 789aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 790aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000000; 791aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f82c, 0x00100000, data); 792aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 793aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* PFB timing */ 794aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f248, 0xffffffff, nv_ro32(bios, timing + 0x28)); 795aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f290, 0xffffffff, nv_ro32(bios, timing + 0x00)); 796aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f294, 0xffffffff, nv_ro32(bios, timing + 0x04)); 797aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f298, 0xffffffff, nv_ro32(bios, timing + 0x08)); 798aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f29c, 0xffffffff, nv_ro32(bios, timing + 0x0c)); 799aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2a0, 0xffffffff, nv_ro32(bios, timing + 0x10)); 800aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2a4, 0xffffffff, nv_ro32(bios, timing + 0x14)); 801aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2a8, 0xffffffff, nv_ro32(bios, timing + 0x18)); 802aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2ac, 0xffffffff, nv_ro32(bios, timing + 0x1c)); 803aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2cc, 0xffffffff, nv_ro32(bios, timing + 0x20)); 804aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f2e8, 0xffffffff, nv_ro32(bios, timing + 0x24)); 805aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 806aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask = 0x33f00000; 807aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000000; 808aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x01) & 0x04)) 809aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x20200000; 810aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x80)) 811aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x12800000; 812aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /*XXX: see note above about there probably being some condition 813aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * for the 10f824 stuff that uses ramcfg 3... 814aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs */ 815aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if ( (nv_ro08(bios, ramcfg + 0x03) & 0xf0)) { 816aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, rammap + 0x08) & 0x0c) { 817aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!(nv_ro08(bios, ramcfg + 0x07) & 0x80)) 818aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x00000020; 819aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 820aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x00000020; 821aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x08000004; 822aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 823aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x04000000; 824aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } else { 825aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs mask |= 0x44000020; 826aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data |= 0x08000004; 827aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 828aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 829aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f808, mask, data); 830aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 831aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = nv_ro08(bios, ramcfg + 0x03) & 0x0f; 832aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f870, 0x11111111 * data); 833aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 834aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = nv_ro16(bios, timing + 0x2c); 835aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f250, 0x000003f0, (data & 0x003f) << 4); 836aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 837aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (((nv_ro32(bios, timing + 0x2c) & 0x00001fc0) >> 6) > 838aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ((nv_ro32(bios, timing + 0x28) & 0x7f000000) >> 24)) 839aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = (nv_ro32(bios, timing + 0x2c) & 0x00001fc0) >> 6; 840aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 841aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = (nv_ro32(bios, timing + 0x28) & 0x1f000000) >> 24; 842aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f24c, 0x7f000000, data << 24); 843aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 844aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = nv_ro08(bios, timing + 0x30); 845aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f224, 0x001f0000, (data & 0xf8) << 13); 846aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 847aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f090, 0x4000007f); 848aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 849aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 850aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f314, 0x00000001); /* PRECHARGE */ 851aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f310, 0x00000001); /* REFRESH */ 852aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f210, 0x80000000); /* REFRESH_AUTO = 1 */ 853aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 854aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 855aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nuke(fuc, mr[0]); 856aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, mr[0], 0x100, 0x100); 857aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, mr[0], 0x100, 0x000); 858aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 859aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, mr[2], 0xfff, ram->base.mr[2]); 860aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, mr[0], ram->base.mr[0]); 861aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 862aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 863aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nuke(fuc, mr[0]); 864aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, mr[0], 0x100, 0x100); 865aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, mr[0], 0x100, 0x000); 866aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 867aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (vc == 0 && ram_have(fuc, gpio2E)) { 868aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 temp = ram_mask(fuc, gpio2E, 0x3000, fuc->r_func2E[0]); 869aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (temp != ram_rd32(fuc, gpio2E)) { 870aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, gpiotrig, 1); 871aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 20000); 872aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 873aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 874aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 875aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode != 2) { 876aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f830, 0x01000000, 0x01000000); 877aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f830, 0x01000000, 0x00000000); 878aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 879aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 880aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x80000000, 0x80000000); 881aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x10f318, 0x00000001); /* NOP? */ 882aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x80000000, 0x00000000); 883aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_nsec(fuc, 1000); 884aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 885aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_wr32(fuc, 0x62c000, 0x0f0f0f00); 886aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 887aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (nv_ro08(bios, rammap + 0x08) & 0x01) 888aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000800; 889aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs else 890aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = 0x00000000; 891aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_mask(fuc, 0x10f200, 0x00000800, data); 892aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return 0; 893aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs} 894aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 895aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs/******************************************************************************* 896aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * main hooks 897aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ******************************************************************************/ 898aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 899aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstatic int 900aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsnve0_ram_calc(struct nouveau_fb *pfb, u32 freq) 901aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs{ 902aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_bios *bios = nouveau_bios(pfb); 903aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ram *ram = (void *)pfb->ram; 904aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ramfuc *fuc = &ram->fuc; 905aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs int ret, refclk, strap, i; 906aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 data; 907aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u8 cnt; 908aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 909aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* lookup memory config data relevant to the target frequency */ 910aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.rammap.data = nvbios_rammap_match(bios, freq / 1000, 911aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs &ram->base.rammap.version, 912aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs &ram->base.rammap.size, &cnt, 913aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs &ram->base.ramcfg.size); 914aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!ram->base.rammap.data || ram->base.rammap.version != 0x11 || 915aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.rammap.size < 0x09) { 916aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_error(pfb, "invalid/missing rammap entry\n"); 917aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return -EINVAL; 918aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 919aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 920aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* locate specific data set for the attached memory */ 9210a0dc8f564ab116e5b59b60ca568276f1fed59a3Ben Skeggs strap = nvbios_ramcfg_index(bios); 922aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (strap >= cnt) { 923aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_error(pfb, "invalid ramcfg strap\n"); 924aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return -EINVAL; 925aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 926aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 927aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.ramcfg.version = ram->base.rammap.version; 928aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.ramcfg.data = ram->base.rammap.data + ram->base.rammap.size + 929aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs (ram->base.ramcfg.size * strap); 930aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!ram->base.ramcfg.data || ram->base.ramcfg.version != 0x11 || 931aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.ramcfg.size < 0x08) { 932aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_error(pfb, "invalid/missing ramcfg entry\n"); 933aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return -EINVAL; 934aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 935aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 936aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* lookup memory timings, if bios says they're present */ 937aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs strap = nv_ro08(bios, ram->base.ramcfg.data + 0x00); 938aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (strap != 0xff) { 939aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.timing.data = 940aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nvbios_timing_entry(bios, strap, 941aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs &ram->base.timing.version, 942aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs &ram->base.timing.size); 943aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!ram->base.timing.data || 944aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.timing.version != 0x20 || 945aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.timing.size < 0x33) { 946aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_error(pfb, "invalid/missing timing entry\n"); 947aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return -EINVAL; 948aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 949aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } else { 950aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.timing.data = 0; 951aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 952aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 953aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = ram_init(fuc, pfb); 954aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ret) 955aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return ret; 956aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 957aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->mode = (freq > fuc->refpll.vco1.max_freq) ? 2 : 1; 958aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->from = ram_rd32(fuc, 0x1373f4) & 0x0000000f; 959aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 960aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* XXX: this is *not* what nvidia do. on fermi nvidia generally 961aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * select, based on some unknown condition, one of the two possible 962aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * reference frequencies listed in the vbios table for mempll and 963aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * program refpll to that frequency. 964aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * 965aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * so far, i've seen very weird values being chosen by nvidia on 966aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * kepler boards, no idea how/why they're chosen. 967aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs */ 968aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs refclk = freq; 969aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode == 2) 970aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs refclk = fuc->mempll.refclk; 971aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 972aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* calculate refpll coefficients */ 973aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = nva3_pll_calc(nv_subdev(pfb), &fuc->refpll, refclk, &ram->N1, 974aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs &ram->fN1, &ram->M1, &ram->P1); 975aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs fuc->mempll.refclk = ret; 976aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ret <= 0) { 977aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_error(pfb, "unable to calc refpll\n"); 978aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return -EINVAL; 979aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 980aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 981aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* calculate mempll coefficients, if we're using it */ 982aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram->mode == 2) { 983aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* post-divider doesn't work... the reg takes the values but 984aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * appears to completely ignore it. there *is* a bit at 985aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * bit 28 that appears to divide the clock by 2 if set. 986aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs */ 987aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs fuc->mempll.min_p = 1; 988aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs fuc->mempll.max_p = 2; 989aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 990aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = nva3_pll_calc(nv_subdev(pfb), &fuc->mempll, freq, 991aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs &ram->N2, NULL, &ram->M2, &ram->P2); 992aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ret <= 0) { 993aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_error(pfb, "unable to calc mempll\n"); 994aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return -EINVAL; 995aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 996aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 997aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 998aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs for (i = 0; i < ARRAY_SIZE(fuc->r_mr); i++) { 999aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ram_have(fuc, mr[i])) 1000aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.mr[i] = ram_rd32(fuc, mr[i]); 1001aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1002aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1003aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs switch (ram->base.type) { 1004aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case NV_MEM_TYPE_DDR3: 1005aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = nouveau_sddr3_calc(&ram->base); 1006aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ret == 0) 1007aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = nve0_ram_calc_sddr3(pfb, freq); 1008aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs break; 1009aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case NV_MEM_TYPE_GDDR5: 1010d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs ret = nouveau_gddr5_calc(&ram->base, ram->pnuts != 0); 1011aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ret == 0) 1012aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = nve0_ram_calc_gddr5(pfb, freq); 1013aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs break; 1014aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs default: 1015aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = -ENOSYS; 1016aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs break; 1017aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1018aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1019aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return ret; 1020aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs} 1021aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1022aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstatic int 1023aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsnve0_ram_prog(struct nouveau_fb *pfb) 1024aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs{ 1025aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_device *device = nv_device(pfb); 1026aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ram *ram = (void *)pfb->ram; 1027aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ramfuc *fuc = &ram->fuc; 1028aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_exec(fuc, nouveau_boolopt(device->cfgopt, "NvMemExec", false)); 1029aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return 0; 1030aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs} 1031aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1032aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstatic void 1033aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsnve0_ram_tidy(struct nouveau_fb *pfb) 1034aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs{ 1035aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ram *ram = (void *)pfb->ram; 1036aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ramfuc *fuc = &ram->fuc; 1037aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram_exec(fuc, false); 1038aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs} 1039aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1040aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstatic int 1041aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsnve0_ram_init(struct nouveau_object *object) 1042aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs{ 1043aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_fb *pfb = (void *)object->parent; 1044aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ram *ram = (void *)object; 1045aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_bios *bios = nouveau_bios(pfb); 1046aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs static const u8 train0[] = { 1047aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 0x00, 0xff, 0xff, 0x00, 0xff, 0x00, 1048aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 0x00, 0xff, 0xff, 0x00, 0xff, 0x00, 1049aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs }; 1050aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs static const u32 train1[] = { 1051aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 0x00000000, 0xffffffff, 1052aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 0x55555555, 0xaaaaaaaa, 1053aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 0x33333333, 0xcccccccc, 1054aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 0xf0f0f0f0, 0x0f0f0f0f, 1055aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 0x00ff00ff, 0xff00ff00, 1056aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 0x0000ffff, 0xffff0000, 1057aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs }; 1058aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u8 ver, hdr, cnt, len, snr, ssz; 1059aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs u32 data, save; 1060aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs int ret, i; 1061aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1062aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = nouveau_ram_init(&ram->base); 1063aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ret) 1064aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return ret; 1065aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1066aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs /* run a bunch of tables from rammap table. there's actually 1067aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * individual pointers for each rammap entry too, but, nvidia 1068aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * seem to just run the last two entries' scripts early on in 1069aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * their init, and never again.. we'll just run 'em all once 1070aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * for now. 1071aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * 1072aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * i strongly suspect that each script is for a separate mode 1073aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * (likely selected by 0x10f65c's lower bits?), and the 1074aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * binary driver skips the one that's already been setup by 1075aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs * the init tables. 1076aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs */ 1077aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = nvbios_rammap_table(bios, &ver, &hdr, &cnt, &len, &snr, &ssz); 1078aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (!data || hdr < 0x15) 1079aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return -EINVAL; 1080aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1081aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs cnt = nv_ro08(bios, data + 0x14); /* guess at count */ 1082aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data = nv_ro32(bios, data + 0x10); /* guess u32... */ 1083aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs save = nv_rd32(pfb, 0x10f65c); 1084aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs for (i = 0; i < cnt; i++) { 1085aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_mask(pfb, 0x10f65c, 0x000000f0, i << 4); 1086aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nvbios_exec(&(struct nvbios_init) { 1087aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs .subdev = nv_subdev(pfb), 1088aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs .bios = bios, 1089aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs .offset = nv_ro32(bios, data), /* guess u32 */ 1090aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs .execute = 1, 1091aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs }); 1092aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs data += 4; 1093aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1094aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f65c, save); 1095aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1096aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs switch (ram->base.type) { 1097aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case NV_MEM_TYPE_GDDR5: 1098aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs for (i = 0; i < 0x30; i++) { 1099aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f968, 0x00000000 | (i << 8)); 1100aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f920, 0x00000000 | train0[i % 12]); 1101aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f918, train1[i % 12]); 1102aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f920, 0x00000100 | train0[i % 12]); 1103aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f918, train1[i % 12]); 1104aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1105aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f96c, 0x00000000 | (i << 8)); 1106aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f924, 0x00000000 | train0[i % 12]); 1107aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f91c, train1[i % 12]); 1108aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f924, 0x00000100 | train0[i % 12]); 1109aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f91c, train1[i % 12]); 1110aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1111aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1112aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs for (i = 0; i < 0x100; i++) { 1113aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f968, i); 1114aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f900, train1[2 + (i & 1)]); 1115aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1116aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1117aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs for (i = 0; i < 0x100; i++) { 1118aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f96c, i); 1119aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_wr32(pfb, 0x10f900, train1[2 + (i & 1)]); 1120aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1121aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs break; 1122aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs default: 1123aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs break; 1124aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1125aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1126aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return 0; 1127aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs} 1128aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1129aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstatic int 1130aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsnve0_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 1131aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_oclass *oclass, void *data, u32 size, 1132aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_object **pobject) 1133aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs{ 1134aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_fb *pfb = nouveau_fb(parent); 1135aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_bios *bios = nouveau_bios(pfb); 1136aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nouveau_gpio *gpio = nouveau_gpio(pfb); 1137aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct dcb_gpio_func func; 1138aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs struct nve0_ram *ram; 1139d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs int ret, i; 1140d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 tmp; 1141aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1142aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = nvc0_ram_create(parent, engine, oclass, &ram); 1143aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs *pobject = nv_object(ram); 1144aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ret) 1145aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return ret; 1146aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1147aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs switch (ram->base.type) { 1148aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case NV_MEM_TYPE_DDR3: 1149aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case NV_MEM_TYPE_GDDR5: 1150aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.calc = nve0_ram_calc; 1151aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.prog = nve0_ram_prog; 1152aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->base.tidy = nve0_ram_tidy; 1153aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs break; 1154aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs default: 1155aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_warn(pfb, "reclocking of this RAM type is unsupported\n"); 1156aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs break; 1157aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1158aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1159d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs /* calculate a mask of differently configured memory partitions, 1160d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs * because, of course reclocking wasn't complicated enough 1161d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs * already without having to treat some of them differently to 1162d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs * the others.... 1163d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs */ 1164d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs ram->parts = nv_rd32(pfb, 0x022438); 1165d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs ram->pmask = nv_rd32(pfb, 0x022554); 1166d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs ram->pnuts = 0; 1167d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs for (i = 0, tmp = 0; i < ram->parts; i++) { 1168d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs if (!(ram->pmask & (1 << i))) { 1169d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs u32 cfg1 = nv_rd32(pfb, 0x110204 + (i * 0x1000)); 1170d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs if (tmp && tmp != cfg1) { 1171d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs ram->pnuts |= (1 << i); 1172d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs continue; 1173d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs } 1174d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs tmp = cfg1; 1175d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs } 1176d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs } 1177d394fb12eca4cb9f42f922d7ae2bc8d7e1ed9272Ben Skeggs 1178aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs // parse bios data for both pll's 1179aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = nvbios_pll_parse(bios, 0x0c, &ram->fuc.refpll); 1180aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ret) { 1181aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_error(pfb, "mclk refpll data not found\n"); 1182aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return ret; 1183aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1184aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1185aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = nvbios_pll_parse(bios, 0x04, &ram->fuc.mempll); 1186aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ret) { 1187aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs nv_error(pfb, "mclk pll data not found\n"); 1188aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return ret; 1189aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1190aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1191aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = gpio->find(gpio, 0, 0x18, DCB_GPIO_UNUSED, &func); 1192aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ret == 0) { 1193aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_gpioMV = ramfuc_reg(0x00d610 + (func.line * 0x04)); 1194aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_funcMV[0] = (func.log[0] ^ 2) << 12; 1195aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_funcMV[1] = (func.log[1] ^ 2) << 12; 1196aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1197aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1198aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ret = gpio->find(gpio, 0, 0x2e, DCB_GPIO_UNUSED, &func); 1199aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs if (ret == 0) { 1200aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_gpio2E = ramfuc_reg(0x00d610 + (func.line * 0x04)); 1201aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_func2E[0] = (func.log[0] ^ 2) << 12; 1202aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_func2E[1] = (func.log[1] ^ 2) << 12; 1203aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1204aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1205aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_gpiotrig = ramfuc_reg(0x00d604); 1206aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1207aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x132020 = ramfuc_reg(0x132020); 1208aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x132028 = ramfuc_reg(0x132028); 1209aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x132024 = ramfuc_reg(0x132024); 1210aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x132030 = ramfuc_reg(0x132030); 1211aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x132034 = ramfuc_reg(0x132034); 1212aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x132000 = ramfuc_reg(0x132000); 1213aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x132004 = ramfuc_reg(0x132004); 1214aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x132040 = ramfuc_reg(0x132040); 1215aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1216aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f248 = ramfuc_reg(0x10f248); 1217aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f290 = ramfuc_reg(0x10f290); 1218aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f294 = ramfuc_reg(0x10f294); 1219aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f298 = ramfuc_reg(0x10f298); 1220aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f29c = ramfuc_reg(0x10f29c); 1221aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f2a0 = ramfuc_reg(0x10f2a0); 1222aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f2a4 = ramfuc_reg(0x10f2a4); 1223aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f2a8 = ramfuc_reg(0x10f2a8); 1224aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f2ac = ramfuc_reg(0x10f2ac); 1225aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f2cc = ramfuc_reg(0x10f2cc); 1226aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f2e8 = ramfuc_reg(0x10f2e8); 1227aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f250 = ramfuc_reg(0x10f250); 1228aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f24c = ramfuc_reg(0x10f24c); 1229aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10fec4 = ramfuc_reg(0x10fec4); 1230aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10fec8 = ramfuc_reg(0x10fec8); 1231aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f604 = ramfuc_reg(0x10f604); 1232aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f614 = ramfuc_reg(0x10f614); 1233aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f610 = ramfuc_reg(0x10f610); 1234aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x100770 = ramfuc_reg(0x100770); 1235aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x100778 = ramfuc_reg(0x100778); 1236aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f224 = ramfuc_reg(0x10f224); 1237aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1238aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f870 = ramfuc_reg(0x10f870); 1239aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f698 = ramfuc_reg(0x10f698); 1240aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f694 = ramfuc_reg(0x10f694); 1241aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f6b8 = ramfuc_reg(0x10f6b8); 1242aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f808 = ramfuc_reg(0x10f808); 1243aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f670 = ramfuc_reg(0x10f670); 1244aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f60c = ramfuc_reg(0x10f60c); 1245aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f830 = ramfuc_reg(0x10f830); 1246aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x1373ec = ramfuc_reg(0x1373ec); 1247aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f800 = ramfuc_reg(0x10f800); 1248aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f82c = ramfuc_reg(0x10f82c); 1249aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1250aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f978 = ramfuc_reg(0x10f978); 1251aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f910 = ramfuc_reg(0x10f910); 1252aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f914 = ramfuc_reg(0x10f914); 1253aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1254aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs switch (ram->base.type) { 1255aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case NV_MEM_TYPE_GDDR5: 1256aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[0] = ramfuc_reg(0x10f300); 1257aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[1] = ramfuc_reg(0x10f330); 1258aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[2] = ramfuc_reg(0x10f334); 1259aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[3] = ramfuc_reg(0x10f338); 1260aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[4] = ramfuc_reg(0x10f33c); 1261aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[5] = ramfuc_reg(0x10f340); 1262aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[6] = ramfuc_reg(0x10f344); 1263aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[7] = ramfuc_reg(0x10f348); 1264aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[8] = ramfuc_reg(0x10f354); 1265aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[15] = ramfuc_reg(0x10f34c); 1266aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs break; 1267aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs case NV_MEM_TYPE_DDR3: 1268aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[0] = ramfuc_reg(0x10f300); 1269aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_mr[2] = ramfuc_reg(0x10f320); 1270aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs break; 1271aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs default: 1272aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs break; 1273aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1274aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1275aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x62c000 = ramfuc_reg(0x62c000); 1276aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f200 = ramfuc_reg(0x10f200); 1277aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f210 = ramfuc_reg(0x10f210); 1278aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f310 = ramfuc_reg(0x10f310); 1279aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f314 = ramfuc_reg(0x10f314); 1280aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f318 = ramfuc_reg(0x10f318); 1281aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f090 = ramfuc_reg(0x10f090); 1282aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f69c = ramfuc_reg(0x10f69c); 1283aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f824 = ramfuc_reg(0x10f824); 1284aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x1373f0 = ramfuc_reg(0x1373f0); 1285aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x1373f4 = ramfuc_reg(0x1373f4); 1286aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x137320 = ramfuc_reg(0x137320); 1287aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f65c = ramfuc_reg(0x10f65c); 1288aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x10f6bc = ramfuc_reg(0x10f6bc); 1289aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs ram->fuc.r_0x100710 = ramfuc_reg(0x100710); 1290dd95c8f782a053db361855298778a7d31de04a48Ben Skeggs ram->fuc.r_0x100750 = ramfuc_reg(0x100750); 1291aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs return 0; 1292aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs} 1293aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs 1294aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsstruct nouveau_oclass 1295aae95ca708140307813e49af6d0d4a7205509129Ben Skeggsnve0_ram_oclass = { 1296aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs .handle = 0, 1297aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs .ofuncs = &(struct nouveau_ofuncs) { 1298aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs .ctor = nve0_ram_ctor, 1299aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs .dtor = _nouveau_ram_dtor, 1300aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs .init = nve0_ram_init, 1301aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs .fini = _nouveau_ram_fini, 1302aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs } 1303aae95ca708140307813e49af6d0d4a7205509129Ben Skeggs}; 1304