nvd0.c revision d2bcea686f21e11415828fcca21a4eb200c6251f
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <subdev/gpio.h>
26
27struct nvd0_gpio_priv {
28	struct nouveau_gpio base;
29};
30
31static void
32nvd0_gpio_reset(struct nouveau_gpio *gpio)
33{
34	struct nouveau_bios *bios = nouveau_bios(gpio);
35	struct nvd0_gpio_priv *priv = (void *)gpio;
36	u8 ver, len;
37	u16 entry;
38	int ent = -1;
39
40	while ((entry = dcb_gpio_entry(bios, 0, ++ent, &ver, &len))) {
41		u32 data = nv_ro32(bios, entry);
42		u8  line =   (data & 0x0000003f);
43		u8  defs = !!(data & 0x00000080);
44		u8  func =   (data & 0x0000ff00) >> 8;
45		u8  unk0 =   (data & 0x00ff0000) >> 16;
46		u8  unk1 =   (data & 0x1f000000) >> 24;
47
48		if (func == 0xff)
49			continue;
50
51		gpio->set(gpio, 0, func, line, defs);
52
53		nv_mask(priv, 0x00d610 + (line * 4), 0xff, unk0);
54		if (unk1--)
55			nv_mask(priv, 0x00d740 + (unk1 * 4), 0xff, line);
56	}
57}
58
59static int
60nvd0_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out)
61{
62	u32 data = ((dir ^ 1) << 13) | (out << 12);
63	nv_mask(gpio, 0x00d610 + (line * 4), 0x00003000, data);
64	nv_mask(gpio, 0x00d604, 0x00000001, 0x00000001); /* update? */
65	return 0;
66}
67
68static int
69nvd0_gpio_sense(struct nouveau_gpio *gpio, int line)
70{
71	return !!(nv_rd32(gpio, 0x00d610 + (line * 4)) & 0x00004000);
72}
73
74static int
75nvd0_gpio_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
76	       struct nouveau_oclass *oclass, void *data, u32 size,
77	       struct nouveau_object **pobject)
78{
79	struct nvd0_gpio_priv *priv;
80	int ret;
81
82	ret = nouveau_gpio_create(parent, engine, oclass, &priv);
83	*pobject = nv_object(priv);
84	if (ret)
85		return ret;
86
87	priv->base.reset = nvd0_gpio_reset;
88	priv->base.drive = nvd0_gpio_drive;
89	priv->base.sense = nvd0_gpio_sense;
90	priv->base.irq_enable = nv50_gpio_irq_enable;
91	nv_subdev(priv)->intr = nv50_gpio_intr;
92	return 0;
93}
94
95struct nouveau_oclass
96nvd0_gpio_oclass = {
97	.handle = NV_SUBDEV(GPIO, 0xd0),
98	.ofuncs = &(struct nouveau_ofuncs) {
99		.ctor = nvd0_gpio_ctor,
100		.dtor = nv50_gpio_dtor,
101		.init = nv50_gpio_init,
102		.fini = nv50_gpio_fini,
103	},
104};
105