nouveau_bios.c revision b6e4ad200a726a32c7083f491383713bc8680f86
1/* 2 * Copyright 2005-2006 Erik Waling 3 * Copyright 2006 Stephane Marchesin 4 * Copyright 2007-2009 Stuart Bennett 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 20 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 21 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 25#include <subdev/bios.h> 26 27#include <drm/drmP.h> 28 29#include "nouveau_drm.h" 30#include "nouveau_reg.h" 31#include "nouveau_hw.h" 32#include "nouveau_encoder.h" 33 34#include <linux/io-mapping.h> 35#include <linux/firmware.h> 36 37/* these defines are made up */ 38#define NV_CIO_CRE_44_HEADA 0x0 39#define NV_CIO_CRE_44_HEADB 0x3 40#define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */ 41 42#define EDID1_LEN 128 43 44#define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg) 45#define LOG_OLD_VALUE(x) 46 47struct init_exec { 48 bool execute; 49 bool repeat; 50}; 51 52static bool nv_cksum(const uint8_t *data, unsigned int length) 53{ 54 /* 55 * There's a few checksums in the BIOS, so here's a generic checking 56 * function. 57 */ 58 int i; 59 uint8_t sum = 0; 60 61 for (i = 0; i < length; i++) 62 sum += data[i]; 63 64 if (sum) 65 return true; 66 67 return false; 68} 69 70static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk) 71{ 72 int compare_record_len, i = 0; 73 uint16_t compareclk, scriptptr = 0; 74 75 if (bios->major_version < 5) /* pre BIT */ 76 compare_record_len = 3; 77 else 78 compare_record_len = 4; 79 80 do { 81 compareclk = ROM16(bios->data[clktable + compare_record_len * i]); 82 if (pxclk >= compareclk * 10) { 83 if (bios->major_version < 5) { 84 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i]; 85 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]); 86 } else 87 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]); 88 break; 89 } 90 i++; 91 } while (compareclk); 92 93 return scriptptr; 94} 95 96static void 97run_digital_op_script(struct drm_device *dev, uint16_t scriptptr, 98 struct dcb_output *dcbent, int head, bool dl) 99{ 100 struct nouveau_drm *drm = nouveau_drm(dev); 101 102 NV_INFO(drm, "0x%04X: Parsing digital output script table\n", 103 scriptptr); 104 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB : 105 NV_CIO_CRE_44_HEADA); 106 nouveau_bios_run_init_table(dev, scriptptr, dcbent, head); 107 108 nv04_dfp_bind_head(dev, dcbent, head, dl); 109} 110 111static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script) 112{ 113 struct nouveau_drm *drm = nouveau_drm(dev); 114 struct nvbios *bios = &drm->vbios; 115 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0); 116 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]); 117 118 if (!bios->fp.xlated_entry || !sub || !scriptofs) 119 return -EINVAL; 120 121 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link); 122 123 if (script == LVDS_PANEL_OFF) { 124 /* off-on delay in ms */ 125 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7])); 126 } 127#ifdef __powerpc__ 128 /* Powerbook specific quirks */ 129 if (script == LVDS_RESET && 130 (dev->pci_device == 0x0179 || dev->pci_device == 0x0189 || 131 dev->pci_device == 0x0329)) 132 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72); 133#endif 134 135 return 0; 136} 137 138static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 139{ 140 /* 141 * The BIT LVDS table's header has the information to setup the 142 * necessary registers. Following the standard 4 byte header are: 143 * A bitmask byte and a dual-link transition pxclk value for use in 144 * selecting the init script when not using straps; 4 script pointers 145 * for panel power, selected by output and on/off; and 8 table pointers 146 * for panel init, the needed one determined by output, and bits in the 147 * conf byte. These tables are similar to the TMDS tables, consisting 148 * of a list of pxclks and script pointers. 149 */ 150 struct nouveau_drm *drm = nouveau_drm(dev); 151 struct nvbios *bios = &drm->vbios; 152 unsigned int outputset = (dcbent->or == 4) ? 1 : 0; 153 uint16_t scriptptr = 0, clktable; 154 155 /* 156 * For now we assume version 3.0 table - g80 support will need some 157 * changes 158 */ 159 160 switch (script) { 161 case LVDS_INIT: 162 return -ENOSYS; 163 case LVDS_BACKLIGHT_ON: 164 case LVDS_PANEL_ON: 165 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]); 166 break; 167 case LVDS_BACKLIGHT_OFF: 168 case LVDS_PANEL_OFF: 169 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]); 170 break; 171 case LVDS_RESET: 172 clktable = bios->fp.lvdsmanufacturerpointer + 15; 173 if (dcbent->or == 4) 174 clktable += 8; 175 176 if (dcbent->lvdsconf.use_straps_for_mode) { 177 if (bios->fp.dual_link) 178 clktable += 4; 179 if (bios->fp.if_is_24bit) 180 clktable += 2; 181 } else { 182 /* using EDID */ 183 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1; 184 185 if (bios->fp.dual_link) { 186 clktable += 4; 187 cmpval_24bit <<= 1; 188 } 189 190 if (bios->fp.strapless_is_24bit & cmpval_24bit) 191 clktable += 2; 192 } 193 194 clktable = ROM16(bios->data[clktable]); 195 if (!clktable) { 196 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 197 return -ENOENT; 198 } 199 scriptptr = clkcmptable(bios, clktable, pxclk); 200 } 201 202 if (!scriptptr) { 203 NV_ERROR(drm, "LVDS output init script not found\n"); 204 return -ENOENT; 205 } 206 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link); 207 208 return 0; 209} 210 211int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 212{ 213 /* 214 * LVDS operations are multiplexed in an effort to present a single API 215 * which works with two vastly differing underlying structures. 216 * This acts as the demux 217 */ 218 219 struct nouveau_drm *drm = nouveau_drm(dev); 220 struct nouveau_device *device = nv_device(drm->device); 221 struct nvbios *bios = &drm->vbios; 222 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 223 uint32_t sel_clk_binding, sel_clk; 224 int ret; 225 226 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver || 227 (lvds_ver >= 0x30 && script == LVDS_INIT)) 228 return 0; 229 230 if (!bios->fp.lvds_init_run) { 231 bios->fp.lvds_init_run = true; 232 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk); 233 } 234 235 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change) 236 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk); 237 if (script == LVDS_RESET && bios->fp.power_off_for_reset) 238 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk); 239 240 NV_INFO(drm, "Calling LVDS script %d:\n", script); 241 242 /* don't let script change pll->head binding */ 243 sel_clk_binding = nv_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 244 245 if (lvds_ver < 0x30) 246 ret = call_lvds_manufacturer_script(dev, dcbent, head, script); 247 else 248 ret = run_lvds_table(dev, dcbent, head, script, pxclk); 249 250 bios->fp.last_script_invoc = (script << 1 | head); 251 252 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 253 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 254 /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */ 255 nv_wr32(device, NV_PBUS_POWERCTRL_2, 0); 256 257 return ret; 258} 259 260struct lvdstableheader { 261 uint8_t lvds_ver, headerlen, recordlen; 262}; 263 264static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth) 265{ 266 /* 267 * BMP version (0xa) LVDS table has a simple header of version and 268 * record length. The BIT LVDS table has the typical BIT table header: 269 * version byte, header length byte, record length byte, and a byte for 270 * the maximum number of records that can be held in the table. 271 */ 272 273 struct nouveau_drm *drm = nouveau_drm(dev); 274 uint8_t lvds_ver, headerlen, recordlen; 275 276 memset(lth, 0, sizeof(struct lvdstableheader)); 277 278 if (bios->fp.lvdsmanufacturerpointer == 0x0) { 279 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n"); 280 return -EINVAL; 281 } 282 283 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 284 285 switch (lvds_ver) { 286 case 0x0a: /* pre NV40 */ 287 headerlen = 2; 288 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 289 break; 290 case 0x30: /* NV4x */ 291 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 292 if (headerlen < 0x1f) { 293 NV_ERROR(drm, "LVDS table header not understood\n"); 294 return -EINVAL; 295 } 296 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 297 break; 298 case 0x40: /* G80/G90 */ 299 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 300 if (headerlen < 0x7) { 301 NV_ERROR(drm, "LVDS table header not understood\n"); 302 return -EINVAL; 303 } 304 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 305 break; 306 default: 307 NV_ERROR(drm, 308 "LVDS table revision %d.%d not currently supported\n", 309 lvds_ver >> 4, lvds_ver & 0xf); 310 return -ENOSYS; 311 } 312 313 lth->lvds_ver = lvds_ver; 314 lth->headerlen = headerlen; 315 lth->recordlen = recordlen; 316 317 return 0; 318} 319 320static int 321get_fp_strap(struct drm_device *dev, struct nvbios *bios) 322{ 323 struct nouveau_device *device = nouveau_dev(dev); 324 325 /* 326 * The fp strap is normally dictated by the "User Strap" in 327 * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the 328 * Internal_Flags struct at 0x48 is set, the user strap gets overriden 329 * by the PCI subsystem ID during POST, but not before the previous user 330 * strap has been committed to CR58 for CR57=0xf on head A, which may be 331 * read and used instead 332 */ 333 334 if (bios->major_version < 5 && bios->data[0x48] & 0x4) 335 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf; 336 337 if (device->card_type >= NV_50) 338 return (nv_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf; 339 else 340 return (nv_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf; 341} 342 343static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios) 344{ 345 struct nouveau_drm *drm = nouveau_drm(dev); 346 uint8_t *fptable; 347 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex; 348 int ret, ofs, fpstrapping; 349 struct lvdstableheader lth; 350 351 if (bios->fp.fptablepointer == 0x0) { 352 /* Apple cards don't have the fp table; the laptops use DDC */ 353 /* The table is also missing on some x86 IGPs */ 354#ifndef __powerpc__ 355 NV_ERROR(drm, "Pointer to flat panel table invalid\n"); 356#endif 357 bios->digital_min_front_porch = 0x4b; 358 return 0; 359 } 360 361 fptable = &bios->data[bios->fp.fptablepointer]; 362 fptable_ver = fptable[0]; 363 364 switch (fptable_ver) { 365 /* 366 * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no 367 * version field, and miss one of the spread spectrum/PWM bytes. 368 * This could affect early GF2Go parts (not seen any appropriate ROMs 369 * though). Here we assume that a version of 0x05 matches this case 370 * (combining with a BMP version check would be better), as the 371 * common case for the panel type field is 0x0005, and that is in 372 * fact what we are reading the first byte of. 373 */ 374 case 0x05: /* some NV10, 11, 15, 16 */ 375 recordlen = 42; 376 ofs = -1; 377 break; 378 case 0x10: /* some NV15/16, and NV11+ */ 379 recordlen = 44; 380 ofs = 0; 381 break; 382 case 0x20: /* NV40+ */ 383 headerlen = fptable[1]; 384 recordlen = fptable[2]; 385 fpentries = fptable[3]; 386 /* 387 * fptable[4] is the minimum 388 * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap 389 */ 390 bios->digital_min_front_porch = fptable[4]; 391 ofs = -7; 392 break; 393 default: 394 NV_ERROR(drm, 395 "FP table revision %d.%d not currently supported\n", 396 fptable_ver >> 4, fptable_ver & 0xf); 397 return -ENOSYS; 398 } 399 400 if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */ 401 return 0; 402 403 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 404 if (ret) 405 return ret; 406 407 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) { 408 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer + 409 lth.headerlen + 1; 410 bios->fp.xlatwidth = lth.recordlen; 411 } 412 if (bios->fp.fpxlatetableptr == 0x0) { 413 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n"); 414 return -EINVAL; 415 } 416 417 fpstrapping = get_fp_strap(dev, bios); 418 419 fpindex = bios->data[bios->fp.fpxlatetableptr + 420 fpstrapping * bios->fp.xlatwidth]; 421 422 if (fpindex > fpentries) { 423 NV_ERROR(drm, "Bad flat panel table index\n"); 424 return -ENOENT; 425 } 426 427 /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */ 428 if (lth.lvds_ver > 0x10) 429 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf; 430 431 /* 432 * If either the strap or xlated fpindex value are 0xf there is no 433 * panel using a strap-derived bios mode present. this condition 434 * includes, but is different from, the DDC panel indicator above 435 */ 436 if (fpstrapping == 0xf || fpindex == 0xf) 437 return 0; 438 439 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen + 440 recordlen * fpindex + ofs; 441 442 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n", 443 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1, 444 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1, 445 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10); 446 447 return 0; 448} 449 450bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode) 451{ 452 struct nouveau_drm *drm = nouveau_drm(dev); 453 struct nvbios *bios = &drm->vbios; 454 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr]; 455 456 if (!mode) /* just checking whether we can produce a mode */ 457 return bios->fp.mode_ptr; 458 459 memset(mode, 0, sizeof(struct drm_display_mode)); 460 /* 461 * For version 1.0 (version in byte 0): 462 * bytes 1-2 are "panel type", including bits on whether Colour/mono, 463 * single/dual link, and type (TFT etc.) 464 * bytes 3-6 are bits per colour in RGBX 465 */ 466 mode->clock = ROM16(mode_entry[7]) * 10; 467 /* bytes 9-10 is HActive */ 468 mode->hdisplay = ROM16(mode_entry[11]) + 1; 469 /* 470 * bytes 13-14 is HValid Start 471 * bytes 15-16 is HValid End 472 */ 473 mode->hsync_start = ROM16(mode_entry[17]) + 1; 474 mode->hsync_end = ROM16(mode_entry[19]) + 1; 475 mode->htotal = ROM16(mode_entry[21]) + 1; 476 /* bytes 23-24, 27-30 similarly, but vertical */ 477 mode->vdisplay = ROM16(mode_entry[25]) + 1; 478 mode->vsync_start = ROM16(mode_entry[31]) + 1; 479 mode->vsync_end = ROM16(mode_entry[33]) + 1; 480 mode->vtotal = ROM16(mode_entry[35]) + 1; 481 mode->flags |= (mode_entry[37] & 0x10) ? 482 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 483 mode->flags |= (mode_entry[37] & 0x1) ? 484 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 485 /* 486 * bytes 38-39 relate to spread spectrum settings 487 * bytes 40-43 are something to do with PWM 488 */ 489 490 mode->status = MODE_OK; 491 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 492 drm_mode_set_name(mode); 493 return bios->fp.mode_ptr; 494} 495 496int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit) 497{ 498 /* 499 * The LVDS table header is (mostly) described in 500 * parse_lvds_manufacturer_table_header(): the BIT header additionally 501 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if 502 * straps are not being used for the panel, this specifies the frequency 503 * at which modes should be set up in the dual link style. 504 * 505 * Following the header, the BMP (ver 0xa) table has several records, 506 * indexed by a separate xlat table, indexed in turn by the fp strap in 507 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script 508 * numbers for use by INIT_SUB which controlled panel init and power, 509 * and finally a dword of ms to sleep between power off and on 510 * operations. 511 * 512 * In the BIT versions, the table following the header serves as an 513 * integrated config and xlat table: the records in the table are 514 * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has 515 * two bytes - the first as a config byte, the second for indexing the 516 * fp mode table pointed to by the BIT 'D' table 517 * 518 * DDC is not used until after card init, so selecting the correct table 519 * entry and setting the dual link flag for EDID equipped panels, 520 * requiring tests against the native-mode pixel clock, cannot be done 521 * until later, when this function should be called with non-zero pxclk 522 */ 523 struct nouveau_drm *drm = nouveau_drm(dev); 524 struct nvbios *bios = &drm->vbios; 525 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0; 526 struct lvdstableheader lth; 527 uint16_t lvdsofs; 528 int ret, chip_version = bios->chip_version; 529 530 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 531 if (ret) 532 return ret; 533 534 switch (lth.lvds_ver) { 535 case 0x0a: /* pre NV40 */ 536 lvdsmanufacturerindex = bios->data[ 537 bios->fp.fpxlatemanufacturertableptr + 538 fpstrapping]; 539 540 /* we're done if this isn't the EDID panel case */ 541 if (!pxclk) 542 break; 543 544 if (chip_version < 0x25) { 545 /* nv17 behaviour 546 * 547 * It seems the old style lvds script pointer is reused 548 * to select 18/24 bit colour depth for EDID panels. 549 */ 550 lvdsmanufacturerindex = 551 (bios->legacy.lvds_single_a_script_ptr & 1) ? 552 2 : 0; 553 if (pxclk >= bios->fp.duallink_transition_clk) 554 lvdsmanufacturerindex++; 555 } else if (chip_version < 0x30) { 556 /* nv28 behaviour (off-chip encoder) 557 * 558 * nv28 does a complex dance of first using byte 121 of 559 * the EDID to choose the lvdsmanufacturerindex, then 560 * later attempting to match the EDID manufacturer and 561 * product IDs in a table (signature 'pidt' (panel id 562 * table?)), setting an lvdsmanufacturerindex of 0 and 563 * an fp strap of the match index (or 0xf if none) 564 */ 565 lvdsmanufacturerindex = 0; 566 } else { 567 /* nv31, nv34 behaviour */ 568 lvdsmanufacturerindex = 0; 569 if (pxclk >= bios->fp.duallink_transition_clk) 570 lvdsmanufacturerindex = 2; 571 if (pxclk >= 140000) 572 lvdsmanufacturerindex = 3; 573 } 574 575 /* 576 * nvidia set the high nibble of (cr57=f, cr58) to 577 * lvdsmanufacturerindex in this case; we don't 578 */ 579 break; 580 case 0x30: /* NV4x */ 581 case 0x40: /* G80/G90 */ 582 lvdsmanufacturerindex = fpstrapping; 583 break; 584 default: 585 NV_ERROR(drm, "LVDS table revision not currently supported\n"); 586 return -ENOSYS; 587 } 588 589 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex; 590 switch (lth.lvds_ver) { 591 case 0x0a: 592 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1; 593 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2; 594 bios->fp.dual_link = bios->data[lvdsofs] & 4; 595 bios->fp.link_c_increment = bios->data[lvdsofs] & 8; 596 *if_is_24bit = bios->data[lvdsofs] & 16; 597 break; 598 case 0x30: 599 case 0x40: 600 /* 601 * No sign of the "power off for reset" or "reset for panel 602 * on" bits, but it's safer to assume we should 603 */ 604 bios->fp.power_off_for_reset = true; 605 bios->fp.reset_after_pclk_change = true; 606 607 /* 608 * It's ok lvdsofs is wrong for nv4x edid case; dual_link is 609 * over-written, and if_is_24bit isn't used 610 */ 611 bios->fp.dual_link = bios->data[lvdsofs] & 1; 612 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2; 613 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4]; 614 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10; 615 break; 616 } 617 618 /* set dual_link flag for EDID case */ 619 if (pxclk && (chip_version < 0x25 || chip_version > 0x28)) 620 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk); 621 622 *dl = bios->fp.dual_link; 623 624 return 0; 625} 626 627/* BIT 'U'/'d' table encoder subtables have hashes matching them to 628 * a particular set of encoders. 629 * 630 * This function returns true if a particular DCB entry matches. 631 */ 632bool 633bios_encoder_match(struct dcb_output *dcb, u32 hash) 634{ 635 if ((hash & 0x000000f0) != (dcb->location << 4)) 636 return false; 637 if ((hash & 0x0000000f) != dcb->type) 638 return false; 639 if (!(hash & (dcb->or << 16))) 640 return false; 641 642 switch (dcb->type) { 643 case DCB_OUTPUT_TMDS: 644 case DCB_OUTPUT_LVDS: 645 case DCB_OUTPUT_DP: 646 if (hash & 0x00c00000) { 647 if (!(hash & (dcb->sorconf.link << 22))) 648 return false; 649 } 650 default: 651 return true; 652 } 653} 654 655int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk) 656{ 657 /* 658 * the pxclk parameter is in kHz 659 * 660 * This runs the TMDS regs setting code found on BIT bios cards 661 * 662 * For ffs(or) == 1 use the first table, for ffs(or) == 2 and 663 * ffs(or) == 3, use the second. 664 */ 665 666 struct nouveau_drm *drm = nouveau_drm(dev); 667 struct nouveau_device *device = nv_device(drm->device); 668 struct nvbios *bios = &drm->vbios; 669 int cv = bios->chip_version; 670 uint16_t clktable = 0, scriptptr; 671 uint32_t sel_clk_binding, sel_clk; 672 673 /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */ 674 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 && 675 dcbent->location != DCB_LOC_ON_CHIP) 676 return 0; 677 678 switch (ffs(dcbent->or)) { 679 case 1: 680 clktable = bios->tmds.output0_script_ptr; 681 break; 682 case 2: 683 case 3: 684 clktable = bios->tmds.output1_script_ptr; 685 break; 686 } 687 688 if (!clktable) { 689 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 690 return -EINVAL; 691 } 692 693 scriptptr = clkcmptable(bios, clktable, pxclk); 694 695 if (!scriptptr) { 696 NV_ERROR(drm, "TMDS output init script not found\n"); 697 return -ENOENT; 698 } 699 700 /* don't let script change pll->head binding */ 701 sel_clk_binding = nv_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 702 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000); 703 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 704 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 705 706 return 0; 707} 708 709static void parse_bios_version(struct drm_device *dev, struct nvbios *bios, uint16_t offset) 710{ 711 /* 712 * offset + 0 (8 bits): Micro version 713 * offset + 1 (8 bits): Minor version 714 * offset + 2 (8 bits): Chip version 715 * offset + 3 (8 bits): Major version 716 */ 717 struct nouveau_drm *drm = nouveau_drm(dev); 718 719 bios->major_version = bios->data[offset + 3]; 720 bios->chip_version = bios->data[offset + 2]; 721 NV_INFO(drm, "Bios version %02x.%02x.%02x.%02x\n", 722 bios->data[offset + 3], bios->data[offset + 2], 723 bios->data[offset + 1], bios->data[offset]); 724} 725 726static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset) 727{ 728 /* 729 * Parses the init table segment for pointers used in script execution. 730 * 731 * offset + 0 (16 bits): init script tables pointer 732 * offset + 2 (16 bits): macro index table pointer 733 * offset + 4 (16 bits): macro table pointer 734 * offset + 6 (16 bits): condition table pointer 735 * offset + 8 (16 bits): io condition table pointer 736 * offset + 10 (16 bits): io flag condition table pointer 737 * offset + 12 (16 bits): init function table pointer 738 */ 739 740 bios->init_script_tbls_ptr = ROM16(bios->data[offset]); 741 bios->macro_index_tbl_ptr = ROM16(bios->data[offset + 2]); 742 bios->macro_tbl_ptr = ROM16(bios->data[offset + 4]); 743 bios->condition_tbl_ptr = ROM16(bios->data[offset + 6]); 744 bios->io_condition_tbl_ptr = ROM16(bios->data[offset + 8]); 745 bios->io_flag_condition_tbl_ptr = ROM16(bios->data[offset + 10]); 746 bios->init_function_tbl_ptr = ROM16(bios->data[offset + 12]); 747} 748 749static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 750{ 751 /* 752 * Parses the load detect values for g80 cards. 753 * 754 * offset + 0 (16 bits): loadval table pointer 755 */ 756 757 struct nouveau_drm *drm = nouveau_drm(dev); 758 uint16_t load_table_ptr; 759 uint8_t version, headerlen, entrylen, num_entries; 760 761 if (bitentry->length != 3) { 762 NV_ERROR(drm, "Do not understand BIT A table\n"); 763 return -EINVAL; 764 } 765 766 load_table_ptr = ROM16(bios->data[bitentry->offset]); 767 768 if (load_table_ptr == 0x0) { 769 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n"); 770 return -EINVAL; 771 } 772 773 version = bios->data[load_table_ptr]; 774 775 if (version != 0x10) { 776 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n", 777 version >> 4, version & 0xF); 778 return -ENOSYS; 779 } 780 781 headerlen = bios->data[load_table_ptr + 1]; 782 entrylen = bios->data[load_table_ptr + 2]; 783 num_entries = bios->data[load_table_ptr + 3]; 784 785 if (headerlen != 4 || entrylen != 4 || num_entries != 2) { 786 NV_ERROR(drm, "Do not understand BIT loadval table\n"); 787 return -EINVAL; 788 } 789 790 /* First entry is normal dac, 2nd tv-out perhaps? */ 791 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff; 792 793 return 0; 794} 795 796static int parse_bit_C_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 797{ 798 /* 799 * offset + 8 (16 bits): PLL limits table pointer 800 * 801 * There's more in here, but that's unknown. 802 */ 803 struct nouveau_drm *drm = nouveau_drm(dev); 804 805 if (bitentry->length < 10) { 806 NV_ERROR(drm, "Do not understand BIT C table\n"); 807 return -EINVAL; 808 } 809 810 bios->pll_limit_tbl_ptr = ROM16(bios->data[bitentry->offset + 8]); 811 812 return 0; 813} 814 815static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 816{ 817 /* 818 * Parses the flat panel table segment that the bit entry points to. 819 * Starting at bitentry->offset: 820 * 821 * offset + 0 (16 bits): ??? table pointer - seems to have 18 byte 822 * records beginning with a freq. 823 * offset + 2 (16 bits): mode table pointer 824 */ 825 struct nouveau_drm *drm = nouveau_drm(dev); 826 827 if (bitentry->length != 4) { 828 NV_ERROR(drm, "Do not understand BIT display table\n"); 829 return -EINVAL; 830 } 831 832 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]); 833 834 return 0; 835} 836 837static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 838{ 839 /* 840 * Parses the init table segment that the bit entry points to. 841 * 842 * See parse_script_table_pointers for layout 843 */ 844 struct nouveau_drm *drm = nouveau_drm(dev); 845 846 if (bitentry->length < 14) { 847 NV_ERROR(drm, "Do not understand init table\n"); 848 return -EINVAL; 849 } 850 851 parse_script_table_pointers(bios, bitentry->offset); 852 853 if (bitentry->length >= 16) 854 bios->some_script_ptr = ROM16(bios->data[bitentry->offset + 14]); 855 if (bitentry->length >= 18) 856 bios->init96_tbl_ptr = ROM16(bios->data[bitentry->offset + 16]); 857 858 return 0; 859} 860 861static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 862{ 863 /* 864 * BIT 'i' (info?) table 865 * 866 * offset + 0 (32 bits): BIOS version dword (as in B table) 867 * offset + 5 (8 bits): BIOS feature byte (same as for BMP?) 868 * offset + 13 (16 bits): pointer to table containing DAC load 869 * detection comparison values 870 * 871 * There's other things in the table, purpose unknown 872 */ 873 874 struct nouveau_drm *drm = nouveau_drm(dev); 875 uint16_t daccmpoffset; 876 uint8_t dacver, dacheaderlen; 877 878 if (bitentry->length < 6) { 879 NV_ERROR(drm, "BIT i table too short for needed information\n"); 880 return -EINVAL; 881 } 882 883 parse_bios_version(dev, bios, bitentry->offset); 884 885 /* 886 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's 887 * Quadro identity crisis), other bits possibly as for BMP feature byte 888 */ 889 bios->feature_byte = bios->data[bitentry->offset + 5]; 890 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE; 891 892 if (bitentry->length < 15) { 893 NV_WARN(drm, "BIT i table not long enough for DAC load " 894 "detection comparison table\n"); 895 return -EINVAL; 896 } 897 898 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]); 899 900 /* doesn't exist on g80 */ 901 if (!daccmpoffset) 902 return 0; 903 904 /* 905 * The first value in the table, following the header, is the 906 * comparison value, the second entry is a comparison value for 907 * TV load detection. 908 */ 909 910 dacver = bios->data[daccmpoffset]; 911 dacheaderlen = bios->data[daccmpoffset + 1]; 912 913 if (dacver != 0x00 && dacver != 0x10) { 914 NV_WARN(drm, "DAC load detection comparison table version " 915 "%d.%d not known\n", dacver >> 4, dacver & 0xf); 916 return -ENOSYS; 917 } 918 919 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]); 920 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]); 921 922 return 0; 923} 924 925static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 926{ 927 /* 928 * Parses the LVDS table segment that the bit entry points to. 929 * Starting at bitentry->offset: 930 * 931 * offset + 0 (16 bits): LVDS strap xlate table pointer 932 */ 933 934 struct nouveau_drm *drm = nouveau_drm(dev); 935 936 if (bitentry->length != 2) { 937 NV_ERROR(drm, "Do not understand BIT LVDS table\n"); 938 return -EINVAL; 939 } 940 941 /* 942 * No idea if it's still called the LVDS manufacturer table, but 943 * the concept's close enough. 944 */ 945 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]); 946 947 return 0; 948} 949 950static int 951parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios, 952 struct bit_entry *bitentry) 953{ 954 /* 955 * offset + 2 (8 bits): number of options in an 956 * INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set 957 * offset + 3 (16 bits): pointer to strap xlate table for RAM 958 * restrict option selection 959 * 960 * There's a bunch of bits in this table other than the RAM restrict 961 * stuff that we don't use - their use currently unknown 962 */ 963 964 /* 965 * Older bios versions don't have a sufficiently long table for 966 * what we want 967 */ 968 if (bitentry->length < 0x5) 969 return 0; 970 971 if (bitentry->version < 2) { 972 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2]; 973 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]); 974 } else { 975 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0]; 976 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]); 977 } 978 979 return 0; 980} 981 982static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 983{ 984 /* 985 * Parses the pointer to the TMDS table 986 * 987 * Starting at bitentry->offset: 988 * 989 * offset + 0 (16 bits): TMDS table pointer 990 * 991 * The TMDS table is typically found just before the DCB table, with a 992 * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being 993 * length?) 994 * 995 * At offset +7 is a pointer to a script, which I don't know how to 996 * run yet. 997 * At offset +9 is a pointer to another script, likewise 998 * Offset +11 has a pointer to a table where the first word is a pxclk 999 * frequency and the second word a pointer to a script, which should be 1000 * run if the comparison pxclk frequency is less than the pxclk desired. 1001 * This repeats for decreasing comparison frequencies 1002 * Offset +13 has a pointer to a similar table 1003 * The selection of table (and possibly +7/+9 script) is dictated by 1004 * "or" from the DCB. 1005 */ 1006 1007 struct nouveau_drm *drm = nouveau_drm(dev); 1008 uint16_t tmdstableptr, script1, script2; 1009 1010 if (bitentry->length != 2) { 1011 NV_ERROR(drm, "Do not understand BIT TMDS table\n"); 1012 return -EINVAL; 1013 } 1014 1015 tmdstableptr = ROM16(bios->data[bitentry->offset]); 1016 if (!tmdstableptr) { 1017 NV_ERROR(drm, "Pointer to TMDS table invalid\n"); 1018 return -EINVAL; 1019 } 1020 1021 NV_INFO(drm, "TMDS table version %d.%d\n", 1022 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf); 1023 1024 /* nv50+ has v2.0, but we don't parse it atm */ 1025 if (bios->data[tmdstableptr] != 0x11) 1026 return -ENOSYS; 1027 1028 /* 1029 * These two scripts are odd: they don't seem to get run even when 1030 * they are not stubbed. 1031 */ 1032 script1 = ROM16(bios->data[tmdstableptr + 7]); 1033 script2 = ROM16(bios->data[tmdstableptr + 9]); 1034 if (bios->data[script1] != 'q' || bios->data[script2] != 'q') 1035 NV_WARN(drm, "TMDS table script pointers not stubbed\n"); 1036 1037 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]); 1038 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]); 1039 1040 return 0; 1041} 1042 1043struct bit_table { 1044 const char id; 1045 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *); 1046}; 1047 1048#define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry }) 1049 1050int 1051bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit) 1052{ 1053 struct nouveau_drm *drm = nouveau_drm(dev); 1054 struct nvbios *bios = &drm->vbios; 1055 u8 entries, *entry; 1056 1057 if (bios->type != NVBIOS_BIT) 1058 return -ENODEV; 1059 1060 entries = bios->data[bios->offset + 10]; 1061 entry = &bios->data[bios->offset + 12]; 1062 while (entries--) { 1063 if (entry[0] == id) { 1064 bit->id = entry[0]; 1065 bit->version = entry[1]; 1066 bit->length = ROM16(entry[2]); 1067 bit->offset = ROM16(entry[4]); 1068 bit->data = ROMPTR(dev, entry[4]); 1069 return 0; 1070 } 1071 1072 entry += bios->data[bios->offset + 9]; 1073 } 1074 1075 return -ENOENT; 1076} 1077 1078static int 1079parse_bit_table(struct nvbios *bios, const uint16_t bitoffset, 1080 struct bit_table *table) 1081{ 1082 struct drm_device *dev = bios->dev; 1083 struct nouveau_drm *drm = nouveau_drm(dev); 1084 struct bit_entry bitentry; 1085 1086 if (bit_table(dev, table->id, &bitentry) == 0) 1087 return table->parse_fn(dev, bios, &bitentry); 1088 1089 NV_INFO(drm, "BIT table '%c' not found\n", table->id); 1090 return -ENOSYS; 1091} 1092 1093static int 1094parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset) 1095{ 1096 int ret; 1097 1098 /* 1099 * The only restriction on parsing order currently is having 'i' first 1100 * for use of bios->*_version or bios->feature_byte while parsing; 1101 * functions shouldn't be actually *doing* anything apart from pulling 1102 * data from the image into the bios struct, thus no interdependencies 1103 */ 1104 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i)); 1105 if (ret) /* info? */ 1106 return ret; 1107 if (bios->major_version >= 0x60) /* g80+ */ 1108 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A)); 1109 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('C', C)); 1110 if (ret) 1111 return ret; 1112 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display)); 1113 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init)); 1114 if (ret) 1115 return ret; 1116 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */ 1117 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds)); 1118 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds)); 1119 1120 return 0; 1121} 1122 1123static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset) 1124{ 1125 /* 1126 * Parses the BMP structure for useful things, but does not act on them 1127 * 1128 * offset + 5: BMP major version 1129 * offset + 6: BMP minor version 1130 * offset + 9: BMP feature byte 1131 * offset + 10: BCD encoded BIOS version 1132 * 1133 * offset + 18: init script table pointer (for bios versions < 5.10h) 1134 * offset + 20: extra init script table pointer (for bios 1135 * versions < 5.10h) 1136 * 1137 * offset + 24: memory init table pointer (used on early bios versions) 1138 * offset + 26: SDR memory sequencing setup data table 1139 * offset + 28: DDR memory sequencing setup data table 1140 * 1141 * offset + 54: index of I2C CRTC pair to use for CRT output 1142 * offset + 55: index of I2C CRTC pair to use for TV output 1143 * offset + 56: index of I2C CRTC pair to use for flat panel output 1144 * offset + 58: write CRTC index for I2C pair 0 1145 * offset + 59: read CRTC index for I2C pair 0 1146 * offset + 60: write CRTC index for I2C pair 1 1147 * offset + 61: read CRTC index for I2C pair 1 1148 * 1149 * offset + 67: maximum internal PLL frequency (single stage PLL) 1150 * offset + 71: minimum internal PLL frequency (single stage PLL) 1151 * 1152 * offset + 75: script table pointers, as described in 1153 * parse_script_table_pointers 1154 * 1155 * offset + 89: TMDS single link output A table pointer 1156 * offset + 91: TMDS single link output B table pointer 1157 * offset + 95: LVDS single link output A table pointer 1158 * offset + 105: flat panel timings table pointer 1159 * offset + 107: flat panel strapping translation table pointer 1160 * offset + 117: LVDS manufacturer panel config table pointer 1161 * offset + 119: LVDS manufacturer strapping translation table pointer 1162 * 1163 * offset + 142: PLL limits table pointer 1164 * 1165 * offset + 156: minimum pixel clock for LVDS dual link 1166 */ 1167 1168 struct nouveau_drm *drm = nouveau_drm(dev); 1169 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor; 1170 uint16_t bmplength; 1171 uint16_t legacy_scripts_offset, legacy_i2c_offset; 1172 1173 /* load needed defaults in case we can't parse this info */ 1174 bios->digital_min_front_porch = 0x4b; 1175 bios->fmaxvco = 256000; 1176 bios->fminvco = 128000; 1177 bios->fp.duallink_transition_clk = 90000; 1178 1179 bmp_version_major = bmp[5]; 1180 bmp_version_minor = bmp[6]; 1181 1182 NV_INFO(drm, "BMP version %d.%d\n", 1183 bmp_version_major, bmp_version_minor); 1184 1185 /* 1186 * Make sure that 0x36 is blank and can't be mistaken for a DCB 1187 * pointer on early versions 1188 */ 1189 if (bmp_version_major < 5) 1190 *(uint16_t *)&bios->data[0x36] = 0; 1191 1192 /* 1193 * Seems that the minor version was 1 for all major versions prior 1194 * to 5. Version 6 could theoretically exist, but I suspect BIT 1195 * happened instead. 1196 */ 1197 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) { 1198 NV_ERROR(drm, "You have an unsupported BMP version. " 1199 "Please send in your bios\n"); 1200 return -ENOSYS; 1201 } 1202 1203 if (bmp_version_major == 0) 1204 /* nothing that's currently useful in this version */ 1205 return 0; 1206 else if (bmp_version_major == 1) 1207 bmplength = 44; /* exact for 1.01 */ 1208 else if (bmp_version_major == 2) 1209 bmplength = 48; /* exact for 2.01 */ 1210 else if (bmp_version_major == 3) 1211 bmplength = 54; 1212 /* guessed - mem init tables added in this version */ 1213 else if (bmp_version_major == 4 || bmp_version_minor < 0x1) 1214 /* don't know if 5.0 exists... */ 1215 bmplength = 62; 1216 /* guessed - BMP I2C indices added in version 4*/ 1217 else if (bmp_version_minor < 0x6) 1218 bmplength = 67; /* exact for 5.01 */ 1219 else if (bmp_version_minor < 0x10) 1220 bmplength = 75; /* exact for 5.06 */ 1221 else if (bmp_version_minor == 0x10) 1222 bmplength = 89; /* exact for 5.10h */ 1223 else if (bmp_version_minor < 0x14) 1224 bmplength = 118; /* exact for 5.11h */ 1225 else if (bmp_version_minor < 0x24) 1226 /* 1227 * Not sure of version where pll limits came in; 1228 * certainly exist by 0x24 though. 1229 */ 1230 /* length not exact: this is long enough to get lvds members */ 1231 bmplength = 123; 1232 else if (bmp_version_minor < 0x27) 1233 /* 1234 * Length not exact: this is long enough to get pll limit 1235 * member 1236 */ 1237 bmplength = 144; 1238 else 1239 /* 1240 * Length not exact: this is long enough to get dual link 1241 * transition clock. 1242 */ 1243 bmplength = 158; 1244 1245 /* checksum */ 1246 if (nv_cksum(bmp, 8)) { 1247 NV_ERROR(drm, "Bad BMP checksum\n"); 1248 return -EINVAL; 1249 } 1250 1251 /* 1252 * Bit 4 seems to indicate either a mobile bios or a quadro card -- 1253 * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl 1254 * (not nv10gl), bit 5 that the flat panel tables are present, and 1255 * bit 6 a tv bios. 1256 */ 1257 bios->feature_byte = bmp[9]; 1258 1259 parse_bios_version(dev, bios, offset + 10); 1260 1261 if (bmp_version_major < 5 || bmp_version_minor < 0x10) 1262 bios->old_style_init = true; 1263 legacy_scripts_offset = 18; 1264 if (bmp_version_major < 2) 1265 legacy_scripts_offset -= 4; 1266 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]); 1267 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]); 1268 1269 if (bmp_version_major > 2) { /* appears in BMP 3 */ 1270 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]); 1271 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]); 1272 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]); 1273 } 1274 1275 legacy_i2c_offset = 0x48; /* BMP version 2 & 3 */ 1276 if (bmplength > 61) 1277 legacy_i2c_offset = offset + 54; 1278 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset]; 1279 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1]; 1280 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2]; 1281 1282 if (bmplength > 74) { 1283 bios->fmaxvco = ROM32(bmp[67]); 1284 bios->fminvco = ROM32(bmp[71]); 1285 } 1286 if (bmplength > 88) 1287 parse_script_table_pointers(bios, offset + 75); 1288 if (bmplength > 94) { 1289 bios->tmds.output0_script_ptr = ROM16(bmp[89]); 1290 bios->tmds.output1_script_ptr = ROM16(bmp[91]); 1291 /* 1292 * Never observed in use with lvds scripts, but is reused for 1293 * 18/24 bit panel interface default for EDID equipped panels 1294 * (if_is_24bit not set directly to avoid any oscillation). 1295 */ 1296 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]); 1297 } 1298 if (bmplength > 108) { 1299 bios->fp.fptablepointer = ROM16(bmp[105]); 1300 bios->fp.fpxlatetableptr = ROM16(bmp[107]); 1301 bios->fp.xlatwidth = 1; 1302 } 1303 if (bmplength > 120) { 1304 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]); 1305 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]); 1306 } 1307 if (bmplength > 143) 1308 bios->pll_limit_tbl_ptr = ROM16(bmp[142]); 1309 1310 if (bmplength > 157) 1311 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10; 1312 1313 return 0; 1314} 1315 1316static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len) 1317{ 1318 int i, j; 1319 1320 for (i = 0; i <= (n - len); i++) { 1321 for (j = 0; j < len; j++) 1322 if (data[i + j] != str[j]) 1323 break; 1324 if (j == len) 1325 return i; 1326 } 1327 1328 return 0; 1329} 1330 1331void * 1332olddcb_table(struct drm_device *dev) 1333{ 1334 struct nouveau_drm *drm = nouveau_drm(dev); 1335 u8 *dcb = NULL; 1336 1337 if (nv_device(drm->device)->card_type > NV_04) 1338 dcb = ROMPTR(dev, drm->vbios.data[0x36]); 1339 if (!dcb) { 1340 NV_WARN(drm, "No DCB data found in VBIOS\n"); 1341 return NULL; 1342 } 1343 1344 if (dcb[0] >= 0x41) { 1345 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]); 1346 return NULL; 1347 } else 1348 if (dcb[0] >= 0x30) { 1349 if (ROM32(dcb[6]) == 0x4edcbdcb) 1350 return dcb; 1351 } else 1352 if (dcb[0] >= 0x20) { 1353 if (ROM32(dcb[4]) == 0x4edcbdcb) 1354 return dcb; 1355 } else 1356 if (dcb[0] >= 0x15) { 1357 if (!memcmp(&dcb[-7], "DEV_REC", 7)) 1358 return dcb; 1359 } else { 1360 /* 1361 * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but 1362 * always has the same single (crt) entry, even when tv-out 1363 * present, so the conclusion is this version cannot really 1364 * be used. 1365 * 1366 * v1.2 tables (some NV6/10, and NV15+) normally have the 1367 * same 5 entries, which are not specific to the card and so 1368 * no use. 1369 * 1370 * v1.2 does have an I2C table that read_dcb_i2c_table can 1371 * handle, but cards exist (nv11 in #14821) with a bad i2c 1372 * table pointer, so use the indices parsed in 1373 * parse_bmp_structure. 1374 * 1375 * v1.1 (NV5+, maybe some NV4) is entirely unhelpful 1376 */ 1377 NV_WARN(drm, "No useful DCB data in VBIOS\n"); 1378 return NULL; 1379 } 1380 1381 NV_WARN(drm, "DCB header validation failed\n"); 1382 return NULL; 1383} 1384 1385void * 1386olddcb_outp(struct drm_device *dev, u8 idx) 1387{ 1388 u8 *dcb = olddcb_table(dev); 1389 if (dcb && dcb[0] >= 0x30) { 1390 if (idx < dcb[2]) 1391 return dcb + dcb[1] + (idx * dcb[3]); 1392 } else 1393 if (dcb && dcb[0] >= 0x20) { 1394 u8 *i2c = ROMPTR(dev, dcb[2]); 1395 u8 *ent = dcb + 8 + (idx * 8); 1396 if (i2c && ent < i2c) 1397 return ent; 1398 } else 1399 if (dcb && dcb[0] >= 0x15) { 1400 u8 *i2c = ROMPTR(dev, dcb[2]); 1401 u8 *ent = dcb + 4 + (idx * 10); 1402 if (i2c && ent < i2c) 1403 return ent; 1404 } 1405 1406 return NULL; 1407} 1408 1409int 1410olddcb_outp_foreach(struct drm_device *dev, void *data, 1411 int (*exec)(struct drm_device *, void *, int idx, u8 *outp)) 1412{ 1413 int ret, idx = -1; 1414 u8 *outp = NULL; 1415 while ((outp = olddcb_outp(dev, ++idx))) { 1416 if (ROM32(outp[0]) == 0x00000000) 1417 break; /* seen on an NV11 with DCB v1.5 */ 1418 if (ROM32(outp[0]) == 0xffffffff) 1419 break; /* seen on an NV17 with DCB v2.0 */ 1420 1421 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED) 1422 continue; 1423 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL) 1424 break; 1425 1426 ret = exec(dev, data, idx, outp); 1427 if (ret) 1428 return ret; 1429 } 1430 1431 return 0; 1432} 1433 1434u8 * 1435olddcb_conntab(struct drm_device *dev) 1436{ 1437 u8 *dcb = olddcb_table(dev); 1438 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) { 1439 u8 *conntab = ROMPTR(dev, dcb[0x14]); 1440 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40) 1441 return conntab; 1442 } 1443 return NULL; 1444} 1445 1446u8 * 1447olddcb_conn(struct drm_device *dev, u8 idx) 1448{ 1449 u8 *conntab = olddcb_conntab(dev); 1450 if (conntab && idx < conntab[2]) 1451 return conntab + conntab[1] + (idx * conntab[3]); 1452 return NULL; 1453} 1454 1455static struct dcb_output *new_dcb_entry(struct dcb_table *dcb) 1456{ 1457 struct dcb_output *entry = &dcb->entry[dcb->entries]; 1458 1459 memset(entry, 0, sizeof(struct dcb_output)); 1460 entry->index = dcb->entries++; 1461 1462 return entry; 1463} 1464 1465static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c, 1466 int heads, int or) 1467{ 1468 struct dcb_output *entry = new_dcb_entry(dcb); 1469 1470 entry->type = type; 1471 entry->i2c_index = i2c; 1472 entry->heads = heads; 1473 if (type != DCB_OUTPUT_ANALOG) 1474 entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */ 1475 entry->or = or; 1476} 1477 1478static bool 1479parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb, 1480 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1481{ 1482 struct nouveau_drm *drm = nouveau_drm(dev); 1483 1484 entry->type = conn & 0xf; 1485 entry->i2c_index = (conn >> 4) & 0xf; 1486 entry->heads = (conn >> 8) & 0xf; 1487 entry->connector = (conn >> 12) & 0xf; 1488 entry->bus = (conn >> 16) & 0xf; 1489 entry->location = (conn >> 20) & 0x3; 1490 entry->or = (conn >> 24) & 0xf; 1491 1492 switch (entry->type) { 1493 case DCB_OUTPUT_ANALOG: 1494 /* 1495 * Although the rest of a CRT conf dword is usually 1496 * zeros, mac biosen have stuff there so we must mask 1497 */ 1498 entry->crtconf.maxfreq = (dcb->version < 0x30) ? 1499 (conf & 0xffff) * 10 : 1500 (conf & 0xff) * 10000; 1501 break; 1502 case DCB_OUTPUT_LVDS: 1503 { 1504 uint32_t mask; 1505 if (conf & 0x1) 1506 entry->lvdsconf.use_straps_for_mode = true; 1507 if (dcb->version < 0x22) { 1508 mask = ~0xd; 1509 /* 1510 * The laptop in bug 14567 lies and claims to not use 1511 * straps when it does, so assume all DCB 2.0 laptops 1512 * use straps, until a broken EDID using one is produced 1513 */ 1514 entry->lvdsconf.use_straps_for_mode = true; 1515 /* 1516 * Both 0x4 and 0x8 show up in v2.0 tables; assume they 1517 * mean the same thing (probably wrong, but might work) 1518 */ 1519 if (conf & 0x4 || conf & 0x8) 1520 entry->lvdsconf.use_power_scripts = true; 1521 } else { 1522 mask = ~0x7; 1523 if (conf & 0x2) 1524 entry->lvdsconf.use_acpi_for_edid = true; 1525 if (conf & 0x4) 1526 entry->lvdsconf.use_power_scripts = true; 1527 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4; 1528 } 1529 if (conf & mask) { 1530 /* 1531 * Until we even try to use these on G8x, it's 1532 * useless reporting unknown bits. They all are. 1533 */ 1534 if (dcb->version >= 0x40) 1535 break; 1536 1537 NV_ERROR(drm, "Unknown LVDS configuration bits, " 1538 "please report\n"); 1539 } 1540 break; 1541 } 1542 case DCB_OUTPUT_TV: 1543 { 1544 if (dcb->version >= 0x30) 1545 entry->tvconf.has_component_output = conf & (0x8 << 4); 1546 else 1547 entry->tvconf.has_component_output = false; 1548 1549 break; 1550 } 1551 case DCB_OUTPUT_DP: 1552 entry->dpconf.sor.link = (conf & 0x00000030) >> 4; 1553 switch ((conf & 0x00e00000) >> 21) { 1554 case 0: 1555 entry->dpconf.link_bw = 162000; 1556 break; 1557 default: 1558 entry->dpconf.link_bw = 270000; 1559 break; 1560 } 1561 switch ((conf & 0x0f000000) >> 24) { 1562 case 0xf: 1563 entry->dpconf.link_nr = 4; 1564 break; 1565 case 0x3: 1566 entry->dpconf.link_nr = 2; 1567 break; 1568 default: 1569 entry->dpconf.link_nr = 1; 1570 break; 1571 } 1572 break; 1573 case DCB_OUTPUT_TMDS: 1574 if (dcb->version >= 0x40) 1575 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4; 1576 else if (dcb->version >= 0x30) 1577 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8; 1578 else if (dcb->version >= 0x22) 1579 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4; 1580 1581 break; 1582 case DCB_OUTPUT_EOL: 1583 /* weird g80 mobile type that "nv" treats as a terminator */ 1584 dcb->entries--; 1585 return false; 1586 default: 1587 break; 1588 } 1589 1590 if (dcb->version < 0x40) { 1591 /* Normal entries consist of a single bit, but dual link has 1592 * the next most significant bit set too 1593 */ 1594 entry->duallink_possible = 1595 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or); 1596 } else { 1597 entry->duallink_possible = (entry->sorconf.link == 3); 1598 } 1599 1600 /* unsure what DCB version introduces this, 3.0? */ 1601 if (conf & 0x100000) 1602 entry->i2c_upper_default = true; 1603 1604 return true; 1605} 1606 1607static bool 1608parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb, 1609 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1610{ 1611 struct nouveau_drm *drm = nouveau_drm(dev); 1612 1613 switch (conn & 0x0000000f) { 1614 case 0: 1615 entry->type = DCB_OUTPUT_ANALOG; 1616 break; 1617 case 1: 1618 entry->type = DCB_OUTPUT_TV; 1619 break; 1620 case 2: 1621 case 4: 1622 if (conn & 0x10) 1623 entry->type = DCB_OUTPUT_LVDS; 1624 else 1625 entry->type = DCB_OUTPUT_TMDS; 1626 break; 1627 case 3: 1628 entry->type = DCB_OUTPUT_LVDS; 1629 break; 1630 default: 1631 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f); 1632 return false; 1633 } 1634 1635 entry->i2c_index = (conn & 0x0003c000) >> 14; 1636 entry->heads = ((conn & 0x001c0000) >> 18) + 1; 1637 entry->or = entry->heads; /* same as heads, hopefully safe enough */ 1638 entry->location = (conn & 0x01e00000) >> 21; 1639 entry->bus = (conn & 0x0e000000) >> 25; 1640 entry->duallink_possible = false; 1641 1642 switch (entry->type) { 1643 case DCB_OUTPUT_ANALOG: 1644 entry->crtconf.maxfreq = (conf & 0xffff) * 10; 1645 break; 1646 case DCB_OUTPUT_TV: 1647 entry->tvconf.has_component_output = false; 1648 break; 1649 case DCB_OUTPUT_LVDS: 1650 if ((conn & 0x00003f00) >> 8 != 0x10) 1651 entry->lvdsconf.use_straps_for_mode = true; 1652 entry->lvdsconf.use_power_scripts = true; 1653 break; 1654 default: 1655 break; 1656 } 1657 1658 return true; 1659} 1660 1661static 1662void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb) 1663{ 1664 /* 1665 * DCB v2.0 lists each output combination separately. 1666 * Here we merge compatible entries to have fewer outputs, with 1667 * more options 1668 */ 1669 1670 struct nouveau_drm *drm = nouveau_drm(dev); 1671 int i, newentries = 0; 1672 1673 for (i = 0; i < dcb->entries; i++) { 1674 struct dcb_output *ient = &dcb->entry[i]; 1675 int j; 1676 1677 for (j = i + 1; j < dcb->entries; j++) { 1678 struct dcb_output *jent = &dcb->entry[j]; 1679 1680 if (jent->type == 100) /* already merged entry */ 1681 continue; 1682 1683 /* merge heads field when all other fields the same */ 1684 if (jent->i2c_index == ient->i2c_index && 1685 jent->type == ient->type && 1686 jent->location == ient->location && 1687 jent->or == ient->or) { 1688 NV_INFO(drm, "Merging DCB entries %d and %d\n", 1689 i, j); 1690 ient->heads |= jent->heads; 1691 jent->type = 100; /* dummy value */ 1692 } 1693 } 1694 } 1695 1696 /* Compact entries merged into others out of dcb */ 1697 for (i = 0; i < dcb->entries; i++) { 1698 if (dcb->entry[i].type == 100) 1699 continue; 1700 1701 if (newentries != i) { 1702 dcb->entry[newentries] = dcb->entry[i]; 1703 dcb->entry[newentries].index = newentries; 1704 } 1705 newentries++; 1706 } 1707 1708 dcb->entries = newentries; 1709} 1710 1711static bool 1712apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf) 1713{ 1714 struct nouveau_drm *drm = nouveau_drm(dev); 1715 struct dcb_table *dcb = &drm->vbios.dcb; 1716 1717 /* Dell Precision M6300 1718 * DCB entry 2: 02025312 00000010 1719 * DCB entry 3: 02026312 00000020 1720 * 1721 * Identical, except apparently a different connector on a 1722 * different SOR link. Not a clue how we're supposed to know 1723 * which one is in use if it even shares an i2c line... 1724 * 1725 * Ignore the connector on the second SOR link to prevent 1726 * nasty problems until this is sorted (assuming it's not a 1727 * VBIOS bug). 1728 */ 1729 if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) { 1730 if (*conn == 0x02026312 && *conf == 0x00000020) 1731 return false; 1732 } 1733 1734 /* GeForce3 Ti 200 1735 * 1736 * DCB reports an LVDS output that should be TMDS: 1737 * DCB entry 1: f2005014 ffffffff 1738 */ 1739 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) { 1740 if (*conn == 0xf2005014 && *conf == 0xffffffff) { 1741 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, 1); 1742 return false; 1743 } 1744 } 1745 1746 /* XFX GT-240X-YA 1747 * 1748 * So many things wrong here, replace the entire encoder table.. 1749 */ 1750 if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) { 1751 if (idx == 0) { 1752 *conn = 0x02001300; /* VGA, connector 1 */ 1753 *conf = 0x00000028; 1754 } else 1755 if (idx == 1) { 1756 *conn = 0x01010312; /* DVI, connector 0 */ 1757 *conf = 0x00020030; 1758 } else 1759 if (idx == 2) { 1760 *conn = 0x01010310; /* VGA, connector 0 */ 1761 *conf = 0x00000028; 1762 } else 1763 if (idx == 3) { 1764 *conn = 0x02022362; /* HDMI, connector 2 */ 1765 *conf = 0x00020010; 1766 } else { 1767 *conn = 0x0000000e; /* EOL */ 1768 *conf = 0x00000000; 1769 } 1770 } 1771 1772 /* Some other twisted XFX board (rhbz#694914) 1773 * 1774 * The DVI/VGA encoder combo that's supposed to represent the 1775 * DVI-I connector actually point at two different ones, and 1776 * the HDMI connector ends up paired with the VGA instead. 1777 * 1778 * Connector table is missing anything for VGA at all, pointing it 1779 * an invalid conntab entry 2 so we figure it out ourself. 1780 */ 1781 if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) { 1782 if (idx == 0) { 1783 *conn = 0x02002300; /* VGA, connector 2 */ 1784 *conf = 0x00000028; 1785 } else 1786 if (idx == 1) { 1787 *conn = 0x01010312; /* DVI, connector 0 */ 1788 *conf = 0x00020030; 1789 } else 1790 if (idx == 2) { 1791 *conn = 0x04020310; /* VGA, connector 0 */ 1792 *conf = 0x00000028; 1793 } else 1794 if (idx == 3) { 1795 *conn = 0x02021322; /* HDMI, connector 1 */ 1796 *conf = 0x00020010; 1797 } else { 1798 *conn = 0x0000000e; /* EOL */ 1799 *conf = 0x00000000; 1800 } 1801 } 1802 1803 /* fdo#50830: connector indices for VGA and DVI-I are backwards */ 1804 if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) { 1805 if (idx == 0 && *conn == 0x02000300) 1806 *conn = 0x02011300; 1807 else 1808 if (idx == 1 && *conn == 0x04011310) 1809 *conn = 0x04000310; 1810 else 1811 if (idx == 2 && *conn == 0x02011312) 1812 *conn = 0x02000312; 1813 } 1814 1815 return true; 1816} 1817 1818static void 1819fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios) 1820{ 1821 struct dcb_table *dcb = &bios->dcb; 1822 int all_heads = (nv_two_heads(dev) ? 3 : 1); 1823 1824#ifdef __powerpc__ 1825 /* Apple iMac G4 NV17 */ 1826 if (of_machine_is_compatible("PowerMac4,5")) { 1827 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1); 1828 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2); 1829 return; 1830 } 1831#endif 1832 1833 /* Make up some sane defaults */ 1834 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1835 bios->legacy.i2c_indices.crt, 1, 1); 1836 1837 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0) 1838 fabricate_dcb_output(dcb, DCB_OUTPUT_TV, 1839 bios->legacy.i2c_indices.tv, 1840 all_heads, 0); 1841 1842 else if (bios->tmds.output0_script_ptr || 1843 bios->tmds.output1_script_ptr) 1844 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1845 bios->legacy.i2c_indices.panel, 1846 all_heads, 1); 1847} 1848 1849static int 1850parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp) 1851{ 1852 struct nouveau_drm *drm = nouveau_drm(dev); 1853 struct dcb_table *dcb = &drm->vbios.dcb; 1854 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]); 1855 u32 conn = ROM32(outp[0]); 1856 bool ret; 1857 1858 if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) { 1859 struct dcb_output *entry = new_dcb_entry(dcb); 1860 1861 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf); 1862 1863 if (dcb->version >= 0x20) 1864 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry); 1865 else 1866 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry); 1867 if (!ret) 1868 return 1; /* stop parsing */ 1869 1870 /* Ignore the I2C index for on-chip TV-out, as there 1871 * are cards with bogus values (nv31m in bug 23212), 1872 * and it's otherwise useless. 1873 */ 1874 if (entry->type == DCB_OUTPUT_TV && 1875 entry->location == DCB_LOC_ON_CHIP) 1876 entry->i2c_index = 0x0f; 1877 } 1878 1879 return 0; 1880} 1881 1882static void 1883dcb_fake_connectors(struct nvbios *bios) 1884{ 1885 struct dcb_table *dcbt = &bios->dcb; 1886 u8 map[16] = { }; 1887 int i, idx = 0; 1888 1889 /* heuristic: if we ever get a non-zero connector field, assume 1890 * that all the indices are valid and we don't need fake them. 1891 * 1892 * and, as usual, a blacklist of boards with bad bios data.. 1893 */ 1894 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) { 1895 for (i = 0; i < dcbt->entries; i++) { 1896 if (dcbt->entry[i].connector) 1897 return; 1898 } 1899 } 1900 1901 /* no useful connector info available, we need to make it up 1902 * ourselves. the rule here is: anything on the same i2c bus 1903 * is considered to be on the same connector. any output 1904 * without an associated i2c bus is assigned its own unique 1905 * connector index. 1906 */ 1907 for (i = 0; i < dcbt->entries; i++) { 1908 u8 i2c = dcbt->entry[i].i2c_index; 1909 if (i2c == 0x0f) { 1910 dcbt->entry[i].connector = idx++; 1911 } else { 1912 if (!map[i2c]) 1913 map[i2c] = ++idx; 1914 dcbt->entry[i].connector = map[i2c] - 1; 1915 } 1916 } 1917 1918 /* if we created more than one connector, destroy the connector 1919 * table - just in case it has random, rather than stub, entries. 1920 */ 1921 if (i > 1) { 1922 u8 *conntab = olddcb_conntab(bios->dev); 1923 if (conntab) 1924 conntab[0] = 0x00; 1925 } 1926} 1927 1928static int 1929parse_dcb_table(struct drm_device *dev, struct nvbios *bios) 1930{ 1931 struct nouveau_drm *drm = nouveau_drm(dev); 1932 struct dcb_table *dcb = &bios->dcb; 1933 u8 *dcbt, *conn; 1934 int idx; 1935 1936 dcbt = olddcb_table(dev); 1937 if (!dcbt) { 1938 /* handle pre-DCB boards */ 1939 if (bios->type == NVBIOS_BMP) { 1940 fabricate_dcb_encoder_table(dev, bios); 1941 return 0; 1942 } 1943 1944 return -EINVAL; 1945 } 1946 1947 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf); 1948 1949 dcb->version = dcbt[0]; 1950 olddcb_outp_foreach(dev, NULL, parse_dcb_entry); 1951 1952 /* 1953 * apart for v2.1+ not being known for requiring merging, this 1954 * guarantees dcbent->index is the index of the entry in the rom image 1955 */ 1956 if (dcb->version < 0x21) 1957 merge_like_dcb_entries(dev, dcb); 1958 1959 if (!dcb->entries) 1960 return -ENXIO; 1961 1962 /* dump connector table entries to log, if any exist */ 1963 idx = -1; 1964 while ((conn = olddcb_conn(dev, ++idx))) { 1965 if (conn[0] != 0xff) { 1966 NV_INFO(drm, "DCB conn %02d: ", idx); 1967 if (olddcb_conntab(dev)[3] < 4) 1968 printk("%04x\n", ROM16(conn[0])); 1969 else 1970 printk("%08x\n", ROM32(conn[0])); 1971 } 1972 } 1973 dcb_fake_connectors(bios); 1974 return 0; 1975} 1976 1977static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry) 1978{ 1979 /* 1980 * The header following the "HWSQ" signature has the number of entries, 1981 * and the entry size 1982 * 1983 * An entry consists of a dword to write to the sequencer control reg 1984 * (0x00001304), followed by the ucode bytes, written sequentially, 1985 * starting at reg 0x00001400 1986 */ 1987 1988 struct nouveau_drm *drm = nouveau_drm(dev); 1989 struct nouveau_device *device = nv_device(drm->device); 1990 uint8_t bytes_to_write; 1991 uint16_t hwsq_entry_offset; 1992 int i; 1993 1994 if (bios->data[hwsq_offset] <= entry) { 1995 NV_ERROR(drm, "Too few entries in HW sequencer table for " 1996 "requested entry\n"); 1997 return -ENOENT; 1998 } 1999 2000 bytes_to_write = bios->data[hwsq_offset + 1]; 2001 2002 if (bytes_to_write != 36) { 2003 NV_ERROR(drm, "Unknown HW sequencer entry size\n"); 2004 return -EINVAL; 2005 } 2006 2007 NV_INFO(drm, "Loading NV17 power sequencing microcode\n"); 2008 2009 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write; 2010 2011 /* set sequencer control */ 2012 nv_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset])); 2013 bytes_to_write -= 4; 2014 2015 /* write ucode */ 2016 for (i = 0; i < bytes_to_write; i += 4) 2017 nv_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4])); 2018 2019 /* twiddle NV_PBUS_DEBUG_4 */ 2020 nv_wr32(device, NV_PBUS_DEBUG_4, nv_rd32(device, NV_PBUS_DEBUG_4) | 0x18); 2021 2022 return 0; 2023} 2024 2025static int load_nv17_hw_sequencer_ucode(struct drm_device *dev, 2026 struct nvbios *bios) 2027{ 2028 /* 2029 * BMP based cards, from NV17, need a microcode loading to correctly 2030 * control the GPIO etc for LVDS panels 2031 * 2032 * BIT based cards seem to do this directly in the init scripts 2033 * 2034 * The microcode entries are found by the "HWSQ" signature. 2035 */ 2036 2037 const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' }; 2038 const int sz = sizeof(hwsq_signature); 2039 int hwsq_offset; 2040 2041 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz); 2042 if (!hwsq_offset) 2043 return 0; 2044 2045 /* always use entry 0? */ 2046 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0); 2047} 2048 2049uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev) 2050{ 2051 struct nouveau_drm *drm = nouveau_drm(dev); 2052 struct nvbios *bios = &drm->vbios; 2053 const uint8_t edid_sig[] = { 2054 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 }; 2055 uint16_t offset = 0; 2056 uint16_t newoffset; 2057 int searchlen = NV_PROM_SIZE; 2058 2059 if (bios->fp.edid) 2060 return bios->fp.edid; 2061 2062 while (searchlen) { 2063 newoffset = findstr(&bios->data[offset], searchlen, 2064 edid_sig, 8); 2065 if (!newoffset) 2066 return NULL; 2067 offset += newoffset; 2068 if (!nv_cksum(&bios->data[offset], EDID1_LEN)) 2069 break; 2070 2071 searchlen -= offset; 2072 offset++; 2073 } 2074 2075 NV_INFO(drm, "Found EDID in BIOS\n"); 2076 2077 return bios->fp.edid = &bios->data[offset]; 2078} 2079 2080static bool NVInitVBIOS(struct drm_device *dev) 2081{ 2082 struct nouveau_drm *drm = nouveau_drm(dev); 2083 struct nvbios *bios = &drm->vbios; 2084 2085 memset(bios, 0, sizeof(struct nvbios)); 2086 spin_lock_init(&bios->lock); 2087 bios->dev = dev; 2088 2089 bios->data = nouveau_bios(drm->device)->data; 2090 bios->length = nouveau_bios(drm->device)->size; 2091 return true; 2092} 2093 2094static int nouveau_parse_vbios_struct(struct drm_device *dev) 2095{ 2096 struct nouveau_drm *drm = nouveau_drm(dev); 2097 struct nvbios *bios = &drm->vbios; 2098 const uint8_t bit_signature[] = { 0xff, 0xb8, 'B', 'I', 'T' }; 2099 const uint8_t bmp_signature[] = { 0xff, 0x7f, 'N', 'V', 0x0 }; 2100 int offset; 2101 2102 offset = findstr(bios->data, bios->length, 2103 bit_signature, sizeof(bit_signature)); 2104 if (offset) { 2105 NV_INFO(drm, "BIT BIOS found\n"); 2106 bios->type = NVBIOS_BIT; 2107 bios->offset = offset; 2108 return parse_bit_structure(bios, offset + 6); 2109 } 2110 2111 offset = findstr(bios->data, bios->length, 2112 bmp_signature, sizeof(bmp_signature)); 2113 if (offset) { 2114 NV_INFO(drm, "BMP BIOS found\n"); 2115 bios->type = NVBIOS_BMP; 2116 bios->offset = offset; 2117 return parse_bmp_structure(dev, bios, offset); 2118 } 2119 2120 NV_ERROR(drm, "No known BIOS signature found\n"); 2121 return -ENODEV; 2122} 2123 2124int 2125nouveau_run_vbios_init(struct drm_device *dev) 2126{ 2127 struct nouveau_drm *drm = nouveau_drm(dev); 2128 struct nvbios *bios = &drm->vbios; 2129 int ret = 0; 2130 2131 /* Reset the BIOS head to 0. */ 2132 bios->state.crtchead = 0; 2133 2134 if (bios->major_version < 5) /* BMP only */ 2135 load_nv17_hw_sequencer_ucode(dev, bios); 2136 2137 if (bios->execute) { 2138 bios->fp.last_script_invoc = 0; 2139 bios->fp.lvds_init_run = false; 2140 } 2141 2142 return ret; 2143} 2144 2145static bool 2146nouveau_bios_posted(struct drm_device *dev) 2147{ 2148 struct nouveau_drm *drm = nouveau_drm(dev); 2149 unsigned htotal; 2150 2151 if (nv_device(drm->device)->card_type >= NV_50) { 2152 if (NVReadVgaCrtc(dev, 0, 0x00) == 0 && 2153 NVReadVgaCrtc(dev, 0, 0x1a) == 0) 2154 return false; 2155 return true; 2156 } 2157 2158 htotal = NVReadVgaCrtc(dev, 0, 0x06); 2159 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8; 2160 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4; 2161 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10; 2162 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11; 2163 2164 return (htotal != 0); 2165} 2166 2167int 2168nouveau_bios_init(struct drm_device *dev) 2169{ 2170 struct nouveau_drm *drm = nouveau_drm(dev); 2171 struct nvbios *bios = &drm->vbios; 2172 int ret; 2173 2174 if (!NVInitVBIOS(dev)) 2175 return -ENODEV; 2176 2177 ret = nouveau_parse_vbios_struct(dev); 2178 if (ret) 2179 return ret; 2180 2181 ret = parse_dcb_table(dev, bios); 2182 if (ret) 2183 return ret; 2184 2185 if (!bios->major_version) /* we don't run version 0 bios */ 2186 return 0; 2187 2188 /* init script execution disabled */ 2189 bios->execute = false; 2190 2191 /* ... unless card isn't POSTed already */ 2192 if (!nouveau_bios_posted(dev)) { 2193 NV_INFO(drm, "Adaptor not initialised, " 2194 "running VBIOS init tables.\n"); 2195 bios->execute = true; 2196 } 2197 2198 ret = nouveau_run_vbios_init(dev); 2199 if (ret) 2200 return ret; 2201 2202 /* feature_byte on BMP is poor, but init always sets CR4B */ 2203 if (bios->major_version < 5) 2204 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40; 2205 2206 /* all BIT systems need p_f_m_t for digital_min_front_porch */ 2207 if (bios->is_mobile || bios->major_version >= 5) 2208 ret = parse_fp_mode_table(dev, bios); 2209 2210 /* allow subsequent scripts to execute */ 2211 bios->execute = true; 2212 2213 return 0; 2214} 2215 2216void 2217nouveau_bios_takedown(struct drm_device *dev) 2218{ 2219} 2220