nvc0_fence.c revision 906c033e276877c1374c9159976b05746af3c86d 
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include "drmP.h"
26#include "nouveau_drv.h"
27#include "nouveau_dma.h"
28#include "nouveau_ramht.h"
29#include "nouveau_fence.h"
30
31struct nvc0_fence_priv {
32	struct nouveau_fence_priv base;
33	struct nouveau_bo *bo;
34};
35
36struct nvc0_fence_chan {
37	struct nouveau_fence_chan base;
38	struct nouveau_vma vma;
39};
40
41static int
42nvc0_fence_emit(struct nouveau_fence *fence)
43{
44	struct nouveau_channel *chan = fence->channel;
45	struct nvc0_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE];
46	u64 addr = fctx->vma.offset + chan->id * 16;
47	int ret;
48
49	ret = RING_SPACE(chan, 5);
50	if (ret == 0) {
51		BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
52		OUT_RING  (chan, upper_32_bits(addr));
53		OUT_RING  (chan, lower_32_bits(addr));
54		OUT_RING  (chan, fence->sequence);
55		OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG);
56		FIRE_RING (chan);
57	}
58
59	return ret;
60}
61
62static int
63nvc0_fence_sync(struct nouveau_fence *fence,
64		struct nouveau_channel *prev, struct nouveau_channel *chan)
65{
66	struct nvc0_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE];
67	u64 addr = fctx->vma.offset + prev->id * 16;
68	int ret;
69
70	ret = RING_SPACE(chan, 5);
71	if (ret == 0) {
72		BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
73		OUT_RING  (chan, upper_32_bits(addr));
74		OUT_RING  (chan, lower_32_bits(addr));
75		OUT_RING  (chan, fence->sequence);
76		OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL |
77				 NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD);
78		FIRE_RING (chan);
79	}
80
81	return ret;
82}
83
84static u32
85nvc0_fence_read(struct nouveau_channel *chan)
86{
87	struct nvc0_fence_priv *priv = nv_engine(chan->dev, NVOBJ_ENGINE_FENCE);
88	return nouveau_bo_rd32(priv->bo, chan->id * 16/4);
89}
90
91static void
92nvc0_fence_context_del(struct nouveau_channel *chan, int engine)
93{
94	struct nvc0_fence_priv *priv = nv_engine(chan->dev, engine);
95	struct nvc0_fence_chan *fctx = chan->engctx[engine];
96
97	nouveau_bo_vma_del(priv->bo, &fctx->vma);
98	nouveau_fence_context_del(&fctx->base);
99	chan->engctx[engine] = NULL;
100	kfree(fctx);
101}
102
103static int
104nvc0_fence_context_new(struct nouveau_channel *chan, int engine)
105{
106	struct nvc0_fence_priv *priv = nv_engine(chan->dev, engine);
107	struct nvc0_fence_chan *fctx;
108	int ret;
109
110	fctx = chan->engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);
111	if (!fctx)
112		return -ENOMEM;
113
114	nouveau_fence_context_new(&fctx->base);
115
116	ret = nouveau_bo_vma_add(priv->bo, chan->vm, &fctx->vma);
117	if (ret)
118		nvc0_fence_context_del(chan, engine);
119
120	nouveau_bo_wr32(priv->bo, chan->id * 16/4, 0x00000000);
121	return ret;
122}
123
124static int
125nvc0_fence_fini(struct drm_device *dev, int engine, bool suspend)
126{
127	return 0;
128}
129
130static int
131nvc0_fence_init(struct drm_device *dev, int engine)
132{
133	return 0;
134}
135
136static void
137nvc0_fence_destroy(struct drm_device *dev, int engine)
138{
139	struct drm_nouveau_private *dev_priv = dev->dev_private;
140	struct nvc0_fence_priv *priv = nv_engine(dev, engine);
141
142	nouveau_bo_unmap(priv->bo);
143	nouveau_bo_ref(NULL, &priv->bo);
144	dev_priv->eng[engine] = NULL;
145	kfree(priv);
146}
147
148int
149nvc0_fence_create(struct drm_device *dev)
150{
151	struct drm_nouveau_private *dev_priv = dev->dev_private;
152	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
153	struct nvc0_fence_priv *priv;
154	int ret;
155
156	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
157	if (!priv)
158		return -ENOMEM;
159
160	priv->base.engine.destroy = nvc0_fence_destroy;
161	priv->base.engine.init = nvc0_fence_init;
162	priv->base.engine.fini = nvc0_fence_fini;
163	priv->base.engine.context_new = nvc0_fence_context_new;
164	priv->base.engine.context_del = nvc0_fence_context_del;
165	priv->base.emit = nvc0_fence_emit;
166	priv->base.sync = nvc0_fence_sync;
167	priv->base.read = nvc0_fence_read;
168	dev_priv->eng[NVOBJ_ENGINE_FENCE] = &priv->base.engine;
169
170	ret = nouveau_bo_new(dev, 16 * pfifo->channels, 0, TTM_PL_FLAG_VRAM,
171			     0, 0, NULL, &priv->bo);
172	if (ret == 0) {
173		ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM);
174		if (ret == 0)
175			ret = nouveau_bo_map(priv->bo);
176		if (ret)
177			nouveau_bo_ref(NULL, &priv->bo);
178	}
179
180	if (ret)
181		nvc0_fence_destroy(dev, NVOBJ_ENGINE_FENCE);
182	return ret;
183}
184