nvc0_fence.c revision d6ba6d215a538a58f0f0026f0961b0b9125e8042
1/* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25#include "drmP.h" 26#include "nouveau_drv.h" 27#include "nouveau_dma.h" 28#include "nouveau_fifo.h" 29#include "nouveau_ramht.h" 30#include "nouveau_fence.h" 31 32struct nvc0_fence_priv { 33 struct nouveau_fence_priv base; 34 struct nouveau_bo *bo; 35 u32 *suspend; 36}; 37 38struct nvc0_fence_chan { 39 struct nouveau_fence_chan base; 40 struct nouveau_vma vma; 41}; 42 43static int 44nvc0_fence_emit(struct nouveau_fence *fence) 45{ 46 struct nouveau_channel *chan = fence->channel; 47 struct nvc0_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; 48 u64 addr = fctx->vma.offset + chan->id * 16; 49 int ret; 50 51 ret = RING_SPACE(chan, 5); 52 if (ret == 0) { 53 BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); 54 OUT_RING (chan, upper_32_bits(addr)); 55 OUT_RING (chan, lower_32_bits(addr)); 56 OUT_RING (chan, fence->sequence); 57 OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG); 58 FIRE_RING (chan); 59 } 60 61 return ret; 62} 63 64static int 65nvc0_fence_sync(struct nouveau_fence *fence, 66 struct nouveau_channel *prev, struct nouveau_channel *chan) 67{ 68 struct nvc0_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; 69 u64 addr = fctx->vma.offset + prev->id * 16; 70 int ret; 71 72 ret = RING_SPACE(chan, 5); 73 if (ret == 0) { 74 BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); 75 OUT_RING (chan, upper_32_bits(addr)); 76 OUT_RING (chan, lower_32_bits(addr)); 77 OUT_RING (chan, fence->sequence); 78 OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL | 79 NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD); 80 FIRE_RING (chan); 81 } 82 83 return ret; 84} 85 86static u32 87nvc0_fence_read(struct nouveau_channel *chan) 88{ 89 struct nvc0_fence_priv *priv = nv_engine(chan->dev, NVOBJ_ENGINE_FENCE); 90 return nouveau_bo_rd32(priv->bo, chan->id * 16/4); 91} 92 93static void 94nvc0_fence_context_del(struct nouveau_channel *chan, int engine) 95{ 96 struct nvc0_fence_priv *priv = nv_engine(chan->dev, engine); 97 struct nvc0_fence_chan *fctx = chan->engctx[engine]; 98 99 nouveau_bo_vma_del(priv->bo, &fctx->vma); 100 nouveau_fence_context_del(&fctx->base); 101 chan->engctx[engine] = NULL; 102 kfree(fctx); 103} 104 105static int 106nvc0_fence_context_new(struct nouveau_channel *chan, int engine) 107{ 108 struct nvc0_fence_priv *priv = nv_engine(chan->dev, engine); 109 struct nvc0_fence_chan *fctx; 110 int ret; 111 112 fctx = chan->engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL); 113 if (!fctx) 114 return -ENOMEM; 115 116 nouveau_fence_context_new(&fctx->base); 117 118 ret = nouveau_bo_vma_add(priv->bo, chan->vm, &fctx->vma); 119 if (ret) 120 nvc0_fence_context_del(chan, engine); 121 122 nouveau_bo_wr32(priv->bo, chan->id * 16/4, 0x00000000); 123 return ret; 124} 125 126static int 127nvc0_fence_fini(struct drm_device *dev, int engine, bool suspend) 128{ 129 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); 130 struct nvc0_fence_priv *priv = nv_engine(dev, engine); 131 int i; 132 133 if (suspend) { 134 priv->suspend = vmalloc(pfifo->channels * sizeof(u32)); 135 if (!priv->suspend) 136 return -ENOMEM; 137 138 for (i = 0; i < pfifo->channels; i++) 139 priv->suspend[i] = nouveau_bo_rd32(priv->bo, i); 140 } 141 142 return 0; 143} 144 145static int 146nvc0_fence_init(struct drm_device *dev, int engine) 147{ 148 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); 149 struct nvc0_fence_priv *priv = nv_engine(dev, engine); 150 int i; 151 152 if (priv->suspend) { 153 for (i = 0; i < pfifo->channels; i++) 154 nouveau_bo_wr32(priv->bo, i, priv->suspend[i]); 155 vfree(priv->suspend); 156 priv->suspend = NULL; 157 } 158 159 return 0; 160} 161 162static void 163nvc0_fence_destroy(struct drm_device *dev, int engine) 164{ 165 struct drm_nouveau_private *dev_priv = dev->dev_private; 166 struct nvc0_fence_priv *priv = nv_engine(dev, engine); 167 168 nouveau_bo_unmap(priv->bo); 169 nouveau_bo_ref(NULL, &priv->bo); 170 dev_priv->eng[engine] = NULL; 171 kfree(priv); 172} 173 174int 175nvc0_fence_create(struct drm_device *dev) 176{ 177 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); 178 struct drm_nouveau_private *dev_priv = dev->dev_private; 179 struct nvc0_fence_priv *priv; 180 int ret; 181 182 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 183 if (!priv) 184 return -ENOMEM; 185 186 priv->base.engine.destroy = nvc0_fence_destroy; 187 priv->base.engine.init = nvc0_fence_init; 188 priv->base.engine.fini = nvc0_fence_fini; 189 priv->base.engine.context_new = nvc0_fence_context_new; 190 priv->base.engine.context_del = nvc0_fence_context_del; 191 priv->base.emit = nvc0_fence_emit; 192 priv->base.sync = nvc0_fence_sync; 193 priv->base.read = nvc0_fence_read; 194 dev_priv->eng[NVOBJ_ENGINE_FENCE] = &priv->base.engine; 195 196 ret = nouveau_bo_new(dev, 16 * pfifo->channels, 0, TTM_PL_FLAG_VRAM, 197 0, 0, NULL, &priv->bo); 198 if (ret == 0) { 199 ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM); 200 if (ret == 0) 201 ret = nouveau_bo_map(priv->bo); 202 if (ret) 203 nouveau_bo_ref(NULL, &priv->bo); 204 } 205 206 if (ret) 207 nvc0_fence_destroy(dev, NVOBJ_ENGINE_FENCE); 208 return ret; 209} 210