cik_sdma.c revision 74d360f66b99231ed7007eb197dd18cda72c961c
12483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/* 22483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Copyright 2013 Advanced Micro Devices, Inc. 32483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 42483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Permission is hereby granted, free of charge, to any person obtaining a 52483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * copy of this software and associated documentation files (the "Software"), 62483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * to deal in the Software without restriction, including without limitation 72483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * the rights to use, copy, modify, merge, publish, distribute, sublicense, 82483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * and/or sell copies of the Software, and to permit persons to whom the 92483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Software is furnished to do so, subject to the following conditions: 102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * The above copyright notice and this permission notice shall be included in 122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * all copies or substantial portions of the Software. 132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * OTHER DEALINGS IN THE SOFTWARE. 212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Authors: Alex Deucher 232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#include <linux/firmware.h> 252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#include <drm/drmP.h> 262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#include "radeon.h" 272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#include "radeon_asic.h" 2874d360f66b99231ed7007eb197dd18cda72c961cChristian König#include "radeon_trace.h" 292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#include "cikd.h" 302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/* sdma */ 322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#define CIK_SDMA_UCODE_SIZE 1050 332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#define CIK_SDMA_UCODE_VERSION 64 342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 352483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königu32 cik_gpu_check_soft_reset(struct radeon_device *rdev); 362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/* 382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * sDMA - System DMA 392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Starting with CIK, the GPU has new asynchronous 402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * DMA engines. These engines are used for compute 412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * and gfx. There are two DMA engines (SDMA0, SDMA1) 422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * and each one supports 1 ring buffer used for gfx 432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * and 2 queues used for compute. 442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * The programming model is very similar to the CP 462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * (ring buffer, IBs, etc.), but sDMA has it's own 472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * packet format that is different from the PM4 format 482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * used by the CP. sDMA supports copying data, writing 492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * embedded data, solid fills, and a number of other 502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * things. It also has support for tiling/detiling of 512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * buffers. 522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_ring_ib_execute - Schedule an IB on the DMA engine 562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ib: IB object to schedule 592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Schedule an IB in the DMA ring (CIK). 612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 622483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_sdma_ring_ib_execute(struct radeon_device *rdev, 632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ib *ib) 642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring = &rdev->ring[ib->ring]; 662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 extra_bits = (ib->vm ? ib->vm->id : 0) & 0xf; 672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (rdev->wb.enabled) { 692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 next_rptr = ring->wptr + 5; 702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König while ((next_rptr & 7) != 4) 712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König next_rptr++; 722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König next_rptr += 4; 732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0)); 742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, ring->next_rptr_gpu_addr & 0xfffffffc); 752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff); 762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 1); /* number of DWs to follow */ 772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, next_rptr); 782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* IB packet must end on a 8 DW boundary */ 812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König while ((ring->wptr & 7) != 4) 822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); 832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_INDIRECT_BUFFER, 0, extra_bits)); 842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ 852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff); 862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, ib->length_dw); 872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_fence_ring_emit - emit a fence on the DMA ring 922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @fence: radeon fence object 952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Add a DMA fence packet to the ring to write 972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * the fence seq number and DMA trap packet to generate 982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * an interrupt if needed (CIK). 992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 1002483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_sdma_fence_ring_emit(struct radeon_device *rdev, 1012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_fence *fence) 1022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 1032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring = &rdev->ring[fence->ring]; 1042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u64 addr = rdev->fence_drv[fence->ring].gpu_addr; 1052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 extra_bits = (SDMA_POLL_REG_MEM_EXTRA_OP(1) | 1062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König SDMA_POLL_REG_MEM_EXTRA_FUNC(3)); /* == */ 1072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 ref_and_mask; 1082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (fence->ring == R600_RING_TYPE_DMA_INDEX) 1102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ref_and_mask = SDMA0; 1112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 1122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ref_and_mask = SDMA1; 1132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* write the fence */ 1152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_FENCE, 0, 0)); 1162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, addr & 0xffffffff); 1172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(addr) & 0xffffffff); 1182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, fence->seq); 1192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* generate an interrupt */ 1202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_TRAP, 0, 0)); 1212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* flush HDP */ 1222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0, extra_bits)); 1232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, GPU_HDP_FLUSH_DONE); 1242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, GPU_HDP_FLUSH_REQ); 1252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, ref_and_mask); /* REFERENCE */ 1262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, ref_and_mask); /* MASK */ 1272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, (4 << 16) | 10); /* RETRY_COUNT, POLL_INTERVAL */ 1282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 1292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 1312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_semaphore_ring_emit - emit a semaphore on the dma ring 1322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 1342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ring: radeon_ring structure holding ring information 1352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @semaphore: radeon semaphore object 1362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @emit_wait: wait or signal semaphore 1372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Add a DMA semaphore packet to the ring wait on or signal 1392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * other rings (CIK). 1402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 1412483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, 1422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring, 1432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_semaphore *semaphore, 1442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König bool emit_wait) 1452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 1462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u64 addr = semaphore->gpu_addr; 1472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 extra_bits = emit_wait ? 0 : SDMA_SEMAPHORE_EXTRA_S; 1482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SEMAPHORE, 0, extra_bits)); 1502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, addr & 0xfffffff8); 1512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(addr) & 0xffffffff); 1522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 1532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 1552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_gfx_stop - stop the gfx async dma engines 1562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 1582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Stop the gfx async dma ring buffers (CIK). 1602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 1612483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königstatic void cik_sdma_gfx_stop(struct radeon_device *rdev) 1622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 1632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 rb_cntl, reg_offset; 1642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int i; 1652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); 1672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < 2; i++) { 1692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (i == 0) 1702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA0_REGISTER_OFFSET; 1712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 1722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA1_REGISTER_OFFSET; 1732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König rb_cntl = RREG32(SDMA0_GFX_RB_CNTL + reg_offset); 1742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König rb_cntl &= ~SDMA_RB_ENABLE; 1752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl); 1762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_IB_CNTL + reg_offset, 0); 1772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 1782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 1792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 1812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_rlc_stop - stop the compute async dma engines 1822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 1842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Stop the compute async dma queues (CIK). 1862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 1872483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königstatic void cik_sdma_rlc_stop(struct radeon_device *rdev) 1882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 1892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* XXX todo */ 1902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 1912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 1932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_enable - stop the async dma engines 1942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 1962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @enable: enable/disable the DMA MEs. 1972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Halt or unhalt the async dma engines (CIK). 1992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 2002483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_sdma_enable(struct radeon_device *rdev, bool enable) 2012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 2022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 me_cntl, reg_offset; 2032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int i; 2042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < 2; i++) { 2062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (i == 0) 2072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA0_REGISTER_OFFSET; 2082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 2092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA1_REGISTER_OFFSET; 2102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König me_cntl = RREG32(SDMA0_ME_CNTL + reg_offset); 2112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (enable) 2122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König me_cntl &= ~SDMA_HALT; 2132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 2142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König me_cntl |= SDMA_HALT; 2152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_ME_CNTL + reg_offset, me_cntl); 2162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 2172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 2182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 2202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_gfx_resume - setup and start the async dma engines 2212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 2222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 2232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 2242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Set up the gfx DMA ring buffers and enable them (CIK). 2252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 for success, error for failure. 2262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 2272483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königstatic int cik_sdma_gfx_resume(struct radeon_device *rdev) 2282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 2292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring; 2302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 rb_cntl, ib_cntl; 2312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 rb_bufsz; 2322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 reg_offset, wb_offset; 2332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int i, r; 2342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < 2; i++) { 2362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (i == 0) { 2372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; 2382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA0_REGISTER_OFFSET; 2392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König wb_offset = R600_WB_DMA_RPTR_OFFSET; 2402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 2412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; 2422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA1_REGISTER_OFFSET; 2432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König wb_offset = CAYMAN_WB_DMA1_RPTR_OFFSET; 2442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 2452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_SEM_INCOMPLETE_TIMER_CNTL + reg_offset, 0); 2472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_SEM_WAIT_FAIL_TIMER_CNTL + reg_offset, 0); 2482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* Set ring buffer size in dwords */ 2509c725e5bcdae59d5383d4aec33a34c822582dda5Dave Airlie rb_bufsz = order_base_2(ring->ring_size / 4); 2512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König rb_cntl = rb_bufsz << 1; 2522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#ifdef __BIG_ENDIAN 2532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König rb_cntl |= SDMA_RB_SWAP_ENABLE | SDMA_RPTR_WRITEBACK_SWAP_ENABLE; 2542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#endif 2552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl); 2562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* Initialize the ring buffer's read and write pointers */ 2582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_RPTR + reg_offset, 0); 2592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_WPTR + reg_offset, 0); 2602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* set the wb address whether it's enabled or not */ 2622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_RPTR_ADDR_HI + reg_offset, 2632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König upper_32_bits(rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); 2642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_RPTR_ADDR_LO + reg_offset, 2652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ((rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC)); 2662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (rdev->wb.enabled) 2682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König rb_cntl |= SDMA_RPTR_WRITEBACK_ENABLE; 2692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_BASE + reg_offset, ring->gpu_addr >> 8); 2712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_BASE_HI + reg_offset, ring->gpu_addr >> 40); 2722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring->wptr = 0; 2742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_WPTR + reg_offset, ring->wptr << 2); 2752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring->rptr = RREG32(SDMA0_GFX_RB_RPTR + reg_offset) >> 2; 2772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* enable DMA RB */ 2792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl | SDMA_RB_ENABLE); 2802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib_cntl = SDMA_IB_ENABLE; 2822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#ifdef __BIG_ENDIAN 2832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib_cntl |= SDMA_IB_SWAP_ENABLE; 2842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#endif 2852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* enable DMA IBs */ 2862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_IB_CNTL + reg_offset, ib_cntl); 2872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring->ready = true; 2892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_ring_test(rdev, ring->idx, ring); 2912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 2922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring->ready = false; 2932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 2942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 2952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 2962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); 2982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return 0; 3002483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 3012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 3032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_rlc_resume - setup and start the async dma engines 3042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 3052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 3062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 3072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Set up the compute DMA queues and enable them (CIK). 3082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 for success, error for failure. 3092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 3102483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königstatic int cik_sdma_rlc_resume(struct radeon_device *rdev) 3112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 3122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* XXX todo */ 3132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return 0; 3142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 3152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 3172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_load_microcode - load the sDMA ME ucode 3182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 3192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 3202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 3212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Loads the sDMA0/1 ucode. 3222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 for success, -EINVAL if the ucode is not available. 3232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 3242483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königstatic int cik_sdma_load_microcode(struct radeon_device *rdev) 3252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 3262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König const __be32 *fw_data; 3272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int i; 3282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (!rdev->sdma_fw) 3302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return -EINVAL; 3312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* stop the gfx rings and rlc compute queues */ 3332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_gfx_stop(rdev); 3342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_rlc_stop(rdev); 3352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* halt the MEs */ 3372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_enable(rdev, false); 3382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* sdma0 */ 3402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König fw_data = (const __be32 *)rdev->sdma_fw->data; 3412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_ADDR + SDMA0_REGISTER_OFFSET, 0); 3422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < CIK_SDMA_UCODE_SIZE; i++) 3432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_DATA + SDMA0_REGISTER_OFFSET, be32_to_cpup(fw_data++)); 3442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_DATA + SDMA0_REGISTER_OFFSET, CIK_SDMA_UCODE_VERSION); 3452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* sdma1 */ 3472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König fw_data = (const __be32 *)rdev->sdma_fw->data; 3482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_ADDR + SDMA1_REGISTER_OFFSET, 0); 3492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < CIK_SDMA_UCODE_SIZE; i++) 3502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_DATA + SDMA1_REGISTER_OFFSET, be32_to_cpup(fw_data++)); 3512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_DATA + SDMA1_REGISTER_OFFSET, CIK_SDMA_UCODE_VERSION); 3522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_ADDR + SDMA0_REGISTER_OFFSET, 0); 3542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_ADDR + SDMA1_REGISTER_OFFSET, 0); 3552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return 0; 3562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 3572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 3592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_resume - setup and start the async dma engines 3602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 3612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 3622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 3632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Set up the DMA engines and enable them (CIK). 3642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 for success, error for failure. 3652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 3662483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königint cik_sdma_resume(struct radeon_device *rdev) 3672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 3682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int r; 3692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* Reset dma */ 3712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SRBM_SOFT_RESET, SOFT_RESET_SDMA | SOFT_RESET_SDMA1); 3722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König RREG32(SRBM_SOFT_RESET); 3732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König udelay(50); 3742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SRBM_SOFT_RESET, 0); 3752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König RREG32(SRBM_SOFT_RESET); 3762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = cik_sdma_load_microcode(rdev); 3782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) 3792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 3802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* unhalt the MEs */ 3822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_enable(rdev, true); 3832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* start the gfx rings and rlc compute queues */ 3852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = cik_sdma_gfx_resume(rdev); 3862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) 3872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 3882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = cik_sdma_rlc_resume(rdev); 3892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) 3902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 3912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return 0; 3932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 3942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 3962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_fini - tear down the async dma engines 3972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 3982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 3992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 4002483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Stop the async dma engines and free the rings (CIK). 4012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 4022483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_sdma_fini(struct radeon_device *rdev) 4032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 4042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* stop the gfx rings and rlc compute queues */ 4052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_gfx_stop(rdev); 4062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_rlc_stop(rdev); 4072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* halt the MEs */ 4082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_enable(rdev, false); 4092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_fini(rdev, &rdev->ring[R600_RING_TYPE_DMA_INDEX]); 4102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_fini(rdev, &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]); 4112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* XXX - compute dma queue tear down */ 4122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 4132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 4152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_copy_dma - copy pages using the DMA engine 4162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 4172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 4182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @src_offset: src GPU address 4192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @dst_offset: dst GPU address 4202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @num_gpu_pages: number of GPU pages to xfer 4212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @fence: radeon fence object 4222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 4232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Copy GPU paging using the DMA engine (CIK). 4242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Used by the radeon ttm implementation to move pages if 4252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * registered as the asic copy callback. 4262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 4272483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königint cik_copy_dma(struct radeon_device *rdev, 4282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König uint64_t src_offset, uint64_t dst_offset, 4292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König unsigned num_gpu_pages, 4302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_fence **fence) 4312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 4322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_semaphore *sem = NULL; 4332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int ring_index = rdev->asic->copy.dma_ring_index; 4342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring = &rdev->ring[ring_index]; 4352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 size_in_bytes, cur_size_in_bytes; 4362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int i, num_loops; 4372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int r = 0; 4382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_semaphore_create(rdev, &sem); 4402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 4412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: moving bo (%d).\n", r); 4422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 4432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 4442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König size_in_bytes = (num_gpu_pages << RADEON_GPU_PAGE_SHIFT); 4462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König num_loops = DIV_ROUND_UP(size_in_bytes, 0x1fffff); 4472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_ring_lock(rdev, ring, num_loops * 7 + 14); 4482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 4492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: moving bo (%d).\n", r); 4502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_semaphore_free(rdev, &sem, NULL); 4512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 4522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 4532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (radeon_fence_need_sync(*fence, ring->idx)) { 4552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, 4562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring->idx); 4572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_fence_note_sync(*fence, ring->idx); 4582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 4592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_semaphore_free(rdev, &sem, NULL); 4602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 4612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < num_loops; i++) { 4632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cur_size_in_bytes = size_in_bytes; 4642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (cur_size_in_bytes > 0x1fffff) 4652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cur_size_in_bytes = 0x1fffff; 4662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König size_in_bytes -= cur_size_in_bytes; 4672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0)); 4682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, cur_size_in_bytes); 4692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 0); /* src/dst endian swap */ 4702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, src_offset & 0xffffffff); 4712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(src_offset) & 0xffffffff); 4722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, dst_offset & 0xfffffffc); 4732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xffffffff); 4742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König src_offset += cur_size_in_bytes; 4752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König dst_offset += cur_size_in_bytes; 4762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 4772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_fence_emit(rdev, fence, ring->idx); 4792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 4802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_unlock_undo(rdev, ring); 4812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 4822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 4832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_unlock_commit(rdev, ring); 4852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_semaphore_free(rdev, &sem, *fence); 4862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 4882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 4892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 4912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_ring_test - simple async dma engine test 4922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 4932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 4942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ring: radeon_ring structure holding ring information 4952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 4962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Test the DMA engine by writing using it to write an 4972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * value to memory. (CIK). 4982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 for success, error for failure. 4992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 5002483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königint cik_sdma_ring_test(struct radeon_device *rdev, 5012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring) 5022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 5032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König unsigned i; 5042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int r; 5052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König void __iomem *ptr = (void *)rdev->vram_scratch.ptr; 5062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 tmp; 5072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (!ptr) { 5092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("invalid vram scratch pointer\n"); 5102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return -EINVAL; 5112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König tmp = 0xCAFEDEAD; 5142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König writel(tmp, ptr); 5152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_ring_lock(rdev, ring, 4); 5172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 5182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: dma failed to lock ring %d (%d).\n", ring->idx, r); 5192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 5202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0)); 5222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, rdev->vram_scratch.gpu_addr & 0xfffffffc); 5232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(rdev->vram_scratch.gpu_addr) & 0xffffffff); 5242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 1); /* number of DWs to follow */ 5252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 0xDEADBEEF); 5262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_unlock_commit(rdev, ring); 5272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < rdev->usec_timeout; i++) { 5292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König tmp = readl(ptr); 5302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (tmp == 0xDEADBEEF) 5312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König break; 5322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_UDELAY(1); 5332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (i < rdev->usec_timeout) { 5362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_INFO("ring test on %d succeeded in %d usecs\n", ring->idx, i); 5372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 5382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: ring %d test failed (0x%08X)\n", 5392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring->idx, tmp); 5402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = -EINVAL; 5412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 5432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 5442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 5462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_ib_test - test an IB on the DMA engine 5472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 5482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 5492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ring: radeon_ring structure holding ring information 5502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 5512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Test a simple IB in the DMA ring (CIK). 5522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 on success, error on failure. 5532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 5542483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königint cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) 5552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 5562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ib ib; 5572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König unsigned i; 5582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int r; 5592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König void __iomem *ptr = (void *)rdev->vram_scratch.ptr; 5602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 tmp = 0; 5612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (!ptr) { 5632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("invalid vram scratch pointer\n"); 5642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return -EINVAL; 5652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König tmp = 0xCAFEDEAD; 5682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König writel(tmp, ptr); 5692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); 5712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 5722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: failed to get ib (%d).\n", r); 5732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 5742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); 5772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.ptr[1] = rdev->vram_scratch.gpu_addr & 0xfffffffc; 5782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.ptr[2] = upper_32_bits(rdev->vram_scratch.gpu_addr) & 0xffffffff; 5792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.ptr[3] = 1; 5802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.ptr[4] = 0xDEADBEEF; 5812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.length_dw = 5; 5822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_ib_schedule(rdev, &ib, NULL); 5842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 5852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ib_free(rdev, &ib); 5862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); 5872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 5882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_fence_wait(ib.fence, false); 5902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 5912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: fence wait failed (%d).\n", r); 5922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 5932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < rdev->usec_timeout; i++) { 5952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König tmp = readl(ptr); 5962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (tmp == 0xDEADBEEF) 5972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König break; 5982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_UDELAY(1); 5992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6002483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (i < rdev->usec_timeout) { 6012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib.fence->ring, i); 6022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 6032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: ib test failed (0x%08X)\n", tmp); 6042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = -EINVAL; 6052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ib_free(rdev, &ib); 6072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 6082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 6092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 6112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_is_lockup - Check if the DMA engine is locked up 6122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 6132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 6142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ring: radeon_ring structure holding ring information 6152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 6162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Check if the async DMA engine is locked up (CIK). 6172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns true if the engine appears to be locked up, false if not. 6182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 6192483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königbool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) 6202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 6212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 reset_mask = cik_gpu_check_soft_reset(rdev); 6222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 mask; 6232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (ring->idx == R600_RING_TYPE_DMA_INDEX) 6252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König mask = RADEON_RESET_DMA; 6262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 6272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König mask = RADEON_RESET_DMA1; 6282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (!(reset_mask & mask)) { 6302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_lockup_update(ring); 6312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return false; 6322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* force ring activities */ 6342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_force_activity(rdev, ring); 6352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return radeon_ring_test_lockup(rdev, ring); 6362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 6372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 6392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_vm_set_page - update the page tables using sDMA 6402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 6412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 6422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ib: indirect buffer to fill with commands 6432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @pe: addr of the page entry 6442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @addr: dst addr to write into pe 6452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @count: number of page entries to update 6462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @incr: increase next addr by incr bytes 6472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @flags: access flags 6482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 6492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Update the page tables using sDMA (CIK). 6502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 6512483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_sdma_vm_set_page(struct radeon_device *rdev, 6522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ib *ib, 6532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König uint64_t pe, 6542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König uint64_t addr, unsigned count, 6552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König uint32_t incr, uint32_t flags) 6562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 6572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); 6582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König uint64_t value; 6592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König unsigned ndw; 6602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 66174d360f66b99231ed7007eb197dd18cda72c961cChristian König trace_radeon_vm_set_page(pe, addr, count, incr, r600_flags); 66274d360f66b99231ed7007eb197dd18cda72c961cChristian König 6632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (flags & RADEON_VM_PAGE_SYSTEM) { 6642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König while (count) { 6652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ndw = count * 2; 6662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (ndw > 0xFFFFE) 6672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ndw = 0xFFFFE; 6682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* for non-physically contiguous pages (system) */ 6702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); 6712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = pe; 6722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = upper_32_bits(pe); 6732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = ndw; 6742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (; ndw > 0; ndw -= 2, --count, pe += 8) { 6752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (flags & RADEON_VM_PAGE_SYSTEM) { 6762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König value = radeon_vm_map_gart(rdev, addr); 6772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König value &= 0xFFFFFFFFFFFFF000ULL; 6782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else if (flags & RADEON_VM_PAGE_VALID) { 6792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König value = addr; 6802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 6812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König value = 0; 6822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König addr += incr; 6842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König value |= r600_flags; 6852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = value; 6862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = upper_32_bits(value); 6872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 6902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König while (count) { 6912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ndw = count; 6922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (ndw > 0x7FFFF) 6932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ndw = 0x7FFFF; 6942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (flags & RADEON_VM_PAGE_VALID) 6962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König value = addr; 6972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 6982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König value = 0; 6992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* for physically contiguous pages (vram) */ 7002483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_GENERATE_PTE_PDE, 0, 0); 7012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = pe; /* dst addr */ 7022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = upper_32_bits(pe); 7032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = r600_flags; /* mask */ 7042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = 0; 7052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = value; /* value */ 7062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = upper_32_bits(value); 7072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = incr; /* increment size */ 7082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = 0; 7092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = ndw; /* number of entries */ 7102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König pe += ndw * 8; 7112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König addr += ndw * incr; 7122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König count -= ndw; 7132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 7142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 7152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König while (ib->length_dw & 0x7) 7162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0); 7172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 7182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 7202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_dma_vm_flush - cik vm flush using sDMA 7212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 7222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 7232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 7242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Update the page table base and flush the VM TLB 7252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * using sDMA (CIK). 7262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 7272483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) 7282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 7292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring = &rdev->ring[ridx]; 7302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 extra_bits = (SDMA_POLL_REG_MEM_EXTRA_OP(1) | 7312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König SDMA_POLL_REG_MEM_EXTRA_FUNC(3)); /* == */ 7322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 ref_and_mask; 7332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (vm == NULL) 7352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return; 7362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (ridx == R600_RING_TYPE_DMA_INDEX) 7382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ref_and_mask = SDMA0; 7392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 7402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ref_and_mask = SDMA1; 7412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 7432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (vm->id < 8) { 7442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, (VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm->id << 2)) >> 2); 7452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 7462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, (VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((vm->id - 8) << 2)) >> 2); 7472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 7482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, vm->pd_gpu_addr >> 12); 7492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* update SH_MEM_* regs */ 7512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 7522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); 7532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, VMID(vm->id)); 7542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 7562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SH_MEM_BASES >> 2); 7572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 0); 7582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 7602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SH_MEM_CONFIG >> 2); 7612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 0); 7622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 7642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SH_MEM_APE1_BASE >> 2); 7652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 1); 7662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 7682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SH_MEM_APE1_LIMIT >> 2); 7692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 0); 7702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 7722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); 7732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, VMID(0)); 7742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* flush HDP */ 7762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0, extra_bits)); 7772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, GPU_HDP_FLUSH_DONE); 7782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, GPU_HDP_FLUSH_REQ); 7792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, ref_and_mask); /* REFERENCE */ 7802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, ref_and_mask); /* MASK */ 7812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, (4 << 16) | 10); /* RETRY_COUNT, POLL_INTERVAL */ 7822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* flush TLB */ 7842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 7852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2); 7862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 1 << vm->id); 7872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 7882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 789