cik_sdma.c revision ea31bf697d27270188a93cd78cf9de4bc968aca3
12483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/* 22483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Copyright 2013 Advanced Micro Devices, Inc. 32483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 42483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Permission is hereby granted, free of charge, to any person obtaining a 52483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * copy of this software and associated documentation files (the "Software"), 62483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * to deal in the Software without restriction, including without limitation 72483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * the rights to use, copy, modify, merge, publish, distribute, sublicense, 82483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * and/or sell copies of the Software, and to permit persons to whom the 92483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Software is furnished to do so, subject to the following conditions: 102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * The above copyright notice and this permission notice shall be included in 122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * all copies or substantial portions of the Software. 132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * OTHER DEALINGS IN THE SOFTWARE. 212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Authors: Alex Deucher 232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#include <linux/firmware.h> 252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#include <drm/drmP.h> 262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#include "radeon.h" 272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#include "radeon_asic.h" 2874d360f66b99231ed7007eb197dd18cda72c961cChristian König#include "radeon_trace.h" 292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#include "cikd.h" 302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/* sdma */ 322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#define CIK_SDMA_UCODE_SIZE 1050 332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#define CIK_SDMA_UCODE_VERSION 64 342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 352483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königu32 cik_gpu_check_soft_reset(struct radeon_device *rdev); 362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/* 382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * sDMA - System DMA 392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Starting with CIK, the GPU has new asynchronous 402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * DMA engines. These engines are used for compute 412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * and gfx. There are two DMA engines (SDMA0, SDMA1) 422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * and each one supports 1 ring buffer used for gfx 432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * and 2 queues used for compute. 442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * The programming model is very similar to the CP 462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * (ring buffer, IBs, etc.), but sDMA has it's own 472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * packet format that is different from the PM4 format 482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * used by the CP. sDMA supports copying data, writing 492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * embedded data, solid fills, and a number of other 502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * things. It also has support for tiling/detiling of 512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * buffers. 522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 55ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * cik_sdma_get_rptr - get the current read pointer 56ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * 57ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * @rdev: radeon_device pointer 58ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * @ring: radeon ring pointer 59ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * 60ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * Get the current rptr from the hardware (CIK+). 61ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher */ 62ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucheruint32_t cik_sdma_get_rptr(struct radeon_device *rdev, 63ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher struct radeon_ring *ring) 64ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher{ 65ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher u32 rptr, reg; 66ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher 67ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher if (rdev->wb.enabled) { 68ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher rptr = rdev->wb.wb[ring->rptr_offs/4]; 69ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher } else { 70ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher if (ring->idx == R600_RING_TYPE_DMA_INDEX) 71ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher reg = SDMA0_GFX_RB_RPTR + SDMA0_REGISTER_OFFSET; 72ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher else 73ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher reg = SDMA0_GFX_RB_RPTR + SDMA1_REGISTER_OFFSET; 74ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher 75ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher rptr = RREG32(reg); 76ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher } 77ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher 78ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher return (rptr & 0x3fffc) >> 2; 79ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher} 80ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher 81ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher/** 82ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * cik_sdma_get_wptr - get the current write pointer 83ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * 84ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * @rdev: radeon_device pointer 85ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * @ring: radeon ring pointer 86ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * 87ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * Get the current wptr from the hardware (CIK+). 88ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher */ 89ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucheruint32_t cik_sdma_get_wptr(struct radeon_device *rdev, 90ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher struct radeon_ring *ring) 91ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher{ 92ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher u32 reg; 93ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher 94ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher if (ring->idx == R600_RING_TYPE_DMA_INDEX) 95ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher reg = SDMA0_GFX_RB_WPTR + SDMA0_REGISTER_OFFSET; 96ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher else 97ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher reg = SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET; 98ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher 99ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher return (RREG32(reg) & 0x3fffc) >> 2; 100ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher} 101ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher 102ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher/** 103ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * cik_sdma_set_wptr - commit the write pointer 104ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * 105ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * @rdev: radeon_device pointer 106ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * @ring: radeon ring pointer 107ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * 108ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher * Write the wptr back to the hardware (CIK+). 109ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher */ 110ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deuchervoid cik_sdma_set_wptr(struct radeon_device *rdev, 111ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher struct radeon_ring *ring) 112ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher{ 113ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher u32 reg; 114ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher 115ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher if (ring->idx == R600_RING_TYPE_DMA_INDEX) 116ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher reg = SDMA0_GFX_RB_WPTR + SDMA0_REGISTER_OFFSET; 117ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher else 118ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher reg = SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET; 119ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher 120ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher WREG32(reg, (ring->wptr << 2) & 0x3fffc); 121ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher} 122ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher 123ea31bf697d27270188a93cd78cf9de4bc968aca3Alex Deucher/** 1242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_ring_ib_execute - Schedule an IB on the DMA engine 1252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 1272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ib: IB object to schedule 1282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Schedule an IB in the DMA ring (CIK). 1302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 1312483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_sdma_ring_ib_execute(struct radeon_device *rdev, 1322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ib *ib) 1332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 1342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring = &rdev->ring[ib->ring]; 1352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 extra_bits = (ib->vm ? ib->vm->id : 0) & 0xf; 1362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (rdev->wb.enabled) { 1382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 next_rptr = ring->wptr + 5; 1392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König while ((next_rptr & 7) != 4) 1402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König next_rptr++; 1412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König next_rptr += 4; 1422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0)); 1432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, ring->next_rptr_gpu_addr & 0xfffffffc); 1442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff); 1452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 1); /* number of DWs to follow */ 1462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, next_rptr); 1472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 1482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* IB packet must end on a 8 DW boundary */ 1502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König while ((ring->wptr & 7) != 4) 1512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); 1522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_INDIRECT_BUFFER, 0, extra_bits)); 1532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ 1542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff); 1552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, ib->length_dw); 1562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 1582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 1602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_fence_ring_emit - emit a fence on the DMA ring 1612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 1632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @fence: radeon fence object 1642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Add a DMA fence packet to the ring to write 1662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * the fence seq number and DMA trap packet to generate 1672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * an interrupt if needed (CIK). 1682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 1692483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_sdma_fence_ring_emit(struct radeon_device *rdev, 1702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_fence *fence) 1712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 1722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring = &rdev->ring[fence->ring]; 1732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u64 addr = rdev->fence_drv[fence->ring].gpu_addr; 1742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* write the fence */ 1762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_FENCE, 0, 0)); 1772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, addr & 0xffffffff); 1782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(addr) & 0xffffffff); 1792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, fence->seq); 1802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* generate an interrupt */ 1812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_TRAP, 0, 0)); 1822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* flush HDP */ 183d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher /* We should be using the new POLL_REG_MEM special op packet here 184d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher * but it causes sDMA to hang sometimes 185d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher */ 186d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 187d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); 188d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher radeon_ring_write(ring, 0); 1892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 1902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 1912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 1922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_semaphore_ring_emit - emit a semaphore on the dma ring 1932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 1952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ring: radeon_ring structure holding ring information 1962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @semaphore: radeon semaphore object 1972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @emit_wait: wait or signal semaphore 1982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 1992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Add a DMA semaphore packet to the ring wait on or signal 2002483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * other rings (CIK). 2012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 2021654b817d8f5f1c27ebc98773fe0e517b0ba2f1eChristian Königbool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, 2032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring, 2042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_semaphore *semaphore, 2052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König bool emit_wait) 2062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 2072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u64 addr = semaphore->gpu_addr; 2082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 extra_bits = emit_wait ? 0 : SDMA_SEMAPHORE_EXTRA_S; 2092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SEMAPHORE, 0, extra_bits)); 2112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, addr & 0xfffffff8); 2122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(addr) & 0xffffffff); 2131654b817d8f5f1c27ebc98773fe0e517b0ba2f1eChristian König 2141654b817d8f5f1c27ebc98773fe0e517b0ba2f1eChristian König return true; 2152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 2162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 2182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_gfx_stop - stop the gfx async dma engines 2192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 2202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 2212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 2222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Stop the gfx async dma ring buffers (CIK). 2232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 2242483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königstatic void cik_sdma_gfx_stop(struct radeon_device *rdev) 2252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 2262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 rb_cntl, reg_offset; 2272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int i; 2282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); 2302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < 2; i++) { 2322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (i == 0) 2332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA0_REGISTER_OFFSET; 2342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 2352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA1_REGISTER_OFFSET; 2362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König rb_cntl = RREG32(SDMA0_GFX_RB_CNTL + reg_offset); 2372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König rb_cntl &= ~SDMA_RB_ENABLE; 2382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl); 2392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_IB_CNTL + reg_offset, 0); 2402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 2412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 2422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 2442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_rlc_stop - stop the compute async dma engines 2452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 2462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 2472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 2482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Stop the compute async dma queues (CIK). 2492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 2502483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königstatic void cik_sdma_rlc_stop(struct radeon_device *rdev) 2512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 2522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* XXX todo */ 2532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 2542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 2562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_enable - stop the async dma engines 2572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 2582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 2592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @enable: enable/disable the DMA MEs. 2602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 2612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Halt or unhalt the async dma engines (CIK). 2622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 2632483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_sdma_enable(struct radeon_device *rdev, bool enable) 2642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 2652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 me_cntl, reg_offset; 2662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int i; 2672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < 2; i++) { 2692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (i == 0) 2702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA0_REGISTER_OFFSET; 2712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 2722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA1_REGISTER_OFFSET; 2732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König me_cntl = RREG32(SDMA0_ME_CNTL + reg_offset); 2742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (enable) 2752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König me_cntl &= ~SDMA_HALT; 2762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 2772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König me_cntl |= SDMA_HALT; 2782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_ME_CNTL + reg_offset, me_cntl); 2792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 2802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 2812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 2832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_gfx_resume - setup and start the async dma engines 2842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 2852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 2862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 2872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Set up the gfx DMA ring buffers and enable them (CIK). 2882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 for success, error for failure. 2892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 2902483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königstatic int cik_sdma_gfx_resume(struct radeon_device *rdev) 2912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 2922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring; 2932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 rb_cntl, ib_cntl; 2942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 rb_bufsz; 2952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 reg_offset, wb_offset; 2962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int i, r; 2972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 2982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < 2; i++) { 2992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (i == 0) { 3002483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; 3012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA0_REGISTER_OFFSET; 3022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König wb_offset = R600_WB_DMA_RPTR_OFFSET; 3032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 3042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; 3052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König reg_offset = SDMA1_REGISTER_OFFSET; 3062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König wb_offset = CAYMAN_WB_DMA1_RPTR_OFFSET; 3072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 3082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_SEM_INCOMPLETE_TIMER_CNTL + reg_offset, 0); 3102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_SEM_WAIT_FAIL_TIMER_CNTL + reg_offset, 0); 3112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* Set ring buffer size in dwords */ 3139c725e5bcdae59d5383d4aec33a34c822582dda5Dave Airlie rb_bufsz = order_base_2(ring->ring_size / 4); 3142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König rb_cntl = rb_bufsz << 1; 3152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#ifdef __BIG_ENDIAN 3162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König rb_cntl |= SDMA_RB_SWAP_ENABLE | SDMA_RPTR_WRITEBACK_SWAP_ENABLE; 3172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#endif 3182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl); 3192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* Initialize the ring buffer's read and write pointers */ 3212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_RPTR + reg_offset, 0); 3222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_WPTR + reg_offset, 0); 3232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* set the wb address whether it's enabled or not */ 3252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_RPTR_ADDR_HI + reg_offset, 3262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König upper_32_bits(rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); 3272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_RPTR_ADDR_LO + reg_offset, 3282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ((rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC)); 3292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (rdev->wb.enabled) 3312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König rb_cntl |= SDMA_RPTR_WRITEBACK_ENABLE; 3322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_BASE + reg_offset, ring->gpu_addr >> 8); 3342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_BASE_HI + reg_offset, ring->gpu_addr >> 40); 3352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring->wptr = 0; 3372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_WPTR + reg_offset, ring->wptr << 2); 3382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring->rptr = RREG32(SDMA0_GFX_RB_RPTR + reg_offset) >> 2; 3402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* enable DMA RB */ 3422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl | SDMA_RB_ENABLE); 3432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib_cntl = SDMA_IB_ENABLE; 3452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#ifdef __BIG_ENDIAN 3462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib_cntl |= SDMA_IB_SWAP_ENABLE; 3472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König#endif 3482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* enable DMA IBs */ 3492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_GFX_IB_CNTL + reg_offset, ib_cntl); 3502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring->ready = true; 3522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_ring_test(rdev, ring->idx, ring); 3542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 3552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring->ready = false; 3562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 3572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 3582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 3592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); 3612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return 0; 3632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 3642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 3662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_rlc_resume - setup and start the async dma engines 3672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 3682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 3692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 3702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Set up the compute DMA queues and enable them (CIK). 3712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 for success, error for failure. 3722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 3732483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königstatic int cik_sdma_rlc_resume(struct radeon_device *rdev) 3742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 3752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* XXX todo */ 3762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return 0; 3772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 3782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 3802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_load_microcode - load the sDMA ME ucode 3812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 3822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 3832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 3842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Loads the sDMA0/1 ucode. 3852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 for success, -EINVAL if the ucode is not available. 3862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 3872483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königstatic int cik_sdma_load_microcode(struct radeon_device *rdev) 3882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 3892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König const __be32 *fw_data; 3902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int i; 3912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (!rdev->sdma_fw) 3932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return -EINVAL; 3942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* stop the gfx rings and rlc compute queues */ 3962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_gfx_stop(rdev); 3972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_rlc_stop(rdev); 3982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 3992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* halt the MEs */ 4002483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_enable(rdev, false); 4012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* sdma0 */ 4032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König fw_data = (const __be32 *)rdev->sdma_fw->data; 4042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_ADDR + SDMA0_REGISTER_OFFSET, 0); 4052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < CIK_SDMA_UCODE_SIZE; i++) 4062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_DATA + SDMA0_REGISTER_OFFSET, be32_to_cpup(fw_data++)); 4072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_DATA + SDMA0_REGISTER_OFFSET, CIK_SDMA_UCODE_VERSION); 4082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* sdma1 */ 4102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König fw_data = (const __be32 *)rdev->sdma_fw->data; 4112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_ADDR + SDMA1_REGISTER_OFFSET, 0); 4122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < CIK_SDMA_UCODE_SIZE; i++) 4132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_DATA + SDMA1_REGISTER_OFFSET, be32_to_cpup(fw_data++)); 4142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_DATA + SDMA1_REGISTER_OFFSET, CIK_SDMA_UCODE_VERSION); 4152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_ADDR + SDMA0_REGISTER_OFFSET, 0); 4172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SDMA0_UCODE_ADDR + SDMA1_REGISTER_OFFSET, 0); 4182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return 0; 4192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 4202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 4222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_resume - setup and start the async dma engines 4232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 4242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 4252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 4262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Set up the DMA engines and enable them (CIK). 4272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 for success, error for failure. 4282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 4292483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königint cik_sdma_resume(struct radeon_device *rdev) 4302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 4312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int r; 4322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* Reset dma */ 4342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SRBM_SOFT_RESET, SOFT_RESET_SDMA | SOFT_RESET_SDMA1); 4352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König RREG32(SRBM_SOFT_RESET); 4362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König udelay(50); 4372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König WREG32(SRBM_SOFT_RESET, 0); 4382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König RREG32(SRBM_SOFT_RESET); 4392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = cik_sdma_load_microcode(rdev); 4412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) 4422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 4432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* unhalt the MEs */ 4452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_enable(rdev, true); 4462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* start the gfx rings and rlc compute queues */ 4482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = cik_sdma_gfx_resume(rdev); 4492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) 4502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 4512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = cik_sdma_rlc_resume(rdev); 4522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) 4532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 4542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return 0; 4562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 4572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 4592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_fini - tear down the async dma engines 4602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 4612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 4622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 4632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Stop the async dma engines and free the rings (CIK). 4642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 4652483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_sdma_fini(struct radeon_device *rdev) 4662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 4672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* stop the gfx rings and rlc compute queues */ 4682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_gfx_stop(rdev); 4692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_rlc_stop(rdev); 4702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* halt the MEs */ 4712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cik_sdma_enable(rdev, false); 4722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_fini(rdev, &rdev->ring[R600_RING_TYPE_DMA_INDEX]); 4732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_fini(rdev, &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]); 4742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* XXX - compute dma queue tear down */ 4752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 4762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 4772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 4782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_copy_dma - copy pages using the DMA engine 4792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 4802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 4812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @src_offset: src GPU address 4822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @dst_offset: dst GPU address 4832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @num_gpu_pages: number of GPU pages to xfer 4842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @fence: radeon fence object 4852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 4862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Copy GPU paging using the DMA engine (CIK). 4872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Used by the radeon ttm implementation to move pages if 4882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * registered as the asic copy callback. 4892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 4902483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königint cik_copy_dma(struct radeon_device *rdev, 4912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König uint64_t src_offset, uint64_t dst_offset, 4922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König unsigned num_gpu_pages, 4932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_fence **fence) 4942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 4952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_semaphore *sem = NULL; 4962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int ring_index = rdev->asic->copy.dma_ring_index; 4972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring = &rdev->ring[ring_index]; 4982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 size_in_bytes, cur_size_in_bytes; 4992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int i, num_loops; 5002483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int r = 0; 5012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_semaphore_create(rdev, &sem); 5032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 5042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: moving bo (%d).\n", r); 5052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 5062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König size_in_bytes = (num_gpu_pages << RADEON_GPU_PAGE_SHIFT); 5092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König num_loops = DIV_ROUND_UP(size_in_bytes, 0x1fffff); 5102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_ring_lock(rdev, ring, num_loops * 7 + 14); 5112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 5122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: moving bo (%d).\n", r); 5132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_semaphore_free(rdev, &sem, NULL); 5142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 5152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5171654b817d8f5f1c27ebc98773fe0e517b0ba2f1eChristian König radeon_semaphore_sync_to(sem, *fence); 5181654b817d8f5f1c27ebc98773fe0e517b0ba2f1eChristian König radeon_semaphore_sync_rings(rdev, sem, ring->idx); 5192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < num_loops; i++) { 5212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cur_size_in_bytes = size_in_bytes; 5222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (cur_size_in_bytes > 0x1fffff) 5232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König cur_size_in_bytes = 0x1fffff; 5242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König size_in_bytes -= cur_size_in_bytes; 5252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0)); 5262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, cur_size_in_bytes); 5272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 0); /* src/dst endian swap */ 5282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, src_offset & 0xffffffff); 5292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(src_offset) & 0xffffffff); 5302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, dst_offset & 0xfffffffc); 5312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xffffffff); 5322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König src_offset += cur_size_in_bytes; 5332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König dst_offset += cur_size_in_bytes; 5342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_fence_emit(rdev, fence, ring->idx); 5372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 5382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_unlock_undo(rdev, ring); 5392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 5402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_unlock_commit(rdev, ring); 5432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_semaphore_free(rdev, &sem, *fence); 5442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 5462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 5472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 5492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_ring_test - simple async dma engine test 5502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 5512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 5522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ring: radeon_ring structure holding ring information 5532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 5542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Test the DMA engine by writing using it to write an 5552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * value to memory. (CIK). 5562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 for success, error for failure. 5572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 5582483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königint cik_sdma_ring_test(struct radeon_device *rdev, 5592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring) 5602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 5612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König unsigned i; 5622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int r; 5632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König void __iomem *ptr = (void *)rdev->vram_scratch.ptr; 5642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 tmp; 5652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (!ptr) { 5672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("invalid vram scratch pointer\n"); 5682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return -EINVAL; 5692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König tmp = 0xCAFEDEAD; 5722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König writel(tmp, ptr); 5732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_ring_lock(rdev, ring, 4); 5752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 5762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: dma failed to lock ring %d (%d).\n", ring->idx, r); 5772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 5782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0)); 5802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, rdev->vram_scratch.gpu_addr & 0xfffffffc); 5812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, upper_32_bits(rdev->vram_scratch.gpu_addr) & 0xffffffff); 5822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 1); /* number of DWs to follow */ 5832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 0xDEADBEEF); 5842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_unlock_commit(rdev, ring); 5852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < rdev->usec_timeout; i++) { 5872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König tmp = readl(ptr); 5882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (tmp == 0xDEADBEEF) 5892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König break; 5902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_UDELAY(1); 5912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 5922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 5932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (i < rdev->usec_timeout) { 5942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_INFO("ring test on %d succeeded in %d usecs\n", ring->idx, i); 5952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 5962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: ring %d test failed (0x%08X)\n", 5972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ring->idx, tmp); 5982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = -EINVAL; 5992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6002483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 6012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 6022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 6042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_ib_test - test an IB on the DMA engine 6052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 6062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 6072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ring: radeon_ring structure holding ring information 6082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 6092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Test a simple IB in the DMA ring (CIK). 6102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns 0 on success, error on failure. 6112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 6122483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königint cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) 6132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 6142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ib ib; 6152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König unsigned i; 6162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König int r; 6172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König void __iomem *ptr = (void *)rdev->vram_scratch.ptr; 6182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 tmp = 0; 6192483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6202483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (!ptr) { 6212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("invalid vram scratch pointer\n"); 6222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return -EINVAL; 6232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König tmp = 0xCAFEDEAD; 6262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König writel(tmp, ptr); 6272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); 6292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 6302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: failed to get ib (%d).\n", r); 6312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 6322483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6332483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); 6352483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.ptr[1] = rdev->vram_scratch.gpu_addr & 0xfffffffc; 6362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.ptr[2] = upper_32_bits(rdev->vram_scratch.gpu_addr) & 0xffffffff; 6372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.ptr[3] = 1; 6382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.ptr[4] = 0xDEADBEEF; 6392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib.length_dw = 5; 6402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_ib_schedule(rdev, &ib, NULL); 6422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 6432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ib_free(rdev, &ib); 6442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); 6452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 6462483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = radeon_fence_wait(ib.fence, false); 6482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (r) { 6492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: fence wait failed (%d).\n", r); 6502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 6512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (i = 0; i < rdev->usec_timeout; i++) { 6532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König tmp = readl(ptr); 6542483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (tmp == 0xDEADBEEF) 6552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König break; 6562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_UDELAY(1); 6572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (i < rdev->usec_timeout) { 6592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib.fence->ring, i); 6602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 6612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König DRM_ERROR("radeon: ib test failed (0x%08X)\n", tmp); 6622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König r = -EINVAL; 6632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ib_free(rdev, &ib); 6652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return r; 6662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 6672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 6692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_is_lockup - Check if the DMA engine is locked up 6702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 6712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 6722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ring: radeon_ring structure holding ring information 6732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 6742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Check if the async DMA engine is locked up (CIK). 6752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Returns true if the engine appears to be locked up, false if not. 6762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 6772483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königbool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) 6782483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 6792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 reset_mask = cik_gpu_check_soft_reset(rdev); 6802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König u32 mask; 6812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (ring->idx == R600_RING_TYPE_DMA_INDEX) 6832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König mask = RADEON_RESET_DMA; 6842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 6852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König mask = RADEON_RESET_DMA1; 6862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (!(reset_mask & mask)) { 6882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_lockup_update(ring); 6892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return false; 6902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 6912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* force ring activities */ 6922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_force_activity(rdev, ring); 6932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return radeon_ring_test_lockup(rdev, ring); 6942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 6952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 6962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 6972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_sdma_vm_set_page - update the page tables using sDMA 6982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 6992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 7002483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @ib: indirect buffer to fill with commands 7012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @pe: addr of the page entry 7022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @addr: dst addr to write into pe 7032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @count: number of page entries to update 7042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @incr: increase next addr by incr bytes 7052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @flags: access flags 7062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 7072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Update the page tables using sDMA (CIK). 7082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 7092483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_sdma_vm_set_page(struct radeon_device *rdev, 7102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ib *ib, 7112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König uint64_t pe, 7122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König uint64_t addr, unsigned count, 7132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König uint32_t incr, uint32_t flags) 7142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 7152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König uint64_t value; 7162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König unsigned ndw; 7172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 71824c164393dd2fa1c1fb51d5fec2f50bd6b7c037bChristian König trace_radeon_vm_set_page(pe, addr, count, incr, flags); 71974d360f66b99231ed7007eb197dd18cda72c961cChristian König 72024c164393dd2fa1c1fb51d5fec2f50bd6b7c037bChristian König if (flags & R600_PTE_SYSTEM) { 7212483b4ea982efe8a544697d3f9642932e9af4dc1Christian König while (count) { 7222483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ndw = count * 2; 7232483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (ndw > 0xFFFFE) 7242483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ndw = 0xFFFFE; 7252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* for non-physically contiguous pages (system) */ 7272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); 7282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = pe; 7292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = upper_32_bits(pe); 7302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = ndw; 7312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König for (; ndw > 0; ndw -= 2, --count, pe += 8) { 73224c164393dd2fa1c1fb51d5fec2f50bd6b7c037bChristian König value = radeon_vm_map_gart(rdev, addr); 73324c164393dd2fa1c1fb51d5fec2f50bd6b7c037bChristian König value &= 0xFFFFFFFFFFFFF000ULL; 7342483b4ea982efe8a544697d3f9642932e9af4dc1Christian König addr += incr; 73524c164393dd2fa1c1fb51d5fec2f50bd6b7c037bChristian König value |= flags; 7362483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = value; 7372483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = upper_32_bits(value); 7382483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 7392483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 7402483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 7412483b4ea982efe8a544697d3f9642932e9af4dc1Christian König while (count) { 7422483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ndw = count; 7432483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (ndw > 0x7FFFF) 7442483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ndw = 0x7FFFF; 7452483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 74624c164393dd2fa1c1fb51d5fec2f50bd6b7c037bChristian König if (flags & R600_PTE_VALID) 7472483b4ea982efe8a544697d3f9642932e9af4dc1Christian König value = addr; 7482483b4ea982efe8a544697d3f9642932e9af4dc1Christian König else 7492483b4ea982efe8a544697d3f9642932e9af4dc1Christian König value = 0; 7502483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* for physically contiguous pages (vram) */ 7512483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_GENERATE_PTE_PDE, 0, 0); 7522483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = pe; /* dst addr */ 7532483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = upper_32_bits(pe); 75424c164393dd2fa1c1fb51d5fec2f50bd6b7c037bChristian König ib->ptr[ib->length_dw++] = flags; /* mask */ 7552483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = 0; 7562483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = value; /* value */ 7572483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = upper_32_bits(value); 7582483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = incr; /* increment size */ 7592483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = 0; 7602483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = ndw; /* number of entries */ 7612483b4ea982efe8a544697d3f9642932e9af4dc1Christian König pe += ndw * 8; 7622483b4ea982efe8a544697d3f9642932e9af4dc1Christian König addr += ndw * incr; 7632483b4ea982efe8a544697d3f9642932e9af4dc1Christian König count -= ndw; 7642483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 7652483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 7662483b4ea982efe8a544697d3f9642932e9af4dc1Christian König while (ib->length_dw & 0x7) 7672483b4ea982efe8a544697d3f9642932e9af4dc1Christian König ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0); 7682483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 7692483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7702483b4ea982efe8a544697d3f9642932e9af4dc1Christian König/** 7712483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * cik_dma_vm_flush - cik vm flush using sDMA 7722483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 7732483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * @rdev: radeon_device pointer 7742483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * 7752483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * Update the page table base and flush the VM TLB 7762483b4ea982efe8a544697d3f9642932e9af4dc1Christian König * using sDMA (CIK). 7772483b4ea982efe8a544697d3f9642932e9af4dc1Christian König */ 7782483b4ea982efe8a544697d3f9642932e9af4dc1Christian Königvoid cik_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) 7792483b4ea982efe8a544697d3f9642932e9af4dc1Christian König{ 7802483b4ea982efe8a544697d3f9642932e9af4dc1Christian König struct radeon_ring *ring = &rdev->ring[ridx]; 7812483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7822483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (vm == NULL) 7832483b4ea982efe8a544697d3f9642932e9af4dc1Christian König return; 7842483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7852483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 7862483b4ea982efe8a544697d3f9642932e9af4dc1Christian König if (vm->id < 8) { 7872483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, (VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm->id << 2)) >> 2); 7882483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } else { 7892483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, (VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((vm->id - 8) << 2)) >> 2); 7902483b4ea982efe8a544697d3f9642932e9af4dc1Christian König } 7912483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, vm->pd_gpu_addr >> 12); 7922483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7932483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* update SH_MEM_* regs */ 7942483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 7952483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); 7962483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, VMID(vm->id)); 7972483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 7982483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 7992483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SH_MEM_BASES >> 2); 8002483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 0); 8012483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 8022483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 8032483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SH_MEM_CONFIG >> 2); 8042483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 0); 8052483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 8062483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 8072483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SH_MEM_APE1_BASE >> 2); 8082483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 1); 8092483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 8102483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 8112483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SH_MEM_APE1_LIMIT >> 2); 8122483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 0); 8132483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 8142483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 8152483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); 8162483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, VMID(0)); 8172483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 8182483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* flush HDP */ 819d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher /* We should be using the new POLL_REG_MEM special op packet here 820d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher * but it causes sDMA to hang sometimes 821d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher */ 822d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 823d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); 824d45fd24dd30a791ba0739a1d3c4fd29710d94b9fAlex Deucher radeon_ring_write(ring, 0); 8252483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 8262483b4ea982efe8a544697d3f9642932e9af4dc1Christian König /* flush TLB */ 8272483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); 8282483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2); 8292483b4ea982efe8a544697d3f9642932e9af4dc1Christian König radeon_ring_write(ring, 1 << vm->id); 8302483b4ea982efe8a544697d3f9642932e9af4dc1Christian König} 8312483b4ea982efe8a544697d3f9642932e9af4dc1Christian König 832