tilcdc_drv.h revision 16ea975eac671fa40a78594a116a44fef8e3f4a9
116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark/*
216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * Copyright (C) 2012 Texas Instruments
316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * Author: Rob Clark <robdclark@gmail.com>
416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark *
516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * This program is free software; you can redistribute it and/or modify it
616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * under the terms of the GNU General Public License version 2 as published by
716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * the Free Software Foundation.
816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark *
916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * This program is distributed in the hope that it will be useful, but WITHOUT
1016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
1216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * more details.
1316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark *
1416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * You should have received a copy of the GNU General Public License along with
1516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * this program.  If not, see <http://www.gnu.org/licenses/>.
1616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark */
1716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
1816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#ifndef __TILCDC_DRV_H__
1916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#define __TILCDC_DRV_H__
2016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
2116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <linux/clk.h>
2216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <linux/cpufreq.h>
2316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <linux/module.h>
2416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <linux/platform_device.h>
2516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <linux/pm.h>
2616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <linux/pm_runtime.h>
2716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <linux/slab.h>
2816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <linux/of.h>
2916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <linux/of_device.h>
3016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <linux/list.h>
3116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
3216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <drm/drmP.h>
3316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <drm/drm_crtc_helper.h>
3416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <drm/drm_gem_cma_helper.h>
3516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#include <drm/drm_fb_cma_helper.h>
3616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
3716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkstruct tilcdc_drm_private {
3816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	void __iomem *mmio;
3916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
4016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	struct clk *disp_clk;    /* display dpll */
4116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	struct clk *clk;         /* functional clock */
4216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	int rev;                 /* IP revision */
4316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
4416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* don't attempt resolutions w/ higher W * H * Hz: */
4516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	uint32_t max_bandwidth;
4616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
4716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* register contents saved across suspend/resume: */
4816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	u32 saved_register[12];
4916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
5016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#ifdef CONFIG_CPU_FREQ
5116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	struct notifier_block freq_transition;
5216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	unsigned int lcd_fck_rate;
5316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#endif
5416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
5516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	struct workqueue_struct *wq;
5616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
5716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	struct drm_fbdev_cma *fbdev;
5816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
5916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	struct drm_crtc *crtc;
6016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
6116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	unsigned int num_encoders;
6216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	struct drm_encoder *encoders[8];
6316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
6416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	unsigned int num_connectors;
6516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	struct drm_connector *connectors[8];
6616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark};
6716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
6816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark/* Sub-module for display.  Since we don't know at compile time what panels
6916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * or display adapter(s) might be present (for ex, off chip dvi/tfp410,
7016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * hdmi encoder, various lcd panels), the connector/encoder(s) are split into
7116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * separate drivers.  If they are probed and found to be present, they
7216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * register themselves with tilcdc_register_module().
7316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark */
7416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkstruct tilcdc_module;
7516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
7616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkstruct tilcdc_module_ops {
7716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* create appropriate encoders/connectors: */
7816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	int (*modeset_init)(struct tilcdc_module *mod, struct drm_device *dev);
7916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	void (*destroy)(struct tilcdc_module *mod);
8016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#ifdef CONFIG_DEBUG_FS
8116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* create debugfs nodes (can be NULL): */
8216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	int (*debugfs_init)(struct tilcdc_module *mod, struct drm_minor *minor);
8316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* cleanup debugfs nodes (can be NULL): */
8416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	void (*debugfs_cleanup)(struct tilcdc_module *mod, struct drm_minor *minor);
8516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#endif
8616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark};
8716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
8816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkstruct tilcdc_module {
8916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	const char *name;
9016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	struct list_head list;
9116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	const struct tilcdc_module_ops *funcs;
9216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark};
9316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
9416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkvoid tilcdc_module_init(struct tilcdc_module *mod, const char *name,
9516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark		const struct tilcdc_module_ops *funcs);
9616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkvoid tilcdc_module_cleanup(struct tilcdc_module *mod);
9716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
9816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
9916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark/* Panel config that needs to be set in the crtc, but is not coming from
10016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * the mode timings.  The display module is expected to call
10116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark * tilcdc_crtc_set_panel_info() to set this during modeset.
10216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark */
10316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkstruct tilcdc_panel_info {
10416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
10516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* AC Bias Pin Frequency */
10616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	uint32_t ac_bias;
10716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
10816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* AC Bias Pin Transitions per Interrupt */
10916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	uint32_t ac_bias_intrpt;
11016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
11116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* DMA burst size */
11216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	uint32_t dma_burst_sz;
11316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
11416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* Bits per pixel */
11516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	uint32_t bpp;
11616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
11716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* FIFO DMA Request Delay */
11816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	uint32_t fdd;
11916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
12016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* TFT Alternative Signal Mapping (Only for active) */
12116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	bool tft_alt_mode;
12216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
12316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* Invert pixel clock */
12416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	bool invert_pxl_clk;
12516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
12616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
12716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	uint32_t sync_edge;
12816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
12916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* Horizontal and Vertical Sync: Control: 0=ignore */
13016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	uint32_t sync_ctrl;
13116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
13216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
13316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	uint32_t raster_order;
13416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
13516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	/* DMA FIFO threshold */
13616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark	uint32_t fifo_th;
13716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark};
13816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
13916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
14016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
14116ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkstruct drm_crtc *tilcdc_crtc_create(struct drm_device *dev);
14216ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkvoid tilcdc_crtc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
14316ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkirqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc);
14416ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkvoid tilcdc_crtc_update_clk(struct drm_crtc *crtc);
14516ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkvoid tilcdc_crtc_set_panel_info(struct drm_crtc *crtc,
14616ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark		const struct tilcdc_panel_info *info);
14716ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkint tilcdc_crtc_mode_valid(struct drm_crtc *crtc, struct drm_display_mode *mode);
14816ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clarkint tilcdc_crtc_max_width(struct drm_crtc *crtc);
14916ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark
15016ea975eac671fa40a78594a116a44fef8e3f4a9Rob Clark#endif /* __TILCDC_DRV_H__ */
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