tilcdc_drv.h revision 39de6194131c155901f96686a063212656d80c2e 
1/*
2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program.  If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __TILCDC_DRV_H__
19#define __TILCDC_DRV_H__
20
21#include <linux/clk.h>
22#include <linux/cpufreq.h>
23#include <linux/module.h>
24#include <linux/platform_device.h>
25#include <linux/pm.h>
26#include <linux/pm_runtime.h>
27#include <linux/slab.h>
28#include <linux/of.h>
29#include <linux/of_device.h>
30#include <linux/list.h>
31
32#include <drm/drmP.h>
33#include <drm/drm_crtc_helper.h>
34#include <drm/drm_gem_cma_helper.h>
35#include <drm/drm_fb_cma_helper.h>
36
37/* Defaulting to pixel clock defined on AM335x */
38#define TILCDC_DEFAULT_MAX_PIXELCLOCK  126000
39/* Defaulting to max width as defined on AM335x */
40#define TILCDC_DEFAULT_MAX_WIDTH  2048
41/*
42 * This may need some tweaking, but want to allow at least 1280x1024@60
43 * with optimized DDR & EMIF settings tweaked 1920x1080@24 appears to
44 * be supportable
45 */
46#define TILCDC_DEFAULT_MAX_BANDWIDTH  (1280*1024*60)
47
48
49struct tilcdc_drm_private {
50	void __iomem *mmio;
51
52	struct clk *disp_clk;    /* display dpll */
53	struct clk *clk;         /* functional clock */
54	int rev;                 /* IP revision */
55
56	/* don't attempt resolutions w/ higher W * H * Hz: */
57	uint32_t max_bandwidth;
58	/*
59	 * Pixel Clock will be restricted to some value as
60	 * defined in the device datasheet measured in KHz
61	 */
62	uint32_t max_pixelclock;
63	/*
64	 * Max allowable width is limited on a per device basis
65	 * measured in pixels
66	 */
67	uint32_t max_width;
68
69	/* register contents saved across suspend/resume: */
70	u32 saved_register[12];
71
72#ifdef CONFIG_CPU_FREQ
73	struct notifier_block freq_transition;
74	unsigned int lcd_fck_rate;
75#endif
76
77	struct workqueue_struct *wq;
78
79	struct drm_fbdev_cma *fbdev;
80
81	struct drm_crtc *crtc;
82
83	unsigned int num_encoders;
84	struct drm_encoder *encoders[8];
85
86	unsigned int num_connectors;
87	struct drm_connector *connectors[8];
88};
89
90/* Sub-module for display.  Since we don't know at compile time what panels
91 * or display adapter(s) might be present (for ex, off chip dvi/tfp410,
92 * hdmi encoder, various lcd panels), the connector/encoder(s) are split into
93 * separate drivers.  If they are probed and found to be present, they
94 * register themselves with tilcdc_register_module().
95 */
96struct tilcdc_module;
97
98struct tilcdc_module_ops {
99	/* create appropriate encoders/connectors: */
100	int (*modeset_init)(struct tilcdc_module *mod, struct drm_device *dev);
101	void (*destroy)(struct tilcdc_module *mod);
102#ifdef CONFIG_DEBUG_FS
103	/* create debugfs nodes (can be NULL): */
104	int (*debugfs_init)(struct tilcdc_module *mod, struct drm_minor *minor);
105	/* cleanup debugfs nodes (can be NULL): */
106	void (*debugfs_cleanup)(struct tilcdc_module *mod, struct drm_minor *minor);
107#endif
108};
109
110struct tilcdc_module {
111	const char *name;
112	struct list_head list;
113	const struct tilcdc_module_ops *funcs;
114	unsigned int preferred_bpp;
115};
116
117void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
118		const struct tilcdc_module_ops *funcs);
119void tilcdc_module_cleanup(struct tilcdc_module *mod);
120void tilcdc_slave_probedefer(bool defered);
121
122/* Panel config that needs to be set in the crtc, but is not coming from
123 * the mode timings.  The display module is expected to call
124 * tilcdc_crtc_set_panel_info() to set this during modeset.
125 */
126struct tilcdc_panel_info {
127
128	/* AC Bias Pin Frequency */
129	uint32_t ac_bias;
130
131	/* AC Bias Pin Transitions per Interrupt */
132	uint32_t ac_bias_intrpt;
133
134	/* DMA burst size */
135	uint32_t dma_burst_sz;
136
137	/* Bits per pixel */
138	uint32_t bpp;
139
140	/* FIFO DMA Request Delay */
141	uint32_t fdd;
142
143	/* TFT Alternative Signal Mapping (Only for active) */
144	bool tft_alt_mode;
145
146	/* Invert pixel clock */
147	bool invert_pxl_clk;
148
149	/* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
150	uint32_t sync_edge;
151
152	/* Horizontal and Vertical Sync: Control: 0=ignore */
153	uint32_t sync_ctrl;
154
155	/* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
156	uint32_t raster_order;
157
158	/* DMA FIFO threshold */
159	uint32_t fifo_th;
160};
161
162#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
163
164struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev);
165void tilcdc_crtc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
166irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc);
167void tilcdc_crtc_update_clk(struct drm_crtc *crtc);
168void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc,
169		const struct tilcdc_panel_info *info);
170int tilcdc_crtc_mode_valid(struct drm_crtc *crtc, struct drm_display_mode *mode);
171int tilcdc_crtc_max_width(struct drm_crtc *crtc);
172
173#endif /* __TILCDC_DRV_H__ */
174