dme1737.c revision 67b671bceb4a8340a30929e9642620d99ed5ad76
1/* 2 * dme1737.c - Driver for the SMSC DME1737, Asus A8000, and SMSC SCH311x 3 * Super-I/O chips integrated hardware monitoring features. 4 * Copyright (c) 2007 Juerg Haefliger <juergh@gmail.com> 5 * 6 * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access 7 * the chip registers if a DME1737 (or A8000) is found and the ISA bus if a 8 * SCH311x chip is found. Both types of chips have very similar hardware 9 * monitoring capabilities but differ in the way they can be accessed. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 */ 25 26#include <linux/module.h> 27#include <linux/init.h> 28#include <linux/slab.h> 29#include <linux/jiffies.h> 30#include <linux/i2c.h> 31#include <linux/platform_device.h> 32#include <linux/hwmon.h> 33#include <linux/hwmon-sysfs.h> 34#include <linux/hwmon-vid.h> 35#include <linux/err.h> 36#include <linux/mutex.h> 37#include <asm/io.h> 38 39/* ISA device, if found */ 40static struct platform_device *pdev; 41 42/* Module load parameters */ 43static int force_start; 44module_param(force_start, bool, 0); 45MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs"); 46 47static unsigned short force_id; 48module_param(force_id, ushort, 0); 49MODULE_PARM_DESC(force_id, "Override the detected device ID"); 50 51/* Addresses to scan */ 52static unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END}; 53 54/* Insmod parameters */ 55I2C_CLIENT_INSMOD_1(dme1737); 56 57/* --------------------------------------------------------------------- 58 * Registers 59 * 60 * The sensors are defined as follows: 61 * 62 * Voltages Temperatures 63 * -------- ------------ 64 * in0 +5VTR (+5V stdby) temp1 Remote diode 1 65 * in1 Vccp (proc core) temp2 Internal temp 66 * in2 VCC (internal +3.3V) temp3 Remote diode 2 67 * in3 +5V 68 * in4 +12V 69 * in5 VTR (+3.3V stby) 70 * in6 Vbat 71 * 72 * --------------------------------------------------------------------- */ 73 74/* Voltages (in) numbered 0-6 (ix) */ 75#define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \ 76 : 0x94 + (ix)) 77#define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \ 78 : 0x91 + (ix) * 2) 79#define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \ 80 : 0x92 + (ix) * 2) 81 82/* Temperatures (temp) numbered 0-2 (ix) */ 83#define DME1737_REG_TEMP(ix) (0x25 + (ix)) 84#define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2) 85#define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2) 86#define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \ 87 : 0x1c + (ix)) 88 89/* Voltage and temperature LSBs 90 * The LSBs (4 bits each) are stored in 5 registers with the following layouts: 91 * IN_TEMP_LSB(0) = [in5, in6] 92 * IN_TEMP_LSB(1) = [temp3, temp1] 93 * IN_TEMP_LSB(2) = [in4, temp2] 94 * IN_TEMP_LSB(3) = [in3, in0] 95 * IN_TEMP_LSB(4) = [in2, in1] */ 96#define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix)) 97static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0}; 98static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4}; 99static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1}; 100static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0}; 101 102/* Fans numbered 0-5 (ix) */ 103#define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \ 104 : 0xa1 + (ix) * 2) 105#define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \ 106 : 0xa5 + (ix) * 2) 107#define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \ 108 : 0xb2 + (ix)) 109#define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */ 110 111/* PWMs numbered 0-2, 4-5 (ix) */ 112#define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \ 113 : 0xa1 + (ix)) 114#define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */ 115#define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */ 116#define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \ 117 : 0xa3 + (ix)) 118/* The layout of the ramp rate registers is different from the other pwm 119 * registers. The bits for the 3 PWMs are stored in 2 registers: 120 * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0] 121 * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */ 122#define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */ 123 124/* Thermal zones 0-2 */ 125#define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix)) 126#define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix)) 127/* The layout of the hysteresis registers is different from the other zone 128 * registers. The bits for the 3 zones are stored in 2 registers: 129 * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] 130 * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */ 131#define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix)) 132 133/* Alarm registers and bit mapping 134 * The 3 8-bit alarm registers will be concatenated to a single 32-bit 135 * alarm value [0, ALARM3, ALARM2, ALARM1]. */ 136#define DME1737_REG_ALARM1 0x41 137#define DME1737_REG_ALARM2 0x42 138#define DME1737_REG_ALARM3 0x83 139static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17}; 140static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6}; 141static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23}; 142 143/* Miscellaneous registers */ 144#define DME1737_REG_DEVICE 0x3d 145#define DME1737_REG_COMPANY 0x3e 146#define DME1737_REG_VERSTEP 0x3f 147#define DME1737_REG_CONFIG 0x40 148#define DME1737_REG_CONFIG2 0x7f 149#define DME1737_REG_VID 0x43 150#define DME1737_REG_TACH_PWM 0x81 151 152/* --------------------------------------------------------------------- 153 * Misc defines 154 * --------------------------------------------------------------------- */ 155 156/* Chip identification */ 157#define DME1737_COMPANY_SMSC 0x5c 158#define DME1737_VERSTEP 0x88 159#define DME1737_VERSTEP_MASK 0xf8 160#define SCH311X_DEVICE 0x8c 161 162/* Length of ISA address segment */ 163#define DME1737_EXTENT 2 164 165/* --------------------------------------------------------------------- 166 * Data structures and manipulation thereof 167 * --------------------------------------------------------------------- */ 168 169/* For ISA chips, we abuse the i2c_client addr and name fields. We also use 170 the driver field to differentiate between I2C and ISA chips. */ 171struct dme1737_data { 172 struct i2c_client client; 173 struct device *hwmon_dev; 174 175 struct mutex update_lock; 176 int valid; /* !=0 if following fields are valid */ 177 unsigned long last_update; /* in jiffies */ 178 unsigned long last_vbat; /* in jiffies */ 179 180 u8 vid; 181 u8 pwm_rr_en; 182 u8 has_pwm; 183 u8 has_fan; 184 185 /* Register values */ 186 u16 in[7]; 187 u8 in_min[7]; 188 u8 in_max[7]; 189 s16 temp[3]; 190 s8 temp_min[3]; 191 s8 temp_max[3]; 192 s8 temp_offset[3]; 193 u8 config; 194 u8 config2; 195 u8 vrm; 196 u16 fan[6]; 197 u16 fan_min[6]; 198 u8 fan_max[2]; 199 u8 fan_opt[6]; 200 u8 pwm[6]; 201 u8 pwm_min[3]; 202 u8 pwm_config[3]; 203 u8 pwm_acz[3]; 204 u8 pwm_freq[6]; 205 u8 pwm_rr[2]; 206 u8 zone_low[3]; 207 u8 zone_abs[3]; 208 u8 zone_hyst[2]; 209 u32 alarms; 210}; 211 212/* Nominal voltage values */ 213static const int IN_NOMINAL[] = {5000, 2250, 3300, 5000, 12000, 3300, 3300}; 214 215/* Voltage input 216 * Voltage inputs have 16 bits resolution, limit values have 8 bits 217 * resolution. */ 218static inline int IN_FROM_REG(int reg, int ix, int res) 219{ 220 return (reg * IN_NOMINAL[ix] + (3 << (res - 3))) / (3 << (res - 2)); 221} 222 223static inline int IN_TO_REG(int val, int ix) 224{ 225 return SENSORS_LIMIT((val * 192 + IN_NOMINAL[ix] / 2) / 226 IN_NOMINAL[ix], 0, 255); 227} 228 229/* Temperature input 230 * The register values represent temperatures in 2's complement notation from 231 * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit 232 * values have 8 bits resolution. */ 233static inline int TEMP_FROM_REG(int reg, int res) 234{ 235 return (reg * 1000) >> (res - 8); 236} 237 238static inline int TEMP_TO_REG(int val) 239{ 240 return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000, 241 -128, 127); 242} 243 244/* Temperature range */ 245static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000, 246 10000, 13333, 16000, 20000, 26666, 32000, 247 40000, 53333, 80000}; 248 249static inline int TEMP_RANGE_FROM_REG(int reg) 250{ 251 return TEMP_RANGE[(reg >> 4) & 0x0f]; 252} 253 254static int TEMP_RANGE_TO_REG(int val, int reg) 255{ 256 int i; 257 258 for (i = 15; i > 0; i--) { 259 if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) { 260 break; 261 } 262 } 263 264 return (reg & 0x0f) | (i << 4); 265} 266 267/* Temperature hysteresis 268 * Register layout: 269 * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] 270 * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */ 271static inline int TEMP_HYST_FROM_REG(int reg, int ix) 272{ 273 return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000; 274} 275 276static inline int TEMP_HYST_TO_REG(int val, int ix, int reg) 277{ 278 int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15); 279 280 return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4); 281} 282 283/* Fan input RPM */ 284static inline int FAN_FROM_REG(int reg, int tpc) 285{ 286 return (reg == 0 || reg == 0xffff) ? 0 : 287 (tpc == 0) ? 90000 * 60 / reg : tpc * reg; 288} 289 290static inline int FAN_TO_REG(int val, int tpc) 291{ 292 return SENSORS_LIMIT((tpc == 0) ? 90000 * 60 / val : val / tpc, 293 0, 0xffff); 294} 295 296/* Fan TPC (tach pulse count) 297 * Converts a register value to a TPC multiplier or returns 0 if the tachometer 298 * is configured in legacy (non-tpc) mode */ 299static inline int FAN_TPC_FROM_REG(int reg) 300{ 301 return (reg & 0x20) ? 0 : 60 >> (reg & 0x03); 302} 303 304/* Fan type 305 * The type of a fan is expressed in number of pulses-per-revolution that it 306 * emits */ 307static inline int FAN_TYPE_FROM_REG(int reg) 308{ 309 int edge = (reg >> 1) & 0x03; 310 311 return (edge > 0) ? 1 << (edge - 1) : 0; 312} 313 314static inline int FAN_TYPE_TO_REG(int val, int reg) 315{ 316 int edge = (val == 4) ? 3 : val; 317 318 return (reg & 0xf9) | (edge << 1); 319} 320 321/* Fan max RPM */ 322static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12, 323 0x11, 0x0f, 0x0e}; 324 325static int FAN_MAX_FROM_REG(int reg) 326{ 327 int i; 328 329 for (i = 10; i > 0; i--) { 330 if (reg == FAN_MAX[i]) { 331 break; 332 } 333 } 334 335 return 1000 + i * 500; 336} 337 338static int FAN_MAX_TO_REG(int val) 339{ 340 int i; 341 342 for (i = 10; i > 0; i--) { 343 if (val > (1000 + (i - 1) * 500)) { 344 break; 345 } 346 } 347 348 return FAN_MAX[i]; 349} 350 351/* PWM enable 352 * Register to enable mapping: 353 * 000: 2 fan on zone 1 auto 354 * 001: 2 fan on zone 2 auto 355 * 010: 2 fan on zone 3 auto 356 * 011: 0 fan full on 357 * 100: -1 fan disabled 358 * 101: 2 fan on hottest of zones 2,3 auto 359 * 110: 2 fan on hottest of zones 1,2,3 auto 360 * 111: 1 fan in manual mode */ 361static inline int PWM_EN_FROM_REG(int reg) 362{ 363 static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1}; 364 365 return en[(reg >> 5) & 0x07]; 366} 367 368static inline int PWM_EN_TO_REG(int val, int reg) 369{ 370 int en = (val == 1) ? 7 : 3; 371 372 return (reg & 0x1f) | ((en & 0x07) << 5); 373} 374 375/* PWM auto channels zone 376 * Register to auto channels zone mapping (ACZ is a bitfield with bit x 377 * corresponding to zone x+1): 378 * 000: 001 fan on zone 1 auto 379 * 001: 010 fan on zone 2 auto 380 * 010: 100 fan on zone 3 auto 381 * 011: 000 fan full on 382 * 100: 000 fan disabled 383 * 101: 110 fan on hottest of zones 2,3 auto 384 * 110: 111 fan on hottest of zones 1,2,3 auto 385 * 111: 000 fan in manual mode */ 386static inline int PWM_ACZ_FROM_REG(int reg) 387{ 388 static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0}; 389 390 return acz[(reg >> 5) & 0x07]; 391} 392 393static inline int PWM_ACZ_TO_REG(int val, int reg) 394{ 395 int acz = (val == 4) ? 2 : val - 1; 396 397 return (reg & 0x1f) | ((acz & 0x07) << 5); 398} 399 400/* PWM frequency */ 401static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88, 402 15000, 20000, 30000, 25000, 0, 0, 0, 0}; 403 404static inline int PWM_FREQ_FROM_REG(int reg) 405{ 406 return PWM_FREQ[reg & 0x0f]; 407} 408 409static int PWM_FREQ_TO_REG(int val, int reg) 410{ 411 int i; 412 413 /* the first two cases are special - stupid chip design! */ 414 if (val > 27500) { 415 i = 10; 416 } else if (val > 22500) { 417 i = 11; 418 } else { 419 for (i = 9; i > 0; i--) { 420 if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) { 421 break; 422 } 423 } 424 } 425 426 return (reg & 0xf0) | i; 427} 428 429/* PWM ramp rate 430 * Register layout: 431 * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0] 432 * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */ 433static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5}; 434 435static inline int PWM_RR_FROM_REG(int reg, int ix) 436{ 437 int rr = (ix == 1) ? reg >> 4 : reg; 438 439 return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0; 440} 441 442static int PWM_RR_TO_REG(int val, int ix, int reg) 443{ 444 int i; 445 446 for (i = 0; i < 7; i++) { 447 if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) { 448 break; 449 } 450 } 451 452 return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i; 453} 454 455/* PWM ramp rate enable */ 456static inline int PWM_RR_EN_FROM_REG(int reg, int ix) 457{ 458 return PWM_RR_FROM_REG(reg, ix) ? 1 : 0; 459} 460 461static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg) 462{ 463 int en = (ix == 1) ? 0x80 : 0x08; 464 465 return val ? reg | en : reg & ~en; 466} 467 468/* PWM min/off 469 * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for 470 * the register layout). */ 471static inline int PWM_OFF_FROM_REG(int reg, int ix) 472{ 473 return (reg >> (ix + 5)) & 0x01; 474} 475 476static inline int PWM_OFF_TO_REG(int val, int ix, int reg) 477{ 478 return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5)); 479} 480 481/* --------------------------------------------------------------------- 482 * Device I/O access 483 * 484 * ISA access is performed through an index/data register pair and needs to 485 * be protected by a mutex during runtime (not required for initialization). 486 * We use data->update_lock for this and need to ensure that we acquire it 487 * before calling dme1737_read or dme1737_write. 488 * --------------------------------------------------------------------- */ 489 490static u8 dme1737_read(struct i2c_client *client, u8 reg) 491{ 492 s32 val; 493 494 if (client->driver) { /* I2C device */ 495 val = i2c_smbus_read_byte_data(client, reg); 496 497 if (val < 0) { 498 dev_warn(&client->dev, "Read from register " 499 "0x%02x failed! Please report to the driver " 500 "maintainer.\n", reg); 501 } 502 } else { /* ISA device */ 503 outb(reg, client->addr); 504 val = inb(client->addr + 1); 505 } 506 507 return val; 508} 509 510static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 val) 511{ 512 s32 res = 0; 513 514 if (client->driver) { /* I2C device */ 515 res = i2c_smbus_write_byte_data(client, reg, val); 516 517 if (res < 0) { 518 dev_warn(&client->dev, "Write to register " 519 "0x%02x failed! Please report to the driver " 520 "maintainer.\n", reg); 521 } 522 } else { /* ISA device */ 523 outb(reg, client->addr); 524 outb(val, client->addr + 1); 525 } 526 527 return res; 528} 529 530static struct dme1737_data *dme1737_update_device(struct device *dev) 531{ 532 struct dme1737_data *data = dev_get_drvdata(dev); 533 struct i2c_client *client = &data->client; 534 int ix; 535 u8 lsb[5]; 536 537 mutex_lock(&data->update_lock); 538 539 /* Enable a Vbat monitoring cycle every 10 mins */ 540 if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) { 541 dme1737_write(client, DME1737_REG_CONFIG, dme1737_read(client, 542 DME1737_REG_CONFIG) | 0x10); 543 data->last_vbat = jiffies; 544 } 545 546 /* Sample register contents every 1 sec */ 547 if (time_after(jiffies, data->last_update + HZ) || !data->valid) { 548 data->vid = dme1737_read(client, DME1737_REG_VID) & 0x3f; 549 550 /* In (voltage) registers */ 551 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { 552 /* Voltage inputs are stored as 16 bit values even 553 * though they have only 12 bits resolution. This is 554 * to make it consistent with the temp inputs. */ 555 data->in[ix] = dme1737_read(client, 556 DME1737_REG_IN(ix)) << 8; 557 data->in_min[ix] = dme1737_read(client, 558 DME1737_REG_IN_MIN(ix)); 559 data->in_max[ix] = dme1737_read(client, 560 DME1737_REG_IN_MAX(ix)); 561 } 562 563 /* Temp registers */ 564 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { 565 /* Temp inputs are stored as 16 bit values even 566 * though they have only 12 bits resolution. This is 567 * to take advantage of implicit conversions between 568 * register values (2's complement) and temp values 569 * (signed decimal). */ 570 data->temp[ix] = dme1737_read(client, 571 DME1737_REG_TEMP(ix)) << 8; 572 data->temp_min[ix] = dme1737_read(client, 573 DME1737_REG_TEMP_MIN(ix)); 574 data->temp_max[ix] = dme1737_read(client, 575 DME1737_REG_TEMP_MAX(ix)); 576 data->temp_offset[ix] = dme1737_read(client, 577 DME1737_REG_TEMP_OFFSET(ix)); 578 } 579 580 /* In and temp LSB registers 581 * The LSBs are latched when the MSBs are read, so the order in 582 * which the registers are read (MSB first, then LSB) is 583 * important! */ 584 for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) { 585 lsb[ix] = dme1737_read(client, 586 DME1737_REG_IN_TEMP_LSB(ix)); 587 } 588 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { 589 data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] << 590 DME1737_REG_IN_LSB_SHL[ix]) & 0xf0; 591 } 592 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { 593 data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] << 594 DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0; 595 } 596 597 /* Fan registers */ 598 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) { 599 /* Skip reading registers if optional fans are not 600 * present */ 601 if (!(data->has_fan & (1 << ix))) { 602 continue; 603 } 604 data->fan[ix] = dme1737_read(client, 605 DME1737_REG_FAN(ix)); 606 data->fan[ix] |= dme1737_read(client, 607 DME1737_REG_FAN(ix) + 1) << 8; 608 data->fan_min[ix] = dme1737_read(client, 609 DME1737_REG_FAN_MIN(ix)); 610 data->fan_min[ix] |= dme1737_read(client, 611 DME1737_REG_FAN_MIN(ix) + 1) << 8; 612 data->fan_opt[ix] = dme1737_read(client, 613 DME1737_REG_FAN_OPT(ix)); 614 /* fan_max exists only for fan[5-6] */ 615 if (ix > 3) { 616 data->fan_max[ix - 4] = dme1737_read(client, 617 DME1737_REG_FAN_MAX(ix)); 618 } 619 } 620 621 /* PWM registers */ 622 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) { 623 /* Skip reading registers if optional PWMs are not 624 * present */ 625 if (!(data->has_pwm & (1 << ix))) { 626 continue; 627 } 628 data->pwm[ix] = dme1737_read(client, 629 DME1737_REG_PWM(ix)); 630 data->pwm_freq[ix] = dme1737_read(client, 631 DME1737_REG_PWM_FREQ(ix)); 632 /* pwm_config and pwm_min exist only for pwm[1-3] */ 633 if (ix < 3) { 634 data->pwm_config[ix] = dme1737_read(client, 635 DME1737_REG_PWM_CONFIG(ix)); 636 data->pwm_min[ix] = dme1737_read(client, 637 DME1737_REG_PWM_MIN(ix)); 638 } 639 } 640 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) { 641 data->pwm_rr[ix] = dme1737_read(client, 642 DME1737_REG_PWM_RR(ix)); 643 } 644 645 /* Thermal zone registers */ 646 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) { 647 data->zone_low[ix] = dme1737_read(client, 648 DME1737_REG_ZONE_LOW(ix)); 649 data->zone_abs[ix] = dme1737_read(client, 650 DME1737_REG_ZONE_ABS(ix)); 651 } 652 for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) { 653 data->zone_hyst[ix] = dme1737_read(client, 654 DME1737_REG_ZONE_HYST(ix)); 655 } 656 657 /* Alarm registers */ 658 data->alarms = dme1737_read(client, 659 DME1737_REG_ALARM1); 660 /* Bit 7 tells us if the other alarm registers are non-zero and 661 * therefore also need to be read */ 662 if (data->alarms & 0x80) { 663 data->alarms |= dme1737_read(client, 664 DME1737_REG_ALARM2) << 8; 665 data->alarms |= dme1737_read(client, 666 DME1737_REG_ALARM3) << 16; 667 } 668 669 /* The ISA chips require explicit clearing of alarm bits. 670 * Don't worry, an alarm will come back if the condition 671 * that causes it still exists */ 672 if (!client->driver) { 673 if (data->alarms & 0xff0000) { 674 dme1737_write(client, DME1737_REG_ALARM3, 675 0xff); 676 } 677 if (data->alarms & 0xff00) { 678 dme1737_write(client, DME1737_REG_ALARM2, 679 0xff); 680 } 681 if (data->alarms & 0xff) { 682 dme1737_write(client, DME1737_REG_ALARM1, 683 0xff); 684 } 685 } 686 687 data->last_update = jiffies; 688 data->valid = 1; 689 } 690 691 mutex_unlock(&data->update_lock); 692 693 return data; 694} 695 696/* --------------------------------------------------------------------- 697 * Voltage sysfs attributes 698 * ix = [0-5] 699 * --------------------------------------------------------------------- */ 700 701#define SYS_IN_INPUT 0 702#define SYS_IN_MIN 1 703#define SYS_IN_MAX 2 704#define SYS_IN_ALARM 3 705 706static ssize_t show_in(struct device *dev, struct device_attribute *attr, 707 char *buf) 708{ 709 struct dme1737_data *data = dme1737_update_device(dev); 710 struct sensor_device_attribute_2 711 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 712 int ix = sensor_attr_2->index; 713 int fn = sensor_attr_2->nr; 714 int res; 715 716 switch (fn) { 717 case SYS_IN_INPUT: 718 res = IN_FROM_REG(data->in[ix], ix, 16); 719 break; 720 case SYS_IN_MIN: 721 res = IN_FROM_REG(data->in_min[ix], ix, 8); 722 break; 723 case SYS_IN_MAX: 724 res = IN_FROM_REG(data->in_max[ix], ix, 8); 725 break; 726 case SYS_IN_ALARM: 727 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01; 728 break; 729 default: 730 res = 0; 731 dev_dbg(dev, "Unknown function %d.\n", fn); 732 } 733 734 return sprintf(buf, "%d\n", res); 735} 736 737static ssize_t set_in(struct device *dev, struct device_attribute *attr, 738 const char *buf, size_t count) 739{ 740 struct dme1737_data *data = dev_get_drvdata(dev); 741 struct i2c_client *client = &data->client; 742 struct sensor_device_attribute_2 743 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 744 int ix = sensor_attr_2->index; 745 int fn = sensor_attr_2->nr; 746 long val = simple_strtol(buf, NULL, 10); 747 748 mutex_lock(&data->update_lock); 749 switch (fn) { 750 case SYS_IN_MIN: 751 data->in_min[ix] = IN_TO_REG(val, ix); 752 dme1737_write(client, DME1737_REG_IN_MIN(ix), 753 data->in_min[ix]); 754 break; 755 case SYS_IN_MAX: 756 data->in_max[ix] = IN_TO_REG(val, ix); 757 dme1737_write(client, DME1737_REG_IN_MAX(ix), 758 data->in_max[ix]); 759 break; 760 default: 761 dev_dbg(dev, "Unknown function %d.\n", fn); 762 } 763 mutex_unlock(&data->update_lock); 764 765 return count; 766} 767 768/* --------------------------------------------------------------------- 769 * Temperature sysfs attributes 770 * ix = [0-2] 771 * --------------------------------------------------------------------- */ 772 773#define SYS_TEMP_INPUT 0 774#define SYS_TEMP_MIN 1 775#define SYS_TEMP_MAX 2 776#define SYS_TEMP_OFFSET 3 777#define SYS_TEMP_ALARM 4 778#define SYS_TEMP_FAULT 5 779 780static ssize_t show_temp(struct device *dev, struct device_attribute *attr, 781 char *buf) 782{ 783 struct dme1737_data *data = dme1737_update_device(dev); 784 struct sensor_device_attribute_2 785 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 786 int ix = sensor_attr_2->index; 787 int fn = sensor_attr_2->nr; 788 int res; 789 790 switch (fn) { 791 case SYS_TEMP_INPUT: 792 res = TEMP_FROM_REG(data->temp[ix], 16); 793 break; 794 case SYS_TEMP_MIN: 795 res = TEMP_FROM_REG(data->temp_min[ix], 8); 796 break; 797 case SYS_TEMP_MAX: 798 res = TEMP_FROM_REG(data->temp_max[ix], 8); 799 break; 800 case SYS_TEMP_OFFSET: 801 res = TEMP_FROM_REG(data->temp_offset[ix], 8); 802 break; 803 case SYS_TEMP_ALARM: 804 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01; 805 break; 806 case SYS_TEMP_FAULT: 807 res = (((u16)data->temp[ix] & 0xff00) == 0x8000); 808 break; 809 default: 810 res = 0; 811 dev_dbg(dev, "Unknown function %d.\n", fn); 812 } 813 814 return sprintf(buf, "%d\n", res); 815} 816 817static ssize_t set_temp(struct device *dev, struct device_attribute *attr, 818 const char *buf, size_t count) 819{ 820 struct dme1737_data *data = dev_get_drvdata(dev); 821 struct i2c_client *client = &data->client; 822 struct sensor_device_attribute_2 823 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 824 int ix = sensor_attr_2->index; 825 int fn = sensor_attr_2->nr; 826 long val = simple_strtol(buf, NULL, 10); 827 828 mutex_lock(&data->update_lock); 829 switch (fn) { 830 case SYS_TEMP_MIN: 831 data->temp_min[ix] = TEMP_TO_REG(val); 832 dme1737_write(client, DME1737_REG_TEMP_MIN(ix), 833 data->temp_min[ix]); 834 break; 835 case SYS_TEMP_MAX: 836 data->temp_max[ix] = TEMP_TO_REG(val); 837 dme1737_write(client, DME1737_REG_TEMP_MAX(ix), 838 data->temp_max[ix]); 839 break; 840 case SYS_TEMP_OFFSET: 841 data->temp_offset[ix] = TEMP_TO_REG(val); 842 dme1737_write(client, DME1737_REG_TEMP_OFFSET(ix), 843 data->temp_offset[ix]); 844 break; 845 default: 846 dev_dbg(dev, "Unknown function %d.\n", fn); 847 } 848 mutex_unlock(&data->update_lock); 849 850 return count; 851} 852 853/* --------------------------------------------------------------------- 854 * Zone sysfs attributes 855 * ix = [0-2] 856 * --------------------------------------------------------------------- */ 857 858#define SYS_ZONE_AUTO_CHANNELS_TEMP 0 859#define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1 860#define SYS_ZONE_AUTO_POINT1_TEMP 2 861#define SYS_ZONE_AUTO_POINT2_TEMP 3 862#define SYS_ZONE_AUTO_POINT3_TEMP 4 863 864static ssize_t show_zone(struct device *dev, struct device_attribute *attr, 865 char *buf) 866{ 867 struct dme1737_data *data = dme1737_update_device(dev); 868 struct sensor_device_attribute_2 869 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 870 int ix = sensor_attr_2->index; 871 int fn = sensor_attr_2->nr; 872 int res; 873 874 switch (fn) { 875 case SYS_ZONE_AUTO_CHANNELS_TEMP: 876 /* check config2 for non-standard temp-to-zone mapping */ 877 if ((ix == 1) && (data->config2 & 0x02)) { 878 res = 4; 879 } else { 880 res = 1 << ix; 881 } 882 break; 883 case SYS_ZONE_AUTO_POINT1_TEMP_HYST: 884 res = TEMP_FROM_REG(data->zone_low[ix], 8) - 885 TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix); 886 break; 887 case SYS_ZONE_AUTO_POINT1_TEMP: 888 res = TEMP_FROM_REG(data->zone_low[ix], 8); 889 break; 890 case SYS_ZONE_AUTO_POINT2_TEMP: 891 /* pwm_freq holds the temp range bits in the upper nibble */ 892 res = TEMP_FROM_REG(data->zone_low[ix], 8) + 893 TEMP_RANGE_FROM_REG(data->pwm_freq[ix]); 894 break; 895 case SYS_ZONE_AUTO_POINT3_TEMP: 896 res = TEMP_FROM_REG(data->zone_abs[ix], 8); 897 break; 898 default: 899 res = 0; 900 dev_dbg(dev, "Unknown function %d.\n", fn); 901 } 902 903 return sprintf(buf, "%d\n", res); 904} 905 906static ssize_t set_zone(struct device *dev, struct device_attribute *attr, 907 const char *buf, size_t count) 908{ 909 struct dme1737_data *data = dev_get_drvdata(dev); 910 struct i2c_client *client = &data->client; 911 struct sensor_device_attribute_2 912 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 913 int ix = sensor_attr_2->index; 914 int fn = sensor_attr_2->nr; 915 long val = simple_strtol(buf, NULL, 10); 916 917 mutex_lock(&data->update_lock); 918 switch (fn) { 919 case SYS_ZONE_AUTO_POINT1_TEMP_HYST: 920 /* Refresh the cache */ 921 data->zone_low[ix] = dme1737_read(client, 922 DME1737_REG_ZONE_LOW(ix)); 923 /* Modify the temp hyst value */ 924 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG( 925 TEMP_FROM_REG(data->zone_low[ix], 8) - 926 val, ix, dme1737_read(client, 927 DME1737_REG_ZONE_HYST(ix == 2))); 928 dme1737_write(client, DME1737_REG_ZONE_HYST(ix == 2), 929 data->zone_hyst[ix == 2]); 930 break; 931 case SYS_ZONE_AUTO_POINT1_TEMP: 932 data->zone_low[ix] = TEMP_TO_REG(val); 933 dme1737_write(client, DME1737_REG_ZONE_LOW(ix), 934 data->zone_low[ix]); 935 break; 936 case SYS_ZONE_AUTO_POINT2_TEMP: 937 /* Refresh the cache */ 938 data->zone_low[ix] = dme1737_read(client, 939 DME1737_REG_ZONE_LOW(ix)); 940 /* Modify the temp range value (which is stored in the upper 941 * nibble of the pwm_freq register) */ 942 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - 943 TEMP_FROM_REG(data->zone_low[ix], 8), 944 dme1737_read(client, 945 DME1737_REG_PWM_FREQ(ix))); 946 dme1737_write(client, DME1737_REG_PWM_FREQ(ix), 947 data->pwm_freq[ix]); 948 break; 949 case SYS_ZONE_AUTO_POINT3_TEMP: 950 data->zone_abs[ix] = TEMP_TO_REG(val); 951 dme1737_write(client, DME1737_REG_ZONE_ABS(ix), 952 data->zone_abs[ix]); 953 break; 954 default: 955 dev_dbg(dev, "Unknown function %d.\n", fn); 956 } 957 mutex_unlock(&data->update_lock); 958 959 return count; 960} 961 962/* --------------------------------------------------------------------- 963 * Fan sysfs attributes 964 * ix = [0-5] 965 * --------------------------------------------------------------------- */ 966 967#define SYS_FAN_INPUT 0 968#define SYS_FAN_MIN 1 969#define SYS_FAN_MAX 2 970#define SYS_FAN_ALARM 3 971#define SYS_FAN_TYPE 4 972 973static ssize_t show_fan(struct device *dev, struct device_attribute *attr, 974 char *buf) 975{ 976 struct dme1737_data *data = dme1737_update_device(dev); 977 struct sensor_device_attribute_2 978 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 979 int ix = sensor_attr_2->index; 980 int fn = sensor_attr_2->nr; 981 int res; 982 983 switch (fn) { 984 case SYS_FAN_INPUT: 985 res = FAN_FROM_REG(data->fan[ix], 986 ix < 4 ? 0 : 987 FAN_TPC_FROM_REG(data->fan_opt[ix])); 988 break; 989 case SYS_FAN_MIN: 990 res = FAN_FROM_REG(data->fan_min[ix], 991 ix < 4 ? 0 : 992 FAN_TPC_FROM_REG(data->fan_opt[ix])); 993 break; 994 case SYS_FAN_MAX: 995 /* only valid for fan[5-6] */ 996 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]); 997 break; 998 case SYS_FAN_ALARM: 999 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01; 1000 break; 1001 case SYS_FAN_TYPE: 1002 /* only valid for fan[1-4] */ 1003 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]); 1004 break; 1005 default: 1006 res = 0; 1007 dev_dbg(dev, "Unknown function %d.\n", fn); 1008 } 1009 1010 return sprintf(buf, "%d\n", res); 1011} 1012 1013static ssize_t set_fan(struct device *dev, struct device_attribute *attr, 1014 const char *buf, size_t count) 1015{ 1016 struct dme1737_data *data = dev_get_drvdata(dev); 1017 struct i2c_client *client = &data->client; 1018 struct sensor_device_attribute_2 1019 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 1020 int ix = sensor_attr_2->index; 1021 int fn = sensor_attr_2->nr; 1022 long val = simple_strtol(buf, NULL, 10); 1023 1024 mutex_lock(&data->update_lock); 1025 switch (fn) { 1026 case SYS_FAN_MIN: 1027 if (ix < 4) { 1028 data->fan_min[ix] = FAN_TO_REG(val, 0); 1029 } else { 1030 /* Refresh the cache */ 1031 data->fan_opt[ix] = dme1737_read(client, 1032 DME1737_REG_FAN_OPT(ix)); 1033 /* Modify the fan min value */ 1034 data->fan_min[ix] = FAN_TO_REG(val, 1035 FAN_TPC_FROM_REG(data->fan_opt[ix])); 1036 } 1037 dme1737_write(client, DME1737_REG_FAN_MIN(ix), 1038 data->fan_min[ix] & 0xff); 1039 dme1737_write(client, DME1737_REG_FAN_MIN(ix) + 1, 1040 data->fan_min[ix] >> 8); 1041 break; 1042 case SYS_FAN_MAX: 1043 /* Only valid for fan[5-6] */ 1044 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val); 1045 dme1737_write(client, DME1737_REG_FAN_MAX(ix), 1046 data->fan_max[ix - 4]); 1047 break; 1048 case SYS_FAN_TYPE: 1049 /* Only valid for fan[1-4] */ 1050 if (!(val == 1 || val == 2 || val == 4)) { 1051 count = -EINVAL; 1052 dev_warn(dev, "Fan type value %ld not " 1053 "supported. Choose one of 1, 2, or 4.\n", 1054 val); 1055 goto exit; 1056 } 1057 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(client, 1058 DME1737_REG_FAN_OPT(ix))); 1059 dme1737_write(client, DME1737_REG_FAN_OPT(ix), 1060 data->fan_opt[ix]); 1061 break; 1062 default: 1063 dev_dbg(dev, "Unknown function %d.\n", fn); 1064 } 1065exit: 1066 mutex_unlock(&data->update_lock); 1067 1068 return count; 1069} 1070 1071/* --------------------------------------------------------------------- 1072 * PWM sysfs attributes 1073 * ix = [0-4] 1074 * --------------------------------------------------------------------- */ 1075 1076#define SYS_PWM 0 1077#define SYS_PWM_FREQ 1 1078#define SYS_PWM_ENABLE 2 1079#define SYS_PWM_RAMP_RATE 3 1080#define SYS_PWM_AUTO_CHANNELS_ZONE 4 1081#define SYS_PWM_AUTO_PWM_MIN 5 1082#define SYS_PWM_AUTO_POINT1_PWM 6 1083#define SYS_PWM_AUTO_POINT2_PWM 7 1084 1085static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, 1086 char *buf) 1087{ 1088 struct dme1737_data *data = dme1737_update_device(dev); 1089 struct sensor_device_attribute_2 1090 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 1091 int ix = sensor_attr_2->index; 1092 int fn = sensor_attr_2->nr; 1093 int res; 1094 1095 switch (fn) { 1096 case SYS_PWM: 1097 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) { 1098 res = 255; 1099 } else { 1100 res = data->pwm[ix]; 1101 } 1102 break; 1103 case SYS_PWM_FREQ: 1104 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]); 1105 break; 1106 case SYS_PWM_ENABLE: 1107 if (ix > 3) { 1108 res = 1; /* pwm[5-6] hard-wired to manual mode */ 1109 } else { 1110 res = PWM_EN_FROM_REG(data->pwm_config[ix]); 1111 } 1112 break; 1113 case SYS_PWM_RAMP_RATE: 1114 /* Only valid for pwm[1-3] */ 1115 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix); 1116 break; 1117 case SYS_PWM_AUTO_CHANNELS_ZONE: 1118 /* Only valid for pwm[1-3] */ 1119 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1120 res = PWM_ACZ_FROM_REG(data->pwm_config[ix]); 1121 } else { 1122 res = data->pwm_acz[ix]; 1123 } 1124 break; 1125 case SYS_PWM_AUTO_PWM_MIN: 1126 /* Only valid for pwm[1-3] */ 1127 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) { 1128 res = data->pwm_min[ix]; 1129 } else { 1130 res = 0; 1131 } 1132 break; 1133 case SYS_PWM_AUTO_POINT1_PWM: 1134 /* Only valid for pwm[1-3] */ 1135 res = data->pwm_min[ix]; 1136 break; 1137 case SYS_PWM_AUTO_POINT2_PWM: 1138 /* Only valid for pwm[1-3] */ 1139 res = 255; /* hard-wired */ 1140 break; 1141 default: 1142 res = 0; 1143 dev_dbg(dev, "Unknown function %d.\n", fn); 1144 } 1145 1146 return sprintf(buf, "%d\n", res); 1147} 1148 1149static struct attribute *dme1737_attr_pwm[]; 1150static void dme1737_chmod_file(struct device*, struct attribute*, mode_t); 1151 1152static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, 1153 const char *buf, size_t count) 1154{ 1155 struct dme1737_data *data = dev_get_drvdata(dev); 1156 struct i2c_client *client = &data->client; 1157 struct sensor_device_attribute_2 1158 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 1159 int ix = sensor_attr_2->index; 1160 int fn = sensor_attr_2->nr; 1161 long val = simple_strtol(buf, NULL, 10); 1162 1163 mutex_lock(&data->update_lock); 1164 switch (fn) { 1165 case SYS_PWM: 1166 data->pwm[ix] = SENSORS_LIMIT(val, 0, 255); 1167 dme1737_write(client, DME1737_REG_PWM(ix), data->pwm[ix]); 1168 break; 1169 case SYS_PWM_FREQ: 1170 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(client, 1171 DME1737_REG_PWM_FREQ(ix))); 1172 dme1737_write(client, DME1737_REG_PWM_FREQ(ix), 1173 data->pwm_freq[ix]); 1174 break; 1175 case SYS_PWM_ENABLE: 1176 /* Only valid for pwm[1-3] */ 1177 if (val < 0 || val > 2) { 1178 count = -EINVAL; 1179 dev_warn(dev, "PWM enable %ld not " 1180 "supported. Choose one of 0, 1, or 2.\n", 1181 val); 1182 goto exit; 1183 } 1184 /* Refresh the cache */ 1185 data->pwm_config[ix] = dme1737_read(client, 1186 DME1737_REG_PWM_CONFIG(ix)); 1187 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) { 1188 /* Bail out if no change */ 1189 goto exit; 1190 } 1191 /* Do some housekeeping if we are currently in auto mode */ 1192 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1193 /* Save the current zone channel assignment */ 1194 data->pwm_acz[ix] = PWM_ACZ_FROM_REG( 1195 data->pwm_config[ix]); 1196 /* Save the current ramp rate state and disable it */ 1197 data->pwm_rr[ix > 0] = dme1737_read(client, 1198 DME1737_REG_PWM_RR(ix > 0)); 1199 data->pwm_rr_en &= ~(1 << ix); 1200 if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) { 1201 data->pwm_rr_en |= (1 << ix); 1202 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix, 1203 data->pwm_rr[ix > 0]); 1204 dme1737_write(client, 1205 DME1737_REG_PWM_RR(ix > 0), 1206 data->pwm_rr[ix > 0]); 1207 } 1208 } 1209 /* Set the new PWM mode */ 1210 switch (val) { 1211 case 0: 1212 /* Change permissions of pwm[ix] to read-only */ 1213 dme1737_chmod_file(dev, dme1737_attr_pwm[ix], 1214 S_IRUGO); 1215 /* Turn fan fully on */ 1216 data->pwm_config[ix] = PWM_EN_TO_REG(0, 1217 data->pwm_config[ix]); 1218 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), 1219 data->pwm_config[ix]); 1220 break; 1221 case 1: 1222 /* Turn on manual mode */ 1223 data->pwm_config[ix] = PWM_EN_TO_REG(1, 1224 data->pwm_config[ix]); 1225 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), 1226 data->pwm_config[ix]); 1227 /* Change permissions of pwm[ix] to read-writeable */ 1228 dme1737_chmod_file(dev, dme1737_attr_pwm[ix], 1229 S_IRUGO | S_IWUSR); 1230 break; 1231 case 2: 1232 /* Change permissions of pwm[ix] to read-only */ 1233 dme1737_chmod_file(dev, dme1737_attr_pwm[ix], 1234 S_IRUGO); 1235 /* Turn on auto mode using the saved zone channel 1236 * assignment */ 1237 data->pwm_config[ix] = PWM_ACZ_TO_REG( 1238 data->pwm_acz[ix], 1239 data->pwm_config[ix]); 1240 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), 1241 data->pwm_config[ix]); 1242 /* Enable PWM ramp rate if previously enabled */ 1243 if (data->pwm_rr_en & (1 << ix)) { 1244 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix, 1245 dme1737_read(client, 1246 DME1737_REG_PWM_RR(ix > 0))); 1247 dme1737_write(client, 1248 DME1737_REG_PWM_RR(ix > 0), 1249 data->pwm_rr[ix > 0]); 1250 } 1251 break; 1252 } 1253 break; 1254 case SYS_PWM_RAMP_RATE: 1255 /* Only valid for pwm[1-3] */ 1256 /* Refresh the cache */ 1257 data->pwm_config[ix] = dme1737_read(client, 1258 DME1737_REG_PWM_CONFIG(ix)); 1259 data->pwm_rr[ix > 0] = dme1737_read(client, 1260 DME1737_REG_PWM_RR(ix > 0)); 1261 /* Set the ramp rate value */ 1262 if (val > 0) { 1263 data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix, 1264 data->pwm_rr[ix > 0]); 1265 } 1266 /* Enable/disable the feature only if the associated PWM 1267 * output is in automatic mode. */ 1268 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1269 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix, 1270 data->pwm_rr[ix > 0]); 1271 } 1272 dme1737_write(client, DME1737_REG_PWM_RR(ix > 0), 1273 data->pwm_rr[ix > 0]); 1274 break; 1275 case SYS_PWM_AUTO_CHANNELS_ZONE: 1276 /* Only valid for pwm[1-3] */ 1277 if (!(val == 1 || val == 2 || val == 4 || 1278 val == 6 || val == 7)) { 1279 count = -EINVAL; 1280 dev_warn(dev, "PWM auto channels zone %ld " 1281 "not supported. Choose one of 1, 2, 4, 6, " 1282 "or 7.\n", val); 1283 goto exit; 1284 } 1285 /* Refresh the cache */ 1286 data->pwm_config[ix] = dme1737_read(client, 1287 DME1737_REG_PWM_CONFIG(ix)); 1288 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1289 /* PWM is already in auto mode so update the temp 1290 * channel assignment */ 1291 data->pwm_config[ix] = PWM_ACZ_TO_REG(val, 1292 data->pwm_config[ix]); 1293 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), 1294 data->pwm_config[ix]); 1295 } else { 1296 /* PWM is not in auto mode so we save the temp 1297 * channel assignment for later use */ 1298 data->pwm_acz[ix] = val; 1299 } 1300 break; 1301 case SYS_PWM_AUTO_PWM_MIN: 1302 /* Only valid for pwm[1-3] */ 1303 /* Refresh the cache */ 1304 data->pwm_min[ix] = dme1737_read(client, 1305 DME1737_REG_PWM_MIN(ix)); 1306 /* There are only 2 values supported for the auto_pwm_min 1307 * value: 0 or auto_point1_pwm. So if the temperature drops 1308 * below the auto_point1_temp_hyst value, the fan either turns 1309 * off or runs at auto_point1_pwm duty-cycle. */ 1310 if (val > ((data->pwm_min[ix] + 1) / 2)) { 1311 data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix, 1312 dme1737_read(client, 1313 DME1737_REG_PWM_RR(0))); 1314 } else { 1315 data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix, 1316 dme1737_read(client, 1317 DME1737_REG_PWM_RR(0))); 1318 } 1319 dme1737_write(client, DME1737_REG_PWM_RR(0), 1320 data->pwm_rr[0]); 1321 break; 1322 case SYS_PWM_AUTO_POINT1_PWM: 1323 /* Only valid for pwm[1-3] */ 1324 data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255); 1325 dme1737_write(client, DME1737_REG_PWM_MIN(ix), 1326 data->pwm_min[ix]); 1327 break; 1328 default: 1329 dev_dbg(dev, "Unknown function %d.\n", fn); 1330 } 1331exit: 1332 mutex_unlock(&data->update_lock); 1333 1334 return count; 1335} 1336 1337/* --------------------------------------------------------------------- 1338 * Miscellaneous sysfs attributes 1339 * --------------------------------------------------------------------- */ 1340 1341static ssize_t show_vrm(struct device *dev, struct device_attribute *attr, 1342 char *buf) 1343{ 1344 struct i2c_client *client = to_i2c_client(dev); 1345 struct dme1737_data *data = i2c_get_clientdata(client); 1346 1347 return sprintf(buf, "%d\n", data->vrm); 1348} 1349 1350static ssize_t set_vrm(struct device *dev, struct device_attribute *attr, 1351 const char *buf, size_t count) 1352{ 1353 struct dme1737_data *data = dev_get_drvdata(dev); 1354 long val = simple_strtol(buf, NULL, 10); 1355 1356 data->vrm = val; 1357 return count; 1358} 1359 1360static ssize_t show_vid(struct device *dev, struct device_attribute *attr, 1361 char *buf) 1362{ 1363 struct dme1737_data *data = dme1737_update_device(dev); 1364 1365 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); 1366} 1367 1368static ssize_t show_name(struct device *dev, struct device_attribute *attr, 1369 char *buf) 1370{ 1371 struct dme1737_data *data = dev_get_drvdata(dev); 1372 1373 return sprintf(buf, "%s\n", data->client.name); 1374} 1375 1376/* --------------------------------------------------------------------- 1377 * Sysfs device attribute defines and structs 1378 * --------------------------------------------------------------------- */ 1379 1380/* Voltages 0-6 */ 1381 1382#define SENSOR_DEVICE_ATTR_IN(ix) \ 1383static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \ 1384 show_in, NULL, SYS_IN_INPUT, ix); \ 1385static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \ 1386 show_in, set_in, SYS_IN_MIN, ix); \ 1387static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \ 1388 show_in, set_in, SYS_IN_MAX, ix); \ 1389static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \ 1390 show_in, NULL, SYS_IN_ALARM, ix) 1391 1392SENSOR_DEVICE_ATTR_IN(0); 1393SENSOR_DEVICE_ATTR_IN(1); 1394SENSOR_DEVICE_ATTR_IN(2); 1395SENSOR_DEVICE_ATTR_IN(3); 1396SENSOR_DEVICE_ATTR_IN(4); 1397SENSOR_DEVICE_ATTR_IN(5); 1398SENSOR_DEVICE_ATTR_IN(6); 1399 1400/* Temperatures 1-3 */ 1401 1402#define SENSOR_DEVICE_ATTR_TEMP(ix) \ 1403static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \ 1404 show_temp, NULL, SYS_TEMP_INPUT, ix-1); \ 1405static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \ 1406 show_temp, set_temp, SYS_TEMP_MIN, ix-1); \ 1407static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \ 1408 show_temp, set_temp, SYS_TEMP_MAX, ix-1); \ 1409static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \ 1410 show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \ 1411static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \ 1412 show_temp, NULL, SYS_TEMP_ALARM, ix-1); \ 1413static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \ 1414 show_temp, NULL, SYS_TEMP_FAULT, ix-1) 1415 1416SENSOR_DEVICE_ATTR_TEMP(1); 1417SENSOR_DEVICE_ATTR_TEMP(2); 1418SENSOR_DEVICE_ATTR_TEMP(3); 1419 1420/* Zones 1-3 */ 1421 1422#define SENSOR_DEVICE_ATTR_ZONE(ix) \ 1423static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \ 1424 show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \ 1425static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \ 1426 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \ 1427static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \ 1428 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \ 1429static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \ 1430 show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \ 1431static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \ 1432 show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1) 1433 1434SENSOR_DEVICE_ATTR_ZONE(1); 1435SENSOR_DEVICE_ATTR_ZONE(2); 1436SENSOR_DEVICE_ATTR_ZONE(3); 1437 1438/* Fans 1-4 */ 1439 1440#define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \ 1441static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ 1442 show_fan, NULL, SYS_FAN_INPUT, ix-1); \ 1443static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ 1444 show_fan, set_fan, SYS_FAN_MIN, ix-1); \ 1445static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ 1446 show_fan, NULL, SYS_FAN_ALARM, ix-1); \ 1447static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \ 1448 show_fan, set_fan, SYS_FAN_TYPE, ix-1) 1449 1450SENSOR_DEVICE_ATTR_FAN_1TO4(1); 1451SENSOR_DEVICE_ATTR_FAN_1TO4(2); 1452SENSOR_DEVICE_ATTR_FAN_1TO4(3); 1453SENSOR_DEVICE_ATTR_FAN_1TO4(4); 1454 1455/* Fans 5-6 */ 1456 1457#define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \ 1458static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ 1459 show_fan, NULL, SYS_FAN_INPUT, ix-1); \ 1460static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ 1461 show_fan, set_fan, SYS_FAN_MIN, ix-1); \ 1462static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ 1463 show_fan, NULL, SYS_FAN_ALARM, ix-1); \ 1464static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \ 1465 show_fan, set_fan, SYS_FAN_MAX, ix-1) 1466 1467SENSOR_DEVICE_ATTR_FAN_5TO6(5); 1468SENSOR_DEVICE_ATTR_FAN_5TO6(6); 1469 1470/* PWMs 1-3 */ 1471 1472#define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \ 1473static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ 1474 show_pwm, set_pwm, SYS_PWM, ix-1); \ 1475static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ 1476 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ 1477static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ 1478 show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \ 1479static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \ 1480 show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \ 1481static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \ 1482 show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \ 1483static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \ 1484 show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \ 1485static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \ 1486 show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \ 1487static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \ 1488 show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1) 1489 1490SENSOR_DEVICE_ATTR_PWM_1TO3(1); 1491SENSOR_DEVICE_ATTR_PWM_1TO3(2); 1492SENSOR_DEVICE_ATTR_PWM_1TO3(3); 1493 1494/* PWMs 5-6 */ 1495 1496#define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \ 1497static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO | S_IWUSR, \ 1498 show_pwm, set_pwm, SYS_PWM, ix-1); \ 1499static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO | S_IWUSR, \ 1500 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ 1501static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ 1502 show_pwm, NULL, SYS_PWM_ENABLE, ix-1) 1503 1504SENSOR_DEVICE_ATTR_PWM_5TO6(5); 1505SENSOR_DEVICE_ATTR_PWM_5TO6(6); 1506 1507/* Misc */ 1508 1509static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm); 1510static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL); 1511static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */ 1512 1513#define SENSOR_DEV_ATTR_IN(ix) \ 1514&sensor_dev_attr_in##ix##_input.dev_attr.attr, \ 1515&sensor_dev_attr_in##ix##_min.dev_attr.attr, \ 1516&sensor_dev_attr_in##ix##_max.dev_attr.attr, \ 1517&sensor_dev_attr_in##ix##_alarm.dev_attr.attr 1518 1519/* These attributes are read-writeable only if the chip is *not* locked */ 1520#define SENSOR_DEV_ATTR_TEMP_LOCK(ix) \ 1521&sensor_dev_attr_temp##ix##_offset.dev_attr.attr 1522 1523#define SENSOR_DEV_ATTR_TEMP(ix) \ 1524SENSOR_DEV_ATTR_TEMP_LOCK(ix), \ 1525&sensor_dev_attr_temp##ix##_input.dev_attr.attr, \ 1526&sensor_dev_attr_temp##ix##_min.dev_attr.attr, \ 1527&sensor_dev_attr_temp##ix##_max.dev_attr.attr, \ 1528&sensor_dev_attr_temp##ix##_alarm.dev_attr.attr, \ 1529&sensor_dev_attr_temp##ix##_fault.dev_attr.attr 1530 1531/* These attributes are read-writeable only if the chip is *not* locked */ 1532#define SENSOR_DEV_ATTR_ZONE_LOCK(ix) \ 1533&sensor_dev_attr_zone##ix##_auto_point1_temp_hyst.dev_attr.attr, \ 1534&sensor_dev_attr_zone##ix##_auto_point1_temp.dev_attr.attr, \ 1535&sensor_dev_attr_zone##ix##_auto_point2_temp.dev_attr.attr, \ 1536&sensor_dev_attr_zone##ix##_auto_point3_temp.dev_attr.attr 1537 1538#define SENSOR_DEV_ATTR_ZONE(ix) \ 1539SENSOR_DEV_ATTR_ZONE_LOCK(ix), \ 1540&sensor_dev_attr_zone##ix##_auto_channels_temp.dev_attr.attr 1541 1542#define SENSOR_DEV_ATTR_FAN_1TO4(ix) \ 1543&sensor_dev_attr_fan##ix##_input.dev_attr.attr, \ 1544&sensor_dev_attr_fan##ix##_min.dev_attr.attr, \ 1545&sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \ 1546&sensor_dev_attr_fan##ix##_type.dev_attr.attr 1547 1548#define SENSOR_DEV_ATTR_FAN_5TO6(ix) \ 1549&sensor_dev_attr_fan##ix##_input.dev_attr.attr, \ 1550&sensor_dev_attr_fan##ix##_min.dev_attr.attr, \ 1551&sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \ 1552&sensor_dev_attr_fan##ix##_max.dev_attr.attr 1553 1554/* These attributes are read-writeable only if the chip is *not* locked */ 1555#define SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix) \ 1556&sensor_dev_attr_pwm##ix##_freq.dev_attr.attr, \ 1557&sensor_dev_attr_pwm##ix##_enable.dev_attr.attr, \ 1558&sensor_dev_attr_pwm##ix##_ramp_rate.dev_attr.attr, \ 1559&sensor_dev_attr_pwm##ix##_auto_channels_zone.dev_attr.attr, \ 1560&sensor_dev_attr_pwm##ix##_auto_pwm_min.dev_attr.attr, \ 1561&sensor_dev_attr_pwm##ix##_auto_point1_pwm.dev_attr.attr 1562 1563#define SENSOR_DEV_ATTR_PWM_1TO3(ix) \ 1564SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix), \ 1565&sensor_dev_attr_pwm##ix.dev_attr.attr, \ 1566&sensor_dev_attr_pwm##ix##_auto_point2_pwm.dev_attr.attr 1567 1568/* These attributes are read-writeable only if the chip is *not* locked */ 1569#define SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix) \ 1570&sensor_dev_attr_pwm##ix.dev_attr.attr, \ 1571&sensor_dev_attr_pwm##ix##_freq.dev_attr.attr 1572 1573#define SENSOR_DEV_ATTR_PWM_5TO6(ix) \ 1574SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix), \ 1575&sensor_dev_attr_pwm##ix##_enable.dev_attr.attr 1576 1577/* This struct holds all the attributes that are always present and need to be 1578 * created unconditionally. The attributes that need modification of their 1579 * permissions are created read-only and write permissions are added or removed 1580 * on the fly when required */ 1581static struct attribute *dme1737_attr[] ={ 1582 /* Voltages */ 1583 SENSOR_DEV_ATTR_IN(0), 1584 SENSOR_DEV_ATTR_IN(1), 1585 SENSOR_DEV_ATTR_IN(2), 1586 SENSOR_DEV_ATTR_IN(3), 1587 SENSOR_DEV_ATTR_IN(4), 1588 SENSOR_DEV_ATTR_IN(5), 1589 SENSOR_DEV_ATTR_IN(6), 1590 /* Temperatures */ 1591 SENSOR_DEV_ATTR_TEMP(1), 1592 SENSOR_DEV_ATTR_TEMP(2), 1593 SENSOR_DEV_ATTR_TEMP(3), 1594 /* Zones */ 1595 SENSOR_DEV_ATTR_ZONE(1), 1596 SENSOR_DEV_ATTR_ZONE(2), 1597 SENSOR_DEV_ATTR_ZONE(3), 1598 /* Misc */ 1599 &dev_attr_vrm.attr, 1600 &dev_attr_cpu0_vid.attr, 1601 NULL 1602}; 1603 1604static const struct attribute_group dme1737_group = { 1605 .attrs = dme1737_attr, 1606}; 1607 1608/* The following structs hold the PWM attributes, some of which are optional. 1609 * Their creation depends on the chip configuration which is determined during 1610 * module load. */ 1611static struct attribute *dme1737_attr_pwm1[] = { 1612 SENSOR_DEV_ATTR_PWM_1TO3(1), 1613 NULL 1614}; 1615static struct attribute *dme1737_attr_pwm2[] = { 1616 SENSOR_DEV_ATTR_PWM_1TO3(2), 1617 NULL 1618}; 1619static struct attribute *dme1737_attr_pwm3[] = { 1620 SENSOR_DEV_ATTR_PWM_1TO3(3), 1621 NULL 1622}; 1623static struct attribute *dme1737_attr_pwm5[] = { 1624 SENSOR_DEV_ATTR_PWM_5TO6(5), 1625 NULL 1626}; 1627static struct attribute *dme1737_attr_pwm6[] = { 1628 SENSOR_DEV_ATTR_PWM_5TO6(6), 1629 NULL 1630}; 1631 1632static const struct attribute_group dme1737_pwm_group[] = { 1633 { .attrs = dme1737_attr_pwm1 }, 1634 { .attrs = dme1737_attr_pwm2 }, 1635 { .attrs = dme1737_attr_pwm3 }, 1636 { .attrs = NULL }, 1637 { .attrs = dme1737_attr_pwm5 }, 1638 { .attrs = dme1737_attr_pwm6 }, 1639}; 1640 1641/* The following structs hold the fan attributes, some of which are optional. 1642 * Their creation depends on the chip configuration which is determined during 1643 * module load. */ 1644static struct attribute *dme1737_attr_fan1[] = { 1645 SENSOR_DEV_ATTR_FAN_1TO4(1), 1646 NULL 1647}; 1648static struct attribute *dme1737_attr_fan2[] = { 1649 SENSOR_DEV_ATTR_FAN_1TO4(2), 1650 NULL 1651}; 1652static struct attribute *dme1737_attr_fan3[] = { 1653 SENSOR_DEV_ATTR_FAN_1TO4(3), 1654 NULL 1655}; 1656static struct attribute *dme1737_attr_fan4[] = { 1657 SENSOR_DEV_ATTR_FAN_1TO4(4), 1658 NULL 1659}; 1660static struct attribute *dme1737_attr_fan5[] = { 1661 SENSOR_DEV_ATTR_FAN_5TO6(5), 1662 NULL 1663}; 1664static struct attribute *dme1737_attr_fan6[] = { 1665 SENSOR_DEV_ATTR_FAN_5TO6(6), 1666 NULL 1667}; 1668 1669static const struct attribute_group dme1737_fan_group[] = { 1670 { .attrs = dme1737_attr_fan1 }, 1671 { .attrs = dme1737_attr_fan2 }, 1672 { .attrs = dme1737_attr_fan3 }, 1673 { .attrs = dme1737_attr_fan4 }, 1674 { .attrs = dme1737_attr_fan5 }, 1675 { .attrs = dme1737_attr_fan6 }, 1676}; 1677 1678/* The permissions of all of the following attributes are changed to read- 1679 * writeable if the chip is *not* locked. Otherwise they stay read-only. */ 1680static struct attribute *dme1737_attr_lock[] = { 1681 /* Temperatures */ 1682 SENSOR_DEV_ATTR_TEMP_LOCK(1), 1683 SENSOR_DEV_ATTR_TEMP_LOCK(2), 1684 SENSOR_DEV_ATTR_TEMP_LOCK(3), 1685 /* Zones */ 1686 SENSOR_DEV_ATTR_ZONE_LOCK(1), 1687 SENSOR_DEV_ATTR_ZONE_LOCK(2), 1688 SENSOR_DEV_ATTR_ZONE_LOCK(3), 1689 NULL 1690}; 1691 1692static const struct attribute_group dme1737_lock_group = { 1693 .attrs = dme1737_attr_lock, 1694}; 1695 1696/* The permissions of the following PWM attributes are changed to read- 1697 * writeable if the chip is *not* locked and the respective PWM is available. 1698 * Otherwise they stay read-only. */ 1699static struct attribute *dme1737_attr_pwm1_lock[] = { 1700 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(1), 1701 NULL 1702}; 1703static struct attribute *dme1737_attr_pwm2_lock[] = { 1704 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(2), 1705 NULL 1706}; 1707static struct attribute *dme1737_attr_pwm3_lock[] = { 1708 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(3), 1709 NULL 1710}; 1711static struct attribute *dme1737_attr_pwm5_lock[] = { 1712 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(5), 1713 NULL 1714}; 1715static struct attribute *dme1737_attr_pwm6_lock[] = { 1716 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(6), 1717 NULL 1718}; 1719 1720static const struct attribute_group dme1737_pwm_lock_group[] = { 1721 { .attrs = dme1737_attr_pwm1_lock }, 1722 { .attrs = dme1737_attr_pwm2_lock }, 1723 { .attrs = dme1737_attr_pwm3_lock }, 1724 { .attrs = NULL }, 1725 { .attrs = dme1737_attr_pwm5_lock }, 1726 { .attrs = dme1737_attr_pwm6_lock }, 1727}; 1728 1729/* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the 1730 * chip is not locked. Otherwise they are read-only. */ 1731static struct attribute *dme1737_attr_pwm[] = { 1732 &sensor_dev_attr_pwm1.dev_attr.attr, 1733 &sensor_dev_attr_pwm2.dev_attr.attr, 1734 &sensor_dev_attr_pwm3.dev_attr.attr, 1735}; 1736 1737/* --------------------------------------------------------------------- 1738 * Super-IO functions 1739 * --------------------------------------------------------------------- */ 1740 1741static inline void dme1737_sio_enter(int sio_cip) 1742{ 1743 outb(0x55, sio_cip); 1744} 1745 1746static inline void dme1737_sio_exit(int sio_cip) 1747{ 1748 outb(0xaa, sio_cip); 1749} 1750 1751static inline int dme1737_sio_inb(int sio_cip, int reg) 1752{ 1753 outb(reg, sio_cip); 1754 return inb(sio_cip + 1); 1755} 1756 1757static inline void dme1737_sio_outb(int sio_cip, int reg, int val) 1758{ 1759 outb(reg, sio_cip); 1760 outb(val, sio_cip + 1); 1761} 1762 1763/* --------------------------------------------------------------------- 1764 * Device initialization 1765 * --------------------------------------------------------------------- */ 1766 1767static int dme1737_i2c_get_features(int, struct dme1737_data*); 1768 1769static void dme1737_chmod_file(struct device *dev, 1770 struct attribute *attr, mode_t mode) 1771{ 1772 if (sysfs_chmod_file(&dev->kobj, attr, mode)) { 1773 dev_warn(dev, "Failed to change permissions of %s.\n", 1774 attr->name); 1775 } 1776} 1777 1778static void dme1737_chmod_group(struct device *dev, 1779 const struct attribute_group *group, 1780 mode_t mode) 1781{ 1782 struct attribute **attr; 1783 1784 for (attr = group->attrs; *attr; attr++) { 1785 dme1737_chmod_file(dev, *attr, mode); 1786 } 1787} 1788 1789static void dme1737_remove_files(struct device *dev) 1790{ 1791 struct dme1737_data *data = dev_get_drvdata(dev); 1792 int ix; 1793 1794 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { 1795 if (data->has_fan & (1 << ix)) { 1796 sysfs_remove_group(&dev->kobj, 1797 &dme1737_fan_group[ix]); 1798 } 1799 } 1800 1801 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { 1802 if (data->has_pwm & (1 << ix)) { 1803 sysfs_remove_group(&dev->kobj, 1804 &dme1737_pwm_group[ix]); 1805 } 1806 } 1807 1808 sysfs_remove_group(&dev->kobj, &dme1737_group); 1809 1810 if (!data->client.driver) { 1811 sysfs_remove_file(&dev->kobj, &dev_attr_name.attr); 1812 } 1813} 1814 1815static int dme1737_create_files(struct device *dev) 1816{ 1817 struct dme1737_data *data = dev_get_drvdata(dev); 1818 int err, ix; 1819 1820 /* Create a name attribute for ISA devices */ 1821 if (!data->client.driver && 1822 (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) { 1823 goto exit; 1824 } 1825 1826 /* Create standard sysfs attributes */ 1827 if ((err = sysfs_create_group(&dev->kobj, &dme1737_group))) { 1828 goto exit_remove; 1829 } 1830 1831 /* Create fan sysfs attributes */ 1832 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { 1833 if (data->has_fan & (1 << ix)) { 1834 if ((err = sysfs_create_group(&dev->kobj, 1835 &dme1737_fan_group[ix]))) { 1836 goto exit_remove; 1837 } 1838 } 1839 } 1840 1841 /* Create PWM sysfs attributes */ 1842 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { 1843 if (data->has_pwm & (1 << ix)) { 1844 if ((err = sysfs_create_group(&dev->kobj, 1845 &dme1737_pwm_group[ix]))) { 1846 goto exit_remove; 1847 } 1848 } 1849 } 1850 1851 /* Inform if the device is locked. Otherwise change the permissions of 1852 * selected attributes from read-only to read-writeable. */ 1853 if (data->config & 0x02) { 1854 dev_info(dev, "Device is locked. Some attributes " 1855 "will be read-only.\n"); 1856 } else { 1857 /* Change permissions of standard attributes */ 1858 dme1737_chmod_group(dev, &dme1737_lock_group, 1859 S_IRUGO | S_IWUSR); 1860 1861 /* Change permissions of PWM attributes */ 1862 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_lock_group); ix++) { 1863 if (data->has_pwm & (1 << ix)) { 1864 dme1737_chmod_group(dev, 1865 &dme1737_pwm_lock_group[ix], 1866 S_IRUGO | S_IWUSR); 1867 } 1868 } 1869 1870 /* Change permissions of pwm[1-3] if in manual mode */ 1871 for (ix = 0; ix < 3; ix++) { 1872 if ((data->has_pwm & (1 << ix)) && 1873 (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) { 1874 dme1737_chmod_file(dev, 1875 dme1737_attr_pwm[ix], 1876 S_IRUGO | S_IWUSR); 1877 } 1878 } 1879 } 1880 1881 return 0; 1882 1883exit_remove: 1884 dme1737_remove_files(dev); 1885exit: 1886 return err; 1887} 1888 1889static int dme1737_init_device(struct device *dev) 1890{ 1891 struct dme1737_data *data = dev_get_drvdata(dev); 1892 struct i2c_client *client = &data->client; 1893 int ix; 1894 u8 reg; 1895 1896 data->config = dme1737_read(client, DME1737_REG_CONFIG); 1897 /* Inform if part is not monitoring/started */ 1898 if (!(data->config & 0x01)) { 1899 if (!force_start) { 1900 dev_err(dev, "Device is not monitoring. " 1901 "Use the force_start load parameter to " 1902 "override.\n"); 1903 return -EFAULT; 1904 } 1905 1906 /* Force monitoring */ 1907 data->config |= 0x01; 1908 dme1737_write(client, DME1737_REG_CONFIG, data->config); 1909 } 1910 /* Inform if part is not ready */ 1911 if (!(data->config & 0x04)) { 1912 dev_err(dev, "Device is not ready.\n"); 1913 return -EFAULT; 1914 } 1915 1916 /* Determine which optional fan and pwm features are enabled/present */ 1917 if (client->driver) { /* I2C chip */ 1918 data->config2 = dme1737_read(client, DME1737_REG_CONFIG2); 1919 /* Check if optional fan3 input is enabled */ 1920 if (data->config2 & 0x04) { 1921 data->has_fan |= (1 << 2); 1922 } 1923 1924 /* Fan4 and pwm3 are only available if the client's I2C address 1925 * is the default 0x2e. Otherwise the I/Os associated with 1926 * these functions are used for addr enable/select. */ 1927 if (data->client.addr == 0x2e) { 1928 data->has_fan |= (1 << 3); 1929 data->has_pwm |= (1 << 2); 1930 } 1931 1932 /* Determine which of the optional fan[5-6] and pwm[5-6] 1933 * features are enabled. For this, we need to query the runtime 1934 * registers through the Super-IO LPC interface. Try both 1935 * config ports 0x2e and 0x4e. */ 1936 if (dme1737_i2c_get_features(0x2e, data) && 1937 dme1737_i2c_get_features(0x4e, data)) { 1938 dev_warn(dev, "Failed to query Super-IO for optional " 1939 "features.\n"); 1940 } 1941 } else { /* ISA chip */ 1942 /* Fan3 and pwm3 are always available. Fan[4-5] and pwm[5-6] 1943 * don't exist in the ISA chip. */ 1944 data->has_fan |= (1 << 2); 1945 data->has_pwm |= (1 << 2); 1946 } 1947 1948 /* Fan1, fan2, pwm1, and pwm2 are always present */ 1949 data->has_fan |= 0x03; 1950 data->has_pwm |= 0x03; 1951 1952 dev_info(dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, " 1953 "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n", 1954 (data->has_pwm & (1 << 2)) ? "yes" : "no", 1955 (data->has_pwm & (1 << 4)) ? "yes" : "no", 1956 (data->has_pwm & (1 << 5)) ? "yes" : "no", 1957 (data->has_fan & (1 << 2)) ? "yes" : "no", 1958 (data->has_fan & (1 << 3)) ? "yes" : "no", 1959 (data->has_fan & (1 << 4)) ? "yes" : "no", 1960 (data->has_fan & (1 << 5)) ? "yes" : "no"); 1961 1962 reg = dme1737_read(client, DME1737_REG_TACH_PWM); 1963 /* Inform if fan-to-pwm mapping differs from the default */ 1964 if (client->driver && reg != 0xa4) { /* I2C chip */ 1965 dev_warn(dev, "Non-standard fan to pwm mapping: " 1966 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, " 1967 "fan4->pwm%d. Please report to the driver " 1968 "maintainer.\n", 1969 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, 1970 ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1); 1971 } else if (!client->driver && reg != 0x24) { /* ISA chip */ 1972 dev_warn(dev, "Non-standard fan to pwm mapping: " 1973 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. " 1974 "Please report to the driver maintainer.\n", 1975 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, 1976 ((reg >> 4) & 0x03) + 1); 1977 } 1978 1979 /* Switch pwm[1-3] to manual mode if they are currently disabled and 1980 * set the duty-cycles to 0% (which is identical to the PWMs being 1981 * disabled). */ 1982 if (!(data->config & 0x02)) { 1983 for (ix = 0; ix < 3; ix++) { 1984 data->pwm_config[ix] = dme1737_read(client, 1985 DME1737_REG_PWM_CONFIG(ix)); 1986 if ((data->has_pwm & (1 << ix)) && 1987 (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) { 1988 dev_info(dev, "Switching pwm%d to " 1989 "manual mode.\n", ix + 1); 1990 data->pwm_config[ix] = PWM_EN_TO_REG(1, 1991 data->pwm_config[ix]); 1992 dme1737_write(client, DME1737_REG_PWM(ix), 0); 1993 dme1737_write(client, 1994 DME1737_REG_PWM_CONFIG(ix), 1995 data->pwm_config[ix]); 1996 } 1997 } 1998 } 1999 2000 /* Initialize the default PWM auto channels zone (acz) assignments */ 2001 data->pwm_acz[0] = 1; /* pwm1 -> zone1 */ 2002 data->pwm_acz[1] = 2; /* pwm2 -> zone2 */ 2003 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ 2004 2005 /* Set VRM */ 2006 data->vrm = vid_which_vrm(); 2007 2008 return 0; 2009} 2010 2011/* --------------------------------------------------------------------- 2012 * I2C device detection and registration 2013 * --------------------------------------------------------------------- */ 2014 2015static struct i2c_driver dme1737_i2c_driver; 2016 2017static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data) 2018{ 2019 int err = 0, reg; 2020 u16 addr; 2021 2022 dme1737_sio_enter(sio_cip); 2023 2024 /* Check device ID 2025 * The DME1737 can return either 0x78 or 0x77 as its device ID. */ 2026 reg = dme1737_sio_inb(sio_cip, 0x20); 2027 if (!(reg == 0x77 || reg == 0x78)) { 2028 err = -ENODEV; 2029 goto exit; 2030 } 2031 2032 /* Select logical device A (runtime registers) */ 2033 dme1737_sio_outb(sio_cip, 0x07, 0x0a); 2034 2035 /* Get the base address of the runtime registers */ 2036 if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | 2037 dme1737_sio_inb(sio_cip, 0x61))) { 2038 err = -ENODEV; 2039 goto exit; 2040 } 2041 2042 /* Read the runtime registers to determine which optional features 2043 * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set 2044 * to '10' if the respective feature is enabled. */ 2045 if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */ 2046 data->has_fan |= (1 << 5); 2047 } 2048 if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */ 2049 data->has_pwm |= (1 << 5); 2050 } 2051 if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */ 2052 data->has_fan |= (1 << 4); 2053 } 2054 if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */ 2055 data->has_pwm |= (1 << 4); 2056 } 2057 2058exit: 2059 dme1737_sio_exit(sio_cip); 2060 2061 return err; 2062} 2063 2064static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address, 2065 int kind) 2066{ 2067 u8 company, verstep = 0; 2068 struct i2c_client *client; 2069 struct dme1737_data *data; 2070 struct device *dev; 2071 int err = 0; 2072 const char *name; 2073 2074 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { 2075 goto exit; 2076 } 2077 2078 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) { 2079 err = -ENOMEM; 2080 goto exit; 2081 } 2082 2083 client = &data->client; 2084 i2c_set_clientdata(client, data); 2085 client->addr = address; 2086 client->adapter = adapter; 2087 client->driver = &dme1737_i2c_driver; 2088 dev = &client->dev; 2089 2090 /* A negative kind means that the driver was loaded with no force 2091 * parameter (default), so we must identify the chip. */ 2092 if (kind < 0) { 2093 company = dme1737_read(client, DME1737_REG_COMPANY); 2094 verstep = dme1737_read(client, DME1737_REG_VERSTEP); 2095 2096 if (!((company == DME1737_COMPANY_SMSC) && 2097 ((verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP))) { 2098 err = -ENODEV; 2099 goto exit_kfree; 2100 } 2101 } 2102 2103 kind = dme1737; 2104 name = "dme1737"; 2105 2106 /* Fill in the remaining client fields and put it into the global 2107 * list */ 2108 strlcpy(client->name, name, I2C_NAME_SIZE); 2109 mutex_init(&data->update_lock); 2110 2111 /* Tell the I2C layer a new client has arrived */ 2112 if ((err = i2c_attach_client(client))) { 2113 goto exit_kfree; 2114 } 2115 2116 dev_info(dev, "Found a DME1737 chip at 0x%02x (rev 0x%02x).\n", 2117 client->addr, verstep); 2118 2119 /* Initialize the DME1737 chip */ 2120 if ((err = dme1737_init_device(dev))) { 2121 dev_err(dev, "Failed to initialize device.\n"); 2122 goto exit_detach; 2123 } 2124 2125 /* Create sysfs files */ 2126 if ((err = dme1737_create_files(dev))) { 2127 dev_err(dev, "Failed to create sysfs files.\n"); 2128 goto exit_detach; 2129 } 2130 2131 /* Register device */ 2132 data->hwmon_dev = hwmon_device_register(dev); 2133 if (IS_ERR(data->hwmon_dev)) { 2134 dev_err(dev, "Failed to register device.\n"); 2135 err = PTR_ERR(data->hwmon_dev); 2136 goto exit_remove; 2137 } 2138 2139 return 0; 2140 2141exit_remove: 2142 dme1737_remove_files(dev); 2143exit_detach: 2144 i2c_detach_client(client); 2145exit_kfree: 2146 kfree(data); 2147exit: 2148 return err; 2149} 2150 2151static int dme1737_i2c_attach_adapter(struct i2c_adapter *adapter) 2152{ 2153 if (!(adapter->class & I2C_CLASS_HWMON)) { 2154 return 0; 2155 } 2156 2157 return i2c_probe(adapter, &addr_data, dme1737_i2c_detect); 2158} 2159 2160static int dme1737_i2c_detach_client(struct i2c_client *client) 2161{ 2162 struct dme1737_data *data = i2c_get_clientdata(client); 2163 int err; 2164 2165 hwmon_device_unregister(data->hwmon_dev); 2166 dme1737_remove_files(&client->dev); 2167 2168 if ((err = i2c_detach_client(client))) { 2169 return err; 2170 } 2171 2172 kfree(data); 2173 return 0; 2174} 2175 2176static struct i2c_driver dme1737_i2c_driver = { 2177 .driver = { 2178 .name = "dme1737", 2179 }, 2180 .attach_adapter = dme1737_i2c_attach_adapter, 2181 .detach_client = dme1737_i2c_detach_client, 2182}; 2183 2184/* --------------------------------------------------------------------- 2185 * ISA device detection and registration 2186 * --------------------------------------------------------------------- */ 2187 2188static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr) 2189{ 2190 int err = 0, reg; 2191 unsigned short base_addr; 2192 2193 dme1737_sio_enter(sio_cip); 2194 2195 /* Check device ID 2196 * We currently know about SCH3112 (0x7c), SCH3114 (0x7d), and 2197 * SCH3116 (0x7f). */ 2198 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); 2199 if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) { 2200 err = -ENODEV; 2201 goto exit; 2202 } 2203 2204 /* Select logical device A (runtime registers) */ 2205 dme1737_sio_outb(sio_cip, 0x07, 0x0a); 2206 2207 /* Get the base address of the runtime registers */ 2208 if (!(base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | 2209 dme1737_sio_inb(sio_cip, 0x61))) { 2210 printk(KERN_ERR "dme1737: Base address not set.\n"); 2211 err = -ENODEV; 2212 goto exit; 2213 } 2214 2215 /* Access to the hwmon registers is through an index/data register 2216 * pair located at offset 0x70/0x71. */ 2217 *addr = base_addr + 0x70; 2218 2219exit: 2220 dme1737_sio_exit(sio_cip); 2221 return err; 2222} 2223 2224static int __init dme1737_isa_device_add(unsigned short addr) 2225{ 2226 struct resource res = { 2227 .start = addr, 2228 .end = addr + DME1737_EXTENT - 1, 2229 .name = "dme1737", 2230 .flags = IORESOURCE_IO, 2231 }; 2232 int err; 2233 2234 if (!(pdev = platform_device_alloc("dme1737", addr))) { 2235 printk(KERN_ERR "dme1737: Failed to allocate device.\n"); 2236 err = -ENOMEM; 2237 goto exit; 2238 } 2239 2240 if ((err = platform_device_add_resources(pdev, &res, 1))) { 2241 printk(KERN_ERR "dme1737: Failed to add device resource " 2242 "(err = %d).\n", err); 2243 goto exit_device_put; 2244 } 2245 2246 if ((err = platform_device_add(pdev))) { 2247 printk(KERN_ERR "dme1737: Failed to add device (err = %d).\n", 2248 err); 2249 goto exit_device_put; 2250 } 2251 2252 return 0; 2253 2254exit_device_put: 2255 platform_device_put(pdev); 2256 pdev = NULL; 2257exit: 2258 return err; 2259} 2260 2261static int __devinit dme1737_isa_probe(struct platform_device *pdev) 2262{ 2263 u8 company, device; 2264 struct resource *res; 2265 struct i2c_client *client; 2266 struct dme1737_data *data; 2267 struct device *dev = &pdev->dev; 2268 int err; 2269 2270 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 2271 if (!request_region(res->start, DME1737_EXTENT, "dme1737")) { 2272 dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n", 2273 (unsigned short)res->start, 2274 (unsigned short)res->start + DME1737_EXTENT - 1); 2275 err = -EBUSY; 2276 goto exit; 2277 } 2278 2279 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) { 2280 err = -ENOMEM; 2281 goto exit_release_region; 2282 } 2283 2284 client = &data->client; 2285 i2c_set_clientdata(client, data); 2286 client->addr = res->start; 2287 platform_set_drvdata(pdev, data); 2288 2289 company = dme1737_read(client, DME1737_REG_COMPANY); 2290 device = dme1737_read(client, DME1737_REG_DEVICE); 2291 2292 if (!((company == DME1737_COMPANY_SMSC) && 2293 (device == SCH311X_DEVICE))) { 2294 err = -ENODEV; 2295 goto exit_kfree; 2296 } 2297 2298 /* Fill in the remaining client fields and initialize the mutex */ 2299 strlcpy(client->name, "sch311x", I2C_NAME_SIZE); 2300 mutex_init(&data->update_lock); 2301 2302 dev_info(dev, "Found a SCH311x chip at 0x%04x\n", client->addr); 2303 2304 /* Initialize the chip */ 2305 if ((err = dme1737_init_device(dev))) { 2306 dev_err(dev, "Failed to initialize device.\n"); 2307 goto exit_kfree; 2308 } 2309 2310 /* Create sysfs files */ 2311 if ((err = dme1737_create_files(dev))) { 2312 dev_err(dev, "Failed to create sysfs files.\n"); 2313 goto exit_kfree; 2314 } 2315 2316 /* Register device */ 2317 data->hwmon_dev = hwmon_device_register(dev); 2318 if (IS_ERR(data->hwmon_dev)) { 2319 dev_err(dev, "Failed to register device.\n"); 2320 err = PTR_ERR(data->hwmon_dev); 2321 goto exit_remove_files; 2322 } 2323 2324 return 0; 2325 2326exit_remove_files: 2327 dme1737_remove_files(dev); 2328exit_kfree: 2329 platform_set_drvdata(pdev, NULL); 2330 kfree(data); 2331exit_release_region: 2332 release_region(res->start, DME1737_EXTENT); 2333exit: 2334 return err; 2335} 2336 2337static int __devexit dme1737_isa_remove(struct platform_device *pdev) 2338{ 2339 struct dme1737_data *data = platform_get_drvdata(pdev); 2340 2341 hwmon_device_unregister(data->hwmon_dev); 2342 dme1737_remove_files(&pdev->dev); 2343 release_region(data->client.addr, DME1737_EXTENT); 2344 platform_set_drvdata(pdev, NULL); 2345 kfree(data); 2346 2347 return 0; 2348} 2349 2350static struct platform_driver dme1737_isa_driver = { 2351 .driver = { 2352 .owner = THIS_MODULE, 2353 .name = "dme1737", 2354 }, 2355 .probe = dme1737_isa_probe, 2356 .remove = __devexit_p(dme1737_isa_remove), 2357}; 2358 2359/* --------------------------------------------------------------------- 2360 * Module initialization and cleanup 2361 * --------------------------------------------------------------------- */ 2362 2363static int __init dme1737_init(void) 2364{ 2365 int err; 2366 unsigned short addr; 2367 2368 if ((err = i2c_add_driver(&dme1737_i2c_driver))) { 2369 goto exit; 2370 } 2371 2372 if (dme1737_isa_detect(0x2e, &addr) && 2373 dme1737_isa_detect(0x4e, &addr)) { 2374 /* Return 0 if we didn't find an ISA device */ 2375 return 0; 2376 } 2377 2378 if ((err = platform_driver_register(&dme1737_isa_driver))) { 2379 goto exit_del_i2c_driver; 2380 } 2381 2382 /* Sets global pdev as a side effect */ 2383 if ((err = dme1737_isa_device_add(addr))) { 2384 goto exit_del_isa_driver; 2385 } 2386 2387 return 0; 2388 2389exit_del_isa_driver: 2390 platform_driver_unregister(&dme1737_isa_driver); 2391exit_del_i2c_driver: 2392 i2c_del_driver(&dme1737_i2c_driver); 2393exit: 2394 return err; 2395} 2396 2397static void __exit dme1737_exit(void) 2398{ 2399 if (pdev) { 2400 platform_device_unregister(pdev); 2401 platform_driver_unregister(&dme1737_isa_driver); 2402 } 2403 2404 i2c_del_driver(&dme1737_i2c_driver); 2405} 2406 2407MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>"); 2408MODULE_DESCRIPTION("DME1737 sensors"); 2409MODULE_LICENSE("GPL"); 2410 2411module_init(dme1737_init); 2412module_exit(dme1737_exit); 2413