w83795.c revision 0e256018b0f35d1b22ca37e1d0e207f7ba3d0076
1/* 2 * w83795.c - Linux kernel driver for hardware monitoring 3 * Copyright (C) 2008 Nuvoton Technology Corp. 4 * Wei Song 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation - version 2. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 18 * 02110-1301 USA. 19 * 20 * Supports following chips: 21 * 22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA 23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no 24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no 25 */ 26 27#include <linux/kernel.h> 28#include <linux/module.h> 29#include <linux/init.h> 30#include <linux/slab.h> 31#include <linux/i2c.h> 32#include <linux/hwmon.h> 33#include <linux/hwmon-sysfs.h> 34#include <linux/err.h> 35#include <linux/mutex.h> 36#include <linux/delay.h> 37 38/* Addresses to scan */ 39static const unsigned short normal_i2c[] = { 40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END 41}; 42 43 44static int reset; 45module_param(reset, bool, 0); 46MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); 47 48 49#define W83795_REG_BANKSEL 0x00 50#define W83795_REG_VENDORID 0xfd 51#define W83795_REG_CHIPID 0xfe 52#define W83795_REG_DEVICEID 0xfb 53#define W83795_REG_DEVICEID_A 0xff 54 55#define W83795_REG_I2C_ADDR 0xfc 56#define W83795_REG_CONFIG 0x01 57#define W83795_REG_CONFIG_CONFIG48 0x04 58#define W83795_REG_CONFIG_START 0x01 59 60/* Multi-Function Pin Ctrl Registers */ 61#define W83795_REG_VOLT_CTRL1 0x02 62#define W83795_REG_VOLT_CTRL2 0x03 63#define W83795_REG_TEMP_CTRL1 0x04 64#define W83795_REG_TEMP_CTRL2 0x05 65#define W83795_REG_FANIN_CTRL1 0x06 66#define W83795_REG_FANIN_CTRL2 0x07 67#define W83795_REG_VMIGB_CTRL 0x08 68 69#define TEMP_CTRL_DISABLE 0 70#define TEMP_CTRL_TD 1 71#define TEMP_CTRL_VSEN 2 72#define TEMP_CTRL_TR 3 73#define TEMP_CTRL_SHIFT 4 74#define TEMP_CTRL_HASIN_SHIFT 5 75/* temp mode may effect VSEN17-12 (in20-15) */ 76static const u16 W83795_REG_TEMP_CTRL[][6] = { 77 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */ 78 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */ 79 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */ 80 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */ 81 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */ 82 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */ 83 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */ 84}; 85 86#define TEMP_READ 0 87#define TEMP_CRIT 1 88#define TEMP_CRIT_HYST 2 89#define TEMP_WARN 3 90#define TEMP_WARN_HYST 4 91/* only crit and crit_hyst affect real-time alarm status 92 * current crit crit_hyst warn warn_hyst */ 93static const u16 W83795_REG_TEMP[][5] = { 94 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */ 95 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */ 96 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */ 97 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */ 98 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */ 99 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */ 100}; 101 102#define IN_READ 0 103#define IN_MAX 1 104#define IN_LOW 2 105static const u16 W83795_REG_IN[][3] = { 106 /* Current, HL, LL */ 107 {0x10, 0x70, 0x71}, /* VSEN1 */ 108 {0x11, 0x72, 0x73}, /* VSEN2 */ 109 {0x12, 0x74, 0x75}, /* VSEN3 */ 110 {0x13, 0x76, 0x77}, /* VSEN4 */ 111 {0x14, 0x78, 0x79}, /* VSEN5 */ 112 {0x15, 0x7a, 0x7b}, /* VSEN6 */ 113 {0x16, 0x7c, 0x7d}, /* VSEN7 */ 114 {0x17, 0x7e, 0x7f}, /* VSEN8 */ 115 {0x18, 0x80, 0x81}, /* VSEN9 */ 116 {0x19, 0x82, 0x83}, /* VSEN10 */ 117 {0x1A, 0x84, 0x85}, /* VSEN11 */ 118 {0x1B, 0x86, 0x87}, /* VTT */ 119 {0x1C, 0x88, 0x89}, /* 3VDD */ 120 {0x1D, 0x8a, 0x8b}, /* 3VSB */ 121 {0x1E, 0x8c, 0x8d}, /* VBAT */ 122 {0x1F, 0xa6, 0xa7}, /* VSEN12 */ 123 {0x20, 0xaa, 0xab}, /* VSEN13 */ 124 {0x21, 0x96, 0x97}, /* VSEN14 */ 125 {0x22, 0x9a, 0x9b}, /* VSEN15 */ 126 {0x23, 0x9e, 0x9f}, /* VSEN16 */ 127 {0x24, 0xa2, 0xa3}, /* VSEN17 */ 128}; 129#define W83795_REG_VRLSB 0x3C 130#define VRLSB_SHIFT 6 131 132static const u8 W83795_REG_IN_HL_LSB[] = { 133 0x8e, /* VSEN1-4 */ 134 0x90, /* VSEN5-8 */ 135 0x92, /* VSEN9-11 */ 136 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */ 137 0xa8, /* VSEN12 */ 138 0xac, /* VSEN13 */ 139 0x98, /* VSEN14 */ 140 0x9c, /* VSEN15 */ 141 0xa0, /* VSEN16 */ 142 0xa4, /* VSEN17 */ 143}; 144 145#define IN_LSB_REG(index, type) \ 146 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \ 147 : (W83795_REG_IN_HL_LSB[(index)] + 1)) 148 149#define IN_LSB_REG_NUM 10 150 151#define IN_LSB_SHIFT 0 152#define IN_LSB_IDX 1 153static const u8 IN_LSB_SHIFT_IDX[][2] = { 154 /* High/Low LSB shift, LSB No. */ 155 {0x00, 0x00}, /* VSEN1 */ 156 {0x02, 0x00}, /* VSEN2 */ 157 {0x04, 0x00}, /* VSEN3 */ 158 {0x06, 0x00}, /* VSEN4 */ 159 {0x00, 0x01}, /* VSEN5 */ 160 {0x02, 0x01}, /* VSEN6 */ 161 {0x04, 0x01}, /* VSEN7 */ 162 {0x06, 0x01}, /* VSEN8 */ 163 {0x00, 0x02}, /* VSEN9 */ 164 {0x02, 0x02}, /* VSEN10 */ 165 {0x04, 0x02}, /* VSEN11 */ 166 {0x00, 0x03}, /* VTT */ 167 {0x02, 0x03}, /* 3VDD */ 168 {0x04, 0x03}, /* 3VSB */ 169 {0x06, 0x03}, /* VBAT */ 170 {0x06, 0x04}, /* VSEN12 */ 171 {0x06, 0x05}, /* VSEN13 */ 172 {0x06, 0x06}, /* VSEN14 */ 173 {0x06, 0x07}, /* VSEN15 */ 174 {0x06, 0x08}, /* VSEN16 */ 175 {0x06, 0x09}, /* VSEN17 */ 176}; 177 178 179/* 3VDD, 3VSB, VBAT * 0.006 */ 180#define REST_VLT_BEGIN 12 /* the 13th volt to 15th */ 181#define REST_VLT_END 14 /* the 13th volt to 15th */ 182 183#define W83795_REG_FAN(index) (0x2E + (index)) 184#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index)) 185#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2) 186#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \ 187 (((index) % 1) ? 4 : 0) 188 189#define W83795_REG_VID_CTRL 0x6A 190 191#define ALARM_BEEP_REG_NUM 6 192#define W83795_REG_ALARM(index) (0x41 + (index)) 193#define W83795_REG_BEEP(index) (0x50 + (index)) 194 195#define W83795_REG_CLR_CHASSIS 0x4D 196 197 198#define W83795_REG_TEMP_NUM 6 199#define W83795_REG_FCMS1 0x201 200#define W83795_REG_FCMS2 0x208 201#define W83795_REG_TFMR(index) (0x202 + (index)) 202#define W83795_REG_FOMC 0x20F 203#define W83795_REG_FOPFP(index) (0x218 + (index)) 204 205#define W83795_REG_TSS(index) (0x209 + (index)) 206 207#define PWM_OUTPUT 0 208#define PWM_START 1 209#define PWM_NONSTOP 2 210#define PWM_STOP_TIME 3 211#define PWM_DIV 4 212#define W83795_REG_PWM(index, nr) \ 213 (((nr) == 0 ? 0x210 : \ 214 (nr) == 1 ? 0x220 : \ 215 (nr) == 2 ? 0x228 : \ 216 (nr) == 3 ? 0x230 : 0x218) + (index)) 217 218#define W83795_REG_FOPFP_DIV(index) \ 219 (((index) < 8) ? ((index) + 1) : \ 220 ((index) == 8) ? 12 : \ 221 (16 << ((index) - 9))) 222 223#define W83795_REG_FTSH(index) (0x240 + (index) * 2) 224#define W83795_REG_FTSL(index) (0x241 + (index) * 2) 225#define W83795_REG_TFTS 0x250 226 227#define TEMP_PWM_TTTI 0 228#define TEMP_PWM_CTFS 1 229#define TEMP_PWM_HCT 2 230#define TEMP_PWM_HOT 3 231#define W83795_REG_TTTI(index) (0x260 + (index)) 232#define W83795_REG_CTFS(index) (0x268 + (index)) 233#define W83795_REG_HT(index) (0x270 + (index)) 234 235#define SF4_TEMP 0 236#define SF4_PWM 1 237#define W83795_REG_SF4_TEMP(temp_num, index) \ 238 (0x280 + 0x10 * (temp_num) + (index)) 239#define W83795_REG_SF4_PWM(temp_num, index) \ 240 (0x288 + 0x10 * (temp_num) + (index)) 241 242#define W83795_REG_DTSC 0x301 243#define W83795_REG_DTSE 0x302 244#define W83795_REG_DTS(index) (0x26 + (index)) 245 246#define DTS_CRIT 0 247#define DTS_CRIT_HYST 1 248#define DTS_WARN 2 249#define DTS_WARN_HYST 3 250#define W83795_REG_DTS_EXT(index) (0xB2 + (index)) 251 252#define SETUP_PWM_DEFAULT 0 253#define SETUP_PWM_UPTIME 1 254#define SETUP_PWM_DOWNTIME 2 255#define W83795_REG_SETUP_PWM(index) (0x20C + (index)) 256 257static inline u16 in_from_reg(u8 index, u16 val) 258{ 259 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END)) 260 return val * 6; 261 else 262 return val * 2; 263} 264 265static inline u16 in_to_reg(u8 index, u16 val) 266{ 267 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END)) 268 return val / 6; 269 else 270 return val / 2; 271} 272 273static inline unsigned long fan_from_reg(u16 val) 274{ 275 if ((val == 0xfff) || (val == 0)) 276 return 0; 277 return 1350000UL / val; 278} 279 280static inline u16 fan_to_reg(long rpm) 281{ 282 if (rpm <= 0) 283 return 0x0fff; 284 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); 285} 286 287static inline unsigned long time_from_reg(u8 reg) 288{ 289 return reg * 100; 290} 291 292static inline u8 time_to_reg(unsigned long val) 293{ 294 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff); 295} 296 297static inline long temp_from_reg(s8 reg) 298{ 299 return reg * 1000; 300} 301 302static inline s8 temp_to_reg(long val, s8 min, s8 max) 303{ 304 return SENSORS_LIMIT((val < 0 ? -val : val) / 1000, min, max); 305} 306 307 308enum chip_types {w83795g, w83795adg}; 309 310struct w83795_data { 311 struct device *hwmon_dev; 312 struct mutex update_lock; 313 unsigned long last_updated; /* In jiffies */ 314 enum chip_types chip_type; 315 316 u8 bank; 317 318 u32 has_in; /* Enable monitor VIN or not */ 319 u8 has_dyn_in; /* Only in2-0 can have this */ 320 u16 in[21][3]; /* Register value, read/high/low */ 321 u8 in_lsb[10][3]; /* LSB Register value, high/low */ 322 u8 has_gain; /* has gain: in17-20 * 8 */ 323 324 u16 has_fan; /* Enable fan14-1 or not */ 325 u16 fan[14]; /* Register value combine */ 326 u16 fan_min[14]; /* Register value combine */ 327 328 u8 has_temp; /* Enable monitor temp6-1 or not */ 329 u8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */ 330 u8 temp_read_vrlsb[6]; 331 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */ 332 u8 temp_src[3]; /* Register value */ 333 334 u8 enable_dts; /* Enable PECI and SB-TSI, 335 * bit 0: =1 enable, =0 disable, 336 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */ 337 u8 has_dts; /* Enable monitor DTS temp */ 338 u8 dts[8]; /* Register value */ 339 u8 dts_read_vrlsb[8]; /* Register value */ 340 u8 dts_ext[4]; /* Register value */ 341 342 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2, 343 * no config register, only affected by chip 344 * type */ 345 u8 pwm[8][5]; /* Register value, output, start, non stop, stop 346 * time, div */ 347 u8 pwm_fcms[2]; /* Register value */ 348 u8 pwm_tfmr[6]; /* Register value */ 349 u8 pwm_fomc; /* Register value */ 350 351 u16 target_speed[8]; /* Register value, target speed for speed 352 * cruise */ 353 u8 tol_speed; /* tolerance of target speed */ 354 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */ 355 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */ 356 357 u8 setup_pwm[3]; /* Register value */ 358 359 u8 alarms[6]; /* Register value */ 360 u8 beeps[6]; /* Register value */ 361 u8 beep_enable; 362 363 char valid; 364}; 365 366/* 367 * Hardware access 368 * We assume that nobdody can change the bank outside the driver. 369 */ 370 371/* Must be called with data->update_lock held, except during initialization */ 372static int w83795_set_bank(struct i2c_client *client, u8 bank) 373{ 374 struct w83795_data *data = i2c_get_clientdata(client); 375 int err; 376 377 /* If the same bank is already set, nothing to do */ 378 if ((data->bank & 0x07) == bank) 379 return 0; 380 381 /* Change to new bank, preserve all other bits */ 382 bank |= data->bank & ~0x07; 383 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank); 384 if (err < 0) { 385 dev_err(&client->dev, 386 "Failed to set bank to %d, err %d\n", 387 (int)bank, err); 388 return err; 389 } 390 data->bank = bank; 391 392 return 0; 393} 394 395/* Must be called with data->update_lock held, except during initialization */ 396static u8 w83795_read(struct i2c_client *client, u16 reg) 397{ 398 int err; 399 400 err = w83795_set_bank(client, reg >> 8); 401 if (err < 0) 402 return 0x00; /* Arbitrary */ 403 404 err = i2c_smbus_read_byte_data(client, reg & 0xff); 405 if (err < 0) { 406 dev_err(&client->dev, 407 "Failed to read from register 0x%03x, err %d\n", 408 (int)reg, err); 409 return 0x00; /* Arbitrary */ 410 } 411 return err; 412} 413 414/* Must be called with data->update_lock held, except during initialization */ 415static int w83795_write(struct i2c_client *client, u16 reg, u8 value) 416{ 417 int err; 418 419 err = w83795_set_bank(client, reg >> 8); 420 if (err < 0) 421 return err; 422 423 err = i2c_smbus_write_byte_data(client, reg & 0xff, value); 424 if (err < 0) 425 dev_err(&client->dev, 426 "Failed to write to register 0x%03x, err %d\n", 427 (int)reg, err); 428 return err; 429} 430 431static struct w83795_data *w83795_update_device(struct device *dev) 432{ 433 struct i2c_client *client = to_i2c_client(dev); 434 struct w83795_data *data = i2c_get_clientdata(client); 435 u16 tmp; 436 int i; 437 438 mutex_lock(&data->update_lock); 439 440 if (!(time_after(jiffies, data->last_updated + HZ * 2) 441 || !data->valid)) 442 goto END; 443 444 /* Update the voltages value */ 445 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 446 if (!(data->has_in & (1 << i))) 447 continue; 448 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 449 tmp |= (w83795_read(client, W83795_REG_VRLSB) 450 >> VRLSB_SHIFT) & 0x03; 451 data->in[i][IN_READ] = tmp; 452 } 453 454 /* in0-2 can have dynamic limits (W83795G only) */ 455 if (data->has_dyn_in) { 456 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX)); 457 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW)); 458 459 for (i = 0; i < 3; i++) { 460 if (!(data->has_dyn_in & (1 << i))) 461 continue; 462 data->in[i][IN_MAX] = 463 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 464 data->in[i][IN_LOW] = 465 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 466 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03; 467 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03; 468 } 469 } 470 471 /* Update fan */ 472 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 473 if (!(data->has_fan & (1 << i))) 474 continue; 475 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 476 data->fan[i] |= 477 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F; 478 } 479 480 /* Update temperature */ 481 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 482 /* even stop monitor, register still keep value, just read out 483 * it */ 484 if (!(data->has_temp & (1 << i))) { 485 data->temp[i][TEMP_READ] = 0; 486 data->temp_read_vrlsb[i] = 0; 487 continue; 488 } 489 data->temp[i][TEMP_READ] = 490 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 491 data->temp_read_vrlsb[i] = 492 w83795_read(client, W83795_REG_VRLSB); 493 } 494 495 /* Update dts temperature */ 496 if (data->enable_dts != 0) { 497 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 498 if (!(data->has_dts & (1 << i))) 499 continue; 500 data->dts[i] = 501 w83795_read(client, W83795_REG_DTS(i)); 502 data->dts_read_vrlsb[i] = 503 w83795_read(client, W83795_REG_VRLSB); 504 } 505 } 506 507 /* Update pwm output */ 508 for (i = 0; i < data->has_pwm; i++) { 509 data->pwm[i][PWM_OUTPUT] = 510 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT)); 511 } 512 513 /* update alarm */ 514 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) 515 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 516 517 data->last_updated = jiffies; 518 data->valid = 1; 519 520END: 521 mutex_unlock(&data->update_lock); 522 return data; 523} 524 525/* 526 * Sysfs attributes 527 */ 528 529#define ALARM_STATUS 0 530#define BEEP_ENABLE 1 531static ssize_t 532show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) 533{ 534 struct w83795_data *data = w83795_update_device(dev); 535 struct sensor_device_attribute_2 *sensor_attr = 536 to_sensor_dev_attr_2(attr); 537 int nr = sensor_attr->nr; 538 int index = sensor_attr->index >> 3; 539 int bit = sensor_attr->index & 0x07; 540 u8 val; 541 542 if (ALARM_STATUS == nr) { 543 val = (data->alarms[index] >> (bit)) & 1; 544 } else { /* BEEP_ENABLE */ 545 val = (data->beeps[index] >> (bit)) & 1; 546 } 547 548 return sprintf(buf, "%u\n", val); 549} 550 551static ssize_t 552store_beep(struct device *dev, struct device_attribute *attr, 553 const char *buf, size_t count) 554{ 555 struct i2c_client *client = to_i2c_client(dev); 556 struct w83795_data *data = i2c_get_clientdata(client); 557 struct sensor_device_attribute_2 *sensor_attr = 558 to_sensor_dev_attr_2(attr); 559 int index = sensor_attr->index >> 3; 560 int shift = sensor_attr->index & 0x07; 561 u8 beep_bit = 1 << shift; 562 unsigned long val; 563 564 if (strict_strtoul(buf, 10, &val) < 0) 565 return -EINVAL; 566 if (val != 0 && val != 1) 567 return -EINVAL; 568 569 mutex_lock(&data->update_lock); 570 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index)); 571 data->beeps[index] &= ~beep_bit; 572 data->beeps[index] |= val << shift; 573 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]); 574 mutex_unlock(&data->update_lock); 575 576 return count; 577} 578 579static ssize_t 580show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf) 581{ 582 struct i2c_client *client = to_i2c_client(dev); 583 struct w83795_data *data = i2c_get_clientdata(client); 584 return sprintf(buf, "%u\n", data->beep_enable); 585} 586 587static ssize_t 588store_beep_enable(struct device *dev, struct device_attribute *attr, 589 const char *buf, size_t count) 590{ 591 struct i2c_client *client = to_i2c_client(dev); 592 struct w83795_data *data = i2c_get_clientdata(client); 593 unsigned long val; 594 u8 tmp; 595 596 if (strict_strtoul(buf, 10, &val) < 0) 597 return -EINVAL; 598 if (val != 0 && val != 1) 599 return -EINVAL; 600 601 mutex_lock(&data->update_lock); 602 data->beep_enable = val; 603 tmp = w83795_read(client, W83795_REG_BEEP(5)); 604 tmp &= 0x7f; 605 tmp |= val << 7; 606 w83795_write(client, W83795_REG_BEEP(5), tmp); 607 mutex_unlock(&data->update_lock); 608 609 return count; 610} 611 612/* Write any value to clear chassis alarm */ 613static ssize_t 614store_chassis_clear(struct device *dev, 615 struct device_attribute *attr, const char *buf, 616 size_t count) 617{ 618 struct i2c_client *client = to_i2c_client(dev); 619 struct w83795_data *data = i2c_get_clientdata(client); 620 u8 val; 621 622 mutex_lock(&data->update_lock); 623 val = w83795_read(client, W83795_REG_CLR_CHASSIS); 624 val |= 0x80; 625 w83795_write(client, W83795_REG_CLR_CHASSIS, val); 626 mutex_unlock(&data->update_lock); 627 return count; 628} 629 630#define FAN_INPUT 0 631#define FAN_MIN 1 632static ssize_t 633show_fan(struct device *dev, struct device_attribute *attr, char *buf) 634{ 635 struct sensor_device_attribute_2 *sensor_attr = 636 to_sensor_dev_attr_2(attr); 637 int nr = sensor_attr->nr; 638 int index = sensor_attr->index; 639 struct w83795_data *data = w83795_update_device(dev); 640 u16 val; 641 642 if (FAN_INPUT == nr) 643 val = data->fan[index] & 0x0fff; 644 else 645 val = data->fan_min[index] & 0x0fff; 646 647 return sprintf(buf, "%lu\n", fan_from_reg(val)); 648} 649 650static ssize_t 651store_fan_min(struct device *dev, struct device_attribute *attr, 652 const char *buf, size_t count) 653{ 654 struct sensor_device_attribute_2 *sensor_attr = 655 to_sensor_dev_attr_2(attr); 656 int index = sensor_attr->index; 657 struct i2c_client *client = to_i2c_client(dev); 658 struct w83795_data *data = i2c_get_clientdata(client); 659 unsigned long val; 660 661 if (strict_strtoul(buf, 10, &val)) 662 return -EINVAL; 663 val = fan_to_reg(val); 664 665 mutex_lock(&data->update_lock); 666 data->fan_min[index] = val; 667 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff); 668 val &= 0x0f; 669 if (index % 1) { 670 val <<= 4; 671 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 672 & 0x0f; 673 } else { 674 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 675 & 0xf0; 676 } 677 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff); 678 mutex_unlock(&data->update_lock); 679 680 return count; 681} 682 683static ssize_t 684show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 685{ 686 struct w83795_data *data = w83795_update_device(dev); 687 struct sensor_device_attribute_2 *sensor_attr = 688 to_sensor_dev_attr_2(attr); 689 int nr = sensor_attr->nr; 690 int index = sensor_attr->index; 691 u16 val; 692 693 switch (nr) { 694 case PWM_STOP_TIME: 695 val = time_from_reg(data->pwm[index][nr]); 696 break; 697 case PWM_DIV: 698 val = W83795_REG_FOPFP_DIV(data->pwm[index][nr] & 0x0f); 699 break; 700 default: 701 val = data->pwm[index][nr]; 702 break; 703 } 704 705 return sprintf(buf, "%u\n", val); 706} 707 708static ssize_t 709store_pwm(struct device *dev, struct device_attribute *attr, 710 const char *buf, size_t count) 711{ 712 struct i2c_client *client = to_i2c_client(dev); 713 struct w83795_data *data = i2c_get_clientdata(client); 714 struct sensor_device_attribute_2 *sensor_attr = 715 to_sensor_dev_attr_2(attr); 716 int nr = sensor_attr->nr; 717 int index = sensor_attr->index; 718 unsigned long val; 719 int i; 720 721 if (strict_strtoul(buf, 10, &val) < 0) 722 return -EINVAL; 723 724 mutex_lock(&data->update_lock); 725 switch (nr) { 726 case PWM_STOP_TIME: 727 val = time_to_reg(val); 728 break; 729 case PWM_DIV: 730 for (i = 0; i < 16; i++) { 731 if (W83795_REG_FOPFP_DIV(i) == val) { 732 val = i; 733 break; 734 } 735 } 736 if (i >= 16) 737 goto err_end; 738 val |= w83795_read(client, W83795_REG_PWM(index, nr)) & 0x80; 739 break; 740 default: 741 val = SENSORS_LIMIT(val, 0, 0xff); 742 break; 743 } 744 w83795_write(client, W83795_REG_PWM(index, nr), val); 745 data->pwm[index][nr] = val & 0xff; 746 mutex_unlock(&data->update_lock); 747 return count; 748err_end: 749 mutex_unlock(&data->update_lock); 750 return -EINVAL; 751} 752 753static ssize_t 754show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 755{ 756 struct sensor_device_attribute_2 *sensor_attr = 757 to_sensor_dev_attr_2(attr); 758 struct i2c_client *client = to_i2c_client(dev); 759 struct w83795_data *data = i2c_get_clientdata(client); 760 int index = sensor_attr->index; 761 u8 tmp; 762 763 if (1 == (data->pwm_fcms[0] & (1 << index))) { 764 tmp = 2; 765 goto out; 766 } 767 for (tmp = 0; tmp < 6; tmp++) { 768 if (data->pwm_tfmr[tmp] & (1 << index)) { 769 tmp = 3; 770 goto out; 771 } 772 } 773 if (data->pwm_fomc & (1 << index)) 774 tmp = 0; 775 else 776 tmp = 1; 777 778out: 779 return sprintf(buf, "%u\n", tmp); 780} 781 782static ssize_t 783store_pwm_enable(struct device *dev, struct device_attribute *attr, 784 const char *buf, size_t count) 785{ 786 struct i2c_client *client = to_i2c_client(dev); 787 struct w83795_data *data = i2c_get_clientdata(client); 788 struct sensor_device_attribute_2 *sensor_attr = 789 to_sensor_dev_attr_2(attr); 790 int index = sensor_attr->index; 791 unsigned long val; 792 int i; 793 794 if (strict_strtoul(buf, 10, &val) < 0) 795 return -EINVAL; 796 if (val > 2) 797 return -EINVAL; 798 799 mutex_lock(&data->update_lock); 800 switch (val) { 801 case 0: 802 case 1: 803 data->pwm_fcms[0] &= ~(1 << index); 804 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 805 for (i = 0; i < 6; i++) { 806 data->pwm_tfmr[i] &= ~(1 << index); 807 w83795_write(client, W83795_REG_TFMR(i), 808 data->pwm_tfmr[i]); 809 } 810 data->pwm_fomc |= 1 << index; 811 data->pwm_fomc ^= val << index; 812 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc); 813 break; 814 case 2: 815 data->pwm_fcms[0] |= (1 << index); 816 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 817 break; 818 } 819 mutex_unlock(&data->update_lock); 820 return count; 821} 822 823static ssize_t 824show_temp_src(struct device *dev, struct device_attribute *attr, char *buf) 825{ 826 struct sensor_device_attribute_2 *sensor_attr = 827 to_sensor_dev_attr_2(attr); 828 struct i2c_client *client = to_i2c_client(dev); 829 struct w83795_data *data = i2c_get_clientdata(client); 830 int index = sensor_attr->index; 831 u8 val = index / 2; 832 u8 tmp = data->temp_src[val]; 833 834 if (index % 1) 835 val = 4; 836 else 837 val = 0; 838 tmp >>= val; 839 tmp &= 0x0f; 840 841 return sprintf(buf, "%u\n", tmp); 842} 843 844static ssize_t 845store_temp_src(struct device *dev, struct device_attribute *attr, 846 const char *buf, size_t count) 847{ 848 struct i2c_client *client = to_i2c_client(dev); 849 struct w83795_data *data = i2c_get_clientdata(client); 850 struct sensor_device_attribute_2 *sensor_attr = 851 to_sensor_dev_attr_2(attr); 852 int index = sensor_attr->index; 853 unsigned long tmp; 854 u8 val = index / 2; 855 856 if (strict_strtoul(buf, 10, &tmp) < 0) 857 return -EINVAL; 858 tmp = SENSORS_LIMIT(tmp, 0, 15); 859 860 mutex_lock(&data->update_lock); 861 if (index % 1) { 862 tmp <<= 4; 863 data->temp_src[val] &= 0x0f; 864 } else { 865 data->temp_src[val] &= 0xf0; 866 } 867 data->temp_src[val] |= tmp; 868 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]); 869 mutex_unlock(&data->update_lock); 870 871 return count; 872} 873 874#define TEMP_PWM_ENABLE 0 875#define TEMP_PWM_FAN_MAP 1 876static ssize_t 877show_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 878 char *buf) 879{ 880 struct i2c_client *client = to_i2c_client(dev); 881 struct w83795_data *data = i2c_get_clientdata(client); 882 struct sensor_device_attribute_2 *sensor_attr = 883 to_sensor_dev_attr_2(attr); 884 int nr = sensor_attr->nr; 885 int index = sensor_attr->index; 886 u8 tmp = 0xff; 887 888 switch (nr) { 889 case TEMP_PWM_ENABLE: 890 tmp = (data->pwm_fcms[1] >> index) & 1; 891 if (tmp) 892 tmp = 4; 893 else 894 tmp = 3; 895 break; 896 case TEMP_PWM_FAN_MAP: 897 tmp = data->pwm_tfmr[index]; 898 break; 899 } 900 901 return sprintf(buf, "%u\n", tmp); 902} 903 904static ssize_t 905store_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 906 const char *buf, size_t count) 907{ 908 struct i2c_client *client = to_i2c_client(dev); 909 struct w83795_data *data = i2c_get_clientdata(client); 910 struct sensor_device_attribute_2 *sensor_attr = 911 to_sensor_dev_attr_2(attr); 912 int nr = sensor_attr->nr; 913 int index = sensor_attr->index; 914 unsigned long tmp; 915 916 if (strict_strtoul(buf, 10, &tmp) < 0) 917 return -EINVAL; 918 919 switch (nr) { 920 case TEMP_PWM_ENABLE: 921 if ((tmp != 3) && (tmp != 4)) 922 return -EINVAL; 923 tmp -= 3; 924 mutex_lock(&data->update_lock); 925 data->pwm_fcms[1] &= ~(1 << index); 926 data->pwm_fcms[1] |= tmp << index; 927 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]); 928 mutex_unlock(&data->update_lock); 929 break; 930 case TEMP_PWM_FAN_MAP: 931 mutex_lock(&data->update_lock); 932 tmp = SENSORS_LIMIT(tmp, 0, 0xff); 933 w83795_write(client, W83795_REG_TFMR(index), tmp); 934 data->pwm_tfmr[index] = tmp; 935 mutex_unlock(&data->update_lock); 936 break; 937 } 938 return count; 939} 940 941#define FANIN_TARGET 0 942#define FANIN_TOL 1 943static ssize_t 944show_fanin(struct device *dev, struct device_attribute *attr, char *buf) 945{ 946 struct i2c_client *client = to_i2c_client(dev); 947 struct w83795_data *data = i2c_get_clientdata(client); 948 struct sensor_device_attribute_2 *sensor_attr = 949 to_sensor_dev_attr_2(attr); 950 int nr = sensor_attr->nr; 951 int index = sensor_attr->index; 952 u16 tmp = 0; 953 954 switch (nr) { 955 case FANIN_TARGET: 956 tmp = fan_from_reg(data->target_speed[index]); 957 break; 958 case FANIN_TOL: 959 tmp = data->tol_speed; 960 break; 961 } 962 963 return sprintf(buf, "%u\n", tmp); 964} 965 966static ssize_t 967store_fanin(struct device *dev, struct device_attribute *attr, 968 const char *buf, size_t count) 969{ 970 struct i2c_client *client = to_i2c_client(dev); 971 struct w83795_data *data = i2c_get_clientdata(client); 972 struct sensor_device_attribute_2 *sensor_attr = 973 to_sensor_dev_attr_2(attr); 974 int nr = sensor_attr->nr; 975 int index = sensor_attr->index; 976 unsigned long val; 977 978 if (strict_strtoul(buf, 10, &val) < 0) 979 return -EINVAL; 980 981 mutex_lock(&data->update_lock); 982 switch (nr) { 983 case FANIN_TARGET: 984 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff)); 985 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff); 986 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0); 987 data->target_speed[index] = val; 988 break; 989 case FANIN_TOL: 990 val = SENSORS_LIMIT(val, 0, 0x3f); 991 w83795_write(client, W83795_REG_TFTS, val); 992 data->tol_speed = val; 993 break; 994 } 995 mutex_unlock(&data->update_lock); 996 997 return count; 998} 999 1000 1001static ssize_t 1002show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1003{ 1004 struct i2c_client *client = to_i2c_client(dev); 1005 struct w83795_data *data = i2c_get_clientdata(client); 1006 struct sensor_device_attribute_2 *sensor_attr = 1007 to_sensor_dev_attr_2(attr); 1008 int nr = sensor_attr->nr; 1009 int index = sensor_attr->index; 1010 long tmp = temp_from_reg(data->pwm_temp[index][nr]); 1011 1012 return sprintf(buf, "%ld\n", tmp); 1013} 1014 1015static ssize_t 1016store_temp_pwm(struct device *dev, struct device_attribute *attr, 1017 const char *buf, size_t count) 1018{ 1019 struct i2c_client *client = to_i2c_client(dev); 1020 struct w83795_data *data = i2c_get_clientdata(client); 1021 struct sensor_device_attribute_2 *sensor_attr = 1022 to_sensor_dev_attr_2(attr); 1023 int nr = sensor_attr->nr; 1024 int index = sensor_attr->index; 1025 unsigned long val; 1026 u8 tmp; 1027 1028 if (strict_strtoul(buf, 10, &val) < 0) 1029 return -EINVAL; 1030 val /= 1000; 1031 1032 mutex_lock(&data->update_lock); 1033 switch (nr) { 1034 case TEMP_PWM_TTTI: 1035 val = SENSORS_LIMIT(val, 0, 0x7f); 1036 w83795_write(client, W83795_REG_TTTI(index), val); 1037 break; 1038 case TEMP_PWM_CTFS: 1039 val = SENSORS_LIMIT(val, 0, 0x7f); 1040 w83795_write(client, W83795_REG_CTFS(index), val); 1041 break; 1042 case TEMP_PWM_HCT: 1043 val = SENSORS_LIMIT(val, 0, 0x0f); 1044 tmp = w83795_read(client, W83795_REG_HT(index)); 1045 tmp &= 0x0f; 1046 tmp |= (val << 4) & 0xf0; 1047 w83795_write(client, W83795_REG_HT(index), tmp); 1048 break; 1049 case TEMP_PWM_HOT: 1050 val = SENSORS_LIMIT(val, 0, 0x0f); 1051 tmp = w83795_read(client, W83795_REG_HT(index)); 1052 tmp &= 0xf0; 1053 tmp |= val & 0x0f; 1054 w83795_write(client, W83795_REG_HT(index), tmp); 1055 break; 1056 } 1057 data->pwm_temp[index][nr] = val; 1058 mutex_unlock(&data->update_lock); 1059 1060 return count; 1061} 1062 1063static ssize_t 1064show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1065{ 1066 struct i2c_client *client = to_i2c_client(dev); 1067 struct w83795_data *data = i2c_get_clientdata(client); 1068 struct sensor_device_attribute_2 *sensor_attr = 1069 to_sensor_dev_attr_2(attr); 1070 int nr = sensor_attr->nr; 1071 int index = sensor_attr->index; 1072 1073 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]); 1074} 1075 1076static ssize_t 1077store_sf4_pwm(struct device *dev, struct device_attribute *attr, 1078 const char *buf, size_t count) 1079{ 1080 struct i2c_client *client = to_i2c_client(dev); 1081 struct w83795_data *data = i2c_get_clientdata(client); 1082 struct sensor_device_attribute_2 *sensor_attr = 1083 to_sensor_dev_attr_2(attr); 1084 int nr = sensor_attr->nr; 1085 int index = sensor_attr->index; 1086 unsigned long val; 1087 1088 if (strict_strtoul(buf, 10, &val) < 0) 1089 return -EINVAL; 1090 1091 mutex_lock(&data->update_lock); 1092 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val); 1093 data->sf4_reg[index][SF4_PWM][nr] = val; 1094 mutex_unlock(&data->update_lock); 1095 1096 return count; 1097} 1098 1099static ssize_t 1100show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf) 1101{ 1102 struct i2c_client *client = to_i2c_client(dev); 1103 struct w83795_data *data = i2c_get_clientdata(client); 1104 struct sensor_device_attribute_2 *sensor_attr = 1105 to_sensor_dev_attr_2(attr); 1106 int nr = sensor_attr->nr; 1107 int index = sensor_attr->index; 1108 1109 return sprintf(buf, "%u\n", 1110 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000); 1111} 1112 1113static ssize_t 1114store_sf4_temp(struct device *dev, struct device_attribute *attr, 1115 const char *buf, size_t count) 1116{ 1117 struct i2c_client *client = to_i2c_client(dev); 1118 struct w83795_data *data = i2c_get_clientdata(client); 1119 struct sensor_device_attribute_2 *sensor_attr = 1120 to_sensor_dev_attr_2(attr); 1121 int nr = sensor_attr->nr; 1122 int index = sensor_attr->index; 1123 unsigned long val; 1124 1125 if (strict_strtoul(buf, 10, &val) < 0) 1126 return -EINVAL; 1127 val /= 1000; 1128 1129 mutex_lock(&data->update_lock); 1130 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val); 1131 data->sf4_reg[index][SF4_TEMP][nr] = val; 1132 mutex_unlock(&data->update_lock); 1133 1134 return count; 1135} 1136 1137 1138static ssize_t 1139show_temp(struct device *dev, struct device_attribute *attr, char *buf) 1140{ 1141 struct sensor_device_attribute_2 *sensor_attr = 1142 to_sensor_dev_attr_2(attr); 1143 int nr = sensor_attr->nr; 1144 int index = sensor_attr->index; 1145 struct w83795_data *data = w83795_update_device(dev); 1146 long temp = temp_from_reg(data->temp[index][nr] & 0x7f); 1147 1148 if (TEMP_READ == nr) 1149 temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) 1150 * 250; 1151 if (data->temp[index][nr] & 0x80) 1152 temp = -temp; 1153 return sprintf(buf, "%ld\n", temp); 1154} 1155 1156static ssize_t 1157store_temp(struct device *dev, struct device_attribute *attr, 1158 const char *buf, size_t count) 1159{ 1160 struct sensor_device_attribute_2 *sensor_attr = 1161 to_sensor_dev_attr_2(attr); 1162 int nr = sensor_attr->nr; 1163 int index = sensor_attr->index; 1164 struct i2c_client *client = to_i2c_client(dev); 1165 struct w83795_data *data = i2c_get_clientdata(client); 1166 long tmp; 1167 1168 if (strict_strtol(buf, 10, &tmp) < 0) 1169 return -EINVAL; 1170 1171 mutex_lock(&data->update_lock); 1172 data->temp[index][nr] = temp_to_reg(tmp, -128, 127); 1173 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]); 1174 mutex_unlock(&data->update_lock); 1175 return count; 1176} 1177 1178 1179static ssize_t 1180show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf) 1181{ 1182 struct i2c_client *client = to_i2c_client(dev); 1183 struct w83795_data *data = i2c_get_clientdata(client); 1184 struct sensor_device_attribute_2 *sensor_attr = 1185 to_sensor_dev_attr_2(attr); 1186 int index = sensor_attr->index; 1187 u8 tmp; 1188 1189 if (data->enable_dts == 0) 1190 return sprintf(buf, "%d\n", 0); 1191 1192 if ((data->has_dts >> index) & 0x01) { 1193 if (data->enable_dts & 2) 1194 tmp = 5; 1195 else 1196 tmp = 6; 1197 } else { 1198 tmp = 0; 1199 } 1200 1201 return sprintf(buf, "%d\n", tmp); 1202} 1203 1204static ssize_t 1205show_dts(struct device *dev, struct device_attribute *attr, char *buf) 1206{ 1207 struct sensor_device_attribute_2 *sensor_attr = 1208 to_sensor_dev_attr_2(attr); 1209 int index = sensor_attr->index; 1210 struct w83795_data *data = w83795_update_device(dev); 1211 long temp = temp_from_reg(data->dts[index] & 0x7f); 1212 1213 temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250; 1214 if (data->dts[index] & 0x80) 1215 temp = -temp; 1216 return sprintf(buf, "%ld\n", temp); 1217} 1218 1219static ssize_t 1220show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf) 1221{ 1222 struct sensor_device_attribute_2 *sensor_attr = 1223 to_sensor_dev_attr_2(attr); 1224 int nr = sensor_attr->nr; 1225 struct i2c_client *client = to_i2c_client(dev); 1226 struct w83795_data *data = i2c_get_clientdata(client); 1227 long temp = temp_from_reg(data->dts_ext[nr] & 0x7f); 1228 1229 if (data->dts_ext[nr] & 0x80) 1230 temp = -temp; 1231 return sprintf(buf, "%ld\n", temp); 1232} 1233 1234static ssize_t 1235store_dts_ext(struct device *dev, struct device_attribute *attr, 1236 const char *buf, size_t count) 1237{ 1238 struct sensor_device_attribute_2 *sensor_attr = 1239 to_sensor_dev_attr_2(attr); 1240 int nr = sensor_attr->nr; 1241 struct i2c_client *client = to_i2c_client(dev); 1242 struct w83795_data *data = i2c_get_clientdata(client); 1243 long tmp; 1244 1245 if (strict_strtol(buf, 10, &tmp) < 0) 1246 return -EINVAL; 1247 1248 mutex_lock(&data->update_lock); 1249 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127); 1250 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]); 1251 mutex_unlock(&data->update_lock); 1252 return count; 1253} 1254 1255 1256/* 1257 Type 3: Thermal diode 1258 Type 4: Thermistor 1259 1260 Temp5-6, default TR 1261 Temp1-4, default TD 1262*/ 1263 1264static ssize_t 1265show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) 1266{ 1267 struct i2c_client *client = to_i2c_client(dev); 1268 struct w83795_data *data = i2c_get_clientdata(client); 1269 struct sensor_device_attribute_2 *sensor_attr = 1270 to_sensor_dev_attr_2(attr); 1271 int index = sensor_attr->index; 1272 u8 tmp; 1273 1274 if (data->has_temp >> index & 0x01) { 1275 if (data->temp_mode >> index & 0x01) 1276 tmp = 3; 1277 else 1278 tmp = 4; 1279 } else { 1280 tmp = 0; 1281 } 1282 1283 return sprintf(buf, "%d\n", tmp); 1284} 1285 1286static ssize_t 1287store_temp_mode(struct device *dev, struct device_attribute *attr, 1288 const char *buf, size_t count) 1289{ 1290 struct i2c_client *client = to_i2c_client(dev); 1291 struct w83795_data *data = i2c_get_clientdata(client); 1292 struct sensor_device_attribute_2 *sensor_attr = 1293 to_sensor_dev_attr_2(attr); 1294 int index = sensor_attr->index; 1295 unsigned long val; 1296 u8 tmp; 1297 u32 mask; 1298 1299 if (strict_strtoul(buf, 10, &val) < 0) 1300 return -EINVAL; 1301 if ((val != 4) && (val != 3)) 1302 return -EINVAL; 1303 if ((index > 3) && (val == 3)) 1304 return -EINVAL; 1305 1306 mutex_lock(&data->update_lock); 1307 if (val == 3) { 1308 val = TEMP_CTRL_TD; 1309 data->has_temp |= 1 << index; 1310 data->temp_mode |= 1 << index; 1311 } else if (val == 4) { 1312 val = TEMP_CTRL_TR; 1313 data->has_temp |= 1 << index; 1314 tmp = 1 << index; 1315 data->temp_mode &= ~tmp; 1316 } 1317 1318 if (index > 3) 1319 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 1320 else 1321 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1322 1323 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT]; 1324 tmp &= ~mask; 1325 tmp |= W83795_REG_TEMP_CTRL[index][val]; 1326 1327 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT]; 1328 data->has_in &= ~mask; 1329 1330 if (index > 3) 1331 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp); 1332 else 1333 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp); 1334 1335 mutex_unlock(&data->update_lock); 1336 return count; 1337} 1338 1339 1340/* show/store VIN */ 1341static ssize_t 1342show_in(struct device *dev, struct device_attribute *attr, char *buf) 1343{ 1344 struct sensor_device_attribute_2 *sensor_attr = 1345 to_sensor_dev_attr_2(attr); 1346 int nr = sensor_attr->nr; 1347 int index = sensor_attr->index; 1348 struct w83795_data *data = w83795_update_device(dev); 1349 u16 val = data->in[index][nr]; 1350 u8 lsb_idx; 1351 1352 switch (nr) { 1353 case IN_READ: 1354 /* calculate this value again by sensors as sensors3.conf */ 1355 if ((index >= 17) && 1356 !((data->has_gain >> (index - 17)) & 1)) 1357 val *= 8; 1358 break; 1359 case IN_MAX: 1360 case IN_LOW: 1361 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1362 val <<= 2; 1363 val |= (data->in_lsb[lsb_idx][nr] >> 1364 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03; 1365 if ((index >= 17) && 1366 !((data->has_gain >> (index - 17)) & 1)) 1367 val *= 8; 1368 break; 1369 } 1370 val = in_from_reg(index, val); 1371 1372 return sprintf(buf, "%d\n", val); 1373} 1374 1375static ssize_t 1376store_in(struct device *dev, struct device_attribute *attr, 1377 const char *buf, size_t count) 1378{ 1379 struct sensor_device_attribute_2 *sensor_attr = 1380 to_sensor_dev_attr_2(attr); 1381 int nr = sensor_attr->nr; 1382 int index = sensor_attr->index; 1383 struct i2c_client *client = to_i2c_client(dev); 1384 struct w83795_data *data = i2c_get_clientdata(client); 1385 unsigned long val; 1386 u8 tmp; 1387 u8 lsb_idx; 1388 1389 if (strict_strtoul(buf, 10, &val) < 0) 1390 return -EINVAL; 1391 val = in_to_reg(index, val); 1392 1393 if ((index >= 17) && 1394 !((data->has_gain >> (index - 17)) & 1)) 1395 val /= 8; 1396 val = SENSORS_LIMIT(val, 0, 0x3FF); 1397 mutex_lock(&data->update_lock); 1398 1399 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1400 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr)); 1401 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]); 1402 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]; 1403 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp); 1404 data->in_lsb[lsb_idx][nr] = tmp; 1405 1406 tmp = (val >> 2) & 0xff; 1407 w83795_write(client, W83795_REG_IN[index][nr], tmp); 1408 data->in[index][nr] = tmp; 1409 1410 mutex_unlock(&data->update_lock); 1411 return count; 1412} 1413 1414 1415static ssize_t 1416show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) 1417{ 1418 struct sensor_device_attribute_2 *sensor_attr = 1419 to_sensor_dev_attr_2(attr); 1420 int nr = sensor_attr->nr; 1421 struct i2c_client *client = to_i2c_client(dev); 1422 struct w83795_data *data = i2c_get_clientdata(client); 1423 u16 val = data->setup_pwm[nr]; 1424 1425 switch (nr) { 1426 case SETUP_PWM_UPTIME: 1427 case SETUP_PWM_DOWNTIME: 1428 val = time_from_reg(val); 1429 break; 1430 } 1431 1432 return sprintf(buf, "%d\n", val); 1433} 1434 1435static ssize_t 1436store_sf_setup(struct device *dev, struct device_attribute *attr, 1437 const char *buf, size_t count) 1438{ 1439 struct sensor_device_attribute_2 *sensor_attr = 1440 to_sensor_dev_attr_2(attr); 1441 int nr = sensor_attr->nr; 1442 struct i2c_client *client = to_i2c_client(dev); 1443 struct w83795_data *data = i2c_get_clientdata(client); 1444 unsigned long val; 1445 1446 if (strict_strtoul(buf, 10, &val) < 0) 1447 return -EINVAL; 1448 1449 switch (nr) { 1450 case SETUP_PWM_DEFAULT: 1451 val = SENSORS_LIMIT(val, 0, 0xff); 1452 break; 1453 case SETUP_PWM_UPTIME: 1454 case SETUP_PWM_DOWNTIME: 1455 val = time_to_reg(val); 1456 if (val == 0) 1457 return -EINVAL; 1458 break; 1459 } 1460 1461 mutex_lock(&data->update_lock); 1462 data->setup_pwm[nr] = val; 1463 w83795_write(client, W83795_REG_SETUP_PWM(nr), val); 1464 mutex_unlock(&data->update_lock); 1465 return count; 1466} 1467 1468 1469#define NOT_USED -1 1470 1471/* Don't change the attribute order, _max and _min are accessed by index 1472 * somewhere else in the code */ 1473#define SENSOR_ATTR_IN(index) { \ 1474 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ 1475 IN_READ, index), \ 1476 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ 1477 store_in, IN_MAX, index), \ 1478 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ 1479 store_in, IN_LOW, index), \ 1480 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ 1481 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \ 1482 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ 1483 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1484 index + ((index > 14) ? 1 : 0)) } 1485 1486#define SENSOR_ATTR_FAN(index) { \ 1487 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ 1488 NULL, FAN_INPUT, index - 1), \ 1489 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ 1490 show_fan, store_fan_min, FAN_MIN, index - 1), \ 1491 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ 1492 NULL, ALARM_STATUS, index + 31), \ 1493 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ 1494 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) } 1495 1496#define SENSOR_ATTR_PWM(index) { \ 1497 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ 1498 store_pwm, PWM_OUTPUT, index - 1), \ 1499 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ 1500 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ 1501 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ 1502 show_pwm, store_pwm, PWM_START, index - 1), \ 1503 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ 1504 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \ 1505 SENSOR_ATTR_2(fan##index##_div, S_IWUSR | S_IRUGO, \ 1506 show_pwm, store_pwm, PWM_DIV, index - 1), \ 1507 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \ 1508 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \ 1509 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \ 1510 show_fanin, store_fanin, FANIN_TARGET, index - 1) } 1511 1512#define SENSOR_ATTR_DTS(index) { \ 1513 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \ 1514 show_dts_mode, NULL, NOT_USED, index - 7), \ 1515 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \ 1516 NULL, NOT_USED, index - 7), \ 1517 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \ 1518 store_dts_ext, DTS_CRIT, NOT_USED), \ 1519 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1520 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \ 1521 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_dts_ext, \ 1522 store_dts_ext, DTS_WARN, NOT_USED), \ 1523 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \ 1524 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \ 1525 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1526 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \ 1527 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1528 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) } 1529 1530#define SENSOR_ATTR_TEMP(index) { \ 1531 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \ 1532 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ 1533 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ 1534 NULL, TEMP_READ, index - 1), \ 1535 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ 1536 store_temp, TEMP_CRIT, index - 1), \ 1537 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1538 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ 1539 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \ 1540 store_temp, TEMP_WARN, index - 1), \ 1541 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \ 1542 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ 1543 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1544 show_alarm_beep, NULL, ALARM_STATUS, \ 1545 index + (index > 4 ? 11 : 17)), \ 1546 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1547 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1548 index + (index > 4 ? 11 : 17)), \ 1549 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \ 1550 show_temp_src, store_temp_src, NOT_USED, index - 1), \ 1551 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ 1552 show_temp_pwm_enable, store_temp_pwm_enable, \ 1553 TEMP_PWM_ENABLE, index - 1), \ 1554 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \ 1555 show_temp_pwm_enable, store_temp_pwm_enable, \ 1556 TEMP_PWM_FAN_MAP, index - 1), \ 1557 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \ 1558 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \ 1559 SENSOR_ATTR_2(temp##index##_crit, S_IWUSR | S_IRUGO, \ 1560 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \ 1561 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IWUSR | S_IRUGO, \ 1562 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \ 1563 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \ 1564 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \ 1565 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ 1566 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \ 1567 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ 1568 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \ 1569 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ 1570 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \ 1571 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ 1572 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \ 1573 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ 1574 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \ 1575 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ 1576 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \ 1577 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ 1578 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \ 1579 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ 1580 show_sf4_temp, store_sf4_temp, 0, index - 1), \ 1581 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ 1582 show_sf4_temp, store_sf4_temp, 1, index - 1), \ 1583 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ 1584 show_sf4_temp, store_sf4_temp, 2, index - 1), \ 1585 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ 1586 show_sf4_temp, store_sf4_temp, 3, index - 1), \ 1587 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ 1588 show_sf4_temp, store_sf4_temp, 4, index - 1), \ 1589 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ 1590 show_sf4_temp, store_sf4_temp, 5, index - 1), \ 1591 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ 1592 show_sf4_temp, store_sf4_temp, 6, index - 1) } 1593 1594 1595static struct sensor_device_attribute_2 w83795_in[][5] = { 1596 SENSOR_ATTR_IN(0), 1597 SENSOR_ATTR_IN(1), 1598 SENSOR_ATTR_IN(2), 1599 SENSOR_ATTR_IN(3), 1600 SENSOR_ATTR_IN(4), 1601 SENSOR_ATTR_IN(5), 1602 SENSOR_ATTR_IN(6), 1603 SENSOR_ATTR_IN(7), 1604 SENSOR_ATTR_IN(8), 1605 SENSOR_ATTR_IN(9), 1606 SENSOR_ATTR_IN(10), 1607 SENSOR_ATTR_IN(11), 1608 SENSOR_ATTR_IN(12), 1609 SENSOR_ATTR_IN(13), 1610 SENSOR_ATTR_IN(14), 1611 SENSOR_ATTR_IN(15), 1612 SENSOR_ATTR_IN(16), 1613 SENSOR_ATTR_IN(17), 1614 SENSOR_ATTR_IN(18), 1615 SENSOR_ATTR_IN(19), 1616 SENSOR_ATTR_IN(20), 1617}; 1618 1619static const struct sensor_device_attribute_2 w83795_fan[][4] = { 1620 SENSOR_ATTR_FAN(1), 1621 SENSOR_ATTR_FAN(2), 1622 SENSOR_ATTR_FAN(3), 1623 SENSOR_ATTR_FAN(4), 1624 SENSOR_ATTR_FAN(5), 1625 SENSOR_ATTR_FAN(6), 1626 SENSOR_ATTR_FAN(7), 1627 SENSOR_ATTR_FAN(8), 1628 SENSOR_ATTR_FAN(9), 1629 SENSOR_ATTR_FAN(10), 1630 SENSOR_ATTR_FAN(11), 1631 SENSOR_ATTR_FAN(12), 1632 SENSOR_ATTR_FAN(13), 1633 SENSOR_ATTR_FAN(14), 1634}; 1635 1636static const struct sensor_device_attribute_2 w83795_temp[][29] = { 1637 SENSOR_ATTR_TEMP(1), 1638 SENSOR_ATTR_TEMP(2), 1639 SENSOR_ATTR_TEMP(3), 1640 SENSOR_ATTR_TEMP(4), 1641 SENSOR_ATTR_TEMP(5), 1642 SENSOR_ATTR_TEMP(6), 1643}; 1644 1645static const struct sensor_device_attribute_2 w83795_dts[][8] = { 1646 SENSOR_ATTR_DTS(7), 1647 SENSOR_ATTR_DTS(8), 1648 SENSOR_ATTR_DTS(9), 1649 SENSOR_ATTR_DTS(10), 1650 SENSOR_ATTR_DTS(11), 1651 SENSOR_ATTR_DTS(12), 1652 SENSOR_ATTR_DTS(13), 1653 SENSOR_ATTR_DTS(14), 1654}; 1655 1656static const struct sensor_device_attribute_2 w83795_pwm[][7] = { 1657 SENSOR_ATTR_PWM(1), 1658 SENSOR_ATTR_PWM(2), 1659 SENSOR_ATTR_PWM(3), 1660 SENSOR_ATTR_PWM(4), 1661 SENSOR_ATTR_PWM(5), 1662 SENSOR_ATTR_PWM(6), 1663 SENSOR_ATTR_PWM(7), 1664 SENSOR_ATTR_PWM(8), 1665}; 1666 1667static const struct sensor_device_attribute_2 sda_single_files[] = { 1668 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep, 1669 store_chassis_clear, ALARM_STATUS, 46), 1670 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable, 1671 store_beep_enable, NOT_USED, NOT_USED), 1672 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin, 1673 store_fanin, FANIN_TOL, NOT_USED), 1674 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, 1675 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), 1676 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, 1677 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), 1678 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, 1679 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), 1680}; 1681 1682/* 1683 * Driver interface 1684 */ 1685 1686static void w83795_init_client(struct i2c_client *client) 1687{ 1688 u8 config; 1689 1690 if (reset) 1691 w83795_write(client, W83795_REG_CONFIG, 0x80); 1692 1693 /* Start monitoring if needed */ 1694 config = w83795_read(client, W83795_REG_CONFIG); 1695 if (!(config & W83795_REG_CONFIG_START)) { 1696 dev_info(&client->dev, "Enabling monitoring operations\n"); 1697 w83795_write(client, W83795_REG_CONFIG, 1698 config | W83795_REG_CONFIG_START); 1699 } 1700} 1701 1702static int w83795_get_device_id(struct i2c_client *client) 1703{ 1704 int device_id; 1705 1706 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID); 1707 1708 /* Special case for rev. A chips; can't be checked first because later 1709 revisions emulate this for compatibility */ 1710 if (device_id < 0 || (device_id & 0xf0) != 0x50) { 1711 int alt_id; 1712 1713 alt_id = i2c_smbus_read_byte_data(client, 1714 W83795_REG_DEVICEID_A); 1715 if (alt_id == 0x50) 1716 device_id = alt_id; 1717 } 1718 1719 return device_id; 1720} 1721 1722/* Return 0 if detection is successful, -ENODEV otherwise */ 1723static int w83795_detect(struct i2c_client *client, 1724 struct i2c_board_info *info) 1725{ 1726 int bank, vendor_id, device_id, expected, i2c_addr, config; 1727 struct i2c_adapter *adapter = client->adapter; 1728 unsigned short address = client->addr; 1729 const char *chip_name; 1730 1731 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1732 return -ENODEV; 1733 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1734 if (bank < 0 || (bank & 0x7c)) { 1735 dev_dbg(&adapter->dev, 1736 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1737 address, "bank"); 1738 return -ENODEV; 1739 } 1740 1741 /* Check Nuvoton vendor ID */ 1742 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID); 1743 expected = bank & 0x80 ? 0x5c : 0xa3; 1744 if (vendor_id != expected) { 1745 dev_dbg(&adapter->dev, 1746 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1747 address, "vendor id"); 1748 return -ENODEV; 1749 } 1750 1751 /* Check device ID */ 1752 device_id = w83795_get_device_id(client) | 1753 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8); 1754 if ((device_id >> 4) != 0x795) { 1755 dev_dbg(&adapter->dev, 1756 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1757 address, "device id\n"); 1758 return -ENODEV; 1759 } 1760 1761 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR 1762 should match */ 1763 if ((bank & 0x07) == 0) { 1764 i2c_addr = i2c_smbus_read_byte_data(client, 1765 W83795_REG_I2C_ADDR); 1766 if ((i2c_addr & 0x7f) != address) { 1767 dev_dbg(&adapter->dev, 1768 "w83795: Detection failed at addr 0x%02hx, " 1769 "check %s\n", address, "i2c addr"); 1770 return -ENODEV; 1771 } 1772 } 1773 1774 /* Check 795 chip type: 795G or 795ADG 1775 Usually we don't write to chips during detection, but here we don't 1776 quite have the choice; hopefully it's OK, we are about to return 1777 success anyway */ 1778 if ((bank & 0x07) != 0) 1779 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, 1780 bank & ~0x07); 1781 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG); 1782 if (config & W83795_REG_CONFIG_CONFIG48) 1783 chip_name = "w83795adg"; 1784 else 1785 chip_name = "w83795g"; 1786 1787 strlcpy(info->type, chip_name, I2C_NAME_SIZE); 1788 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name, 1789 'A' + (device_id & 0xf), address); 1790 1791 return 0; 1792} 1793 1794static int w83795_handle_files(struct device *dev, int (*fn)(struct device *, 1795 const struct device_attribute *)) 1796{ 1797 struct w83795_data *data = dev_get_drvdata(dev); 1798 int err, i, j; 1799 1800 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) { 1801 if (!(data->has_in & (1 << i))) 1802 continue; 1803 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) { 1804 err = fn(dev, &w83795_in[i][j].dev_attr); 1805 if (err) 1806 return err; 1807 } 1808 } 1809 1810 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) { 1811 if (!(data->has_fan & (1 << i))) 1812 continue; 1813 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) { 1814 err = fn(dev, &w83795_fan[i][j].dev_attr); 1815 if (err) 1816 return err; 1817 } 1818 } 1819 1820 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { 1821 err = fn(dev, &sda_single_files[i].dev_attr); 1822 if (err) 1823 return err; 1824 } 1825 1826 for (i = 0; i < data->has_pwm; i++) { 1827 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) { 1828 err = fn(dev, &w83795_pwm[i][j].dev_attr); 1829 if (err) 1830 return err; 1831 } 1832 } 1833 1834 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) { 1835 if (!(data->has_temp & (1 << i))) 1836 continue; 1837 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) { 1838 err = fn(dev, &w83795_temp[i][j].dev_attr); 1839 if (err) 1840 return err; 1841 } 1842 } 1843 1844 if (data->enable_dts != 0) { 1845 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) { 1846 if (!(data->has_dts & (1 << i))) 1847 continue; 1848 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) { 1849 err = fn(dev, &w83795_dts[i][j].dev_attr); 1850 if (err) 1851 return err; 1852 } 1853 } 1854 } 1855 1856 return 0; 1857} 1858 1859/* We need a wrapper that fits in w83795_handle_files */ 1860static int device_remove_file_wrapper(struct device *dev, 1861 const struct device_attribute *attr) 1862{ 1863 device_remove_file(dev, attr); 1864 return 0; 1865} 1866 1867static void w83795_check_dynamic_in_limits(struct i2c_client *client) 1868{ 1869 struct w83795_data *data = i2c_get_clientdata(client); 1870 u8 vid_ctl; 1871 int i, err_max, err_min; 1872 1873 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL); 1874 1875 /* Return immediately if VRM isn't configured */ 1876 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07) 1877 return; 1878 1879 data->has_dyn_in = (vid_ctl >> 3) & 0x07; 1880 for (i = 0; i < 2; i++) { 1881 if (!(data->has_dyn_in & (1 << i))) 1882 continue; 1883 1884 /* Voltage limits in dynamic mode, switch to read-only */ 1885 err_max = sysfs_chmod_file(&client->dev.kobj, 1886 &w83795_in[i][2].dev_attr.attr, 1887 S_IRUGO); 1888 err_min = sysfs_chmod_file(&client->dev.kobj, 1889 &w83795_in[i][3].dev_attr.attr, 1890 S_IRUGO); 1891 if (err_max || err_min) 1892 dev_warn(&client->dev, "Failed to set in%d limits " 1893 "read-only (%d, %d)\n", i, err_max, err_min); 1894 else 1895 dev_info(&client->dev, "in%d limits set dynamically " 1896 "from VID\n", i); 1897 } 1898} 1899 1900/* Check pins that can be used for either temperature or voltage monitoring */ 1901static void w83795_apply_temp_config(struct w83795_data *data, u8 config, 1902 int temp_chan, int in_chan) 1903{ 1904 /* config is a 2-bit value */ 1905 switch (config) { 1906 case 0x2: /* Voltage monitoring */ 1907 data->has_in |= 1 << in_chan; 1908 break; 1909 case 0x1: /* Thermal diode */ 1910 if (temp_chan >= 4) 1911 break; 1912 data->temp_mode |= 1 << temp_chan; 1913 /* fall through */ 1914 case 0x3: /* Thermistor */ 1915 data->has_temp |= 1 << temp_chan; 1916 break; 1917 } 1918} 1919 1920static int w83795_probe(struct i2c_client *client, 1921 const struct i2c_device_id *id) 1922{ 1923 int i; 1924 u8 tmp; 1925 struct device *dev = &client->dev; 1926 struct w83795_data *data; 1927 int err; 1928 1929 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL); 1930 if (!data) { 1931 err = -ENOMEM; 1932 goto exit; 1933 } 1934 1935 i2c_set_clientdata(client, data); 1936 data->chip_type = id->driver_data; 1937 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1938 mutex_init(&data->update_lock); 1939 1940 /* Initialize the chip */ 1941 w83795_init_client(client); 1942 1943 /* Check which voltages and fans are present */ 1944 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1) 1945 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8); 1946 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1) 1947 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8); 1948 1949 /* Check which analog temperatures and extra voltages are present */ 1950 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 1951 if (tmp & 0x20) 1952 data->enable_dts = 1; 1953 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16); 1954 w83795_apply_temp_config(data, tmp & 0x3, 4, 15); 1955 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1956 w83795_apply_temp_config(data, tmp >> 6, 3, 20); 1957 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19); 1958 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18); 1959 w83795_apply_temp_config(data, tmp & 0x3, 0, 17); 1960 1961 /* Check DTS enable status */ 1962 if (data->enable_dts) { 1963 if (1 & w83795_read(client, W83795_REG_DTSC)) 1964 data->enable_dts |= 2; 1965 data->has_dts = w83795_read(client, W83795_REG_DTSE); 1966 } 1967 1968 /* First update the voltages measured value and limits */ 1969 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 1970 if (!(data->has_in & (1 << i))) 1971 continue; 1972 data->in[i][IN_MAX] = 1973 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 1974 data->in[i][IN_LOW] = 1975 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 1976 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 1977 tmp |= (w83795_read(client, W83795_REG_VRLSB) 1978 >> VRLSB_SHIFT) & 0x03; 1979 data->in[i][IN_READ] = tmp; 1980 } 1981 for (i = 0; i < IN_LSB_REG_NUM; i++) { 1982 data->in_lsb[i][IN_MAX] = 1983 w83795_read(client, IN_LSB_REG(i, IN_MAX)); 1984 data->in_lsb[i][IN_LOW] = 1985 w83795_read(client, IN_LSB_REG(i, IN_LOW)); 1986 } 1987 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f; 1988 1989 /* First update fan and limits */ 1990 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 1991 if (!(data->has_fan & (1 << i))) 1992 continue; 1993 data->fan_min[i] = 1994 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4; 1995 data->fan_min[i] |= 1996 (w83795_read(client, W83795_REG_FAN_MIN_LSB(i)) >> 1997 W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F; 1998 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 1999 data->fan[i] |= 2000 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F; 2001 } 2002 2003 /* temperature and limits */ 2004 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 2005 if (!(data->has_temp & (1 << i))) 2006 continue; 2007 data->temp[i][TEMP_CRIT] = 2008 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]); 2009 data->temp[i][TEMP_CRIT_HYST] = 2010 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]); 2011 data->temp[i][TEMP_WARN] = 2012 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]); 2013 data->temp[i][TEMP_WARN_HYST] = 2014 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]); 2015 data->temp[i][TEMP_READ] = 2016 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 2017 data->temp_read_vrlsb[i] = 2018 w83795_read(client, W83795_REG_VRLSB); 2019 } 2020 2021 /* dts temperature and limits */ 2022 if (data->enable_dts != 0) { 2023 data->dts_ext[DTS_CRIT] = 2024 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT)); 2025 data->dts_ext[DTS_CRIT_HYST] = 2026 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST)); 2027 data->dts_ext[DTS_WARN] = 2028 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN)); 2029 data->dts_ext[DTS_WARN_HYST] = 2030 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST)); 2031 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 2032 if (!(data->has_dts & (1 << i))) 2033 continue; 2034 data->dts[i] = w83795_read(client, W83795_REG_DTS(i)); 2035 data->dts_read_vrlsb[i] = 2036 w83795_read(client, W83795_REG_VRLSB); 2037 } 2038 } 2039 2040 /* First update temp source selction */ 2041 for (i = 0; i < 3; i++) 2042 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i)); 2043 2044 /* pwm and smart fan */ 2045 if (data->chip_type == w83795g) 2046 data->has_pwm = 8; 2047 else 2048 data->has_pwm = 2; 2049 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1); 2050 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2); 2051 for (i = 0; i < W83795_REG_TEMP_NUM; i++) 2052 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i)); 2053 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC); 2054 for (i = 0; i < data->has_pwm; i++) { 2055 for (tmp = 0; tmp < 5; tmp++) { 2056 data->pwm[i][tmp] = 2057 w83795_read(client, W83795_REG_PWM(i, tmp)); 2058 } 2059 } 2060 for (i = 0; i < 8; i++) { 2061 data->target_speed[i] = 2062 w83795_read(client, W83795_REG_FTSH(i)) << 4; 2063 data->target_speed[i] |= 2064 w83795_read(client, W83795_REG_FTSL(i)) >> 4; 2065 } 2066 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f; 2067 2068 for (i = 0; i < W83795_REG_TEMP_NUM; i++) { 2069 data->pwm_temp[i][TEMP_PWM_TTTI] = 2070 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f; 2071 data->pwm_temp[i][TEMP_PWM_CTFS] = 2072 w83795_read(client, W83795_REG_CTFS(i)); 2073 tmp = w83795_read(client, W83795_REG_HT(i)); 2074 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f; 2075 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f; 2076 } 2077 for (i = 0; i < W83795_REG_TEMP_NUM; i++) { 2078 for (tmp = 0; tmp < 7; tmp++) { 2079 data->sf4_reg[i][SF4_TEMP][tmp] = 2080 w83795_read(client, 2081 W83795_REG_SF4_TEMP(i, tmp)); 2082 data->sf4_reg[i][SF4_PWM][tmp] = 2083 w83795_read(client, W83795_REG_SF4_PWM(i, tmp)); 2084 } 2085 } 2086 2087 /* Setup PWM Register */ 2088 for (i = 0; i < 3; i++) { 2089 data->setup_pwm[i] = 2090 w83795_read(client, W83795_REG_SETUP_PWM(i)); 2091 } 2092 2093 /* alarm and beep */ 2094 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) { 2095 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 2096 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i)); 2097 } 2098 data->beep_enable = 2099 (w83795_read(client, W83795_REG_BEEP(5)) >> 7) & 0x01; 2100 2101 err = w83795_handle_files(dev, device_create_file); 2102 if (err) 2103 goto exit_remove; 2104 2105 if (data->chip_type == w83795g) 2106 w83795_check_dynamic_in_limits(client); 2107 2108 data->hwmon_dev = hwmon_device_register(dev); 2109 if (IS_ERR(data->hwmon_dev)) { 2110 err = PTR_ERR(data->hwmon_dev); 2111 goto exit_remove; 2112 } 2113 2114 return 0; 2115 2116exit_remove: 2117 w83795_handle_files(dev, device_remove_file_wrapper); 2118 kfree(data); 2119exit: 2120 return err; 2121} 2122 2123static int w83795_remove(struct i2c_client *client) 2124{ 2125 struct w83795_data *data = i2c_get_clientdata(client); 2126 2127 hwmon_device_unregister(data->hwmon_dev); 2128 w83795_handle_files(&client->dev, device_remove_file_wrapper); 2129 kfree(data); 2130 2131 return 0; 2132} 2133 2134 2135static const struct i2c_device_id w83795_id[] = { 2136 { "w83795g", w83795g }, 2137 { "w83795adg", w83795adg }, 2138 { } 2139}; 2140MODULE_DEVICE_TABLE(i2c, w83795_id); 2141 2142static struct i2c_driver w83795_driver = { 2143 .driver = { 2144 .name = "w83795", 2145 }, 2146 .probe = w83795_probe, 2147 .remove = w83795_remove, 2148 .id_table = w83795_id, 2149 2150 .class = I2C_CLASS_HWMON, 2151 .detect = w83795_detect, 2152 .address_list = normal_i2c, 2153}; 2154 2155static int __init sensors_w83795_init(void) 2156{ 2157 return i2c_add_driver(&w83795_driver); 2158} 2159 2160static void __exit sensors_w83795_exit(void) 2161{ 2162 i2c_del_driver(&w83795_driver); 2163} 2164 2165MODULE_AUTHOR("Wei Song"); 2166MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver"); 2167MODULE_LICENSE("GPL"); 2168 2169module_init(sensors_w83795_init); 2170module_exit(sensors_w83795_exit); 2171