w83795.c revision 2fa09878ba1dc458b8cb6e9c8fbc8f2e5401d2b2
1/* 2 * w83795.c - Linux kernel driver for hardware monitoring 3 * Copyright (C) 2008 Nuvoton Technology Corp. 4 * Wei Song 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation - version 2. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 18 * 02110-1301 USA. 19 * 20 * Supports following chips: 21 * 22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA 23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no 24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no 25 */ 26 27#include <linux/kernel.h> 28#include <linux/module.h> 29#include <linux/init.h> 30#include <linux/slab.h> 31#include <linux/i2c.h> 32#include <linux/hwmon.h> 33#include <linux/hwmon-sysfs.h> 34#include <linux/err.h> 35#include <linux/mutex.h> 36#include <linux/delay.h> 37 38/* Addresses to scan */ 39static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END }; 40 41 42static int reset; 43module_param(reset, bool, 0); 44MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); 45 46 47#define W83795_REG_BANKSEL 0x00 48#define W83795_REG_VENDORID 0xfd 49#define W83795_REG_CHIPID 0xfe 50#define W83795_REG_DEVICEID 0xfb 51#define W83795_REG_DEVICEID_A 0xff 52 53#define W83795_REG_I2C_ADDR 0xfc 54#define W83795_REG_CONFIG 0x01 55#define W83795_REG_CONFIG_CONFIG48 0x04 56 57/* Multi-Function Pin Ctrl Registers */ 58#define W83795_REG_VOLT_CTRL1 0x02 59#define W83795_REG_VOLT_CTRL2 0x03 60#define W83795_REG_TEMP_CTRL1 0x04 61#define W83795_REG_TEMP_CTRL2 0x05 62#define W83795_REG_FANIN_CTRL1 0x06 63#define W83795_REG_FANIN_CTRL2 0x07 64#define W83795_REG_VMIGB_CTRL 0x08 65 66#define TEMP_CTRL_DISABLE 0 67#define TEMP_CTRL_TD 1 68#define TEMP_CTRL_VSEN 2 69#define TEMP_CTRL_TR 3 70#define TEMP_CTRL_SHIFT 4 71#define TEMP_CTRL_HASIN_SHIFT 5 72/* temp mode may effect VSEN17-12 (in20-15) */ 73static u16 W83795_REG_TEMP_CTRL[][6] = { 74 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */ 75 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */ 76 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */ 77 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */ 78 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */ 79 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */ 80 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */ 81}; 82 83#define TEMP_READ 0 84#define TEMP_CRIT 1 85#define TEMP_CRIT_HYST 2 86#define TEMP_WARN 3 87#define TEMP_WARN_HYST 4 88/* only crit and crit_hyst affect real-time alarm status 89 * current crit crit_hyst warn warn_hyst */ 90static u16 W83795_REG_TEMP[][5] = { 91 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */ 92 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */ 93 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */ 94 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */ 95 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */ 96 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */ 97}; 98 99#define IN_READ 0 100#define IN_MAX 1 101#define IN_LOW 2 102static const u16 W83795_REG_IN[][3] = { 103 /* Current, HL, LL */ 104 {0x10, 0x70, 0x71}, /* VSEN1 */ 105 {0x11, 0x72, 0x73}, /* VSEN2 */ 106 {0x12, 0x74, 0x75}, /* VSEN3 */ 107 {0x13, 0x76, 0x77}, /* VSEN4 */ 108 {0x14, 0x78, 0x79}, /* VSEN5 */ 109 {0x15, 0x7a, 0x7b}, /* VSEN6 */ 110 {0x16, 0x7c, 0x7d}, /* VSEN7 */ 111 {0x17, 0x7e, 0x7f}, /* VSEN8 */ 112 {0x18, 0x80, 0x81}, /* VSEN9 */ 113 {0x19, 0x82, 0x83}, /* VSEN10 */ 114 {0x1A, 0x84, 0x85}, /* VSEN11 */ 115 {0x1B, 0x86, 0x87}, /* VTT */ 116 {0x1C, 0x88, 0x89}, /* 3VDD */ 117 {0x1D, 0x8a, 0x8b}, /* 3VSB */ 118 {0x1E, 0x8c, 0x8d}, /* VBAT */ 119 {0x1F, 0xa6, 0xa7}, /* VSEN12 */ 120 {0x20, 0xaa, 0xab}, /* VSEN13 */ 121 {0x21, 0x96, 0x97}, /* VSEN14 */ 122 {0x22, 0x9a, 0x9b}, /* VSEN15 */ 123 {0x23, 0x9e, 0x9f}, /* VSEN16 */ 124 {0x24, 0xa2, 0xa3}, /* VSEN17 */ 125}; 126#define W83795_REG_VRLSB 0x3C 127#define VRLSB_SHIFT 6 128 129static const u8 W83795_REG_IN_HL_LSB[] = { 130 0x8e, /* VSEN1-4 */ 131 0x90, /* VSEN5-8 */ 132 0x92, /* VSEN9-11 */ 133 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */ 134 0xa8, /* VSEN12 */ 135 0xac, /* VSEN13 */ 136 0x98, /* VSEN14 */ 137 0x9c, /* VSEN15 */ 138 0xa0, /* VSEN16 */ 139 0xa4, /* VSEN17 */ 140}; 141 142#define IN_LSB_REG(index, type) \ 143 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \ 144 : (W83795_REG_IN_HL_LSB[(index)] + 1)) 145 146#define IN_LSB_REG_NUM 10 147 148#define IN_LSB_SHIFT 0 149#define IN_LSB_IDX 1 150static const u8 IN_LSB_SHIFT_IDX[][2] = { 151 /* High/Low LSB shift, LSB No. */ 152 {0x00, 0x00}, /* VSEN1 */ 153 {0x02, 0x00}, /* VSEN2 */ 154 {0x04, 0x00}, /* VSEN3 */ 155 {0x06, 0x00}, /* VSEN4 */ 156 {0x00, 0x01}, /* VSEN5 */ 157 {0x02, 0x01}, /* VSEN6 */ 158 {0x04, 0x01}, /* VSEN7 */ 159 {0x06, 0x01}, /* VSEN8 */ 160 {0x00, 0x02}, /* VSEN9 */ 161 {0x02, 0x02}, /* VSEN10 */ 162 {0x04, 0x02}, /* VSEN11 */ 163 {0x00, 0x03}, /* VTT */ 164 {0x02, 0x03}, /* 3VDD */ 165 {0x04, 0x03}, /* 3VSB */ 166 {0x06, 0x03}, /* VBAT */ 167 {0x06, 0x04}, /* VSEN12 */ 168 {0x06, 0x05}, /* VSEN13 */ 169 {0x06, 0x06}, /* VSEN14 */ 170 {0x06, 0x07}, /* VSEN15 */ 171 {0x06, 0x08}, /* VSEN16 */ 172 {0x06, 0x09}, /* VSEN17 */ 173}; 174 175 176/* 3VDD, 3VSB, VBAT * 0.006 */ 177#define REST_VLT_BEGIN 12 /* the 13th volt to 15th */ 178#define REST_VLT_END 14 /* the 13th volt to 15th */ 179 180#define W83795_REG_FAN(index) (0x2E + (index)) 181#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index)) 182#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2) 183#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \ 184 (((index) % 1) ? 4 : 0) 185 186#define W83795_REG_VID_CTRL 0x6A 187 188#define ALARM_BEEP_REG_NUM 6 189#define W83795_REG_ALARM(index) (0x41 + (index)) 190#define W83795_REG_BEEP(index) (0x50 + (index)) 191 192#define W83795_REG_CLR_CHASSIS 0x4D 193 194 195#define W83795_REG_TEMP_NUM 6 196#define W83795_REG_FCMS1 0x201 197#define W83795_REG_FCMS2 0x208 198#define W83795_REG_TFMR(index) (0x202 + (index)) 199#define W83795_REG_FOMC 0x20F 200#define W83795_REG_FOPFP(index) (0x218 + (index)) 201 202#define W83795_REG_TSS(index) (0x209 + (index)) 203 204#define PWM_OUTPUT 0 205#define PWM_START 1 206#define PWM_NONSTOP 2 207#define PWM_STOP_TIME 3 208#define PWM_DIV 4 209#define W83795_REG_PWM(index, nr) \ 210 (((nr) == 0 ? 0x210 : \ 211 (nr) == 1 ? 0x220 : \ 212 (nr) == 2 ? 0x228 : \ 213 (nr) == 3 ? 0x230 : 0x218) + (index)) 214 215#define W83795_REG_FOPFP_DIV(index) \ 216 (((index) < 8) ? ((index) + 1) : \ 217 ((index) == 8) ? 12 : \ 218 (16 << ((index) - 9))) 219 220#define W83795_REG_FTSH(index) (0x240 + (index) * 2) 221#define W83795_REG_FTSL(index) (0x241 + (index) * 2) 222#define W83795_REG_TFTS 0x250 223 224#define TEMP_PWM_TTTI 0 225#define TEMP_PWM_CTFS 1 226#define TEMP_PWM_HCT 2 227#define TEMP_PWM_HOT 3 228#define W83795_REG_TTTI(index) (0x260 + (index)) 229#define W83795_REG_CTFS(index) (0x268 + (index)) 230#define W83795_REG_HT(index) (0x270 + (index)) 231 232#define SF4_TEMP 0 233#define SF4_PWM 1 234#define W83795_REG_SF4_TEMP(temp_num, index) \ 235 (0x280 + 0x10 * (temp_num) + (index)) 236#define W83795_REG_SF4_PWM(temp_num, index) \ 237 (0x288 + 0x10 * (temp_num) + (index)) 238 239#define W83795_REG_DTSC 0x301 240#define W83795_REG_DTSE 0x302 241#define W83795_REG_DTS(index) (0x26 + (index)) 242 243#define DTS_CRIT 0 244#define DTS_CRIT_HYST 1 245#define DTS_WARN 2 246#define DTS_WARN_HYST 3 247#define W83795_REG_DTS_EXT(index) (0xB2 + (index)) 248 249#define SETUP_PWM_DEFAULT 0 250#define SETUP_PWM_UPTIME 1 251#define SETUP_PWM_DOWNTIME 2 252#define W83795_REG_SETUP_PWM(index) (0x20C + (index)) 253 254static inline u16 in_from_reg(u8 index, u16 val) 255{ 256 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END)) 257 return val * 6; 258 else 259 return val * 2; 260} 261 262static inline u16 in_to_reg(u8 index, u16 val) 263{ 264 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END)) 265 return val / 6; 266 else 267 return val / 2; 268} 269 270static inline unsigned long fan_from_reg(u16 val) 271{ 272 if ((val >= 0xff0) || (val == 0)) 273 return 0; 274 return 1350000UL / val; 275} 276 277static inline u16 fan_to_reg(long rpm) 278{ 279 if (rpm <= 0) 280 return 0x0fff; 281 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); 282} 283 284static inline unsigned long time_from_reg(u8 reg) 285{ 286 return reg * 100; 287} 288 289static inline u8 time_to_reg(unsigned long val) 290{ 291 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff); 292} 293 294static inline long temp_from_reg(s8 reg) 295{ 296 return reg * 1000; 297} 298 299static inline s8 temp_to_reg(long val, s8 min, s8 max) 300{ 301 return SENSORS_LIMIT((val < 0 ? -val : val) / 1000, min, max); 302} 303 304 305enum chip_types {w83795g, w83795adg}; 306 307struct w83795_data { 308 struct device *hwmon_dev; 309 struct mutex update_lock; 310 unsigned long last_updated; /* In jiffies */ 311 enum chip_types chip_type; 312 313 u8 bank; 314 315 u32 has_in; /* Enable monitor VIN or not */ 316 u16 in[21][3]; /* Register value, read/high/low */ 317 u8 in_lsb[10][3]; /* LSB Register value, high/low */ 318 u8 has_gain; /* has gain: in17-20 * 8 */ 319 320 u16 has_fan; /* Enable fan14-1 or not */ 321 u16 fan[14]; /* Register value combine */ 322 u16 fan_min[14]; /* Register value combine */ 323 324 u8 has_temp; /* Enable monitor temp6-1 or not */ 325 u8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */ 326 u8 temp_read_vrlsb[6]; 327 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */ 328 u8 temp_src[3]; /* Register value */ 329 330 u8 enable_dts; /* Enable PECI and SB-TSI, 331 * bit 0: =1 enable, =0 disable, 332 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */ 333 u8 has_dts; /* Enable monitor DTS temp */ 334 u8 dts[8]; /* Register value */ 335 u8 dts_read_vrlsb[8]; /* Register value */ 336 u8 dts_ext[4]; /* Register value */ 337 338 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2, 339 * no config register, only affected by chip 340 * type */ 341 u8 pwm[8][5]; /* Register value, output, start, non stop, stop 342 * time, div */ 343 u8 pwm_fcms[2]; /* Register value */ 344 u8 pwm_tfmr[6]; /* Register value */ 345 u8 pwm_fomc; /* Register value */ 346 347 u16 target_speed[8]; /* Register value, target speed for speed 348 * cruise */ 349 u8 tol_speed; /* tolerance of target speed */ 350 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */ 351 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */ 352 353 u8 setup_pwm[3]; /* Register value */ 354 355 u8 alarms[6]; /* Register value */ 356 u8 beeps[6]; /* Register value */ 357 u8 beep_enable; 358 359 char valid; 360}; 361 362/* 363 * Hardware access 364 * We assume that nobdody can change the bank outside the driver. 365 */ 366 367/* Must be called with data->update_lock held, except during initialization */ 368static int w83795_set_bank(struct i2c_client *client, u8 bank) 369{ 370 struct w83795_data *data = i2c_get_clientdata(client); 371 int err; 372 373 /* If the same bank is already set, nothing to do */ 374 if ((data->bank & 0x07) == bank) 375 return 0; 376 377 /* Change to new bank, preserve all other bits */ 378 bank |= data->bank & ~0x07; 379 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank); 380 if (err < 0) { 381 dev_err(&client->dev, 382 "Failed to set bank to %d, err %d\n", 383 (int)bank, err); 384 return err; 385 } 386 data->bank = bank; 387 388 return 0; 389} 390 391/* Must be called with data->update_lock held, except during initialization */ 392static u8 w83795_read(struct i2c_client *client, u16 reg) 393{ 394 int err; 395 396 err = w83795_set_bank(client, reg >> 8); 397 if (err < 0) 398 return 0x00; /* Arbitrary */ 399 400 err = i2c_smbus_read_byte_data(client, reg & 0xff); 401 if (err < 0) { 402 dev_err(&client->dev, 403 "Failed to read from register 0x%03x, err %d\n", 404 (int)reg, err); 405 return 0x00; /* Arbitrary */ 406 } 407 return err; 408} 409 410/* Must be called with data->update_lock held, except during initialization */ 411static int w83795_write(struct i2c_client *client, u16 reg, u8 value) 412{ 413 int err; 414 415 err = w83795_set_bank(client, reg >> 8); 416 if (err < 0) 417 return err; 418 419 err = i2c_smbus_write_byte_data(client, reg & 0xff, value); 420 if (err < 0) 421 dev_err(&client->dev, 422 "Failed to write to register 0x%03x, err %d\n", 423 (int)reg, err); 424 return err; 425} 426 427static struct w83795_data *w83795_update_device(struct device *dev) 428{ 429 struct i2c_client *client = to_i2c_client(dev); 430 struct w83795_data *data = i2c_get_clientdata(client); 431 u16 tmp; 432 int i; 433 434 mutex_lock(&data->update_lock); 435 436 if (!(time_after(jiffies, data->last_updated + HZ * 2) 437 || !data->valid)) 438 goto END; 439 440 /* Update the voltages value */ 441 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 442 if (!(data->has_in & (1 << i))) 443 continue; 444 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 445 tmp |= (w83795_read(client, W83795_REG_VRLSB) 446 >> VRLSB_SHIFT) & 0x03; 447 data->in[i][IN_READ] = tmp; 448 } 449 450 /* Update fan */ 451 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 452 if (!(data->has_fan & (1 << i))) 453 continue; 454 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 455 data->fan[i] |= 456 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F; 457 } 458 459 /* Update temperature */ 460 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 461 /* even stop monitor, register still keep value, just read out 462 * it */ 463 if (!(data->has_temp & (1 << i))) { 464 data->temp[i][TEMP_READ] = 0; 465 data->temp_read_vrlsb[i] = 0; 466 continue; 467 } 468 data->temp[i][TEMP_READ] = 469 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 470 data->temp_read_vrlsb[i] = 471 w83795_read(client, W83795_REG_VRLSB); 472 } 473 474 /* Update dts temperature */ 475 if (data->enable_dts != 0) { 476 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 477 if (!(data->has_dts & (1 << i))) 478 continue; 479 data->dts[i] = 480 w83795_read(client, W83795_REG_DTS(i)); 481 data->dts_read_vrlsb[i] = 482 w83795_read(client, W83795_REG_VRLSB); 483 } 484 } 485 486 /* Update pwm output */ 487 for (i = 0; i < data->has_pwm; i++) { 488 data->pwm[i][PWM_OUTPUT] = 489 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT)); 490 } 491 492 /* update alarm */ 493 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) 494 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 495 496 data->last_updated = jiffies; 497 data->valid = 1; 498 499END: 500 mutex_unlock(&data->update_lock); 501 return data; 502} 503 504/* 505 * Sysfs attributes 506 */ 507 508#define ALARM_STATUS 0 509#define BEEP_ENABLE 1 510static ssize_t 511show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) 512{ 513 struct w83795_data *data = w83795_update_device(dev); 514 struct sensor_device_attribute_2 *sensor_attr = 515 to_sensor_dev_attr_2(attr); 516 int nr = sensor_attr->nr; 517 int index = sensor_attr->index >> 3; 518 int bit = sensor_attr->index & 0x07; 519 u8 val; 520 521 if (ALARM_STATUS == nr) { 522 val = (data->alarms[index] >> (bit)) & 1; 523 } else { /* BEEP_ENABLE */ 524 val = (data->beeps[index] >> (bit)) & 1; 525 } 526 527 return sprintf(buf, "%u\n", val); 528} 529 530static ssize_t 531store_beep(struct device *dev, struct device_attribute *attr, 532 const char *buf, size_t count) 533{ 534 struct i2c_client *client = to_i2c_client(dev); 535 struct w83795_data *data = i2c_get_clientdata(client); 536 struct sensor_device_attribute_2 *sensor_attr = 537 to_sensor_dev_attr_2(attr); 538 int index = sensor_attr->index >> 3; 539 int shift = sensor_attr->index & 0x07; 540 u8 beep_bit = 1 << shift; 541 unsigned long val; 542 543 if (strict_strtoul(buf, 10, &val) < 0) 544 return -EINVAL; 545 if (val != 0 && val != 1) 546 return -EINVAL; 547 548 mutex_lock(&data->update_lock); 549 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index)); 550 data->beeps[index] &= ~beep_bit; 551 data->beeps[index] |= val << shift; 552 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]); 553 mutex_unlock(&data->update_lock); 554 555 return count; 556} 557 558static ssize_t 559show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf) 560{ 561 struct i2c_client *client = to_i2c_client(dev); 562 struct w83795_data *data = i2c_get_clientdata(client); 563 return sprintf(buf, "%u\n", data->beep_enable); 564} 565 566static ssize_t 567store_beep_enable(struct device *dev, struct device_attribute *attr, 568 const char *buf, size_t count) 569{ 570 struct i2c_client *client = to_i2c_client(dev); 571 struct w83795_data *data = i2c_get_clientdata(client); 572 unsigned long val; 573 u8 tmp; 574 575 if (strict_strtoul(buf, 10, &val) < 0) 576 return -EINVAL; 577 if (val != 0 && val != 1) 578 return -EINVAL; 579 580 mutex_lock(&data->update_lock); 581 data->beep_enable = val; 582 tmp = w83795_read(client, W83795_REG_BEEP(5)); 583 tmp &= 0x7f; 584 tmp |= val << 7; 585 w83795_write(client, W83795_REG_BEEP(5), tmp); 586 mutex_unlock(&data->update_lock); 587 588 return count; 589} 590 591/* Write any value to clear chassis alarm */ 592static ssize_t 593store_chassis_clear(struct device *dev, 594 struct device_attribute *attr, const char *buf, 595 size_t count) 596{ 597 struct i2c_client *client = to_i2c_client(dev); 598 struct w83795_data *data = i2c_get_clientdata(client); 599 u8 val; 600 601 mutex_lock(&data->update_lock); 602 val = w83795_read(client, W83795_REG_CLR_CHASSIS); 603 val |= 0x80; 604 w83795_write(client, W83795_REG_CLR_CHASSIS, val); 605 mutex_unlock(&data->update_lock); 606 return count; 607} 608 609#define FAN_INPUT 0 610#define FAN_MIN 1 611static ssize_t 612show_fan(struct device *dev, struct device_attribute *attr, char *buf) 613{ 614 struct sensor_device_attribute_2 *sensor_attr = 615 to_sensor_dev_attr_2(attr); 616 int nr = sensor_attr->nr; 617 int index = sensor_attr->index; 618 struct w83795_data *data = w83795_update_device(dev); 619 u16 val; 620 621 if (FAN_INPUT == nr) 622 val = data->fan[index] & 0x0fff; 623 else 624 val = data->fan_min[index] & 0x0fff; 625 626 return sprintf(buf, "%lu\n", fan_from_reg(val)); 627} 628 629static ssize_t 630store_fan_min(struct device *dev, struct device_attribute *attr, 631 const char *buf, size_t count) 632{ 633 struct sensor_device_attribute_2 *sensor_attr = 634 to_sensor_dev_attr_2(attr); 635 int index = sensor_attr->index; 636 struct i2c_client *client = to_i2c_client(dev); 637 struct w83795_data *data = i2c_get_clientdata(client); 638 unsigned long val; 639 640 if (strict_strtoul(buf, 10, &val)) 641 return -EINVAL; 642 val = fan_to_reg(val); 643 644 mutex_lock(&data->update_lock); 645 data->fan_min[index] = val; 646 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff); 647 val &= 0x0f; 648 if (index % 1) { 649 val <<= 4; 650 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 651 & 0x0f; 652 } else { 653 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 654 & 0xf0; 655 } 656 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff); 657 mutex_unlock(&data->update_lock); 658 659 return count; 660} 661 662static ssize_t 663show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 664{ 665 struct w83795_data *data = w83795_update_device(dev); 666 struct sensor_device_attribute_2 *sensor_attr = 667 to_sensor_dev_attr_2(attr); 668 int nr = sensor_attr->nr; 669 int index = sensor_attr->index; 670 u16 val; 671 672 switch (nr) { 673 case PWM_STOP_TIME: 674 val = time_from_reg(data->pwm[index][nr]); 675 break; 676 case PWM_DIV: 677 val = W83795_REG_FOPFP_DIV(data->pwm[index][nr] & 0x0f); 678 break; 679 default: 680 val = data->pwm[index][nr]; 681 break; 682 } 683 684 return sprintf(buf, "%u\n", val); 685} 686 687static ssize_t 688store_pwm(struct device *dev, struct device_attribute *attr, 689 const char *buf, size_t count) 690{ 691 struct i2c_client *client = to_i2c_client(dev); 692 struct w83795_data *data = i2c_get_clientdata(client); 693 struct sensor_device_attribute_2 *sensor_attr = 694 to_sensor_dev_attr_2(attr); 695 int nr = sensor_attr->nr; 696 int index = sensor_attr->index; 697 unsigned long val; 698 int i; 699 700 if (strict_strtoul(buf, 10, &val) < 0) 701 return -EINVAL; 702 703 mutex_lock(&data->update_lock); 704 switch (nr) { 705 case PWM_STOP_TIME: 706 val = time_to_reg(val); 707 break; 708 case PWM_DIV: 709 for (i = 0; i < 16; i++) { 710 if (W83795_REG_FOPFP_DIV(i) == val) { 711 val = i; 712 break; 713 } 714 } 715 if (i >= 16) 716 goto err_end; 717 val |= w83795_read(client, W83795_REG_PWM(index, nr)) & 0x80; 718 break; 719 default: 720 val = SENSORS_LIMIT(val, 0, 0xff); 721 break; 722 } 723 w83795_write(client, W83795_REG_PWM(index, nr), val); 724 data->pwm[index][nr] = val & 0xff; 725 mutex_unlock(&data->update_lock); 726 return count; 727err_end: 728 mutex_unlock(&data->update_lock); 729 return -EINVAL; 730} 731 732static ssize_t 733show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 734{ 735 struct sensor_device_attribute_2 *sensor_attr = 736 to_sensor_dev_attr_2(attr); 737 struct i2c_client *client = to_i2c_client(dev); 738 struct w83795_data *data = i2c_get_clientdata(client); 739 int index = sensor_attr->index; 740 u8 tmp; 741 742 if (1 == (data->pwm_fcms[0] & (1 << index))) { 743 tmp = 2; 744 goto out; 745 } 746 for (tmp = 0; tmp < 6; tmp++) { 747 if (data->pwm_tfmr[tmp] & (1 << index)) { 748 tmp = 3; 749 goto out; 750 } 751 } 752 if (data->pwm_fomc & (1 << index)) 753 tmp = 0; 754 else 755 tmp = 1; 756 757out: 758 return sprintf(buf, "%u\n", tmp); 759} 760 761static ssize_t 762store_pwm_enable(struct device *dev, struct device_attribute *attr, 763 const char *buf, size_t count) 764{ 765 struct i2c_client *client = to_i2c_client(dev); 766 struct w83795_data *data = i2c_get_clientdata(client); 767 struct sensor_device_attribute_2 *sensor_attr = 768 to_sensor_dev_attr_2(attr); 769 int index = sensor_attr->index; 770 unsigned long val; 771 int i; 772 773 if (strict_strtoul(buf, 10, &val) < 0) 774 return -EINVAL; 775 if (val > 2) 776 return -EINVAL; 777 778 mutex_lock(&data->update_lock); 779 switch (val) { 780 case 0: 781 case 1: 782 data->pwm_fcms[0] &= ~(1 << index); 783 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 784 for (i = 0; i < 6; i++) { 785 data->pwm_tfmr[i] &= ~(1 << index); 786 w83795_write(client, W83795_REG_TFMR(i), 787 data->pwm_tfmr[i]); 788 } 789 data->pwm_fomc |= 1 << index; 790 data->pwm_fomc ^= val << index; 791 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc); 792 break; 793 case 2: 794 data->pwm_fcms[0] |= (1 << index); 795 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 796 break; 797 } 798 mutex_unlock(&data->update_lock); 799 return count; 800} 801 802static ssize_t 803show_temp_src(struct device *dev, struct device_attribute *attr, char *buf) 804{ 805 struct sensor_device_attribute_2 *sensor_attr = 806 to_sensor_dev_attr_2(attr); 807 struct i2c_client *client = to_i2c_client(dev); 808 struct w83795_data *data = i2c_get_clientdata(client); 809 int index = sensor_attr->index; 810 u8 val = index / 2; 811 u8 tmp = data->temp_src[val]; 812 813 if (index % 1) 814 val = 4; 815 else 816 val = 0; 817 tmp >>= val; 818 tmp &= 0x0f; 819 820 return sprintf(buf, "%u\n", tmp); 821} 822 823static ssize_t 824store_temp_src(struct device *dev, struct device_attribute *attr, 825 const char *buf, size_t count) 826{ 827 struct i2c_client *client = to_i2c_client(dev); 828 struct w83795_data *data = i2c_get_clientdata(client); 829 struct sensor_device_attribute_2 *sensor_attr = 830 to_sensor_dev_attr_2(attr); 831 int index = sensor_attr->index; 832 unsigned long tmp; 833 u8 val = index / 2; 834 835 if (strict_strtoul(buf, 10, &tmp) < 0) 836 return -EINVAL; 837 tmp = SENSORS_LIMIT(tmp, 0, 15); 838 839 mutex_lock(&data->update_lock); 840 if (index % 1) { 841 tmp <<= 4; 842 data->temp_src[val] &= 0x0f; 843 } else { 844 data->temp_src[val] &= 0xf0; 845 } 846 data->temp_src[val] |= tmp; 847 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]); 848 mutex_unlock(&data->update_lock); 849 850 return count; 851} 852 853#define TEMP_PWM_ENABLE 0 854#define TEMP_PWM_FAN_MAP 1 855static ssize_t 856show_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 857 char *buf) 858{ 859 struct i2c_client *client = to_i2c_client(dev); 860 struct w83795_data *data = i2c_get_clientdata(client); 861 struct sensor_device_attribute_2 *sensor_attr = 862 to_sensor_dev_attr_2(attr); 863 int nr = sensor_attr->nr; 864 int index = sensor_attr->index; 865 u8 tmp = 0xff; 866 867 switch (nr) { 868 case TEMP_PWM_ENABLE: 869 tmp = (data->pwm_fcms[1] >> index) & 1; 870 if (tmp) 871 tmp = 4; 872 else 873 tmp = 3; 874 break; 875 case TEMP_PWM_FAN_MAP: 876 tmp = data->pwm_tfmr[index]; 877 break; 878 } 879 880 return sprintf(buf, "%u\n", tmp); 881} 882 883static ssize_t 884store_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 885 const char *buf, size_t count) 886{ 887 struct i2c_client *client = to_i2c_client(dev); 888 struct w83795_data *data = i2c_get_clientdata(client); 889 struct sensor_device_attribute_2 *sensor_attr = 890 to_sensor_dev_attr_2(attr); 891 int nr = sensor_attr->nr; 892 int index = sensor_attr->index; 893 unsigned long tmp; 894 895 if (strict_strtoul(buf, 10, &tmp) < 0) 896 return -EINVAL; 897 898 switch (nr) { 899 case TEMP_PWM_ENABLE: 900 if ((tmp != 3) && (tmp != 4)) 901 return -EINVAL; 902 tmp -= 3; 903 mutex_lock(&data->update_lock); 904 data->pwm_fcms[1] &= ~(1 << index); 905 data->pwm_fcms[1] |= tmp << index; 906 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]); 907 mutex_unlock(&data->update_lock); 908 break; 909 case TEMP_PWM_FAN_MAP: 910 mutex_lock(&data->update_lock); 911 tmp = SENSORS_LIMIT(tmp, 0, 0xff); 912 w83795_write(client, W83795_REG_TFMR(index), tmp); 913 data->pwm_tfmr[index] = tmp; 914 mutex_unlock(&data->update_lock); 915 break; 916 } 917 return count; 918} 919 920#define FANIN_TARGET 0 921#define FANIN_TOL 1 922static ssize_t 923show_fanin(struct device *dev, struct device_attribute *attr, char *buf) 924{ 925 struct i2c_client *client = to_i2c_client(dev); 926 struct w83795_data *data = i2c_get_clientdata(client); 927 struct sensor_device_attribute_2 *sensor_attr = 928 to_sensor_dev_attr_2(attr); 929 int nr = sensor_attr->nr; 930 int index = sensor_attr->index; 931 u16 tmp = 0; 932 933 switch (nr) { 934 case FANIN_TARGET: 935 tmp = fan_from_reg(data->target_speed[index]); 936 break; 937 case FANIN_TOL: 938 tmp = data->tol_speed; 939 break; 940 } 941 942 return sprintf(buf, "%u\n", tmp); 943} 944 945static ssize_t 946store_fanin(struct device *dev, struct device_attribute *attr, 947 const char *buf, size_t count) 948{ 949 struct i2c_client *client = to_i2c_client(dev); 950 struct w83795_data *data = i2c_get_clientdata(client); 951 struct sensor_device_attribute_2 *sensor_attr = 952 to_sensor_dev_attr_2(attr); 953 int nr = sensor_attr->nr; 954 int index = sensor_attr->index; 955 unsigned long val; 956 957 if (strict_strtoul(buf, 10, &val) < 0) 958 return -EINVAL; 959 960 mutex_lock(&data->update_lock); 961 switch (nr) { 962 case FANIN_TARGET: 963 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff)); 964 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff); 965 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0); 966 data->target_speed[index] = val; 967 break; 968 case FANIN_TOL: 969 val = SENSORS_LIMIT(val, 0, 0x3f); 970 w83795_write(client, W83795_REG_TFTS, val); 971 data->tol_speed = val; 972 break; 973 } 974 mutex_unlock(&data->update_lock); 975 976 return count; 977} 978 979 980static ssize_t 981show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf) 982{ 983 struct i2c_client *client = to_i2c_client(dev); 984 struct w83795_data *data = i2c_get_clientdata(client); 985 struct sensor_device_attribute_2 *sensor_attr = 986 to_sensor_dev_attr_2(attr); 987 int nr = sensor_attr->nr; 988 int index = sensor_attr->index; 989 long tmp = temp_from_reg(data->pwm_temp[index][nr]); 990 991 return sprintf(buf, "%ld\n", tmp); 992} 993 994static ssize_t 995store_temp_pwm(struct device *dev, struct device_attribute *attr, 996 const char *buf, size_t count) 997{ 998 struct i2c_client *client = to_i2c_client(dev); 999 struct w83795_data *data = i2c_get_clientdata(client); 1000 struct sensor_device_attribute_2 *sensor_attr = 1001 to_sensor_dev_attr_2(attr); 1002 int nr = sensor_attr->nr; 1003 int index = sensor_attr->index; 1004 unsigned long val; 1005 u8 tmp; 1006 1007 if (strict_strtoul(buf, 10, &val) < 0) 1008 return -EINVAL; 1009 val /= 1000; 1010 1011 mutex_lock(&data->update_lock); 1012 switch (nr) { 1013 case TEMP_PWM_TTTI: 1014 val = SENSORS_LIMIT(val, 0, 0x7f); 1015 w83795_write(client, W83795_REG_TTTI(index), val); 1016 break; 1017 case TEMP_PWM_CTFS: 1018 val = SENSORS_LIMIT(val, 0, 0x7f); 1019 w83795_write(client, W83795_REG_CTFS(index), val); 1020 break; 1021 case TEMP_PWM_HCT: 1022 val = SENSORS_LIMIT(val, 0, 0x0f); 1023 tmp = w83795_read(client, W83795_REG_HT(index)); 1024 tmp &= 0x0f; 1025 tmp |= (val << 4) & 0xf0; 1026 w83795_write(client, W83795_REG_HT(index), tmp); 1027 break; 1028 case TEMP_PWM_HOT: 1029 val = SENSORS_LIMIT(val, 0, 0x0f); 1030 tmp = w83795_read(client, W83795_REG_HT(index)); 1031 tmp &= 0xf0; 1032 tmp |= val & 0x0f; 1033 w83795_write(client, W83795_REG_HT(index), tmp); 1034 break; 1035 } 1036 data->pwm_temp[index][nr] = val; 1037 mutex_unlock(&data->update_lock); 1038 1039 return count; 1040} 1041 1042static ssize_t 1043show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1044{ 1045 struct i2c_client *client = to_i2c_client(dev); 1046 struct w83795_data *data = i2c_get_clientdata(client); 1047 struct sensor_device_attribute_2 *sensor_attr = 1048 to_sensor_dev_attr_2(attr); 1049 int nr = sensor_attr->nr; 1050 int index = sensor_attr->index; 1051 1052 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]); 1053} 1054 1055static ssize_t 1056store_sf4_pwm(struct device *dev, struct device_attribute *attr, 1057 const char *buf, size_t count) 1058{ 1059 struct i2c_client *client = to_i2c_client(dev); 1060 struct w83795_data *data = i2c_get_clientdata(client); 1061 struct sensor_device_attribute_2 *sensor_attr = 1062 to_sensor_dev_attr_2(attr); 1063 int nr = sensor_attr->nr; 1064 int index = sensor_attr->index; 1065 unsigned long val; 1066 1067 if (strict_strtoul(buf, 10, &val) < 0) 1068 return -EINVAL; 1069 1070 mutex_lock(&data->update_lock); 1071 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val); 1072 data->sf4_reg[index][SF4_PWM][nr] = val; 1073 mutex_unlock(&data->update_lock); 1074 1075 return count; 1076} 1077 1078static ssize_t 1079show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf) 1080{ 1081 struct i2c_client *client = to_i2c_client(dev); 1082 struct w83795_data *data = i2c_get_clientdata(client); 1083 struct sensor_device_attribute_2 *sensor_attr = 1084 to_sensor_dev_attr_2(attr); 1085 int nr = sensor_attr->nr; 1086 int index = sensor_attr->index; 1087 1088 return sprintf(buf, "%u\n", 1089 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000); 1090} 1091 1092static ssize_t 1093store_sf4_temp(struct device *dev, struct device_attribute *attr, 1094 const char *buf, size_t count) 1095{ 1096 struct i2c_client *client = to_i2c_client(dev); 1097 struct w83795_data *data = i2c_get_clientdata(client); 1098 struct sensor_device_attribute_2 *sensor_attr = 1099 to_sensor_dev_attr_2(attr); 1100 int nr = sensor_attr->nr; 1101 int index = sensor_attr->index; 1102 unsigned long val; 1103 1104 if (strict_strtoul(buf, 10, &val) < 0) 1105 return -EINVAL; 1106 val /= 1000; 1107 1108 mutex_lock(&data->update_lock); 1109 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val); 1110 data->sf4_reg[index][SF4_TEMP][nr] = val; 1111 mutex_unlock(&data->update_lock); 1112 1113 return count; 1114} 1115 1116 1117static ssize_t 1118show_temp(struct device *dev, struct device_attribute *attr, char *buf) 1119{ 1120 struct sensor_device_attribute_2 *sensor_attr = 1121 to_sensor_dev_attr_2(attr); 1122 int nr = sensor_attr->nr; 1123 int index = sensor_attr->index; 1124 struct w83795_data *data = w83795_update_device(dev); 1125 long temp = temp_from_reg(data->temp[index][nr] & 0x7f); 1126 1127 if (TEMP_READ == nr) 1128 temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) 1129 * 250; 1130 if (data->temp[index][nr] & 0x80) 1131 temp = -temp; 1132 return sprintf(buf, "%ld\n", temp); 1133} 1134 1135static ssize_t 1136store_temp(struct device *dev, struct device_attribute *attr, 1137 const char *buf, size_t count) 1138{ 1139 struct sensor_device_attribute_2 *sensor_attr = 1140 to_sensor_dev_attr_2(attr); 1141 int nr = sensor_attr->nr; 1142 int index = sensor_attr->index; 1143 struct i2c_client *client = to_i2c_client(dev); 1144 struct w83795_data *data = i2c_get_clientdata(client); 1145 long tmp; 1146 1147 if (strict_strtol(buf, 10, &tmp) < 0) 1148 return -EINVAL; 1149 1150 mutex_lock(&data->update_lock); 1151 data->temp[index][nr] = temp_to_reg(tmp, -128, 127); 1152 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]); 1153 mutex_unlock(&data->update_lock); 1154 return count; 1155} 1156 1157 1158static ssize_t 1159show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf) 1160{ 1161 struct i2c_client *client = to_i2c_client(dev); 1162 struct w83795_data *data = i2c_get_clientdata(client); 1163 struct sensor_device_attribute_2 *sensor_attr = 1164 to_sensor_dev_attr_2(attr); 1165 int index = sensor_attr->index; 1166 u8 tmp; 1167 1168 if (data->enable_dts == 0) 1169 return sprintf(buf, "%d\n", 0); 1170 1171 if ((data->has_dts >> index) & 0x01) { 1172 if (data->enable_dts & 2) 1173 tmp = 5; 1174 else 1175 tmp = 6; 1176 } else { 1177 tmp = 0; 1178 } 1179 1180 return sprintf(buf, "%d\n", tmp); 1181} 1182 1183static ssize_t 1184show_dts(struct device *dev, struct device_attribute *attr, char *buf) 1185{ 1186 struct sensor_device_attribute_2 *sensor_attr = 1187 to_sensor_dev_attr_2(attr); 1188 int index = sensor_attr->index; 1189 struct w83795_data *data = w83795_update_device(dev); 1190 long temp = temp_from_reg(data->dts[index] & 0x7f); 1191 1192 temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250; 1193 if (data->dts[index] & 0x80) 1194 temp = -temp; 1195 return sprintf(buf, "%ld\n", temp); 1196} 1197 1198static ssize_t 1199show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf) 1200{ 1201 struct sensor_device_attribute_2 *sensor_attr = 1202 to_sensor_dev_attr_2(attr); 1203 int nr = sensor_attr->nr; 1204 struct i2c_client *client = to_i2c_client(dev); 1205 struct w83795_data *data = i2c_get_clientdata(client); 1206 long temp = temp_from_reg(data->dts_ext[nr] & 0x7f); 1207 1208 if (data->dts_ext[nr] & 0x80) 1209 temp = -temp; 1210 return sprintf(buf, "%ld\n", temp); 1211} 1212 1213static ssize_t 1214store_dts_ext(struct device *dev, struct device_attribute *attr, 1215 const char *buf, size_t count) 1216{ 1217 struct sensor_device_attribute_2 *sensor_attr = 1218 to_sensor_dev_attr_2(attr); 1219 int nr = sensor_attr->nr; 1220 struct i2c_client *client = to_i2c_client(dev); 1221 struct w83795_data *data = i2c_get_clientdata(client); 1222 long tmp; 1223 1224 if (strict_strtol(buf, 10, &tmp) < 0) 1225 return -EINVAL; 1226 1227 mutex_lock(&data->update_lock); 1228 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127); 1229 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]); 1230 mutex_unlock(&data->update_lock); 1231 return count; 1232} 1233 1234 1235/* 1236 Type 3: Thermal diode 1237 Type 4: Thermistor 1238 1239 Temp5-6, default TR 1240 Temp1-4, default TD 1241*/ 1242 1243static ssize_t 1244show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) 1245{ 1246 struct i2c_client *client = to_i2c_client(dev); 1247 struct w83795_data *data = i2c_get_clientdata(client); 1248 struct sensor_device_attribute_2 *sensor_attr = 1249 to_sensor_dev_attr_2(attr); 1250 int index = sensor_attr->index; 1251 u8 tmp; 1252 1253 if (data->has_temp >> index & 0x01) { 1254 if (data->temp_mode >> index & 0x01) 1255 tmp = 3; 1256 else 1257 tmp = 4; 1258 } else { 1259 tmp = 0; 1260 } 1261 1262 return sprintf(buf, "%d\n", tmp); 1263} 1264 1265static ssize_t 1266store_temp_mode(struct device *dev, struct device_attribute *attr, 1267 const char *buf, size_t count) 1268{ 1269 struct i2c_client *client = to_i2c_client(dev); 1270 struct w83795_data *data = i2c_get_clientdata(client); 1271 struct sensor_device_attribute_2 *sensor_attr = 1272 to_sensor_dev_attr_2(attr); 1273 int index = sensor_attr->index; 1274 unsigned long val; 1275 u8 tmp; 1276 u32 mask; 1277 1278 if (strict_strtoul(buf, 10, &val) < 0) 1279 return -EINVAL; 1280 if ((val != 4) && (val != 3)) 1281 return -EINVAL; 1282 if ((index > 3) && (val == 3)) 1283 return -EINVAL; 1284 1285 mutex_lock(&data->update_lock); 1286 if (val == 3) { 1287 val = TEMP_CTRL_TD; 1288 data->has_temp |= 1 << index; 1289 data->temp_mode |= 1 << index; 1290 } else if (val == 4) { 1291 val = TEMP_CTRL_TR; 1292 data->has_temp |= 1 << index; 1293 tmp = 1 << index; 1294 data->temp_mode &= ~tmp; 1295 } 1296 1297 if (index > 3) 1298 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 1299 else 1300 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1301 1302 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT]; 1303 tmp &= ~mask; 1304 tmp |= W83795_REG_TEMP_CTRL[index][val]; 1305 1306 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT]; 1307 data->has_in &= ~mask; 1308 1309 if (index > 3) 1310 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp); 1311 else 1312 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp); 1313 1314 mutex_unlock(&data->update_lock); 1315 return count; 1316} 1317 1318 1319/* show/store VIN */ 1320static ssize_t 1321show_in(struct device *dev, struct device_attribute *attr, char *buf) 1322{ 1323 struct sensor_device_attribute_2 *sensor_attr = 1324 to_sensor_dev_attr_2(attr); 1325 int nr = sensor_attr->nr; 1326 int index = sensor_attr->index; 1327 struct w83795_data *data = w83795_update_device(dev); 1328 u16 val = data->in[index][nr]; 1329 u8 lsb_idx; 1330 1331 switch (nr) { 1332 case IN_READ: 1333 /* calculate this value again by sensors as sensors3.conf */ 1334 if ((index >= 17) && 1335 ((data->has_gain >> (index - 17)) & 1)) 1336 val *= 8; 1337 break; 1338 case IN_MAX: 1339 case IN_LOW: 1340 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1341 val <<= 2; 1342 val |= (data->in_lsb[lsb_idx][nr] >> 1343 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03; 1344 if ((index >= 17) && 1345 ((data->has_gain >> (index - 17)) & 1)) 1346 val *= 8; 1347 break; 1348 } 1349 val = in_from_reg(index, val); 1350 1351 return sprintf(buf, "%d\n", val); 1352} 1353 1354static ssize_t 1355store_in(struct device *dev, struct device_attribute *attr, 1356 const char *buf, size_t count) 1357{ 1358 struct sensor_device_attribute_2 *sensor_attr = 1359 to_sensor_dev_attr_2(attr); 1360 int nr = sensor_attr->nr; 1361 int index = sensor_attr->index; 1362 struct i2c_client *client = to_i2c_client(dev); 1363 struct w83795_data *data = i2c_get_clientdata(client); 1364 unsigned long val; 1365 u8 tmp; 1366 u8 lsb_idx; 1367 1368 if (strict_strtoul(buf, 10, &val) < 0) 1369 return -EINVAL; 1370 val = in_to_reg(index, val); 1371 1372 if ((index >= 17) && 1373 ((data->has_gain >> (index - 17)) & 1)) 1374 val /= 8; 1375 val = SENSORS_LIMIT(val, 0, 0x3FF); 1376 mutex_lock(&data->update_lock); 1377 1378 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1379 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr)); 1380 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]); 1381 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]; 1382 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp); 1383 data->in_lsb[lsb_idx][nr] = tmp; 1384 1385 tmp = (val >> 2) & 0xff; 1386 w83795_write(client, W83795_REG_IN[index][nr], tmp); 1387 data->in[index][nr] = tmp; 1388 1389 mutex_unlock(&data->update_lock); 1390 return count; 1391} 1392 1393 1394static ssize_t 1395show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) 1396{ 1397 struct sensor_device_attribute_2 *sensor_attr = 1398 to_sensor_dev_attr_2(attr); 1399 int nr = sensor_attr->nr; 1400 struct i2c_client *client = to_i2c_client(dev); 1401 struct w83795_data *data = i2c_get_clientdata(client); 1402 u16 val = data->setup_pwm[nr]; 1403 1404 switch (nr) { 1405 case SETUP_PWM_UPTIME: 1406 case SETUP_PWM_DOWNTIME: 1407 val = time_from_reg(val); 1408 break; 1409 } 1410 1411 return sprintf(buf, "%d\n", val); 1412} 1413 1414static ssize_t 1415store_sf_setup(struct device *dev, struct device_attribute *attr, 1416 const char *buf, size_t count) 1417{ 1418 struct sensor_device_attribute_2 *sensor_attr = 1419 to_sensor_dev_attr_2(attr); 1420 int nr = sensor_attr->nr; 1421 struct i2c_client *client = to_i2c_client(dev); 1422 struct w83795_data *data = i2c_get_clientdata(client); 1423 unsigned long val; 1424 1425 if (strict_strtoul(buf, 10, &val) < 0) 1426 return -EINVAL; 1427 1428 switch (nr) { 1429 case SETUP_PWM_DEFAULT: 1430 val = SENSORS_LIMIT(val, 0, 0xff); 1431 break; 1432 case SETUP_PWM_UPTIME: 1433 case SETUP_PWM_DOWNTIME: 1434 val = time_to_reg(val); 1435 if (val == 0) 1436 return -EINVAL; 1437 break; 1438 } 1439 1440 mutex_lock(&data->update_lock); 1441 data->setup_pwm[nr] = val; 1442 w83795_write(client, W83795_REG_SETUP_PWM(nr), val); 1443 mutex_unlock(&data->update_lock); 1444 return count; 1445} 1446 1447 1448#define NOT_USED -1 1449 1450#define SENSOR_ATTR_IN(index) \ 1451 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ 1452 IN_READ, index), \ 1453 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ 1454 store_in, IN_MAX, index), \ 1455 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ 1456 store_in, IN_LOW, index), \ 1457 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ 1458 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \ 1459 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ 1460 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1461 index + ((index > 14) ? 1 : 0)) 1462 1463#define SENSOR_ATTR_FAN(index) \ 1464 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ 1465 NULL, FAN_INPUT, index - 1), \ 1466 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ 1467 show_fan, store_fan_min, FAN_MIN, index - 1), \ 1468 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ 1469 NULL, ALARM_STATUS, index + 31), \ 1470 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ 1471 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) 1472 1473#define SENSOR_ATTR_PWM(index) \ 1474 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ 1475 store_pwm, PWM_OUTPUT, index - 1), \ 1476 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ 1477 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ 1478 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ 1479 show_pwm, store_pwm, PWM_START, index - 1), \ 1480 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ 1481 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \ 1482 SENSOR_ATTR_2(fan##index##_div, S_IWUSR | S_IRUGO, \ 1483 show_pwm, store_pwm, PWM_DIV, index - 1), \ 1484 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \ 1485 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1) 1486 1487#define SENSOR_ATTR_FANIN_TARGET(index) \ 1488 SENSOR_ATTR_2(speed_cruise##index##_target, S_IWUSR | S_IRUGO, \ 1489 show_fanin, store_fanin, FANIN_TARGET, index - 1) 1490 1491#define SENSOR_ATTR_DTS(index) \ 1492 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \ 1493 show_dts_mode, NULL, NOT_USED, index - 7), \ 1494 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \ 1495 NULL, NOT_USED, index - 7), \ 1496 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \ 1497 store_dts_ext, DTS_CRIT, NOT_USED), \ 1498 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1499 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \ 1500 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_dts_ext, \ 1501 store_dts_ext, DTS_WARN, NOT_USED), \ 1502 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \ 1503 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \ 1504 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1505 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \ 1506 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1507 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) 1508 1509#define SENSOR_ATTR_TEMP(index) \ 1510 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \ 1511 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ 1512 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ 1513 NULL, TEMP_READ, index - 1), \ 1514 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ 1515 store_temp, TEMP_CRIT, index - 1), \ 1516 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1517 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ 1518 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \ 1519 store_temp, TEMP_WARN, index - 1), \ 1520 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \ 1521 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ 1522 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1523 show_alarm_beep, NULL, ALARM_STATUS, \ 1524 index + (index > 4 ? 11 : 17)), \ 1525 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1526 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1527 index + (index > 4 ? 11 : 17)), \ 1528 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \ 1529 show_temp_src, store_temp_src, NOT_USED, index - 1), \ 1530 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ 1531 show_temp_pwm_enable, store_temp_pwm_enable, \ 1532 TEMP_PWM_ENABLE, index - 1), \ 1533 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \ 1534 show_temp_pwm_enable, store_temp_pwm_enable, \ 1535 TEMP_PWM_FAN_MAP, index - 1), \ 1536 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \ 1537 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \ 1538 SENSOR_ATTR_2(temp##index##_crit, S_IWUSR | S_IRUGO, \ 1539 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \ 1540 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IWUSR | S_IRUGO, \ 1541 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \ 1542 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \ 1543 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \ 1544 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ 1545 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \ 1546 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ 1547 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \ 1548 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ 1549 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \ 1550 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ 1551 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \ 1552 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ 1553 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \ 1554 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ 1555 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \ 1556 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ 1557 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \ 1558 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ 1559 show_sf4_temp, store_sf4_temp, 0, index - 1), \ 1560 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ 1561 show_sf4_temp, store_sf4_temp, 1, index - 1), \ 1562 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ 1563 show_sf4_temp, store_sf4_temp, 2, index - 1), \ 1564 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ 1565 show_sf4_temp, store_sf4_temp, 3, index - 1), \ 1566 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ 1567 show_sf4_temp, store_sf4_temp, 4, index - 1), \ 1568 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ 1569 show_sf4_temp, store_sf4_temp, 5, index - 1), \ 1570 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ 1571 show_sf4_temp, store_sf4_temp, 6, index - 1) 1572 1573 1574static struct sensor_device_attribute_2 w83795_in[] = { 1575 SENSOR_ATTR_IN(0), 1576 SENSOR_ATTR_IN(1), 1577 SENSOR_ATTR_IN(2), 1578 SENSOR_ATTR_IN(3), 1579 SENSOR_ATTR_IN(4), 1580 SENSOR_ATTR_IN(5), 1581 SENSOR_ATTR_IN(6), 1582 SENSOR_ATTR_IN(7), 1583 SENSOR_ATTR_IN(8), 1584 SENSOR_ATTR_IN(9), 1585 SENSOR_ATTR_IN(10), 1586 SENSOR_ATTR_IN(11), 1587 SENSOR_ATTR_IN(12), 1588 SENSOR_ATTR_IN(13), 1589 SENSOR_ATTR_IN(14), 1590 SENSOR_ATTR_IN(15), 1591 SENSOR_ATTR_IN(16), 1592 SENSOR_ATTR_IN(17), 1593 SENSOR_ATTR_IN(18), 1594 SENSOR_ATTR_IN(19), 1595 SENSOR_ATTR_IN(20), 1596}; 1597 1598static struct sensor_device_attribute_2 w83795_fan[] = { 1599 SENSOR_ATTR_FAN(1), 1600 SENSOR_ATTR_FAN(2), 1601 SENSOR_ATTR_FAN(3), 1602 SENSOR_ATTR_FAN(4), 1603 SENSOR_ATTR_FAN(5), 1604 SENSOR_ATTR_FAN(6), 1605 SENSOR_ATTR_FAN(7), 1606 SENSOR_ATTR_FAN(8), 1607 SENSOR_ATTR_FAN(9), 1608 SENSOR_ATTR_FAN(10), 1609 SENSOR_ATTR_FAN(11), 1610 SENSOR_ATTR_FAN(12), 1611 SENSOR_ATTR_FAN(13), 1612 SENSOR_ATTR_FAN(14), 1613}; 1614 1615static struct sensor_device_attribute_2 w83795_temp[] = { 1616 SENSOR_ATTR_TEMP(1), 1617 SENSOR_ATTR_TEMP(2), 1618 SENSOR_ATTR_TEMP(3), 1619 SENSOR_ATTR_TEMP(4), 1620 SENSOR_ATTR_TEMP(5), 1621 SENSOR_ATTR_TEMP(6), 1622}; 1623 1624static struct sensor_device_attribute_2 w83795_dts[] = { 1625 SENSOR_ATTR_DTS(7), 1626 SENSOR_ATTR_DTS(8), 1627 SENSOR_ATTR_DTS(9), 1628 SENSOR_ATTR_DTS(10), 1629 SENSOR_ATTR_DTS(11), 1630 SENSOR_ATTR_DTS(12), 1631 SENSOR_ATTR_DTS(13), 1632 SENSOR_ATTR_DTS(14), 1633}; 1634 1635static struct sensor_device_attribute_2 w83795_static[] = { 1636 SENSOR_ATTR_FANIN_TARGET(1), 1637 SENSOR_ATTR_FANIN_TARGET(2), 1638 SENSOR_ATTR_FANIN_TARGET(3), 1639 SENSOR_ATTR_FANIN_TARGET(4), 1640 SENSOR_ATTR_FANIN_TARGET(5), 1641 SENSOR_ATTR_FANIN_TARGET(6), 1642 SENSOR_ATTR_FANIN_TARGET(7), 1643 SENSOR_ATTR_FANIN_TARGET(8), 1644 SENSOR_ATTR_PWM(1), 1645 SENSOR_ATTR_PWM(2), 1646}; 1647 1648/* all registers existed in 795g than 795adg, 1649 * like PWM3 - PWM8 */ 1650static struct sensor_device_attribute_2 w83795_left_reg[] = { 1651 SENSOR_ATTR_PWM(3), 1652 SENSOR_ATTR_PWM(4), 1653 SENSOR_ATTR_PWM(5), 1654 SENSOR_ATTR_PWM(6), 1655 SENSOR_ATTR_PWM(7), 1656 SENSOR_ATTR_PWM(8), 1657}; 1658 1659static struct sensor_device_attribute_2 sda_single_files[] = { 1660 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep, 1661 store_chassis_clear, ALARM_STATUS, 46), 1662 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable, 1663 store_beep_enable, NOT_USED, NOT_USED), 1664 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin, 1665 store_fanin, FANIN_TOL, NOT_USED), 1666 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, 1667 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), 1668 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, 1669 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), 1670 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, 1671 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), 1672}; 1673 1674/* 1675 * Driver interface 1676 */ 1677 1678static void w83795_init_client(struct i2c_client *client) 1679{ 1680 if (reset) 1681 w83795_write(client, W83795_REG_CONFIG, 0x80); 1682 1683 /* Start monitoring */ 1684 w83795_write(client, W83795_REG_CONFIG, 1685 w83795_read(client, W83795_REG_CONFIG) | 0x01); 1686} 1687 1688static int w83795_get_device_id(struct i2c_client *client) 1689{ 1690 int device_id; 1691 1692 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID); 1693 1694 /* Special case for rev. A chips; can't be checked first because later 1695 revisions emulate this for compatibility */ 1696 if (device_id < 0 || (device_id & 0xf0) != 0x50) { 1697 int alt_id; 1698 1699 alt_id = i2c_smbus_read_byte_data(client, 1700 W83795_REG_DEVICEID_A); 1701 if (alt_id == 0x50) 1702 device_id = alt_id; 1703 } 1704 1705 return device_id; 1706} 1707 1708/* Return 0 if detection is successful, -ENODEV otherwise */ 1709static int w83795_detect(struct i2c_client *client, 1710 struct i2c_board_info *info) 1711{ 1712 int bank, vendor_id, device_id, expected, i2c_addr, config; 1713 struct i2c_adapter *adapter = client->adapter; 1714 unsigned short address = client->addr; 1715 const char *chip_name; 1716 1717 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1718 return -ENODEV; 1719 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1720 if (bank < 0 || (bank & 0x7c)) { 1721 dev_dbg(&adapter->dev, 1722 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1723 address, "bank"); 1724 return -ENODEV; 1725 } 1726 1727 /* Check Nuvoton vendor ID */ 1728 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID); 1729 expected = bank & 0x80 ? 0x5c : 0xa3; 1730 if (vendor_id != expected) { 1731 dev_dbg(&adapter->dev, 1732 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1733 address, "vendor id"); 1734 return -ENODEV; 1735 } 1736 1737 /* Check device ID */ 1738 device_id = w83795_get_device_id(client) | 1739 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8); 1740 if ((device_id >> 4) != 0x795) { 1741 dev_dbg(&adapter->dev, 1742 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1743 address, "device id\n"); 1744 return -ENODEV; 1745 } 1746 1747 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR 1748 should match */ 1749 if ((bank & 0x07) == 0) { 1750 i2c_addr = i2c_smbus_read_byte_data(client, 1751 W83795_REG_I2C_ADDR); 1752 if ((i2c_addr & 0x7f) != address) { 1753 dev_dbg(&adapter->dev, 1754 "w83795: Detection failed at addr 0x%02hx, " 1755 "check %s\n", address, "i2c addr"); 1756 return -ENODEV; 1757 } 1758 } 1759 1760 /* Check 795 chip type: 795G or 795ADG 1761 Usually we don't write to chips during detection, but here we don't 1762 quite have the choice; hopefully it's OK, we are about to return 1763 success anyway */ 1764 if ((bank & 0x07) != 0) 1765 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, 1766 bank & ~0x07); 1767 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG); 1768 if (config & W83795_REG_CONFIG_CONFIG48) 1769 chip_name = "w83795adg"; 1770 else 1771 chip_name = "w83795g"; 1772 1773 strlcpy(info->type, chip_name, I2C_NAME_SIZE); 1774 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name, 1775 'A' + (device_id & 0xf), address); 1776 1777 return 0; 1778} 1779 1780static void w83795_remove_files(struct device *dev) 1781{ 1782 struct w83795_data *data = dev_get_drvdata(dev); 1783 int i; 1784 1785 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) 1786 device_remove_file(dev, &w83795_in[i].dev_attr); 1787 1788 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) 1789 device_remove_file(dev, &w83795_fan[i].dev_attr); 1790 1791 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) 1792 device_remove_file(dev, &sda_single_files[i].dev_attr); 1793 1794 if (data->chip_type == w83795g) { 1795 for (i = 0; i < ARRAY_SIZE(w83795_left_reg); i++) 1796 device_remove_file(dev, &w83795_left_reg[i].dev_attr); 1797 } 1798 1799 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) 1800 device_remove_file(dev, &w83795_temp[i].dev_attr); 1801 1802 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) 1803 device_remove_file(dev, &w83795_dts[i].dev_attr); 1804 1805 for (i = 0; i < ARRAY_SIZE(w83795_static); i++) 1806 device_remove_file(dev, &w83795_static[i].dev_attr); 1807} 1808 1809static int w83795_probe(struct i2c_client *client, 1810 const struct i2c_device_id *id) 1811{ 1812 int i; 1813 u8 tmp; 1814 struct device *dev = &client->dev; 1815 struct w83795_data *data; 1816 int err = 0; 1817 1818 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL); 1819 if (!data) { 1820 err = -ENOMEM; 1821 goto exit; 1822 } 1823 1824 i2c_set_clientdata(client, data); 1825 data->chip_type = id->driver_data; 1826 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1827 mutex_init(&data->update_lock); 1828 1829 /* Initialize the chip */ 1830 w83795_init_client(client); 1831 1832 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1); 1833 data->has_in |= w83795_read(client, W83795_REG_VOLT_CTRL2) << 8; 1834 /* VSEN11-9 not for 795adg */ 1835 if (data->chip_type == w83795adg) 1836 data->has_in &= 0xf8ff; 1837 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1); 1838 data->has_fan |= w83795_read(client, W83795_REG_FANIN_CTRL2) << 8; 1839 1840 /* VDSEN12-17 and TR1-6, TD1-4 use same register */ 1841 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 1842 if (tmp & 0x20) 1843 data->enable_dts = 1; 1844 else 1845 data->enable_dts = 0; 1846 data->has_temp = 0; 1847 data->temp_mode = 0; 1848 if (tmp & 0x08) { 1849 if (tmp & 0x04) 1850 data->has_temp |= 0x20; 1851 else 1852 data->has_in |= 0x10000; 1853 } 1854 if (tmp & 0x02) { 1855 if (tmp & 0x01) 1856 data->has_temp |= 0x10; 1857 else 1858 data->has_in |= 0x8000; 1859 } 1860 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1861 if (tmp & 0x40) { 1862 data->has_temp |= 0x08; 1863 if (!(tmp & 0x80)) 1864 data->temp_mode |= 0x08; 1865 } else if (tmp & 0x80) { 1866 data->has_in |= 0x100000; 1867 } 1868 if (tmp & 0x10) { 1869 data->has_temp |= 0x04; 1870 if (!(tmp & 0x20)) 1871 data->temp_mode |= 0x04; 1872 } else if (tmp & 0x20) { 1873 data->has_in |= 0x80000; 1874 } 1875 if (tmp & 0x04) { 1876 data->has_temp |= 0x02; 1877 if (!(tmp & 0x08)) 1878 data->temp_mode |= 0x02; 1879 } else if (tmp & 0x08) { 1880 data->has_in |= 0x40000; 1881 } 1882 if (tmp & 0x01) { 1883 data->has_temp |= 0x01; 1884 if (!(tmp & 0x02)) 1885 data->temp_mode |= 0x01; 1886 } else if (tmp & 0x02) { 1887 data->has_in |= 0x20000; 1888 } 1889 1890 /* Check DTS enable status */ 1891 if (data->enable_dts == 0) { 1892 data->has_dts = 0; 1893 } else { 1894 if (1 & w83795_read(client, W83795_REG_DTSC)) 1895 data->enable_dts |= 2; 1896 data->has_dts = w83795_read(client, W83795_REG_DTSE); 1897 } 1898 1899 /* First update the voltages measured value and limits */ 1900 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 1901 if (!(data->has_in & (1 << i))) 1902 continue; 1903 data->in[i][IN_MAX] = 1904 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 1905 data->in[i][IN_LOW] = 1906 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 1907 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 1908 tmp |= (w83795_read(client, W83795_REG_VRLSB) 1909 >> VRLSB_SHIFT) & 0x03; 1910 data->in[i][IN_READ] = tmp; 1911 } 1912 for (i = 0; i < IN_LSB_REG_NUM; i++) { 1913 data->in_lsb[i][IN_MAX] = 1914 w83795_read(client, IN_LSB_REG(i, IN_MAX)); 1915 data->in_lsb[i][IN_LOW] = 1916 w83795_read(client, IN_LSB_REG(i, IN_LOW)); 1917 } 1918 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f; 1919 1920 /* First update fan and limits */ 1921 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 1922 if (!(data->has_fan & (1 << i))) 1923 continue; 1924 data->fan_min[i] = 1925 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4; 1926 data->fan_min[i] |= 1927 (w83795_read(client, W83795_REG_FAN_MIN_LSB(i) >> 1928 W83795_REG_FAN_MIN_LSB_SHIFT(i))) & 0x0F; 1929 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 1930 data->fan[i] |= 1931 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F; 1932 } 1933 1934 /* temperature and limits */ 1935 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 1936 if (!(data->has_temp & (1 << i))) 1937 continue; 1938 data->temp[i][TEMP_CRIT] = 1939 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]); 1940 data->temp[i][TEMP_CRIT_HYST] = 1941 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]); 1942 data->temp[i][TEMP_WARN] = 1943 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]); 1944 data->temp[i][TEMP_WARN_HYST] = 1945 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]); 1946 data->temp[i][TEMP_READ] = 1947 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 1948 data->temp_read_vrlsb[i] = 1949 w83795_read(client, W83795_REG_VRLSB); 1950 } 1951 1952 /* dts temperature and limits */ 1953 if (data->enable_dts != 0) { 1954 data->dts_ext[DTS_CRIT] = 1955 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT)); 1956 data->dts_ext[DTS_CRIT_HYST] = 1957 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST)); 1958 data->dts_ext[DTS_WARN] = 1959 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN)); 1960 data->dts_ext[DTS_WARN_HYST] = 1961 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST)); 1962 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 1963 if (!(data->has_dts & (1 << i))) 1964 continue; 1965 data->dts[i] = w83795_read(client, W83795_REG_DTS(i)); 1966 data->dts_read_vrlsb[i] = 1967 w83795_read(client, W83795_REG_VRLSB); 1968 } 1969 } 1970 1971 /* First update temp source selction */ 1972 for (i = 0; i < 3; i++) 1973 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i)); 1974 1975 /* pwm and smart fan */ 1976 if (data->chip_type == w83795g) 1977 data->has_pwm = 8; 1978 else 1979 data->has_pwm = 2; 1980 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1); 1981 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2); 1982 /* w83795adg only support pwm2-0 */ 1983 for (i = 0; i < W83795_REG_TEMP_NUM; i++) 1984 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i)); 1985 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC); 1986 for (i = 0; i < data->has_pwm; i++) { 1987 for (tmp = 0; tmp < 5; tmp++) { 1988 data->pwm[i][tmp] = 1989 w83795_read(client, W83795_REG_PWM(i, tmp)); 1990 } 1991 } 1992 for (i = 0; i < 8; i++) { 1993 data->target_speed[i] = 1994 w83795_read(client, W83795_REG_FTSH(i)) << 4; 1995 data->target_speed[i] |= 1996 w83795_read(client, W83795_REG_FTSL(i)) >> 4; 1997 } 1998 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f; 1999 2000 for (i = 0; i < W83795_REG_TEMP_NUM; i++) { 2001 data->pwm_temp[i][TEMP_PWM_TTTI] = 2002 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f; 2003 data->pwm_temp[i][TEMP_PWM_CTFS] = 2004 w83795_read(client, W83795_REG_CTFS(i)); 2005 tmp = w83795_read(client, W83795_REG_HT(i)); 2006 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f; 2007 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f; 2008 } 2009 for (i = 0; i < W83795_REG_TEMP_NUM; i++) { 2010 for (tmp = 0; tmp < 7; tmp++) { 2011 data->sf4_reg[i][SF4_TEMP][tmp] = 2012 w83795_read(client, 2013 W83795_REG_SF4_TEMP(i, tmp)); 2014 data->sf4_reg[i][SF4_PWM][tmp] = 2015 w83795_read(client, W83795_REG_SF4_PWM(i, tmp)); 2016 } 2017 } 2018 2019 /* Setup PWM Register */ 2020 for (i = 0; i < 3; i++) { 2021 data->setup_pwm[i] = 2022 w83795_read(client, W83795_REG_SETUP_PWM(i)); 2023 } 2024 2025 /* alarm and beep */ 2026 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) { 2027 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 2028 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i)); 2029 } 2030 data->beep_enable = 2031 (w83795_read(client, W83795_REG_BEEP(5)) >> 7) & 0x01; 2032 2033 /* Register sysfs hooks */ 2034 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) { 2035 if (!(data->has_in & (1 << (i / 6)))) 2036 continue; 2037 err = device_create_file(dev, &w83795_in[i].dev_attr); 2038 if (err) 2039 goto exit_remove; 2040 } 2041 2042 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) { 2043 if (!(data->has_fan & (1 << (i / 5)))) 2044 continue; 2045 err = device_create_file(dev, &w83795_fan[i].dev_attr); 2046 if (err) 2047 goto exit_remove; 2048 } 2049 2050 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { 2051 err = device_create_file(dev, &sda_single_files[i].dev_attr); 2052 if (err) 2053 goto exit_remove; 2054 } 2055 2056 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) { 2057 if (!(data->has_temp & (1 << (i / 29)))) 2058 continue; 2059 err = device_create_file(dev, &w83795_temp[i].dev_attr); 2060 if (err) 2061 goto exit_remove; 2062 } 2063 2064 if (data->enable_dts != 0) { 2065 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) { 2066 if (!(data->has_dts & (1 << (i / 8)))) 2067 continue; 2068 err = device_create_file(dev, &w83795_dts[i].dev_attr); 2069 if (err) 2070 goto exit_remove; 2071 } 2072 } 2073 2074 if (data->chip_type == w83795g) { 2075 for (i = 0; i < ARRAY_SIZE(w83795_left_reg); i++) { 2076 err = device_create_file(dev, 2077 &w83795_left_reg[i].dev_attr); 2078 if (err) 2079 goto exit_remove; 2080 } 2081 } 2082 2083 for (i = 0; i < ARRAY_SIZE(w83795_static); i++) { 2084 err = device_create_file(dev, &w83795_static[i].dev_attr); 2085 if (err) 2086 goto exit_remove; 2087 } 2088 2089 data->hwmon_dev = hwmon_device_register(dev); 2090 if (IS_ERR(data->hwmon_dev)) { 2091 err = PTR_ERR(data->hwmon_dev); 2092 goto exit_remove; 2093 } 2094 2095 return 0; 2096 2097exit_remove: 2098 w83795_remove_files(dev); 2099 kfree(data); 2100exit: 2101 return err; 2102} 2103 2104static int w83795_remove(struct i2c_client *client) 2105{ 2106 struct w83795_data *data = i2c_get_clientdata(client); 2107 2108 hwmon_device_unregister(data->hwmon_dev); 2109 w83795_remove_files(&client->dev); 2110 kfree(data); 2111 2112 return 0; 2113} 2114 2115 2116static const struct i2c_device_id w83795_id[] = { 2117 { "w83795g", w83795g }, 2118 { "w83795adg", w83795adg }, 2119 { } 2120}; 2121MODULE_DEVICE_TABLE(i2c, w83795_id); 2122 2123static struct i2c_driver w83795_driver = { 2124 .driver = { 2125 .name = "w83795", 2126 }, 2127 .probe = w83795_probe, 2128 .remove = w83795_remove, 2129 .id_table = w83795_id, 2130 2131 .class = I2C_CLASS_HWMON, 2132 .detect = w83795_detect, 2133 .address_list = normal_i2c, 2134}; 2135 2136static int __init sensors_w83795_init(void) 2137{ 2138 return i2c_add_driver(&w83795_driver); 2139} 2140 2141static void __exit sensors_w83795_exit(void) 2142{ 2143 i2c_del_driver(&w83795_driver); 2144} 2145 2146MODULE_AUTHOR("Wei Song"); 2147MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver"); 2148MODULE_LICENSE("GPL"); 2149 2150module_init(sensors_w83795_init); 2151module_exit(sensors_w83795_exit); 2152