w83795.c revision 54891a3c135b30ca0718dbf81f78260795a5b2fe
1/* 2 * w83795.c - Linux kernel driver for hardware monitoring 3 * Copyright (C) 2008 Nuvoton Technology Corp. 4 * Wei Song 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation - version 2. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 18 * 02110-1301 USA. 19 * 20 * Supports following chips: 21 * 22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA 23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no 24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no 25 */ 26 27#include <linux/kernel.h> 28#include <linux/module.h> 29#include <linux/init.h> 30#include <linux/slab.h> 31#include <linux/i2c.h> 32#include <linux/hwmon.h> 33#include <linux/hwmon-sysfs.h> 34#include <linux/err.h> 35#include <linux/mutex.h> 36#include <linux/delay.h> 37 38/* Addresses to scan */ 39static const unsigned short normal_i2c[] = { 40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END 41}; 42 43 44static int reset; 45module_param(reset, bool, 0); 46MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); 47 48 49#define W83795_REG_BANKSEL 0x00 50#define W83795_REG_VENDORID 0xfd 51#define W83795_REG_CHIPID 0xfe 52#define W83795_REG_DEVICEID 0xfb 53#define W83795_REG_DEVICEID_A 0xff 54 55#define W83795_REG_I2C_ADDR 0xfc 56#define W83795_REG_CONFIG 0x01 57#define W83795_REG_CONFIG_CONFIG48 0x04 58#define W83795_REG_CONFIG_START 0x01 59 60/* Multi-Function Pin Ctrl Registers */ 61#define W83795_REG_VOLT_CTRL1 0x02 62#define W83795_REG_VOLT_CTRL2 0x03 63#define W83795_REG_TEMP_CTRL1 0x04 64#define W83795_REG_TEMP_CTRL2 0x05 65#define W83795_REG_FANIN_CTRL1 0x06 66#define W83795_REG_FANIN_CTRL2 0x07 67#define W83795_REG_VMIGB_CTRL 0x08 68 69#define TEMP_CTRL_DISABLE 0 70#define TEMP_CTRL_TD 1 71#define TEMP_CTRL_VSEN 2 72#define TEMP_CTRL_TR 3 73#define TEMP_CTRL_SHIFT 4 74#define TEMP_CTRL_HASIN_SHIFT 5 75/* temp mode may effect VSEN17-12 (in20-15) */ 76static const u16 W83795_REG_TEMP_CTRL[][6] = { 77 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */ 78 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */ 79 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */ 80 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */ 81 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */ 82 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */ 83 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */ 84}; 85 86#define TEMP_READ 0 87#define TEMP_CRIT 1 88#define TEMP_CRIT_HYST 2 89#define TEMP_WARN 3 90#define TEMP_WARN_HYST 4 91/* only crit and crit_hyst affect real-time alarm status 92 * current crit crit_hyst warn warn_hyst */ 93static const u16 W83795_REG_TEMP[][5] = { 94 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */ 95 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */ 96 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */ 97 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */ 98 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */ 99 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */ 100}; 101 102#define IN_READ 0 103#define IN_MAX 1 104#define IN_LOW 2 105static const u16 W83795_REG_IN[][3] = { 106 /* Current, HL, LL */ 107 {0x10, 0x70, 0x71}, /* VSEN1 */ 108 {0x11, 0x72, 0x73}, /* VSEN2 */ 109 {0x12, 0x74, 0x75}, /* VSEN3 */ 110 {0x13, 0x76, 0x77}, /* VSEN4 */ 111 {0x14, 0x78, 0x79}, /* VSEN5 */ 112 {0x15, 0x7a, 0x7b}, /* VSEN6 */ 113 {0x16, 0x7c, 0x7d}, /* VSEN7 */ 114 {0x17, 0x7e, 0x7f}, /* VSEN8 */ 115 {0x18, 0x80, 0x81}, /* VSEN9 */ 116 {0x19, 0x82, 0x83}, /* VSEN10 */ 117 {0x1A, 0x84, 0x85}, /* VSEN11 */ 118 {0x1B, 0x86, 0x87}, /* VTT */ 119 {0x1C, 0x88, 0x89}, /* 3VDD */ 120 {0x1D, 0x8a, 0x8b}, /* 3VSB */ 121 {0x1E, 0x8c, 0x8d}, /* VBAT */ 122 {0x1F, 0xa6, 0xa7}, /* VSEN12 */ 123 {0x20, 0xaa, 0xab}, /* VSEN13 */ 124 {0x21, 0x96, 0x97}, /* VSEN14 */ 125 {0x22, 0x9a, 0x9b}, /* VSEN15 */ 126 {0x23, 0x9e, 0x9f}, /* VSEN16 */ 127 {0x24, 0xa2, 0xa3}, /* VSEN17 */ 128}; 129#define W83795_REG_VRLSB 0x3C 130#define VRLSB_SHIFT 6 131 132static const u8 W83795_REG_IN_HL_LSB[] = { 133 0x8e, /* VSEN1-4 */ 134 0x90, /* VSEN5-8 */ 135 0x92, /* VSEN9-11 */ 136 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */ 137 0xa8, /* VSEN12 */ 138 0xac, /* VSEN13 */ 139 0x98, /* VSEN14 */ 140 0x9c, /* VSEN15 */ 141 0xa0, /* VSEN16 */ 142 0xa4, /* VSEN17 */ 143}; 144 145#define IN_LSB_REG(index, type) \ 146 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \ 147 : (W83795_REG_IN_HL_LSB[(index)] + 1)) 148 149#define IN_LSB_REG_NUM 10 150 151#define IN_LSB_SHIFT 0 152#define IN_LSB_IDX 1 153static const u8 IN_LSB_SHIFT_IDX[][2] = { 154 /* High/Low LSB shift, LSB No. */ 155 {0x00, 0x00}, /* VSEN1 */ 156 {0x02, 0x00}, /* VSEN2 */ 157 {0x04, 0x00}, /* VSEN3 */ 158 {0x06, 0x00}, /* VSEN4 */ 159 {0x00, 0x01}, /* VSEN5 */ 160 {0x02, 0x01}, /* VSEN6 */ 161 {0x04, 0x01}, /* VSEN7 */ 162 {0x06, 0x01}, /* VSEN8 */ 163 {0x00, 0x02}, /* VSEN9 */ 164 {0x02, 0x02}, /* VSEN10 */ 165 {0x04, 0x02}, /* VSEN11 */ 166 {0x00, 0x03}, /* VTT */ 167 {0x02, 0x03}, /* 3VDD */ 168 {0x04, 0x03}, /* 3VSB */ 169 {0x06, 0x03}, /* VBAT */ 170 {0x06, 0x04}, /* VSEN12 */ 171 {0x06, 0x05}, /* VSEN13 */ 172 {0x06, 0x06}, /* VSEN14 */ 173 {0x06, 0x07}, /* VSEN15 */ 174 {0x06, 0x08}, /* VSEN16 */ 175 {0x06, 0x09}, /* VSEN17 */ 176}; 177 178 179/* 3VDD, 3VSB, VBAT * 0.006 */ 180#define REST_VLT_BEGIN 12 /* the 13th volt to 15th */ 181#define REST_VLT_END 14 /* the 13th volt to 15th */ 182 183#define W83795_REG_FAN(index) (0x2E + (index)) 184#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index)) 185#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2) 186#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \ 187 (((index) % 1) ? 4 : 0) 188 189#define W83795_REG_VID_CTRL 0x6A 190 191#define ALARM_BEEP_REG_NUM 6 192#define W83795_REG_ALARM(index) (0x41 + (index)) 193#define W83795_REG_BEEP(index) (0x50 + (index)) 194 195#define W83795_REG_CLR_CHASSIS 0x4D 196 197 198#define W83795_REG_TEMP_NUM 6 199#define W83795_REG_FCMS1 0x201 200#define W83795_REG_FCMS2 0x208 201#define W83795_REG_TFMR(index) (0x202 + (index)) 202#define W83795_REG_FOMC 0x20F 203 204#define W83795_REG_TSS(index) (0x209 + (index)) 205 206#define PWM_OUTPUT 0 207#define PWM_START 1 208#define PWM_NONSTOP 2 209#define PWM_STOP_TIME 3 210#define PWM_FREQ 4 211#define W83795_REG_PWM(index, nr) \ 212 (((nr) == 0 ? 0x210 : \ 213 (nr) == 1 ? 0x220 : \ 214 (nr) == 2 ? 0x228 : \ 215 (nr) == 3 ? 0x230 : 0x218) + (index)) 216 217#define W83795_REG_FTSH(index) (0x240 + (index) * 2) 218#define W83795_REG_FTSL(index) (0x241 + (index) * 2) 219#define W83795_REG_TFTS 0x250 220 221#define TEMP_PWM_TTTI 0 222#define TEMP_PWM_CTFS 1 223#define TEMP_PWM_HCT 2 224#define TEMP_PWM_HOT 3 225#define W83795_REG_TTTI(index) (0x260 + (index)) 226#define W83795_REG_CTFS(index) (0x268 + (index)) 227#define W83795_REG_HT(index) (0x270 + (index)) 228 229#define SF4_TEMP 0 230#define SF4_PWM 1 231#define W83795_REG_SF4_TEMP(temp_num, index) \ 232 (0x280 + 0x10 * (temp_num) + (index)) 233#define W83795_REG_SF4_PWM(temp_num, index) \ 234 (0x288 + 0x10 * (temp_num) + (index)) 235 236#define W83795_REG_DTSC 0x301 237#define W83795_REG_DTSE 0x302 238#define W83795_REG_DTS(index) (0x26 + (index)) 239#define W83795_REG_PECI_TBASE(index) (0x320 + (index)) 240 241#define DTS_CRIT 0 242#define DTS_CRIT_HYST 1 243#define DTS_WARN 2 244#define DTS_WARN_HYST 3 245#define W83795_REG_DTS_EXT(index) (0xB2 + (index)) 246 247#define SETUP_PWM_DEFAULT 0 248#define SETUP_PWM_UPTIME 1 249#define SETUP_PWM_DOWNTIME 2 250#define W83795_REG_SETUP_PWM(index) (0x20C + (index)) 251 252static inline u16 in_from_reg(u8 index, u16 val) 253{ 254 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END)) 255 return val * 6; 256 else 257 return val * 2; 258} 259 260static inline u16 in_to_reg(u8 index, u16 val) 261{ 262 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END)) 263 return val / 6; 264 else 265 return val / 2; 266} 267 268static inline unsigned long fan_from_reg(u16 val) 269{ 270 if ((val == 0xfff) || (val == 0)) 271 return 0; 272 return 1350000UL / val; 273} 274 275static inline u16 fan_to_reg(long rpm) 276{ 277 if (rpm <= 0) 278 return 0x0fff; 279 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); 280} 281 282static inline unsigned long time_from_reg(u8 reg) 283{ 284 return reg * 100; 285} 286 287static inline u8 time_to_reg(unsigned long val) 288{ 289 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff); 290} 291 292static inline long temp_from_reg(s8 reg) 293{ 294 return reg * 1000; 295} 296 297static inline s8 temp_to_reg(long val, s8 min, s8 max) 298{ 299 return SENSORS_LIMIT(val / 1000, min, max); 300} 301 302static const u16 pwm_freq_cksel0[16] = { 303 1024, 512, 341, 256, 205, 171, 146, 128, 304 85, 64, 32, 16, 8, 4, 2, 1 305}; 306 307static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin) 308{ 309 unsigned long base_clock; 310 311 if (reg & 0x80) { 312 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); 313 return base_clock / ((reg & 0x7f) + 1); 314 } else 315 return pwm_freq_cksel0[reg & 0x0f]; 316} 317 318static u8 pwm_freq_to_reg(unsigned long val, u16 clkin) 319{ 320 unsigned long base_clock; 321 u8 reg0, reg1; 322 unsigned long best0, best1; 323 324 /* Best fit for cksel = 0 */ 325 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) { 326 if (val > (pwm_freq_cksel0[reg0] + 327 pwm_freq_cksel0[reg0 + 1]) / 2) 328 break; 329 } 330 if (val < 375) /* cksel = 1 can't beat this */ 331 return reg0; 332 best0 = pwm_freq_cksel0[reg0]; 333 334 /* Best fit for cksel = 1 */ 335 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); 336 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128); 337 best1 = base_clock / reg1; 338 reg1 = 0x80 | (reg1 - 1); 339 340 /* Choose the closest one */ 341 if (abs(val - best0) > abs(val - best1)) 342 return reg1; 343 else 344 return reg0; 345} 346 347enum chip_types {w83795g, w83795adg}; 348 349struct w83795_data { 350 struct device *hwmon_dev; 351 struct mutex update_lock; 352 unsigned long last_updated; /* In jiffies */ 353 enum chip_types chip_type; 354 355 u8 bank; 356 357 u32 has_in; /* Enable monitor VIN or not */ 358 u8 has_dyn_in; /* Only in2-0 can have this */ 359 u16 in[21][3]; /* Register value, read/high/low */ 360 u8 in_lsb[10][3]; /* LSB Register value, high/low */ 361 u8 has_gain; /* has gain: in17-20 * 8 */ 362 363 u16 has_fan; /* Enable fan14-1 or not */ 364 u16 fan[14]; /* Register value combine */ 365 u16 fan_min[14]; /* Register value combine */ 366 367 u8 has_temp; /* Enable monitor temp6-1 or not */ 368 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */ 369 u8 temp_read_vrlsb[6]; 370 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */ 371 u8 temp_src[3]; /* Register value */ 372 373 u8 enable_dts; /* Enable PECI and SB-TSI, 374 * bit 0: =1 enable, =0 disable, 375 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */ 376 u8 has_dts; /* Enable monitor DTS temp */ 377 s8 dts[8]; /* Register value */ 378 u8 dts_read_vrlsb[8]; /* Register value */ 379 s8 dts_ext[4]; /* Register value */ 380 381 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2, 382 * no config register, only affected by chip 383 * type */ 384 u8 pwm[8][5]; /* Register value, output, start, non stop, stop 385 * time, freq */ 386 u16 clkin; /* CLKIN frequency in kHz */ 387 u8 pwm_fcms[2]; /* Register value */ 388 u8 pwm_tfmr[6]; /* Register value */ 389 u8 pwm_fomc; /* Register value */ 390 391 u16 target_speed[8]; /* Register value, target speed for speed 392 * cruise */ 393 u8 tol_speed; /* tolerance of target speed */ 394 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */ 395 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */ 396 397 u8 setup_pwm[3]; /* Register value */ 398 399 u8 alarms[6]; /* Register value */ 400 u8 beeps[6]; /* Register value */ 401 u8 beep_enable; 402 403 char valid; 404}; 405 406/* 407 * Hardware access 408 * We assume that nobdody can change the bank outside the driver. 409 */ 410 411/* Must be called with data->update_lock held, except during initialization */ 412static int w83795_set_bank(struct i2c_client *client, u8 bank) 413{ 414 struct w83795_data *data = i2c_get_clientdata(client); 415 int err; 416 417 /* If the same bank is already set, nothing to do */ 418 if ((data->bank & 0x07) == bank) 419 return 0; 420 421 /* Change to new bank, preserve all other bits */ 422 bank |= data->bank & ~0x07; 423 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank); 424 if (err < 0) { 425 dev_err(&client->dev, 426 "Failed to set bank to %d, err %d\n", 427 (int)bank, err); 428 return err; 429 } 430 data->bank = bank; 431 432 return 0; 433} 434 435/* Must be called with data->update_lock held, except during initialization */ 436static u8 w83795_read(struct i2c_client *client, u16 reg) 437{ 438 int err; 439 440 err = w83795_set_bank(client, reg >> 8); 441 if (err < 0) 442 return 0x00; /* Arbitrary */ 443 444 err = i2c_smbus_read_byte_data(client, reg & 0xff); 445 if (err < 0) { 446 dev_err(&client->dev, 447 "Failed to read from register 0x%03x, err %d\n", 448 (int)reg, err); 449 return 0x00; /* Arbitrary */ 450 } 451 return err; 452} 453 454/* Must be called with data->update_lock held, except during initialization */ 455static int w83795_write(struct i2c_client *client, u16 reg, u8 value) 456{ 457 int err; 458 459 err = w83795_set_bank(client, reg >> 8); 460 if (err < 0) 461 return err; 462 463 err = i2c_smbus_write_byte_data(client, reg & 0xff, value); 464 if (err < 0) 465 dev_err(&client->dev, 466 "Failed to write to register 0x%03x, err %d\n", 467 (int)reg, err); 468 return err; 469} 470 471static struct w83795_data *w83795_update_device(struct device *dev) 472{ 473 struct i2c_client *client = to_i2c_client(dev); 474 struct w83795_data *data = i2c_get_clientdata(client); 475 u16 tmp; 476 int i; 477 478 mutex_lock(&data->update_lock); 479 480 if (!(time_after(jiffies, data->last_updated + HZ * 2) 481 || !data->valid)) 482 goto END; 483 484 /* Update the voltages value */ 485 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 486 if (!(data->has_in & (1 << i))) 487 continue; 488 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 489 tmp |= (w83795_read(client, W83795_REG_VRLSB) 490 >> VRLSB_SHIFT) & 0x03; 491 data->in[i][IN_READ] = tmp; 492 } 493 494 /* in0-2 can have dynamic limits (W83795G only) */ 495 if (data->has_dyn_in) { 496 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX)); 497 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW)); 498 499 for (i = 0; i < 3; i++) { 500 if (!(data->has_dyn_in & (1 << i))) 501 continue; 502 data->in[i][IN_MAX] = 503 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 504 data->in[i][IN_LOW] = 505 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 506 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03; 507 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03; 508 } 509 } 510 511 /* Update fan */ 512 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 513 if (!(data->has_fan & (1 << i))) 514 continue; 515 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 516 data->fan[i] |= 517 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F; 518 } 519 520 /* Update temperature */ 521 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 522 /* even stop monitor, register still keep value, just read out 523 * it */ 524 if (!(data->has_temp & (1 << i))) { 525 data->temp[i][TEMP_READ] = 0; 526 data->temp_read_vrlsb[i] = 0; 527 continue; 528 } 529 data->temp[i][TEMP_READ] = 530 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 531 data->temp_read_vrlsb[i] = 532 w83795_read(client, W83795_REG_VRLSB); 533 } 534 535 /* Update dts temperature */ 536 if (data->enable_dts != 0) { 537 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 538 if (!(data->has_dts & (1 << i))) 539 continue; 540 data->dts[i] = 541 w83795_read(client, W83795_REG_DTS(i)); 542 data->dts_read_vrlsb[i] = 543 w83795_read(client, W83795_REG_VRLSB); 544 } 545 } 546 547 /* Update pwm output */ 548 for (i = 0; i < data->has_pwm; i++) { 549 data->pwm[i][PWM_OUTPUT] = 550 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT)); 551 } 552 553 /* update alarm */ 554 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) 555 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 556 557 data->last_updated = jiffies; 558 data->valid = 1; 559 560END: 561 mutex_unlock(&data->update_lock); 562 return data; 563} 564 565/* 566 * Sysfs attributes 567 */ 568 569#define ALARM_STATUS 0 570#define BEEP_ENABLE 1 571static ssize_t 572show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) 573{ 574 struct w83795_data *data = w83795_update_device(dev); 575 struct sensor_device_attribute_2 *sensor_attr = 576 to_sensor_dev_attr_2(attr); 577 int nr = sensor_attr->nr; 578 int index = sensor_attr->index >> 3; 579 int bit = sensor_attr->index & 0x07; 580 u8 val; 581 582 if (ALARM_STATUS == nr) { 583 val = (data->alarms[index] >> (bit)) & 1; 584 } else { /* BEEP_ENABLE */ 585 val = (data->beeps[index] >> (bit)) & 1; 586 } 587 588 return sprintf(buf, "%u\n", val); 589} 590 591static ssize_t 592store_beep(struct device *dev, struct device_attribute *attr, 593 const char *buf, size_t count) 594{ 595 struct i2c_client *client = to_i2c_client(dev); 596 struct w83795_data *data = i2c_get_clientdata(client); 597 struct sensor_device_attribute_2 *sensor_attr = 598 to_sensor_dev_attr_2(attr); 599 int index = sensor_attr->index >> 3; 600 int shift = sensor_attr->index & 0x07; 601 u8 beep_bit = 1 << shift; 602 unsigned long val; 603 604 if (strict_strtoul(buf, 10, &val) < 0) 605 return -EINVAL; 606 if (val != 0 && val != 1) 607 return -EINVAL; 608 609 mutex_lock(&data->update_lock); 610 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index)); 611 data->beeps[index] &= ~beep_bit; 612 data->beeps[index] |= val << shift; 613 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]); 614 mutex_unlock(&data->update_lock); 615 616 return count; 617} 618 619static ssize_t 620show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf) 621{ 622 struct i2c_client *client = to_i2c_client(dev); 623 struct w83795_data *data = i2c_get_clientdata(client); 624 return sprintf(buf, "%u\n", data->beep_enable); 625} 626 627static ssize_t 628store_beep_enable(struct device *dev, struct device_attribute *attr, 629 const char *buf, size_t count) 630{ 631 struct i2c_client *client = to_i2c_client(dev); 632 struct w83795_data *data = i2c_get_clientdata(client); 633 unsigned long val; 634 u8 tmp; 635 636 if (strict_strtoul(buf, 10, &val) < 0) 637 return -EINVAL; 638 if (val != 0 && val != 1) 639 return -EINVAL; 640 641 mutex_lock(&data->update_lock); 642 data->beep_enable = val; 643 tmp = w83795_read(client, W83795_REG_BEEP(5)); 644 tmp &= 0x7f; 645 tmp |= val << 7; 646 w83795_write(client, W83795_REG_BEEP(5), tmp); 647 mutex_unlock(&data->update_lock); 648 649 return count; 650} 651 652/* Write any value to clear chassis alarm */ 653static ssize_t 654store_chassis_clear(struct device *dev, 655 struct device_attribute *attr, const char *buf, 656 size_t count) 657{ 658 struct i2c_client *client = to_i2c_client(dev); 659 struct w83795_data *data = i2c_get_clientdata(client); 660 u8 val; 661 662 mutex_lock(&data->update_lock); 663 val = w83795_read(client, W83795_REG_CLR_CHASSIS); 664 val |= 0x80; 665 w83795_write(client, W83795_REG_CLR_CHASSIS, val); 666 mutex_unlock(&data->update_lock); 667 return count; 668} 669 670#define FAN_INPUT 0 671#define FAN_MIN 1 672static ssize_t 673show_fan(struct device *dev, struct device_attribute *attr, char *buf) 674{ 675 struct sensor_device_attribute_2 *sensor_attr = 676 to_sensor_dev_attr_2(attr); 677 int nr = sensor_attr->nr; 678 int index = sensor_attr->index; 679 struct w83795_data *data = w83795_update_device(dev); 680 u16 val; 681 682 if (FAN_INPUT == nr) 683 val = data->fan[index] & 0x0fff; 684 else 685 val = data->fan_min[index] & 0x0fff; 686 687 return sprintf(buf, "%lu\n", fan_from_reg(val)); 688} 689 690static ssize_t 691store_fan_min(struct device *dev, struct device_attribute *attr, 692 const char *buf, size_t count) 693{ 694 struct sensor_device_attribute_2 *sensor_attr = 695 to_sensor_dev_attr_2(attr); 696 int index = sensor_attr->index; 697 struct i2c_client *client = to_i2c_client(dev); 698 struct w83795_data *data = i2c_get_clientdata(client); 699 unsigned long val; 700 701 if (strict_strtoul(buf, 10, &val)) 702 return -EINVAL; 703 val = fan_to_reg(val); 704 705 mutex_lock(&data->update_lock); 706 data->fan_min[index] = val; 707 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff); 708 val &= 0x0f; 709 if (index % 1) { 710 val <<= 4; 711 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 712 & 0x0f; 713 } else { 714 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 715 & 0xf0; 716 } 717 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff); 718 mutex_unlock(&data->update_lock); 719 720 return count; 721} 722 723static ssize_t 724show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 725{ 726 struct w83795_data *data = w83795_update_device(dev); 727 struct sensor_device_attribute_2 *sensor_attr = 728 to_sensor_dev_attr_2(attr); 729 int nr = sensor_attr->nr; 730 int index = sensor_attr->index; 731 unsigned int val; 732 733 switch (nr) { 734 case PWM_STOP_TIME: 735 val = time_from_reg(data->pwm[index][nr]); 736 break; 737 case PWM_FREQ: 738 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin); 739 break; 740 default: 741 val = data->pwm[index][nr]; 742 break; 743 } 744 745 return sprintf(buf, "%u\n", val); 746} 747 748static ssize_t 749store_pwm(struct device *dev, struct device_attribute *attr, 750 const char *buf, size_t count) 751{ 752 struct i2c_client *client = to_i2c_client(dev); 753 struct w83795_data *data = i2c_get_clientdata(client); 754 struct sensor_device_attribute_2 *sensor_attr = 755 to_sensor_dev_attr_2(attr); 756 int nr = sensor_attr->nr; 757 int index = sensor_attr->index; 758 unsigned long val; 759 760 if (strict_strtoul(buf, 10, &val) < 0) 761 return -EINVAL; 762 763 mutex_lock(&data->update_lock); 764 switch (nr) { 765 case PWM_STOP_TIME: 766 val = time_to_reg(val); 767 break; 768 case PWM_FREQ: 769 val = pwm_freq_to_reg(val, data->clkin); 770 break; 771 default: 772 val = SENSORS_LIMIT(val, 0, 0xff); 773 break; 774 } 775 w83795_write(client, W83795_REG_PWM(index, nr), val); 776 data->pwm[index][nr] = val; 777 mutex_unlock(&data->update_lock); 778 return count; 779} 780 781static ssize_t 782show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 783{ 784 struct sensor_device_attribute_2 *sensor_attr = 785 to_sensor_dev_attr_2(attr); 786 struct i2c_client *client = to_i2c_client(dev); 787 struct w83795_data *data = i2c_get_clientdata(client); 788 int index = sensor_attr->index; 789 u8 tmp; 790 791 if (1 == (data->pwm_fcms[0] & (1 << index))) { 792 tmp = 2; 793 goto out; 794 } 795 for (tmp = 0; tmp < 6; tmp++) { 796 if (data->pwm_tfmr[tmp] & (1 << index)) { 797 tmp = 3; 798 goto out; 799 } 800 } 801 if (data->pwm_fomc & (1 << index)) 802 tmp = 0; 803 else 804 tmp = 1; 805 806out: 807 return sprintf(buf, "%u\n", tmp); 808} 809 810static ssize_t 811store_pwm_enable(struct device *dev, struct device_attribute *attr, 812 const char *buf, size_t count) 813{ 814 struct i2c_client *client = to_i2c_client(dev); 815 struct w83795_data *data = i2c_get_clientdata(client); 816 struct sensor_device_attribute_2 *sensor_attr = 817 to_sensor_dev_attr_2(attr); 818 int index = sensor_attr->index; 819 unsigned long val; 820 int i; 821 822 if (strict_strtoul(buf, 10, &val) < 0) 823 return -EINVAL; 824 if (val > 2) 825 return -EINVAL; 826 827 mutex_lock(&data->update_lock); 828 switch (val) { 829 case 0: 830 case 1: 831 data->pwm_fcms[0] &= ~(1 << index); 832 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 833 for (i = 0; i < 6; i++) { 834 data->pwm_tfmr[i] &= ~(1 << index); 835 w83795_write(client, W83795_REG_TFMR(i), 836 data->pwm_tfmr[i]); 837 } 838 data->pwm_fomc |= 1 << index; 839 data->pwm_fomc ^= val << index; 840 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc); 841 break; 842 case 2: 843 data->pwm_fcms[0] |= (1 << index); 844 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 845 break; 846 } 847 mutex_unlock(&data->update_lock); 848 return count; 849} 850 851static ssize_t 852show_temp_src(struct device *dev, struct device_attribute *attr, char *buf) 853{ 854 struct sensor_device_attribute_2 *sensor_attr = 855 to_sensor_dev_attr_2(attr); 856 struct i2c_client *client = to_i2c_client(dev); 857 struct w83795_data *data = i2c_get_clientdata(client); 858 int index = sensor_attr->index; 859 u8 val = index / 2; 860 u8 tmp = data->temp_src[val]; 861 862 if (index % 1) 863 val = 4; 864 else 865 val = 0; 866 tmp >>= val; 867 tmp &= 0x0f; 868 869 return sprintf(buf, "%u\n", tmp); 870} 871 872static ssize_t 873store_temp_src(struct device *dev, struct device_attribute *attr, 874 const char *buf, size_t count) 875{ 876 struct i2c_client *client = to_i2c_client(dev); 877 struct w83795_data *data = i2c_get_clientdata(client); 878 struct sensor_device_attribute_2 *sensor_attr = 879 to_sensor_dev_attr_2(attr); 880 int index = sensor_attr->index; 881 unsigned long tmp; 882 u8 val = index / 2; 883 884 if (strict_strtoul(buf, 10, &tmp) < 0) 885 return -EINVAL; 886 tmp = SENSORS_LIMIT(tmp, 0, 15); 887 888 mutex_lock(&data->update_lock); 889 if (index % 1) { 890 tmp <<= 4; 891 data->temp_src[val] &= 0x0f; 892 } else { 893 data->temp_src[val] &= 0xf0; 894 } 895 data->temp_src[val] |= tmp; 896 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]); 897 mutex_unlock(&data->update_lock); 898 899 return count; 900} 901 902#define TEMP_PWM_ENABLE 0 903#define TEMP_PWM_FAN_MAP 1 904static ssize_t 905show_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 906 char *buf) 907{ 908 struct i2c_client *client = to_i2c_client(dev); 909 struct w83795_data *data = i2c_get_clientdata(client); 910 struct sensor_device_attribute_2 *sensor_attr = 911 to_sensor_dev_attr_2(attr); 912 int nr = sensor_attr->nr; 913 int index = sensor_attr->index; 914 u8 tmp = 0xff; 915 916 switch (nr) { 917 case TEMP_PWM_ENABLE: 918 tmp = (data->pwm_fcms[1] >> index) & 1; 919 if (tmp) 920 tmp = 4; 921 else 922 tmp = 3; 923 break; 924 case TEMP_PWM_FAN_MAP: 925 tmp = data->pwm_tfmr[index]; 926 break; 927 } 928 929 return sprintf(buf, "%u\n", tmp); 930} 931 932static ssize_t 933store_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 934 const char *buf, size_t count) 935{ 936 struct i2c_client *client = to_i2c_client(dev); 937 struct w83795_data *data = i2c_get_clientdata(client); 938 struct sensor_device_attribute_2 *sensor_attr = 939 to_sensor_dev_attr_2(attr); 940 int nr = sensor_attr->nr; 941 int index = sensor_attr->index; 942 unsigned long tmp; 943 944 if (strict_strtoul(buf, 10, &tmp) < 0) 945 return -EINVAL; 946 947 switch (nr) { 948 case TEMP_PWM_ENABLE: 949 if ((tmp != 3) && (tmp != 4)) 950 return -EINVAL; 951 tmp -= 3; 952 mutex_lock(&data->update_lock); 953 data->pwm_fcms[1] &= ~(1 << index); 954 data->pwm_fcms[1] |= tmp << index; 955 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]); 956 mutex_unlock(&data->update_lock); 957 break; 958 case TEMP_PWM_FAN_MAP: 959 mutex_lock(&data->update_lock); 960 tmp = SENSORS_LIMIT(tmp, 0, 0xff); 961 w83795_write(client, W83795_REG_TFMR(index), tmp); 962 data->pwm_tfmr[index] = tmp; 963 mutex_unlock(&data->update_lock); 964 break; 965 } 966 return count; 967} 968 969#define FANIN_TARGET 0 970#define FANIN_TOL 1 971static ssize_t 972show_fanin(struct device *dev, struct device_attribute *attr, char *buf) 973{ 974 struct i2c_client *client = to_i2c_client(dev); 975 struct w83795_data *data = i2c_get_clientdata(client); 976 struct sensor_device_attribute_2 *sensor_attr = 977 to_sensor_dev_attr_2(attr); 978 int nr = sensor_attr->nr; 979 int index = sensor_attr->index; 980 u16 tmp = 0; 981 982 switch (nr) { 983 case FANIN_TARGET: 984 tmp = fan_from_reg(data->target_speed[index]); 985 break; 986 case FANIN_TOL: 987 tmp = data->tol_speed; 988 break; 989 } 990 991 return sprintf(buf, "%u\n", tmp); 992} 993 994static ssize_t 995store_fanin(struct device *dev, struct device_attribute *attr, 996 const char *buf, size_t count) 997{ 998 struct i2c_client *client = to_i2c_client(dev); 999 struct w83795_data *data = i2c_get_clientdata(client); 1000 struct sensor_device_attribute_2 *sensor_attr = 1001 to_sensor_dev_attr_2(attr); 1002 int nr = sensor_attr->nr; 1003 int index = sensor_attr->index; 1004 unsigned long val; 1005 1006 if (strict_strtoul(buf, 10, &val) < 0) 1007 return -EINVAL; 1008 1009 mutex_lock(&data->update_lock); 1010 switch (nr) { 1011 case FANIN_TARGET: 1012 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff)); 1013 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff); 1014 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0); 1015 data->target_speed[index] = val; 1016 break; 1017 case FANIN_TOL: 1018 val = SENSORS_LIMIT(val, 0, 0x3f); 1019 w83795_write(client, W83795_REG_TFTS, val); 1020 data->tol_speed = val; 1021 break; 1022 } 1023 mutex_unlock(&data->update_lock); 1024 1025 return count; 1026} 1027 1028 1029static ssize_t 1030show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1031{ 1032 struct i2c_client *client = to_i2c_client(dev); 1033 struct w83795_data *data = i2c_get_clientdata(client); 1034 struct sensor_device_attribute_2 *sensor_attr = 1035 to_sensor_dev_attr_2(attr); 1036 int nr = sensor_attr->nr; 1037 int index = sensor_attr->index; 1038 long tmp = temp_from_reg(data->pwm_temp[index][nr]); 1039 1040 return sprintf(buf, "%ld\n", tmp); 1041} 1042 1043static ssize_t 1044store_temp_pwm(struct device *dev, struct device_attribute *attr, 1045 const char *buf, size_t count) 1046{ 1047 struct i2c_client *client = to_i2c_client(dev); 1048 struct w83795_data *data = i2c_get_clientdata(client); 1049 struct sensor_device_attribute_2 *sensor_attr = 1050 to_sensor_dev_attr_2(attr); 1051 int nr = sensor_attr->nr; 1052 int index = sensor_attr->index; 1053 unsigned long val; 1054 u8 tmp; 1055 1056 if (strict_strtoul(buf, 10, &val) < 0) 1057 return -EINVAL; 1058 val /= 1000; 1059 1060 mutex_lock(&data->update_lock); 1061 switch (nr) { 1062 case TEMP_PWM_TTTI: 1063 val = SENSORS_LIMIT(val, 0, 0x7f); 1064 w83795_write(client, W83795_REG_TTTI(index), val); 1065 break; 1066 case TEMP_PWM_CTFS: 1067 val = SENSORS_LIMIT(val, 0, 0x7f); 1068 w83795_write(client, W83795_REG_CTFS(index), val); 1069 break; 1070 case TEMP_PWM_HCT: 1071 val = SENSORS_LIMIT(val, 0, 0x0f); 1072 tmp = w83795_read(client, W83795_REG_HT(index)); 1073 tmp &= 0x0f; 1074 tmp |= (val << 4) & 0xf0; 1075 w83795_write(client, W83795_REG_HT(index), tmp); 1076 break; 1077 case TEMP_PWM_HOT: 1078 val = SENSORS_LIMIT(val, 0, 0x0f); 1079 tmp = w83795_read(client, W83795_REG_HT(index)); 1080 tmp &= 0xf0; 1081 tmp |= val & 0x0f; 1082 w83795_write(client, W83795_REG_HT(index), tmp); 1083 break; 1084 } 1085 data->pwm_temp[index][nr] = val; 1086 mutex_unlock(&data->update_lock); 1087 1088 return count; 1089} 1090 1091static ssize_t 1092show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1093{ 1094 struct i2c_client *client = to_i2c_client(dev); 1095 struct w83795_data *data = i2c_get_clientdata(client); 1096 struct sensor_device_attribute_2 *sensor_attr = 1097 to_sensor_dev_attr_2(attr); 1098 int nr = sensor_attr->nr; 1099 int index = sensor_attr->index; 1100 1101 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]); 1102} 1103 1104static ssize_t 1105store_sf4_pwm(struct device *dev, struct device_attribute *attr, 1106 const char *buf, size_t count) 1107{ 1108 struct i2c_client *client = to_i2c_client(dev); 1109 struct w83795_data *data = i2c_get_clientdata(client); 1110 struct sensor_device_attribute_2 *sensor_attr = 1111 to_sensor_dev_attr_2(attr); 1112 int nr = sensor_attr->nr; 1113 int index = sensor_attr->index; 1114 unsigned long val; 1115 1116 if (strict_strtoul(buf, 10, &val) < 0) 1117 return -EINVAL; 1118 1119 mutex_lock(&data->update_lock); 1120 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val); 1121 data->sf4_reg[index][SF4_PWM][nr] = val; 1122 mutex_unlock(&data->update_lock); 1123 1124 return count; 1125} 1126 1127static ssize_t 1128show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf) 1129{ 1130 struct i2c_client *client = to_i2c_client(dev); 1131 struct w83795_data *data = i2c_get_clientdata(client); 1132 struct sensor_device_attribute_2 *sensor_attr = 1133 to_sensor_dev_attr_2(attr); 1134 int nr = sensor_attr->nr; 1135 int index = sensor_attr->index; 1136 1137 return sprintf(buf, "%u\n", 1138 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000); 1139} 1140 1141static ssize_t 1142store_sf4_temp(struct device *dev, struct device_attribute *attr, 1143 const char *buf, size_t count) 1144{ 1145 struct i2c_client *client = to_i2c_client(dev); 1146 struct w83795_data *data = i2c_get_clientdata(client); 1147 struct sensor_device_attribute_2 *sensor_attr = 1148 to_sensor_dev_attr_2(attr); 1149 int nr = sensor_attr->nr; 1150 int index = sensor_attr->index; 1151 unsigned long val; 1152 1153 if (strict_strtoul(buf, 10, &val) < 0) 1154 return -EINVAL; 1155 val /= 1000; 1156 1157 mutex_lock(&data->update_lock); 1158 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val); 1159 data->sf4_reg[index][SF4_TEMP][nr] = val; 1160 mutex_unlock(&data->update_lock); 1161 1162 return count; 1163} 1164 1165 1166static ssize_t 1167show_temp(struct device *dev, struct device_attribute *attr, char *buf) 1168{ 1169 struct sensor_device_attribute_2 *sensor_attr = 1170 to_sensor_dev_attr_2(attr); 1171 int nr = sensor_attr->nr; 1172 int index = sensor_attr->index; 1173 struct w83795_data *data = w83795_update_device(dev); 1174 long temp = temp_from_reg(data->temp[index][nr]); 1175 1176 if (TEMP_READ == nr) 1177 temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) 1178 * 250; 1179 return sprintf(buf, "%ld\n", temp); 1180} 1181 1182static ssize_t 1183store_temp(struct device *dev, struct device_attribute *attr, 1184 const char *buf, size_t count) 1185{ 1186 struct sensor_device_attribute_2 *sensor_attr = 1187 to_sensor_dev_attr_2(attr); 1188 int nr = sensor_attr->nr; 1189 int index = sensor_attr->index; 1190 struct i2c_client *client = to_i2c_client(dev); 1191 struct w83795_data *data = i2c_get_clientdata(client); 1192 long tmp; 1193 1194 if (strict_strtol(buf, 10, &tmp) < 0) 1195 return -EINVAL; 1196 1197 mutex_lock(&data->update_lock); 1198 data->temp[index][nr] = temp_to_reg(tmp, -128, 127); 1199 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]); 1200 mutex_unlock(&data->update_lock); 1201 return count; 1202} 1203 1204 1205static ssize_t 1206show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf) 1207{ 1208 struct i2c_client *client = to_i2c_client(dev); 1209 struct w83795_data *data = i2c_get_clientdata(client); 1210 struct sensor_device_attribute_2 *sensor_attr = 1211 to_sensor_dev_attr_2(attr); 1212 int index = sensor_attr->index; 1213 u8 tmp; 1214 1215 if (data->enable_dts == 0) 1216 return sprintf(buf, "%d\n", 0); 1217 1218 if ((data->has_dts >> index) & 0x01) { 1219 if (data->enable_dts & 2) 1220 tmp = 5; 1221 else 1222 tmp = 6; 1223 } else { 1224 tmp = 0; 1225 } 1226 1227 return sprintf(buf, "%d\n", tmp); 1228} 1229 1230static ssize_t 1231show_dts(struct device *dev, struct device_attribute *attr, char *buf) 1232{ 1233 struct sensor_device_attribute_2 *sensor_attr = 1234 to_sensor_dev_attr_2(attr); 1235 int index = sensor_attr->index; 1236 struct w83795_data *data = w83795_update_device(dev); 1237 long temp = temp_from_reg(data->dts[index]); 1238 1239 temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250; 1240 return sprintf(buf, "%ld\n", temp); 1241} 1242 1243static ssize_t 1244show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf) 1245{ 1246 struct sensor_device_attribute_2 *sensor_attr = 1247 to_sensor_dev_attr_2(attr); 1248 int nr = sensor_attr->nr; 1249 struct i2c_client *client = to_i2c_client(dev); 1250 struct w83795_data *data = i2c_get_clientdata(client); 1251 long temp = temp_from_reg(data->dts_ext[nr]); 1252 1253 return sprintf(buf, "%ld\n", temp); 1254} 1255 1256static ssize_t 1257store_dts_ext(struct device *dev, struct device_attribute *attr, 1258 const char *buf, size_t count) 1259{ 1260 struct sensor_device_attribute_2 *sensor_attr = 1261 to_sensor_dev_attr_2(attr); 1262 int nr = sensor_attr->nr; 1263 struct i2c_client *client = to_i2c_client(dev); 1264 struct w83795_data *data = i2c_get_clientdata(client); 1265 long tmp; 1266 1267 if (strict_strtol(buf, 10, &tmp) < 0) 1268 return -EINVAL; 1269 1270 mutex_lock(&data->update_lock); 1271 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127); 1272 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]); 1273 mutex_unlock(&data->update_lock); 1274 return count; 1275} 1276 1277 1278/* 1279 Type 3: Thermal diode 1280 Type 4: Thermistor 1281 1282 Temp5-6, default TR 1283 Temp1-4, default TD 1284*/ 1285 1286static ssize_t 1287show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) 1288{ 1289 struct i2c_client *client = to_i2c_client(dev); 1290 struct w83795_data *data = i2c_get_clientdata(client); 1291 struct sensor_device_attribute_2 *sensor_attr = 1292 to_sensor_dev_attr_2(attr); 1293 int index = sensor_attr->index; 1294 u8 tmp; 1295 1296 if (data->has_temp >> index & 0x01) { 1297 if (data->temp_mode >> index & 0x01) 1298 tmp = 3; 1299 else 1300 tmp = 4; 1301 } else { 1302 tmp = 0; 1303 } 1304 1305 return sprintf(buf, "%d\n", tmp); 1306} 1307 1308static ssize_t 1309store_temp_mode(struct device *dev, struct device_attribute *attr, 1310 const char *buf, size_t count) 1311{ 1312 struct i2c_client *client = to_i2c_client(dev); 1313 struct w83795_data *data = i2c_get_clientdata(client); 1314 struct sensor_device_attribute_2 *sensor_attr = 1315 to_sensor_dev_attr_2(attr); 1316 int index = sensor_attr->index; 1317 unsigned long val; 1318 u8 tmp; 1319 u32 mask; 1320 1321 if (strict_strtoul(buf, 10, &val) < 0) 1322 return -EINVAL; 1323 if ((val != 4) && (val != 3)) 1324 return -EINVAL; 1325 if ((index > 3) && (val == 3)) 1326 return -EINVAL; 1327 1328 mutex_lock(&data->update_lock); 1329 if (val == 3) { 1330 val = TEMP_CTRL_TD; 1331 data->has_temp |= 1 << index; 1332 data->temp_mode |= 1 << index; 1333 } else if (val == 4) { 1334 val = TEMP_CTRL_TR; 1335 data->has_temp |= 1 << index; 1336 tmp = 1 << index; 1337 data->temp_mode &= ~tmp; 1338 } 1339 1340 if (index > 3) 1341 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 1342 else 1343 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1344 1345 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT]; 1346 tmp &= ~mask; 1347 tmp |= W83795_REG_TEMP_CTRL[index][val]; 1348 1349 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT]; 1350 data->has_in &= ~mask; 1351 1352 if (index > 3) 1353 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp); 1354 else 1355 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp); 1356 1357 mutex_unlock(&data->update_lock); 1358 return count; 1359} 1360 1361 1362/* show/store VIN */ 1363static ssize_t 1364show_in(struct device *dev, struct device_attribute *attr, char *buf) 1365{ 1366 struct sensor_device_attribute_2 *sensor_attr = 1367 to_sensor_dev_attr_2(attr); 1368 int nr = sensor_attr->nr; 1369 int index = sensor_attr->index; 1370 struct w83795_data *data = w83795_update_device(dev); 1371 u16 val = data->in[index][nr]; 1372 u8 lsb_idx; 1373 1374 switch (nr) { 1375 case IN_READ: 1376 /* calculate this value again by sensors as sensors3.conf */ 1377 if ((index >= 17) && 1378 !((data->has_gain >> (index - 17)) & 1)) 1379 val *= 8; 1380 break; 1381 case IN_MAX: 1382 case IN_LOW: 1383 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1384 val <<= 2; 1385 val |= (data->in_lsb[lsb_idx][nr] >> 1386 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03; 1387 if ((index >= 17) && 1388 !((data->has_gain >> (index - 17)) & 1)) 1389 val *= 8; 1390 break; 1391 } 1392 val = in_from_reg(index, val); 1393 1394 return sprintf(buf, "%d\n", val); 1395} 1396 1397static ssize_t 1398store_in(struct device *dev, struct device_attribute *attr, 1399 const char *buf, size_t count) 1400{ 1401 struct sensor_device_attribute_2 *sensor_attr = 1402 to_sensor_dev_attr_2(attr); 1403 int nr = sensor_attr->nr; 1404 int index = sensor_attr->index; 1405 struct i2c_client *client = to_i2c_client(dev); 1406 struct w83795_data *data = i2c_get_clientdata(client); 1407 unsigned long val; 1408 u8 tmp; 1409 u8 lsb_idx; 1410 1411 if (strict_strtoul(buf, 10, &val) < 0) 1412 return -EINVAL; 1413 val = in_to_reg(index, val); 1414 1415 if ((index >= 17) && 1416 !((data->has_gain >> (index - 17)) & 1)) 1417 val /= 8; 1418 val = SENSORS_LIMIT(val, 0, 0x3FF); 1419 mutex_lock(&data->update_lock); 1420 1421 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1422 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr)); 1423 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]); 1424 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]; 1425 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp); 1426 data->in_lsb[lsb_idx][nr] = tmp; 1427 1428 tmp = (val >> 2) & 0xff; 1429 w83795_write(client, W83795_REG_IN[index][nr], tmp); 1430 data->in[index][nr] = tmp; 1431 1432 mutex_unlock(&data->update_lock); 1433 return count; 1434} 1435 1436 1437static ssize_t 1438show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) 1439{ 1440 struct sensor_device_attribute_2 *sensor_attr = 1441 to_sensor_dev_attr_2(attr); 1442 int nr = sensor_attr->nr; 1443 struct i2c_client *client = to_i2c_client(dev); 1444 struct w83795_data *data = i2c_get_clientdata(client); 1445 u16 val = data->setup_pwm[nr]; 1446 1447 switch (nr) { 1448 case SETUP_PWM_UPTIME: 1449 case SETUP_PWM_DOWNTIME: 1450 val = time_from_reg(val); 1451 break; 1452 } 1453 1454 return sprintf(buf, "%d\n", val); 1455} 1456 1457static ssize_t 1458store_sf_setup(struct device *dev, struct device_attribute *attr, 1459 const char *buf, size_t count) 1460{ 1461 struct sensor_device_attribute_2 *sensor_attr = 1462 to_sensor_dev_attr_2(attr); 1463 int nr = sensor_attr->nr; 1464 struct i2c_client *client = to_i2c_client(dev); 1465 struct w83795_data *data = i2c_get_clientdata(client); 1466 unsigned long val; 1467 1468 if (strict_strtoul(buf, 10, &val) < 0) 1469 return -EINVAL; 1470 1471 switch (nr) { 1472 case SETUP_PWM_DEFAULT: 1473 val = SENSORS_LIMIT(val, 0, 0xff); 1474 break; 1475 case SETUP_PWM_UPTIME: 1476 case SETUP_PWM_DOWNTIME: 1477 val = time_to_reg(val); 1478 if (val == 0) 1479 return -EINVAL; 1480 break; 1481 } 1482 1483 mutex_lock(&data->update_lock); 1484 data->setup_pwm[nr] = val; 1485 w83795_write(client, W83795_REG_SETUP_PWM(nr), val); 1486 mutex_unlock(&data->update_lock); 1487 return count; 1488} 1489 1490 1491#define NOT_USED -1 1492 1493/* Don't change the attribute order, _max and _min are accessed by index 1494 * somewhere else in the code */ 1495#define SENSOR_ATTR_IN(index) { \ 1496 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ 1497 IN_READ, index), \ 1498 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ 1499 store_in, IN_MAX, index), \ 1500 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ 1501 store_in, IN_LOW, index), \ 1502 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ 1503 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \ 1504 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ 1505 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1506 index + ((index > 14) ? 1 : 0)) } 1507 1508#define SENSOR_ATTR_FAN(index) { \ 1509 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ 1510 NULL, FAN_INPUT, index - 1), \ 1511 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ 1512 show_fan, store_fan_min, FAN_MIN, index - 1), \ 1513 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ 1514 NULL, ALARM_STATUS, index + 31), \ 1515 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ 1516 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) } 1517 1518#define SENSOR_ATTR_PWM(index) { \ 1519 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ 1520 store_pwm, PWM_OUTPUT, index - 1), \ 1521 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ 1522 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ 1523 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ 1524 show_pwm, store_pwm, PWM_START, index - 1), \ 1525 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ 1526 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \ 1527 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \ 1528 show_pwm, store_pwm, PWM_FREQ, index - 1), \ 1529 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \ 1530 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \ 1531 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \ 1532 show_fanin, store_fanin, FANIN_TARGET, index - 1) } 1533 1534#define SENSOR_ATTR_DTS(index) { \ 1535 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \ 1536 show_dts_mode, NULL, NOT_USED, index - 7), \ 1537 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \ 1538 NULL, NOT_USED, index - 7), \ 1539 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \ 1540 store_dts_ext, DTS_CRIT, NOT_USED), \ 1541 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ 1542 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \ 1543 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \ 1544 store_dts_ext, DTS_WARN, NOT_USED), \ 1545 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1546 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \ 1547 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1548 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \ 1549 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1550 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) } 1551 1552#define SENSOR_ATTR_TEMP(index) { \ 1553 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \ 1554 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ 1555 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ 1556 NULL, TEMP_READ, index - 1), \ 1557 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \ 1558 store_temp, TEMP_CRIT, index - 1), \ 1559 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ 1560 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ 1561 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ 1562 store_temp, TEMP_WARN, index - 1), \ 1563 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1564 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ 1565 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1566 show_alarm_beep, NULL, ALARM_STATUS, \ 1567 index + (index > 4 ? 11 : 17)), \ 1568 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1569 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1570 index + (index > 4 ? 11 : 17)), \ 1571 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \ 1572 show_temp_src, store_temp_src, NOT_USED, index - 1), \ 1573 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ 1574 show_temp_pwm_enable, store_temp_pwm_enable, \ 1575 TEMP_PWM_ENABLE, index - 1), \ 1576 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \ 1577 show_temp_pwm_enable, store_temp_pwm_enable, \ 1578 TEMP_PWM_FAN_MAP, index - 1), \ 1579 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \ 1580 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \ 1581 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \ 1582 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \ 1583 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \ 1584 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \ 1585 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \ 1586 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \ 1587 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ 1588 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \ 1589 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ 1590 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \ 1591 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ 1592 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \ 1593 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ 1594 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \ 1595 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ 1596 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \ 1597 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ 1598 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \ 1599 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ 1600 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \ 1601 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ 1602 show_sf4_temp, store_sf4_temp, 0, index - 1), \ 1603 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ 1604 show_sf4_temp, store_sf4_temp, 1, index - 1), \ 1605 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ 1606 show_sf4_temp, store_sf4_temp, 2, index - 1), \ 1607 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ 1608 show_sf4_temp, store_sf4_temp, 3, index - 1), \ 1609 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ 1610 show_sf4_temp, store_sf4_temp, 4, index - 1), \ 1611 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ 1612 show_sf4_temp, store_sf4_temp, 5, index - 1), \ 1613 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ 1614 show_sf4_temp, store_sf4_temp, 6, index - 1) } 1615 1616 1617static struct sensor_device_attribute_2 w83795_in[][5] = { 1618 SENSOR_ATTR_IN(0), 1619 SENSOR_ATTR_IN(1), 1620 SENSOR_ATTR_IN(2), 1621 SENSOR_ATTR_IN(3), 1622 SENSOR_ATTR_IN(4), 1623 SENSOR_ATTR_IN(5), 1624 SENSOR_ATTR_IN(6), 1625 SENSOR_ATTR_IN(7), 1626 SENSOR_ATTR_IN(8), 1627 SENSOR_ATTR_IN(9), 1628 SENSOR_ATTR_IN(10), 1629 SENSOR_ATTR_IN(11), 1630 SENSOR_ATTR_IN(12), 1631 SENSOR_ATTR_IN(13), 1632 SENSOR_ATTR_IN(14), 1633 SENSOR_ATTR_IN(15), 1634 SENSOR_ATTR_IN(16), 1635 SENSOR_ATTR_IN(17), 1636 SENSOR_ATTR_IN(18), 1637 SENSOR_ATTR_IN(19), 1638 SENSOR_ATTR_IN(20), 1639}; 1640 1641static const struct sensor_device_attribute_2 w83795_fan[][4] = { 1642 SENSOR_ATTR_FAN(1), 1643 SENSOR_ATTR_FAN(2), 1644 SENSOR_ATTR_FAN(3), 1645 SENSOR_ATTR_FAN(4), 1646 SENSOR_ATTR_FAN(5), 1647 SENSOR_ATTR_FAN(6), 1648 SENSOR_ATTR_FAN(7), 1649 SENSOR_ATTR_FAN(8), 1650 SENSOR_ATTR_FAN(9), 1651 SENSOR_ATTR_FAN(10), 1652 SENSOR_ATTR_FAN(11), 1653 SENSOR_ATTR_FAN(12), 1654 SENSOR_ATTR_FAN(13), 1655 SENSOR_ATTR_FAN(14), 1656}; 1657 1658static const struct sensor_device_attribute_2 w83795_temp[][29] = { 1659 SENSOR_ATTR_TEMP(1), 1660 SENSOR_ATTR_TEMP(2), 1661 SENSOR_ATTR_TEMP(3), 1662 SENSOR_ATTR_TEMP(4), 1663 SENSOR_ATTR_TEMP(5), 1664 SENSOR_ATTR_TEMP(6), 1665}; 1666 1667static const struct sensor_device_attribute_2 w83795_dts[][8] = { 1668 SENSOR_ATTR_DTS(7), 1669 SENSOR_ATTR_DTS(8), 1670 SENSOR_ATTR_DTS(9), 1671 SENSOR_ATTR_DTS(10), 1672 SENSOR_ATTR_DTS(11), 1673 SENSOR_ATTR_DTS(12), 1674 SENSOR_ATTR_DTS(13), 1675 SENSOR_ATTR_DTS(14), 1676}; 1677 1678static const struct sensor_device_attribute_2 w83795_pwm[][7] = { 1679 SENSOR_ATTR_PWM(1), 1680 SENSOR_ATTR_PWM(2), 1681 SENSOR_ATTR_PWM(3), 1682 SENSOR_ATTR_PWM(4), 1683 SENSOR_ATTR_PWM(5), 1684 SENSOR_ATTR_PWM(6), 1685 SENSOR_ATTR_PWM(7), 1686 SENSOR_ATTR_PWM(8), 1687}; 1688 1689static const struct sensor_device_attribute_2 sda_single_files[] = { 1690 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep, 1691 store_chassis_clear, ALARM_STATUS, 46), 1692 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable, 1693 store_beep_enable, NOT_USED, NOT_USED), 1694 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin, 1695 store_fanin, FANIN_TOL, NOT_USED), 1696 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, 1697 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), 1698 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, 1699 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), 1700 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, 1701 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), 1702}; 1703 1704/* 1705 * Driver interface 1706 */ 1707 1708static void w83795_init_client(struct i2c_client *client) 1709{ 1710 struct w83795_data *data = i2c_get_clientdata(client); 1711 static const u16 clkin[4] = { /* in kHz */ 1712 14318, 24000, 33333, 48000 1713 }; 1714 u8 config; 1715 1716 if (reset) 1717 w83795_write(client, W83795_REG_CONFIG, 0x80); 1718 1719 /* Start monitoring if needed */ 1720 config = w83795_read(client, W83795_REG_CONFIG); 1721 if (!(config & W83795_REG_CONFIG_START)) { 1722 dev_info(&client->dev, "Enabling monitoring operations\n"); 1723 w83795_write(client, W83795_REG_CONFIG, 1724 config | W83795_REG_CONFIG_START); 1725 } 1726 1727 data->clkin = clkin[(config >> 3) & 0x3]; 1728 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin); 1729} 1730 1731static int w83795_get_device_id(struct i2c_client *client) 1732{ 1733 int device_id; 1734 1735 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID); 1736 1737 /* Special case for rev. A chips; can't be checked first because later 1738 revisions emulate this for compatibility */ 1739 if (device_id < 0 || (device_id & 0xf0) != 0x50) { 1740 int alt_id; 1741 1742 alt_id = i2c_smbus_read_byte_data(client, 1743 W83795_REG_DEVICEID_A); 1744 if (alt_id == 0x50) 1745 device_id = alt_id; 1746 } 1747 1748 return device_id; 1749} 1750 1751/* Return 0 if detection is successful, -ENODEV otherwise */ 1752static int w83795_detect(struct i2c_client *client, 1753 struct i2c_board_info *info) 1754{ 1755 int bank, vendor_id, device_id, expected, i2c_addr, config; 1756 struct i2c_adapter *adapter = client->adapter; 1757 unsigned short address = client->addr; 1758 const char *chip_name; 1759 1760 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1761 return -ENODEV; 1762 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1763 if (bank < 0 || (bank & 0x7c)) { 1764 dev_dbg(&adapter->dev, 1765 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1766 address, "bank"); 1767 return -ENODEV; 1768 } 1769 1770 /* Check Nuvoton vendor ID */ 1771 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID); 1772 expected = bank & 0x80 ? 0x5c : 0xa3; 1773 if (vendor_id != expected) { 1774 dev_dbg(&adapter->dev, 1775 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1776 address, "vendor id"); 1777 return -ENODEV; 1778 } 1779 1780 /* Check device ID */ 1781 device_id = w83795_get_device_id(client) | 1782 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8); 1783 if ((device_id >> 4) != 0x795) { 1784 dev_dbg(&adapter->dev, 1785 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1786 address, "device id\n"); 1787 return -ENODEV; 1788 } 1789 1790 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR 1791 should match */ 1792 if ((bank & 0x07) == 0) { 1793 i2c_addr = i2c_smbus_read_byte_data(client, 1794 W83795_REG_I2C_ADDR); 1795 if ((i2c_addr & 0x7f) != address) { 1796 dev_dbg(&adapter->dev, 1797 "w83795: Detection failed at addr 0x%02hx, " 1798 "check %s\n", address, "i2c addr"); 1799 return -ENODEV; 1800 } 1801 } 1802 1803 /* Check 795 chip type: 795G or 795ADG 1804 Usually we don't write to chips during detection, but here we don't 1805 quite have the choice; hopefully it's OK, we are about to return 1806 success anyway */ 1807 if ((bank & 0x07) != 0) 1808 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, 1809 bank & ~0x07); 1810 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG); 1811 if (config & W83795_REG_CONFIG_CONFIG48) 1812 chip_name = "w83795adg"; 1813 else 1814 chip_name = "w83795g"; 1815 1816 strlcpy(info->type, chip_name, I2C_NAME_SIZE); 1817 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name, 1818 'A' + (device_id & 0xf), address); 1819 1820 return 0; 1821} 1822 1823static int w83795_handle_files(struct device *dev, int (*fn)(struct device *, 1824 const struct device_attribute *)) 1825{ 1826 struct w83795_data *data = dev_get_drvdata(dev); 1827 int err, i, j; 1828 1829 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) { 1830 if (!(data->has_in & (1 << i))) 1831 continue; 1832 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) { 1833 err = fn(dev, &w83795_in[i][j].dev_attr); 1834 if (err) 1835 return err; 1836 } 1837 } 1838 1839 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) { 1840 if (!(data->has_fan & (1 << i))) 1841 continue; 1842 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) { 1843 err = fn(dev, &w83795_fan[i][j].dev_attr); 1844 if (err) 1845 return err; 1846 } 1847 } 1848 1849 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { 1850 err = fn(dev, &sda_single_files[i].dev_attr); 1851 if (err) 1852 return err; 1853 } 1854 1855 for (i = 0; i < data->has_pwm; i++) { 1856 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) { 1857 err = fn(dev, &w83795_pwm[i][j].dev_attr); 1858 if (err) 1859 return err; 1860 } 1861 } 1862 1863 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) { 1864 if (!(data->has_temp & (1 << i))) 1865 continue; 1866 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) { 1867 err = fn(dev, &w83795_temp[i][j].dev_attr); 1868 if (err) 1869 return err; 1870 } 1871 } 1872 1873 if (data->enable_dts != 0) { 1874 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) { 1875 if (!(data->has_dts & (1 << i))) 1876 continue; 1877 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) { 1878 err = fn(dev, &w83795_dts[i][j].dev_attr); 1879 if (err) 1880 return err; 1881 } 1882 } 1883 } 1884 1885 return 0; 1886} 1887 1888/* We need a wrapper that fits in w83795_handle_files */ 1889static int device_remove_file_wrapper(struct device *dev, 1890 const struct device_attribute *attr) 1891{ 1892 device_remove_file(dev, attr); 1893 return 0; 1894} 1895 1896static void w83795_check_dynamic_in_limits(struct i2c_client *client) 1897{ 1898 struct w83795_data *data = i2c_get_clientdata(client); 1899 u8 vid_ctl; 1900 int i, err_max, err_min; 1901 1902 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL); 1903 1904 /* Return immediately if VRM isn't configured */ 1905 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07) 1906 return; 1907 1908 data->has_dyn_in = (vid_ctl >> 3) & 0x07; 1909 for (i = 0; i < 2; i++) { 1910 if (!(data->has_dyn_in & (1 << i))) 1911 continue; 1912 1913 /* Voltage limits in dynamic mode, switch to read-only */ 1914 err_max = sysfs_chmod_file(&client->dev.kobj, 1915 &w83795_in[i][2].dev_attr.attr, 1916 S_IRUGO); 1917 err_min = sysfs_chmod_file(&client->dev.kobj, 1918 &w83795_in[i][3].dev_attr.attr, 1919 S_IRUGO); 1920 if (err_max || err_min) 1921 dev_warn(&client->dev, "Failed to set in%d limits " 1922 "read-only (%d, %d)\n", i, err_max, err_min); 1923 else 1924 dev_info(&client->dev, "in%d limits set dynamically " 1925 "from VID\n", i); 1926 } 1927} 1928 1929/* Check pins that can be used for either temperature or voltage monitoring */ 1930static void w83795_apply_temp_config(struct w83795_data *data, u8 config, 1931 int temp_chan, int in_chan) 1932{ 1933 /* config is a 2-bit value */ 1934 switch (config) { 1935 case 0x2: /* Voltage monitoring */ 1936 data->has_in |= 1 << in_chan; 1937 break; 1938 case 0x1: /* Thermal diode */ 1939 if (temp_chan >= 4) 1940 break; 1941 data->temp_mode |= 1 << temp_chan; 1942 /* fall through */ 1943 case 0x3: /* Thermistor */ 1944 data->has_temp |= 1 << temp_chan; 1945 break; 1946 } 1947} 1948 1949static int w83795_probe(struct i2c_client *client, 1950 const struct i2c_device_id *id) 1951{ 1952 int i; 1953 u8 tmp; 1954 struct device *dev = &client->dev; 1955 struct w83795_data *data; 1956 int err; 1957 1958 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL); 1959 if (!data) { 1960 err = -ENOMEM; 1961 goto exit; 1962 } 1963 1964 i2c_set_clientdata(client, data); 1965 data->chip_type = id->driver_data; 1966 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1967 mutex_init(&data->update_lock); 1968 1969 /* Initialize the chip */ 1970 w83795_init_client(client); 1971 1972 /* Check which voltages and fans are present */ 1973 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1) 1974 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8); 1975 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1) 1976 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8); 1977 1978 /* Check which analog temperatures and extra voltages are present */ 1979 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 1980 if (tmp & 0x20) 1981 data->enable_dts = 1; 1982 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16); 1983 w83795_apply_temp_config(data, tmp & 0x3, 4, 15); 1984 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1985 w83795_apply_temp_config(data, tmp >> 6, 3, 20); 1986 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19); 1987 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18); 1988 w83795_apply_temp_config(data, tmp & 0x3, 0, 17); 1989 1990 /* Check DTS enable status */ 1991 if (data->enable_dts) { 1992 if (1 & w83795_read(client, W83795_REG_DTSC)) 1993 data->enable_dts |= 2; 1994 data->has_dts = w83795_read(client, W83795_REG_DTSE); 1995 } 1996 1997 /* Report PECI Tbase values */ 1998 if (data->enable_dts == 1) { 1999 for (i = 0; i < 8; i++) { 2000 if (!(data->has_dts & (1 << i))) 2001 continue; 2002 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i)); 2003 dev_info(&client->dev, 2004 "PECI agent %d Tbase temperature: %u\n", 2005 i + 1, (unsigned int)tmp & 0x7f); 2006 } 2007 } 2008 2009 /* First update the voltages measured value and limits */ 2010 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 2011 if (!(data->has_in & (1 << i))) 2012 continue; 2013 data->in[i][IN_MAX] = 2014 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 2015 data->in[i][IN_LOW] = 2016 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 2017 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 2018 tmp |= (w83795_read(client, W83795_REG_VRLSB) 2019 >> VRLSB_SHIFT) & 0x03; 2020 data->in[i][IN_READ] = tmp; 2021 } 2022 for (i = 0; i < IN_LSB_REG_NUM; i++) { 2023 data->in_lsb[i][IN_MAX] = 2024 w83795_read(client, IN_LSB_REG(i, IN_MAX)); 2025 data->in_lsb[i][IN_LOW] = 2026 w83795_read(client, IN_LSB_REG(i, IN_LOW)); 2027 } 2028 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f; 2029 2030 /* First update fan and limits */ 2031 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 2032 if (!(data->has_fan & (1 << i))) 2033 continue; 2034 data->fan_min[i] = 2035 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4; 2036 data->fan_min[i] |= 2037 (w83795_read(client, W83795_REG_FAN_MIN_LSB(i)) >> 2038 W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F; 2039 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 2040 data->fan[i] |= 2041 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F; 2042 } 2043 2044 /* temperature and limits */ 2045 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 2046 if (!(data->has_temp & (1 << i))) 2047 continue; 2048 data->temp[i][TEMP_CRIT] = 2049 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]); 2050 data->temp[i][TEMP_CRIT_HYST] = 2051 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]); 2052 data->temp[i][TEMP_WARN] = 2053 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]); 2054 data->temp[i][TEMP_WARN_HYST] = 2055 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]); 2056 data->temp[i][TEMP_READ] = 2057 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 2058 data->temp_read_vrlsb[i] = 2059 w83795_read(client, W83795_REG_VRLSB); 2060 } 2061 2062 /* dts temperature and limits */ 2063 if (data->enable_dts != 0) { 2064 data->dts_ext[DTS_CRIT] = 2065 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT)); 2066 data->dts_ext[DTS_CRIT_HYST] = 2067 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST)); 2068 data->dts_ext[DTS_WARN] = 2069 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN)); 2070 data->dts_ext[DTS_WARN_HYST] = 2071 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST)); 2072 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 2073 if (!(data->has_dts & (1 << i))) 2074 continue; 2075 data->dts[i] = w83795_read(client, W83795_REG_DTS(i)); 2076 data->dts_read_vrlsb[i] = 2077 w83795_read(client, W83795_REG_VRLSB); 2078 } 2079 } 2080 2081 /* First update temp source selction */ 2082 for (i = 0; i < 3; i++) 2083 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i)); 2084 2085 /* pwm and smart fan */ 2086 if (data->chip_type == w83795g) 2087 data->has_pwm = 8; 2088 else 2089 data->has_pwm = 2; 2090 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1); 2091 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2); 2092 for (i = 0; i < W83795_REG_TEMP_NUM; i++) 2093 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i)); 2094 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC); 2095 for (i = 0; i < data->has_pwm; i++) { 2096 for (tmp = 0; tmp < 5; tmp++) { 2097 data->pwm[i][tmp] = 2098 w83795_read(client, W83795_REG_PWM(i, tmp)); 2099 } 2100 } 2101 for (i = 0; i < 8; i++) { 2102 data->target_speed[i] = 2103 w83795_read(client, W83795_REG_FTSH(i)) << 4; 2104 data->target_speed[i] |= 2105 w83795_read(client, W83795_REG_FTSL(i)) >> 4; 2106 } 2107 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f; 2108 2109 for (i = 0; i < W83795_REG_TEMP_NUM; i++) { 2110 data->pwm_temp[i][TEMP_PWM_TTTI] = 2111 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f; 2112 data->pwm_temp[i][TEMP_PWM_CTFS] = 2113 w83795_read(client, W83795_REG_CTFS(i)); 2114 tmp = w83795_read(client, W83795_REG_HT(i)); 2115 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f; 2116 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f; 2117 } 2118 for (i = 0; i < W83795_REG_TEMP_NUM; i++) { 2119 for (tmp = 0; tmp < 7; tmp++) { 2120 data->sf4_reg[i][SF4_TEMP][tmp] = 2121 w83795_read(client, 2122 W83795_REG_SF4_TEMP(i, tmp)); 2123 data->sf4_reg[i][SF4_PWM][tmp] = 2124 w83795_read(client, W83795_REG_SF4_PWM(i, tmp)); 2125 } 2126 } 2127 2128 /* Setup PWM Register */ 2129 for (i = 0; i < 3; i++) { 2130 data->setup_pwm[i] = 2131 w83795_read(client, W83795_REG_SETUP_PWM(i)); 2132 } 2133 2134 /* alarm and beep */ 2135 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) { 2136 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 2137 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i)); 2138 } 2139 data->beep_enable = 2140 (w83795_read(client, W83795_REG_BEEP(5)) >> 7) & 0x01; 2141 2142 err = w83795_handle_files(dev, device_create_file); 2143 if (err) 2144 goto exit_remove; 2145 2146 if (data->chip_type == w83795g) 2147 w83795_check_dynamic_in_limits(client); 2148 2149 data->hwmon_dev = hwmon_device_register(dev); 2150 if (IS_ERR(data->hwmon_dev)) { 2151 err = PTR_ERR(data->hwmon_dev); 2152 goto exit_remove; 2153 } 2154 2155 return 0; 2156 2157exit_remove: 2158 w83795_handle_files(dev, device_remove_file_wrapper); 2159 kfree(data); 2160exit: 2161 return err; 2162} 2163 2164static int w83795_remove(struct i2c_client *client) 2165{ 2166 struct w83795_data *data = i2c_get_clientdata(client); 2167 2168 hwmon_device_unregister(data->hwmon_dev); 2169 w83795_handle_files(&client->dev, device_remove_file_wrapper); 2170 kfree(data); 2171 2172 return 0; 2173} 2174 2175 2176static const struct i2c_device_id w83795_id[] = { 2177 { "w83795g", w83795g }, 2178 { "w83795adg", w83795adg }, 2179 { } 2180}; 2181MODULE_DEVICE_TABLE(i2c, w83795_id); 2182 2183static struct i2c_driver w83795_driver = { 2184 .driver = { 2185 .name = "w83795", 2186 }, 2187 .probe = w83795_probe, 2188 .remove = w83795_remove, 2189 .id_table = w83795_id, 2190 2191 .class = I2C_CLASS_HWMON, 2192 .detect = w83795_detect, 2193 .address_list = normal_i2c, 2194}; 2195 2196static int __init sensors_w83795_init(void) 2197{ 2198 return i2c_add_driver(&w83795_driver); 2199} 2200 2201static void __exit sensors_w83795_exit(void) 2202{ 2203 i2c_del_driver(&w83795_driver); 2204} 2205 2206MODULE_AUTHOR("Wei Song"); 2207MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver"); 2208MODULE_LICENSE("GPL"); 2209 2210module_init(sensors_w83795_init); 2211module_exit(sensors_w83795_exit); 2212