w83795.c revision 5d2cd958f777e533fa2809527836996f59b2d823
1/* 2 * w83795.c - Linux kernel driver for hardware monitoring 3 * Copyright (C) 2008 Nuvoton Technology Corp. 4 * Wei Song 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation - version 2. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 18 * 02110-1301 USA. 19 * 20 * Supports following chips: 21 * 22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA 23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no 24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no 25 */ 26 27#include <linux/kernel.h> 28#include <linux/module.h> 29#include <linux/init.h> 30#include <linux/slab.h> 31#include <linux/i2c.h> 32#include <linux/hwmon.h> 33#include <linux/hwmon-sysfs.h> 34#include <linux/err.h> 35#include <linux/mutex.h> 36#include <linux/delay.h> 37 38/* Addresses to scan */ 39static const unsigned short normal_i2c[] = { 40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END 41}; 42 43 44static int reset; 45module_param(reset, bool, 0); 46MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); 47 48 49#define W83795_REG_BANKSEL 0x00 50#define W83795_REG_VENDORID 0xfd 51#define W83795_REG_CHIPID 0xfe 52#define W83795_REG_DEVICEID 0xfb 53#define W83795_REG_DEVICEID_A 0xff 54 55#define W83795_REG_I2C_ADDR 0xfc 56#define W83795_REG_CONFIG 0x01 57#define W83795_REG_CONFIG_CONFIG48 0x04 58#define W83795_REG_CONFIG_START 0x01 59 60/* Multi-Function Pin Ctrl Registers */ 61#define W83795_REG_VOLT_CTRL1 0x02 62#define W83795_REG_VOLT_CTRL2 0x03 63#define W83795_REG_TEMP_CTRL1 0x04 64#define W83795_REG_TEMP_CTRL2 0x05 65#define W83795_REG_FANIN_CTRL1 0x06 66#define W83795_REG_FANIN_CTRL2 0x07 67#define W83795_REG_VMIGB_CTRL 0x08 68 69#define TEMP_READ 0 70#define TEMP_CRIT 1 71#define TEMP_CRIT_HYST 2 72#define TEMP_WARN 3 73#define TEMP_WARN_HYST 4 74/* only crit and crit_hyst affect real-time alarm status 75 * current crit crit_hyst warn warn_hyst */ 76static const u16 W83795_REG_TEMP[][5] = { 77 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */ 78 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */ 79 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */ 80 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */ 81 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */ 82 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */ 83}; 84 85#define IN_READ 0 86#define IN_MAX 1 87#define IN_LOW 2 88static const u16 W83795_REG_IN[][3] = { 89 /* Current, HL, LL */ 90 {0x10, 0x70, 0x71}, /* VSEN1 */ 91 {0x11, 0x72, 0x73}, /* VSEN2 */ 92 {0x12, 0x74, 0x75}, /* VSEN3 */ 93 {0x13, 0x76, 0x77}, /* VSEN4 */ 94 {0x14, 0x78, 0x79}, /* VSEN5 */ 95 {0x15, 0x7a, 0x7b}, /* VSEN6 */ 96 {0x16, 0x7c, 0x7d}, /* VSEN7 */ 97 {0x17, 0x7e, 0x7f}, /* VSEN8 */ 98 {0x18, 0x80, 0x81}, /* VSEN9 */ 99 {0x19, 0x82, 0x83}, /* VSEN10 */ 100 {0x1A, 0x84, 0x85}, /* VSEN11 */ 101 {0x1B, 0x86, 0x87}, /* VTT */ 102 {0x1C, 0x88, 0x89}, /* 3VDD */ 103 {0x1D, 0x8a, 0x8b}, /* 3VSB */ 104 {0x1E, 0x8c, 0x8d}, /* VBAT */ 105 {0x1F, 0xa6, 0xa7}, /* VSEN12 */ 106 {0x20, 0xaa, 0xab}, /* VSEN13 */ 107 {0x21, 0x96, 0x97}, /* VSEN14 */ 108 {0x22, 0x9a, 0x9b}, /* VSEN15 */ 109 {0x23, 0x9e, 0x9f}, /* VSEN16 */ 110 {0x24, 0xa2, 0xa3}, /* VSEN17 */ 111}; 112#define W83795_REG_VRLSB 0x3C 113 114static const u8 W83795_REG_IN_HL_LSB[] = { 115 0x8e, /* VSEN1-4 */ 116 0x90, /* VSEN5-8 */ 117 0x92, /* VSEN9-11 */ 118 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */ 119 0xa8, /* VSEN12 */ 120 0xac, /* VSEN13 */ 121 0x98, /* VSEN14 */ 122 0x9c, /* VSEN15 */ 123 0xa0, /* VSEN16 */ 124 0xa4, /* VSEN17 */ 125}; 126 127#define IN_LSB_REG(index, type) \ 128 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \ 129 : (W83795_REG_IN_HL_LSB[(index)] + 1)) 130 131#define IN_LSB_SHIFT 0 132#define IN_LSB_IDX 1 133static const u8 IN_LSB_SHIFT_IDX[][2] = { 134 /* High/Low LSB shift, LSB No. */ 135 {0x00, 0x00}, /* VSEN1 */ 136 {0x02, 0x00}, /* VSEN2 */ 137 {0x04, 0x00}, /* VSEN3 */ 138 {0x06, 0x00}, /* VSEN4 */ 139 {0x00, 0x01}, /* VSEN5 */ 140 {0x02, 0x01}, /* VSEN6 */ 141 {0x04, 0x01}, /* VSEN7 */ 142 {0x06, 0x01}, /* VSEN8 */ 143 {0x00, 0x02}, /* VSEN9 */ 144 {0x02, 0x02}, /* VSEN10 */ 145 {0x04, 0x02}, /* VSEN11 */ 146 {0x00, 0x03}, /* VTT */ 147 {0x02, 0x03}, /* 3VDD */ 148 {0x04, 0x03}, /* 3VSB */ 149 {0x06, 0x03}, /* VBAT */ 150 {0x06, 0x04}, /* VSEN12 */ 151 {0x06, 0x05}, /* VSEN13 */ 152 {0x06, 0x06}, /* VSEN14 */ 153 {0x06, 0x07}, /* VSEN15 */ 154 {0x06, 0x08}, /* VSEN16 */ 155 {0x06, 0x09}, /* VSEN17 */ 156}; 157 158 159#define W83795_REG_FAN(index) (0x2E + (index)) 160#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index)) 161#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2) 162#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \ 163 (((index) & 1) ? 4 : 0) 164 165#define W83795_REG_VID_CTRL 0x6A 166 167#define W83795_REG_ALARM(index) (0x41 + (index)) 168#define W83795_REG_BEEP(index) (0x50 + (index)) 169 170#define W83795_REG_CLR_CHASSIS 0x4D 171 172 173#define W83795_REG_FCMS1 0x201 174#define W83795_REG_FCMS2 0x208 175#define W83795_REG_TFMR(index) (0x202 + (index)) 176#define W83795_REG_FOMC 0x20F 177 178#define W83795_REG_TSS(index) (0x209 + (index)) 179 180#define PWM_OUTPUT 0 181#define PWM_FREQ 1 182#define PWM_START 2 183#define PWM_NONSTOP 3 184#define PWM_STOP_TIME 4 185#define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index)) 186 187#define W83795_REG_FTSH(index) (0x240 + (index) * 2) 188#define W83795_REG_FTSL(index) (0x241 + (index) * 2) 189#define W83795_REG_TFTS 0x250 190 191#define TEMP_PWM_TTTI 0 192#define TEMP_PWM_CTFS 1 193#define TEMP_PWM_HCT 2 194#define TEMP_PWM_HOT 3 195#define W83795_REG_TTTI(index) (0x260 + (index)) 196#define W83795_REG_CTFS(index) (0x268 + (index)) 197#define W83795_REG_HT(index) (0x270 + (index)) 198 199#define SF4_TEMP 0 200#define SF4_PWM 1 201#define W83795_REG_SF4_TEMP(temp_num, index) \ 202 (0x280 + 0x10 * (temp_num) + (index)) 203#define W83795_REG_SF4_PWM(temp_num, index) \ 204 (0x288 + 0x10 * (temp_num) + (index)) 205 206#define W83795_REG_DTSC 0x301 207#define W83795_REG_DTSE 0x302 208#define W83795_REG_DTS(index) (0x26 + (index)) 209#define W83795_REG_PECI_TBASE(index) (0x320 + (index)) 210 211#define DTS_CRIT 0 212#define DTS_CRIT_HYST 1 213#define DTS_WARN 2 214#define DTS_WARN_HYST 3 215#define W83795_REG_DTS_EXT(index) (0xB2 + (index)) 216 217#define SETUP_PWM_DEFAULT 0 218#define SETUP_PWM_UPTIME 1 219#define SETUP_PWM_DOWNTIME 2 220#define W83795_REG_SETUP_PWM(index) (0x20C + (index)) 221 222static inline u16 in_from_reg(u8 index, u16 val) 223{ 224 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */ 225 if (index >= 12 && index <= 14) 226 return val * 6; 227 else 228 return val * 2; 229} 230 231static inline u16 in_to_reg(u8 index, u16 val) 232{ 233 if (index >= 12 && index <= 14) 234 return val / 6; 235 else 236 return val / 2; 237} 238 239static inline unsigned long fan_from_reg(u16 val) 240{ 241 if ((val == 0xfff) || (val == 0)) 242 return 0; 243 return 1350000UL / val; 244} 245 246static inline u16 fan_to_reg(long rpm) 247{ 248 if (rpm <= 0) 249 return 0x0fff; 250 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); 251} 252 253static inline unsigned long time_from_reg(u8 reg) 254{ 255 return reg * 100; 256} 257 258static inline u8 time_to_reg(unsigned long val) 259{ 260 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff); 261} 262 263static inline long temp_from_reg(s8 reg) 264{ 265 return reg * 1000; 266} 267 268static inline s8 temp_to_reg(long val, s8 min, s8 max) 269{ 270 return SENSORS_LIMIT(val / 1000, min, max); 271} 272 273static const u16 pwm_freq_cksel0[16] = { 274 1024, 512, 341, 256, 205, 171, 146, 128, 275 85, 64, 32, 16, 8, 4, 2, 1 276}; 277 278static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin) 279{ 280 unsigned long base_clock; 281 282 if (reg & 0x80) { 283 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); 284 return base_clock / ((reg & 0x7f) + 1); 285 } else 286 return pwm_freq_cksel0[reg & 0x0f]; 287} 288 289static u8 pwm_freq_to_reg(unsigned long val, u16 clkin) 290{ 291 unsigned long base_clock; 292 u8 reg0, reg1; 293 unsigned long best0, best1; 294 295 /* Best fit for cksel = 0 */ 296 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) { 297 if (val > (pwm_freq_cksel0[reg0] + 298 pwm_freq_cksel0[reg0 + 1]) / 2) 299 break; 300 } 301 if (val < 375) /* cksel = 1 can't beat this */ 302 return reg0; 303 best0 = pwm_freq_cksel0[reg0]; 304 305 /* Best fit for cksel = 1 */ 306 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); 307 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128); 308 best1 = base_clock / reg1; 309 reg1 = 0x80 | (reg1 - 1); 310 311 /* Choose the closest one */ 312 if (abs(val - best0) > abs(val - best1)) 313 return reg1; 314 else 315 return reg0; 316} 317 318enum chip_types {w83795g, w83795adg}; 319 320struct w83795_data { 321 struct device *hwmon_dev; 322 struct mutex update_lock; 323 unsigned long last_updated; /* In jiffies */ 324 enum chip_types chip_type; 325 326 u8 bank; 327 328 u32 has_in; /* Enable monitor VIN or not */ 329 u8 has_dyn_in; /* Only in2-0 can have this */ 330 u16 in[21][3]; /* Register value, read/high/low */ 331 u8 in_lsb[10][3]; /* LSB Register value, high/low */ 332 u8 has_gain; /* has gain: in17-20 * 8 */ 333 334 u16 has_fan; /* Enable fan14-1 or not */ 335 u16 fan[14]; /* Register value combine */ 336 u16 fan_min[14]; /* Register value combine */ 337 338 u8 has_temp; /* Enable monitor temp6-1 or not */ 339 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */ 340 u8 temp_read_vrlsb[6]; 341 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */ 342 u8 temp_src[3]; /* Register value */ 343 344 u8 enable_dts; /* Enable PECI and SB-TSI, 345 * bit 0: =1 enable, =0 disable, 346 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */ 347 u8 has_dts; /* Enable monitor DTS temp */ 348 s8 dts[8]; /* Register value */ 349 u8 dts_read_vrlsb[8]; /* Register value */ 350 s8 dts_ext[4]; /* Register value */ 351 352 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2, 353 * no config register, only affected by chip 354 * type */ 355 u8 pwm[8][5]; /* Register value, output, freq, start, 356 * non stop, stop time */ 357 u16 clkin; /* CLKIN frequency in kHz */ 358 u8 pwm_fcms[2]; /* Register value */ 359 u8 pwm_tfmr[6]; /* Register value */ 360 u8 pwm_fomc; /* Register value */ 361 362 u16 target_speed[8]; /* Register value, target speed for speed 363 * cruise */ 364 u8 tol_speed; /* tolerance of target speed */ 365 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */ 366 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */ 367 368 u8 setup_pwm[3]; /* Register value */ 369 370 u8 alarms[6]; /* Register value */ 371 u8 beeps[6]; /* Register value */ 372 373 char valid; 374 char valid_limits; 375 char valid_pwm_config; 376}; 377 378/* 379 * Hardware access 380 * We assume that nobdody can change the bank outside the driver. 381 */ 382 383/* Must be called with data->update_lock held, except during initialization */ 384static int w83795_set_bank(struct i2c_client *client, u8 bank) 385{ 386 struct w83795_data *data = i2c_get_clientdata(client); 387 int err; 388 389 /* If the same bank is already set, nothing to do */ 390 if ((data->bank & 0x07) == bank) 391 return 0; 392 393 /* Change to new bank, preserve all other bits */ 394 bank |= data->bank & ~0x07; 395 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank); 396 if (err < 0) { 397 dev_err(&client->dev, 398 "Failed to set bank to %d, err %d\n", 399 (int)bank, err); 400 return err; 401 } 402 data->bank = bank; 403 404 return 0; 405} 406 407/* Must be called with data->update_lock held, except during initialization */ 408static u8 w83795_read(struct i2c_client *client, u16 reg) 409{ 410 int err; 411 412 err = w83795_set_bank(client, reg >> 8); 413 if (err < 0) 414 return 0x00; /* Arbitrary */ 415 416 err = i2c_smbus_read_byte_data(client, reg & 0xff); 417 if (err < 0) { 418 dev_err(&client->dev, 419 "Failed to read from register 0x%03x, err %d\n", 420 (int)reg, err); 421 return 0x00; /* Arbitrary */ 422 } 423 return err; 424} 425 426/* Must be called with data->update_lock held, except during initialization */ 427static int w83795_write(struct i2c_client *client, u16 reg, u8 value) 428{ 429 int err; 430 431 err = w83795_set_bank(client, reg >> 8); 432 if (err < 0) 433 return err; 434 435 err = i2c_smbus_write_byte_data(client, reg & 0xff, value); 436 if (err < 0) 437 dev_err(&client->dev, 438 "Failed to write to register 0x%03x, err %d\n", 439 (int)reg, err); 440 return err; 441} 442 443static void w83795_update_limits(struct i2c_client *client) 444{ 445 struct w83795_data *data = i2c_get_clientdata(client); 446 int i, limit; 447 448 /* Read the voltage limits */ 449 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 450 if (!(data->has_in & (1 << i))) 451 continue; 452 data->in[i][IN_MAX] = 453 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 454 data->in[i][IN_LOW] = 455 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 456 } 457 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) { 458 if ((i == 2 && data->chip_type == w83795adg) || 459 (i >= 4 && !(data->has_in & (1 << (i + 11))))) 460 continue; 461 data->in_lsb[i][IN_MAX] = 462 w83795_read(client, IN_LSB_REG(i, IN_MAX)); 463 data->in_lsb[i][IN_LOW] = 464 w83795_read(client, IN_LSB_REG(i, IN_LOW)); 465 } 466 467 /* Read the fan limits */ 468 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 469 u8 lsb; 470 471 /* Each register contains LSB for 2 fans, but we want to 472 * read it only once to save time */ 473 if ((i & 1) == 0 && (data->has_fan & (3 << i))) 474 lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i)); 475 476 if (!(data->has_fan & (1 << i))) 477 continue; 478 data->fan_min[i] = 479 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4; 480 data->fan_min[i] |= 481 (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F; 482 } 483 484 /* Read the temperature limits */ 485 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 486 if (!(data->has_temp & (1 << i))) 487 continue; 488 for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++) 489 data->temp[i][limit] = 490 w83795_read(client, W83795_REG_TEMP[i][limit]); 491 } 492 493 /* Read the DTS limits */ 494 if (data->enable_dts != 0) { 495 for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++) 496 data->dts_ext[limit] = 497 w83795_read(client, W83795_REG_DTS_EXT(limit)); 498 } 499 500 /* Read beep settings */ 501 for (i = 0; i < ARRAY_SIZE(data->beeps); i++) 502 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i)); 503 504 data->valid_limits = 1; 505} 506 507static struct w83795_data *w83795_update_pwm_config(struct device *dev) 508{ 509 struct i2c_client *client = to_i2c_client(dev); 510 struct w83795_data *data = i2c_get_clientdata(client); 511 int i, tmp; 512 513 mutex_lock(&data->update_lock); 514 515 if (data->valid_pwm_config) 516 goto END; 517 518 /* Read temperature source selection */ 519 for (i = 0; i < ARRAY_SIZE(data->temp_src); i++) 520 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i)); 521 522 /* Read automatic fan speed control settings */ 523 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1); 524 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2); 525 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++) 526 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i)); 527 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC); 528 for (i = 0; i < data->has_pwm; i++) { 529 for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++) 530 data->pwm[i][tmp] = 531 w83795_read(client, W83795_REG_PWM(i, tmp)); 532 } 533 for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) { 534 data->target_speed[i] = 535 w83795_read(client, W83795_REG_FTSH(i)) << 4; 536 data->target_speed[i] |= 537 w83795_read(client, W83795_REG_FTSL(i)) >> 4; 538 } 539 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f; 540 541 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) { 542 data->pwm_temp[i][TEMP_PWM_TTTI] = 543 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f; 544 data->pwm_temp[i][TEMP_PWM_CTFS] = 545 w83795_read(client, W83795_REG_CTFS(i)); 546 tmp = w83795_read(client, W83795_REG_HT(i)); 547 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f; 548 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f; 549 } 550 551 /* Read SmartFanIV trip points */ 552 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) { 553 for (tmp = 0; tmp < 7; tmp++) { 554 data->sf4_reg[i][SF4_TEMP][tmp] = 555 w83795_read(client, 556 W83795_REG_SF4_TEMP(i, tmp)); 557 data->sf4_reg[i][SF4_PWM][tmp] = 558 w83795_read(client, W83795_REG_SF4_PWM(i, tmp)); 559 } 560 } 561 562 /* Read setup PWM */ 563 for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++) 564 data->setup_pwm[i] = 565 w83795_read(client, W83795_REG_SETUP_PWM(i)); 566 567 data->valid_pwm_config = 1; 568 569END: 570 mutex_unlock(&data->update_lock); 571 return data; 572} 573 574static struct w83795_data *w83795_update_device(struct device *dev) 575{ 576 struct i2c_client *client = to_i2c_client(dev); 577 struct w83795_data *data = i2c_get_clientdata(client); 578 u16 tmp; 579 int i; 580 581 mutex_lock(&data->update_lock); 582 583 if (!data->valid_limits) 584 w83795_update_limits(client); 585 586 if (!(time_after(jiffies, data->last_updated + HZ * 2) 587 || !data->valid)) 588 goto END; 589 590 /* Update the voltages value */ 591 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 592 if (!(data->has_in & (1 << i))) 593 continue; 594 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 595 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6; 596 data->in[i][IN_READ] = tmp; 597 } 598 599 /* in0-2 can have dynamic limits (W83795G only) */ 600 if (data->has_dyn_in) { 601 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX)); 602 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW)); 603 604 for (i = 0; i < 3; i++) { 605 if (!(data->has_dyn_in & (1 << i))) 606 continue; 607 data->in[i][IN_MAX] = 608 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 609 data->in[i][IN_LOW] = 610 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 611 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03; 612 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03; 613 } 614 } 615 616 /* Update fan */ 617 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 618 if (!(data->has_fan & (1 << i))) 619 continue; 620 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 621 data->fan[i] |= 622 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F; 623 } 624 625 /* Update temperature */ 626 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 627 data->temp[i][TEMP_READ] = 628 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 629 data->temp_read_vrlsb[i] = 630 w83795_read(client, W83795_REG_VRLSB); 631 } 632 633 /* Update dts temperature */ 634 if (data->enable_dts != 0) { 635 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 636 if (!(data->has_dts & (1 << i))) 637 continue; 638 data->dts[i] = 639 w83795_read(client, W83795_REG_DTS(i)); 640 data->dts_read_vrlsb[i] = 641 w83795_read(client, W83795_REG_VRLSB); 642 } 643 } 644 645 /* Update pwm output */ 646 for (i = 0; i < data->has_pwm; i++) { 647 data->pwm[i][PWM_OUTPUT] = 648 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT)); 649 } 650 651 /* update alarm */ 652 for (i = 0; i < ARRAY_SIZE(data->alarms); i++) 653 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 654 655 data->last_updated = jiffies; 656 data->valid = 1; 657 658END: 659 mutex_unlock(&data->update_lock); 660 return data; 661} 662 663/* 664 * Sysfs attributes 665 */ 666 667#define ALARM_STATUS 0 668#define BEEP_ENABLE 1 669static ssize_t 670show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) 671{ 672 struct w83795_data *data = w83795_update_device(dev); 673 struct sensor_device_attribute_2 *sensor_attr = 674 to_sensor_dev_attr_2(attr); 675 int nr = sensor_attr->nr; 676 int index = sensor_attr->index >> 3; 677 int bit = sensor_attr->index & 0x07; 678 u8 val; 679 680 if (ALARM_STATUS == nr) { 681 val = (data->alarms[index] >> (bit)) & 1; 682 } else { /* BEEP_ENABLE */ 683 val = (data->beeps[index] >> (bit)) & 1; 684 } 685 686 return sprintf(buf, "%u\n", val); 687} 688 689static ssize_t 690store_beep(struct device *dev, struct device_attribute *attr, 691 const char *buf, size_t count) 692{ 693 struct i2c_client *client = to_i2c_client(dev); 694 struct w83795_data *data = i2c_get_clientdata(client); 695 struct sensor_device_attribute_2 *sensor_attr = 696 to_sensor_dev_attr_2(attr); 697 int index = sensor_attr->index >> 3; 698 int shift = sensor_attr->index & 0x07; 699 u8 beep_bit = 1 << shift; 700 unsigned long val; 701 702 if (strict_strtoul(buf, 10, &val) < 0) 703 return -EINVAL; 704 if (val != 0 && val != 1) 705 return -EINVAL; 706 707 mutex_lock(&data->update_lock); 708 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index)); 709 data->beeps[index] &= ~beep_bit; 710 data->beeps[index] |= val << shift; 711 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]); 712 mutex_unlock(&data->update_lock); 713 714 return count; 715} 716 717/* Write any value to clear chassis alarm */ 718static ssize_t 719store_chassis_clear(struct device *dev, 720 struct device_attribute *attr, const char *buf, 721 size_t count) 722{ 723 struct i2c_client *client = to_i2c_client(dev); 724 struct w83795_data *data = i2c_get_clientdata(client); 725 u8 val; 726 727 mutex_lock(&data->update_lock); 728 val = w83795_read(client, W83795_REG_CLR_CHASSIS); 729 val |= 0x80; 730 w83795_write(client, W83795_REG_CLR_CHASSIS, val); 731 mutex_unlock(&data->update_lock); 732 return count; 733} 734 735#define FAN_INPUT 0 736#define FAN_MIN 1 737static ssize_t 738show_fan(struct device *dev, struct device_attribute *attr, char *buf) 739{ 740 struct sensor_device_attribute_2 *sensor_attr = 741 to_sensor_dev_attr_2(attr); 742 int nr = sensor_attr->nr; 743 int index = sensor_attr->index; 744 struct w83795_data *data = w83795_update_device(dev); 745 u16 val; 746 747 if (FAN_INPUT == nr) 748 val = data->fan[index] & 0x0fff; 749 else 750 val = data->fan_min[index] & 0x0fff; 751 752 return sprintf(buf, "%lu\n", fan_from_reg(val)); 753} 754 755static ssize_t 756store_fan_min(struct device *dev, struct device_attribute *attr, 757 const char *buf, size_t count) 758{ 759 struct sensor_device_attribute_2 *sensor_attr = 760 to_sensor_dev_attr_2(attr); 761 int index = sensor_attr->index; 762 struct i2c_client *client = to_i2c_client(dev); 763 struct w83795_data *data = i2c_get_clientdata(client); 764 unsigned long val; 765 766 if (strict_strtoul(buf, 10, &val)) 767 return -EINVAL; 768 val = fan_to_reg(val); 769 770 mutex_lock(&data->update_lock); 771 data->fan_min[index] = val; 772 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff); 773 val &= 0x0f; 774 if (index & 1) { 775 val <<= 4; 776 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 777 & 0x0f; 778 } else { 779 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 780 & 0xf0; 781 } 782 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff); 783 mutex_unlock(&data->update_lock); 784 785 return count; 786} 787 788static ssize_t 789show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 790{ 791 struct w83795_data *data; 792 struct sensor_device_attribute_2 *sensor_attr = 793 to_sensor_dev_attr_2(attr); 794 int nr = sensor_attr->nr; 795 int index = sensor_attr->index; 796 unsigned int val; 797 798 data = nr == PWM_OUTPUT ? w83795_update_device(dev) 799 : w83795_update_pwm_config(dev); 800 801 switch (nr) { 802 case PWM_STOP_TIME: 803 val = time_from_reg(data->pwm[index][nr]); 804 break; 805 case PWM_FREQ: 806 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin); 807 break; 808 default: 809 val = data->pwm[index][nr]; 810 break; 811 } 812 813 return sprintf(buf, "%u\n", val); 814} 815 816static ssize_t 817store_pwm(struct device *dev, struct device_attribute *attr, 818 const char *buf, size_t count) 819{ 820 struct i2c_client *client = to_i2c_client(dev); 821 struct w83795_data *data = i2c_get_clientdata(client); 822 struct sensor_device_attribute_2 *sensor_attr = 823 to_sensor_dev_attr_2(attr); 824 int nr = sensor_attr->nr; 825 int index = sensor_attr->index; 826 unsigned long val; 827 828 if (strict_strtoul(buf, 10, &val) < 0) 829 return -EINVAL; 830 831 mutex_lock(&data->update_lock); 832 switch (nr) { 833 case PWM_STOP_TIME: 834 val = time_to_reg(val); 835 break; 836 case PWM_FREQ: 837 val = pwm_freq_to_reg(val, data->clkin); 838 break; 839 default: 840 val = SENSORS_LIMIT(val, 0, 0xff); 841 break; 842 } 843 w83795_write(client, W83795_REG_PWM(index, nr), val); 844 data->pwm[index][nr] = val; 845 mutex_unlock(&data->update_lock); 846 return count; 847} 848 849static ssize_t 850show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 851{ 852 struct sensor_device_attribute_2 *sensor_attr = 853 to_sensor_dev_attr_2(attr); 854 struct w83795_data *data = w83795_update_pwm_config(dev); 855 int index = sensor_attr->index; 856 u8 tmp; 857 858 if (1 == (data->pwm_fcms[0] & (1 << index))) { 859 tmp = 2; 860 goto out; 861 } 862 for (tmp = 0; tmp < 6; tmp++) { 863 if (data->pwm_tfmr[tmp] & (1 << index)) { 864 tmp = 3; 865 goto out; 866 } 867 } 868 if (data->pwm_fomc & (1 << index)) 869 tmp = 0; 870 else 871 tmp = 1; 872 873out: 874 return sprintf(buf, "%u\n", tmp); 875} 876 877static ssize_t 878store_pwm_enable(struct device *dev, struct device_attribute *attr, 879 const char *buf, size_t count) 880{ 881 struct i2c_client *client = to_i2c_client(dev); 882 struct w83795_data *data = w83795_update_pwm_config(dev); 883 struct sensor_device_attribute_2 *sensor_attr = 884 to_sensor_dev_attr_2(attr); 885 int index = sensor_attr->index; 886 unsigned long val; 887 int i; 888 889 if (strict_strtoul(buf, 10, &val) < 0) 890 return -EINVAL; 891 if (val > 2) 892 return -EINVAL; 893 894 mutex_lock(&data->update_lock); 895 switch (val) { 896 case 0: 897 case 1: 898 data->pwm_fcms[0] &= ~(1 << index); 899 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 900 for (i = 0; i < 6; i++) { 901 data->pwm_tfmr[i] &= ~(1 << index); 902 w83795_write(client, W83795_REG_TFMR(i), 903 data->pwm_tfmr[i]); 904 } 905 data->pwm_fomc |= 1 << index; 906 data->pwm_fomc ^= val << index; 907 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc); 908 break; 909 case 2: 910 data->pwm_fcms[0] |= (1 << index); 911 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 912 break; 913 } 914 mutex_unlock(&data->update_lock); 915 return count; 916} 917 918static ssize_t 919show_temp_src(struct device *dev, struct device_attribute *attr, char *buf) 920{ 921 struct sensor_device_attribute_2 *sensor_attr = 922 to_sensor_dev_attr_2(attr); 923 struct w83795_data *data = w83795_update_pwm_config(dev); 924 int index = sensor_attr->index; 925 u8 val = index / 2; 926 u8 tmp = data->temp_src[val]; 927 928 if (index & 1) 929 val = 4; 930 else 931 val = 0; 932 tmp >>= val; 933 tmp &= 0x0f; 934 935 return sprintf(buf, "%u\n", tmp); 936} 937 938static ssize_t 939store_temp_src(struct device *dev, struct device_attribute *attr, 940 const char *buf, size_t count) 941{ 942 struct i2c_client *client = to_i2c_client(dev); 943 struct w83795_data *data = w83795_update_pwm_config(dev); 944 struct sensor_device_attribute_2 *sensor_attr = 945 to_sensor_dev_attr_2(attr); 946 int index = sensor_attr->index; 947 unsigned long tmp; 948 u8 val = index / 2; 949 950 if (strict_strtoul(buf, 10, &tmp) < 0) 951 return -EINVAL; 952 tmp = SENSORS_LIMIT(tmp, 0, 15); 953 954 mutex_lock(&data->update_lock); 955 if (index & 1) { 956 tmp <<= 4; 957 data->temp_src[val] &= 0x0f; 958 } else { 959 data->temp_src[val] &= 0xf0; 960 } 961 data->temp_src[val] |= tmp; 962 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]); 963 mutex_unlock(&data->update_lock); 964 965 return count; 966} 967 968#define TEMP_PWM_ENABLE 0 969#define TEMP_PWM_FAN_MAP 1 970static ssize_t 971show_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 972 char *buf) 973{ 974 struct w83795_data *data = w83795_update_pwm_config(dev); 975 struct sensor_device_attribute_2 *sensor_attr = 976 to_sensor_dev_attr_2(attr); 977 int nr = sensor_attr->nr; 978 int index = sensor_attr->index; 979 u8 tmp = 0xff; 980 981 switch (nr) { 982 case TEMP_PWM_ENABLE: 983 tmp = (data->pwm_fcms[1] >> index) & 1; 984 if (tmp) 985 tmp = 4; 986 else 987 tmp = 3; 988 break; 989 case TEMP_PWM_FAN_MAP: 990 tmp = data->pwm_tfmr[index]; 991 break; 992 } 993 994 return sprintf(buf, "%u\n", tmp); 995} 996 997static ssize_t 998store_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 999 const char *buf, size_t count) 1000{ 1001 struct i2c_client *client = to_i2c_client(dev); 1002 struct w83795_data *data = w83795_update_pwm_config(dev); 1003 struct sensor_device_attribute_2 *sensor_attr = 1004 to_sensor_dev_attr_2(attr); 1005 int nr = sensor_attr->nr; 1006 int index = sensor_attr->index; 1007 unsigned long tmp; 1008 1009 if (strict_strtoul(buf, 10, &tmp) < 0) 1010 return -EINVAL; 1011 1012 switch (nr) { 1013 case TEMP_PWM_ENABLE: 1014 if ((tmp != 3) && (tmp != 4)) 1015 return -EINVAL; 1016 tmp -= 3; 1017 mutex_lock(&data->update_lock); 1018 data->pwm_fcms[1] &= ~(1 << index); 1019 data->pwm_fcms[1] |= tmp << index; 1020 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]); 1021 mutex_unlock(&data->update_lock); 1022 break; 1023 case TEMP_PWM_FAN_MAP: 1024 mutex_lock(&data->update_lock); 1025 tmp = SENSORS_LIMIT(tmp, 0, 0xff); 1026 w83795_write(client, W83795_REG_TFMR(index), tmp); 1027 data->pwm_tfmr[index] = tmp; 1028 mutex_unlock(&data->update_lock); 1029 break; 1030 } 1031 return count; 1032} 1033 1034#define FANIN_TARGET 0 1035#define FANIN_TOL 1 1036static ssize_t 1037show_fanin(struct device *dev, struct device_attribute *attr, char *buf) 1038{ 1039 struct w83795_data *data = w83795_update_pwm_config(dev); 1040 struct sensor_device_attribute_2 *sensor_attr = 1041 to_sensor_dev_attr_2(attr); 1042 int nr = sensor_attr->nr; 1043 int index = sensor_attr->index; 1044 u16 tmp = 0; 1045 1046 switch (nr) { 1047 case FANIN_TARGET: 1048 tmp = fan_from_reg(data->target_speed[index]); 1049 break; 1050 case FANIN_TOL: 1051 tmp = data->tol_speed; 1052 break; 1053 } 1054 1055 return sprintf(buf, "%u\n", tmp); 1056} 1057 1058static ssize_t 1059store_fanin(struct device *dev, struct device_attribute *attr, 1060 const char *buf, size_t count) 1061{ 1062 struct i2c_client *client = to_i2c_client(dev); 1063 struct w83795_data *data = i2c_get_clientdata(client); 1064 struct sensor_device_attribute_2 *sensor_attr = 1065 to_sensor_dev_attr_2(attr); 1066 int nr = sensor_attr->nr; 1067 int index = sensor_attr->index; 1068 unsigned long val; 1069 1070 if (strict_strtoul(buf, 10, &val) < 0) 1071 return -EINVAL; 1072 1073 mutex_lock(&data->update_lock); 1074 switch (nr) { 1075 case FANIN_TARGET: 1076 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff)); 1077 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff); 1078 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0); 1079 data->target_speed[index] = val; 1080 break; 1081 case FANIN_TOL: 1082 val = SENSORS_LIMIT(val, 0, 0x3f); 1083 w83795_write(client, W83795_REG_TFTS, val); 1084 data->tol_speed = val; 1085 break; 1086 } 1087 mutex_unlock(&data->update_lock); 1088 1089 return count; 1090} 1091 1092 1093static ssize_t 1094show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1095{ 1096 struct w83795_data *data = w83795_update_pwm_config(dev); 1097 struct sensor_device_attribute_2 *sensor_attr = 1098 to_sensor_dev_attr_2(attr); 1099 int nr = sensor_attr->nr; 1100 int index = sensor_attr->index; 1101 long tmp = temp_from_reg(data->pwm_temp[index][nr]); 1102 1103 return sprintf(buf, "%ld\n", tmp); 1104} 1105 1106static ssize_t 1107store_temp_pwm(struct device *dev, struct device_attribute *attr, 1108 const char *buf, size_t count) 1109{ 1110 struct i2c_client *client = to_i2c_client(dev); 1111 struct w83795_data *data = i2c_get_clientdata(client); 1112 struct sensor_device_attribute_2 *sensor_attr = 1113 to_sensor_dev_attr_2(attr); 1114 int nr = sensor_attr->nr; 1115 int index = sensor_attr->index; 1116 unsigned long val; 1117 u8 tmp; 1118 1119 if (strict_strtoul(buf, 10, &val) < 0) 1120 return -EINVAL; 1121 val /= 1000; 1122 1123 mutex_lock(&data->update_lock); 1124 switch (nr) { 1125 case TEMP_PWM_TTTI: 1126 val = SENSORS_LIMIT(val, 0, 0x7f); 1127 w83795_write(client, W83795_REG_TTTI(index), val); 1128 break; 1129 case TEMP_PWM_CTFS: 1130 val = SENSORS_LIMIT(val, 0, 0x7f); 1131 w83795_write(client, W83795_REG_CTFS(index), val); 1132 break; 1133 case TEMP_PWM_HCT: 1134 val = SENSORS_LIMIT(val, 0, 0x0f); 1135 tmp = w83795_read(client, W83795_REG_HT(index)); 1136 tmp &= 0x0f; 1137 tmp |= (val << 4) & 0xf0; 1138 w83795_write(client, W83795_REG_HT(index), tmp); 1139 break; 1140 case TEMP_PWM_HOT: 1141 val = SENSORS_LIMIT(val, 0, 0x0f); 1142 tmp = w83795_read(client, W83795_REG_HT(index)); 1143 tmp &= 0xf0; 1144 tmp |= val & 0x0f; 1145 w83795_write(client, W83795_REG_HT(index), tmp); 1146 break; 1147 } 1148 data->pwm_temp[index][nr] = val; 1149 mutex_unlock(&data->update_lock); 1150 1151 return count; 1152} 1153 1154static ssize_t 1155show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1156{ 1157 struct w83795_data *data = w83795_update_pwm_config(dev); 1158 struct sensor_device_attribute_2 *sensor_attr = 1159 to_sensor_dev_attr_2(attr); 1160 int nr = sensor_attr->nr; 1161 int index = sensor_attr->index; 1162 1163 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]); 1164} 1165 1166static ssize_t 1167store_sf4_pwm(struct device *dev, struct device_attribute *attr, 1168 const char *buf, size_t count) 1169{ 1170 struct i2c_client *client = to_i2c_client(dev); 1171 struct w83795_data *data = i2c_get_clientdata(client); 1172 struct sensor_device_attribute_2 *sensor_attr = 1173 to_sensor_dev_attr_2(attr); 1174 int nr = sensor_attr->nr; 1175 int index = sensor_attr->index; 1176 unsigned long val; 1177 1178 if (strict_strtoul(buf, 10, &val) < 0) 1179 return -EINVAL; 1180 1181 mutex_lock(&data->update_lock); 1182 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val); 1183 data->sf4_reg[index][SF4_PWM][nr] = val; 1184 mutex_unlock(&data->update_lock); 1185 1186 return count; 1187} 1188 1189static ssize_t 1190show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf) 1191{ 1192 struct w83795_data *data = w83795_update_pwm_config(dev); 1193 struct sensor_device_attribute_2 *sensor_attr = 1194 to_sensor_dev_attr_2(attr); 1195 int nr = sensor_attr->nr; 1196 int index = sensor_attr->index; 1197 1198 return sprintf(buf, "%u\n", 1199 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000); 1200} 1201 1202static ssize_t 1203store_sf4_temp(struct device *dev, struct device_attribute *attr, 1204 const char *buf, size_t count) 1205{ 1206 struct i2c_client *client = to_i2c_client(dev); 1207 struct w83795_data *data = i2c_get_clientdata(client); 1208 struct sensor_device_attribute_2 *sensor_attr = 1209 to_sensor_dev_attr_2(attr); 1210 int nr = sensor_attr->nr; 1211 int index = sensor_attr->index; 1212 unsigned long val; 1213 1214 if (strict_strtoul(buf, 10, &val) < 0) 1215 return -EINVAL; 1216 val /= 1000; 1217 1218 mutex_lock(&data->update_lock); 1219 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val); 1220 data->sf4_reg[index][SF4_TEMP][nr] = val; 1221 mutex_unlock(&data->update_lock); 1222 1223 return count; 1224} 1225 1226 1227static ssize_t 1228show_temp(struct device *dev, struct device_attribute *attr, char *buf) 1229{ 1230 struct sensor_device_attribute_2 *sensor_attr = 1231 to_sensor_dev_attr_2(attr); 1232 int nr = sensor_attr->nr; 1233 int index = sensor_attr->index; 1234 struct w83795_data *data = w83795_update_device(dev); 1235 long temp = temp_from_reg(data->temp[index][nr]); 1236 1237 if (TEMP_READ == nr) 1238 temp += (data->temp_read_vrlsb[index] >> 6) * 250; 1239 return sprintf(buf, "%ld\n", temp); 1240} 1241 1242static ssize_t 1243store_temp(struct device *dev, struct device_attribute *attr, 1244 const char *buf, size_t count) 1245{ 1246 struct sensor_device_attribute_2 *sensor_attr = 1247 to_sensor_dev_attr_2(attr); 1248 int nr = sensor_attr->nr; 1249 int index = sensor_attr->index; 1250 struct i2c_client *client = to_i2c_client(dev); 1251 struct w83795_data *data = i2c_get_clientdata(client); 1252 long tmp; 1253 1254 if (strict_strtol(buf, 10, &tmp) < 0) 1255 return -EINVAL; 1256 1257 mutex_lock(&data->update_lock); 1258 data->temp[index][nr] = temp_to_reg(tmp, -128, 127); 1259 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]); 1260 mutex_unlock(&data->update_lock); 1261 return count; 1262} 1263 1264 1265static ssize_t 1266show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf) 1267{ 1268 struct w83795_data *data = dev_get_drvdata(dev); 1269 int tmp; 1270 1271 if (data->enable_dts & 2) 1272 tmp = 5; 1273 else 1274 tmp = 6; 1275 1276 return sprintf(buf, "%d\n", tmp); 1277} 1278 1279static ssize_t 1280show_dts(struct device *dev, struct device_attribute *attr, char *buf) 1281{ 1282 struct sensor_device_attribute_2 *sensor_attr = 1283 to_sensor_dev_attr_2(attr); 1284 int index = sensor_attr->index; 1285 struct w83795_data *data = w83795_update_device(dev); 1286 long temp = temp_from_reg(data->dts[index]); 1287 1288 temp += (data->dts_read_vrlsb[index] >> 6) * 250; 1289 return sprintf(buf, "%ld\n", temp); 1290} 1291 1292static ssize_t 1293show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf) 1294{ 1295 struct sensor_device_attribute_2 *sensor_attr = 1296 to_sensor_dev_attr_2(attr); 1297 int nr = sensor_attr->nr; 1298 struct w83795_data *data = dev_get_drvdata(dev); 1299 long temp = temp_from_reg(data->dts_ext[nr]); 1300 1301 return sprintf(buf, "%ld\n", temp); 1302} 1303 1304static ssize_t 1305store_dts_ext(struct device *dev, struct device_attribute *attr, 1306 const char *buf, size_t count) 1307{ 1308 struct sensor_device_attribute_2 *sensor_attr = 1309 to_sensor_dev_attr_2(attr); 1310 int nr = sensor_attr->nr; 1311 struct i2c_client *client = to_i2c_client(dev); 1312 struct w83795_data *data = i2c_get_clientdata(client); 1313 long tmp; 1314 1315 if (strict_strtol(buf, 10, &tmp) < 0) 1316 return -EINVAL; 1317 1318 mutex_lock(&data->update_lock); 1319 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127); 1320 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]); 1321 mutex_unlock(&data->update_lock); 1322 return count; 1323} 1324 1325 1326static ssize_t 1327show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) 1328{ 1329 struct w83795_data *data = dev_get_drvdata(dev); 1330 struct sensor_device_attribute_2 *sensor_attr = 1331 to_sensor_dev_attr_2(attr); 1332 int index = sensor_attr->index; 1333 int tmp; 1334 1335 if (data->temp_mode & (1 << index)) 1336 tmp = 3; /* Thermal diode */ 1337 else 1338 tmp = 4; /* Thermistor */ 1339 1340 return sprintf(buf, "%d\n", tmp); 1341} 1342 1343/* Only for temp1-4 (temp5-6 can only be thermistor) */ 1344static ssize_t 1345store_temp_mode(struct device *dev, struct device_attribute *attr, 1346 const char *buf, size_t count) 1347{ 1348 struct i2c_client *client = to_i2c_client(dev); 1349 struct w83795_data *data = i2c_get_clientdata(client); 1350 struct sensor_device_attribute_2 *sensor_attr = 1351 to_sensor_dev_attr_2(attr); 1352 int index = sensor_attr->index; 1353 int reg_shift; 1354 unsigned long val; 1355 u8 tmp; 1356 1357 if (strict_strtoul(buf, 10, &val) < 0) 1358 return -EINVAL; 1359 if ((val != 4) && (val != 3)) 1360 return -EINVAL; 1361 1362 mutex_lock(&data->update_lock); 1363 if (val == 3) { 1364 /* Thermal diode */ 1365 val = 0x01; 1366 data->temp_mode |= 1 << index; 1367 } else if (val == 4) { 1368 /* Thermistor */ 1369 val = 0x03; 1370 data->temp_mode &= ~(1 << index); 1371 } 1372 1373 reg_shift = 2 * index; 1374 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1375 tmp &= ~(0x03 << reg_shift); 1376 tmp |= val << reg_shift; 1377 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp); 1378 1379 mutex_unlock(&data->update_lock); 1380 return count; 1381} 1382 1383 1384/* show/store VIN */ 1385static ssize_t 1386show_in(struct device *dev, struct device_attribute *attr, char *buf) 1387{ 1388 struct sensor_device_attribute_2 *sensor_attr = 1389 to_sensor_dev_attr_2(attr); 1390 int nr = sensor_attr->nr; 1391 int index = sensor_attr->index; 1392 struct w83795_data *data = w83795_update_device(dev); 1393 u16 val = data->in[index][nr]; 1394 u8 lsb_idx; 1395 1396 switch (nr) { 1397 case IN_READ: 1398 /* calculate this value again by sensors as sensors3.conf */ 1399 if ((index >= 17) && 1400 !((data->has_gain >> (index - 17)) & 1)) 1401 val *= 8; 1402 break; 1403 case IN_MAX: 1404 case IN_LOW: 1405 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1406 val <<= 2; 1407 val |= (data->in_lsb[lsb_idx][nr] >> 1408 IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03; 1409 if ((index >= 17) && 1410 !((data->has_gain >> (index - 17)) & 1)) 1411 val *= 8; 1412 break; 1413 } 1414 val = in_from_reg(index, val); 1415 1416 return sprintf(buf, "%d\n", val); 1417} 1418 1419static ssize_t 1420store_in(struct device *dev, struct device_attribute *attr, 1421 const char *buf, size_t count) 1422{ 1423 struct sensor_device_attribute_2 *sensor_attr = 1424 to_sensor_dev_attr_2(attr); 1425 int nr = sensor_attr->nr; 1426 int index = sensor_attr->index; 1427 struct i2c_client *client = to_i2c_client(dev); 1428 struct w83795_data *data = i2c_get_clientdata(client); 1429 unsigned long val; 1430 u8 tmp; 1431 u8 lsb_idx; 1432 1433 if (strict_strtoul(buf, 10, &val) < 0) 1434 return -EINVAL; 1435 val = in_to_reg(index, val); 1436 1437 if ((index >= 17) && 1438 !((data->has_gain >> (index - 17)) & 1)) 1439 val /= 8; 1440 val = SENSORS_LIMIT(val, 0, 0x3FF); 1441 mutex_lock(&data->update_lock); 1442 1443 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1444 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr)); 1445 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]); 1446 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]; 1447 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp); 1448 data->in_lsb[lsb_idx][nr] = tmp; 1449 1450 tmp = (val >> 2) & 0xff; 1451 w83795_write(client, W83795_REG_IN[index][nr], tmp); 1452 data->in[index][nr] = tmp; 1453 1454 mutex_unlock(&data->update_lock); 1455 return count; 1456} 1457 1458 1459static ssize_t 1460show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) 1461{ 1462 struct sensor_device_attribute_2 *sensor_attr = 1463 to_sensor_dev_attr_2(attr); 1464 int nr = sensor_attr->nr; 1465 struct w83795_data *data = w83795_update_pwm_config(dev); 1466 u16 val = data->setup_pwm[nr]; 1467 1468 switch (nr) { 1469 case SETUP_PWM_UPTIME: 1470 case SETUP_PWM_DOWNTIME: 1471 val = time_from_reg(val); 1472 break; 1473 } 1474 1475 return sprintf(buf, "%d\n", val); 1476} 1477 1478static ssize_t 1479store_sf_setup(struct device *dev, struct device_attribute *attr, 1480 const char *buf, size_t count) 1481{ 1482 struct sensor_device_attribute_2 *sensor_attr = 1483 to_sensor_dev_attr_2(attr); 1484 int nr = sensor_attr->nr; 1485 struct i2c_client *client = to_i2c_client(dev); 1486 struct w83795_data *data = i2c_get_clientdata(client); 1487 unsigned long val; 1488 1489 if (strict_strtoul(buf, 10, &val) < 0) 1490 return -EINVAL; 1491 1492 switch (nr) { 1493 case SETUP_PWM_DEFAULT: 1494 val = SENSORS_LIMIT(val, 0, 0xff); 1495 break; 1496 case SETUP_PWM_UPTIME: 1497 case SETUP_PWM_DOWNTIME: 1498 val = time_to_reg(val); 1499 if (val == 0) 1500 return -EINVAL; 1501 break; 1502 } 1503 1504 mutex_lock(&data->update_lock); 1505 data->setup_pwm[nr] = val; 1506 w83795_write(client, W83795_REG_SETUP_PWM(nr), val); 1507 mutex_unlock(&data->update_lock); 1508 return count; 1509} 1510 1511 1512#define NOT_USED -1 1513 1514/* Don't change the attribute order, _max and _min are accessed by index 1515 * somewhere else in the code */ 1516#define SENSOR_ATTR_IN(index) { \ 1517 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ 1518 IN_READ, index), \ 1519 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ 1520 store_in, IN_MAX, index), \ 1521 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ 1522 store_in, IN_LOW, index), \ 1523 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ 1524 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \ 1525 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ 1526 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1527 index + ((index > 14) ? 1 : 0)) } 1528 1529#define SENSOR_ATTR_FAN(index) { \ 1530 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ 1531 NULL, FAN_INPUT, index - 1), \ 1532 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ 1533 show_fan, store_fan_min, FAN_MIN, index - 1), \ 1534 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ 1535 NULL, ALARM_STATUS, index + 31), \ 1536 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ 1537 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) } 1538 1539#define SENSOR_ATTR_PWM(index) { \ 1540 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ 1541 store_pwm, PWM_OUTPUT, index - 1), \ 1542 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ 1543 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ 1544 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ 1545 show_pwm, store_pwm, PWM_START, index - 1), \ 1546 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ 1547 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \ 1548 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \ 1549 show_pwm, store_pwm, PWM_FREQ, index - 1), \ 1550 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \ 1551 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \ 1552 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \ 1553 show_fanin, store_fanin, FANIN_TARGET, index - 1) } 1554 1555#define SENSOR_ATTR_DTS(index) { \ 1556 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \ 1557 show_dts_mode, NULL, NOT_USED, index - 7), \ 1558 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \ 1559 NULL, NOT_USED, index - 7), \ 1560 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \ 1561 store_dts_ext, DTS_CRIT, NOT_USED), \ 1562 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ 1563 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \ 1564 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \ 1565 store_dts_ext, DTS_WARN, NOT_USED), \ 1566 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1567 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \ 1568 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1569 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \ 1570 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1571 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) } 1572 1573#define SENSOR_ATTR_TEMP(index) { \ 1574 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \ 1575 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ 1576 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ 1577 NULL, TEMP_READ, index - 1), \ 1578 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \ 1579 store_temp, TEMP_CRIT, index - 1), \ 1580 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ 1581 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ 1582 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ 1583 store_temp, TEMP_WARN, index - 1), \ 1584 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1585 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ 1586 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1587 show_alarm_beep, NULL, ALARM_STATUS, \ 1588 index + (index > 4 ? 11 : 17)), \ 1589 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1590 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1591 index + (index > 4 ? 11 : 17)), \ 1592 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \ 1593 show_temp_src, store_temp_src, NOT_USED, index - 1), \ 1594 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ 1595 show_temp_pwm_enable, store_temp_pwm_enable, \ 1596 TEMP_PWM_ENABLE, index - 1), \ 1597 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \ 1598 show_temp_pwm_enable, store_temp_pwm_enable, \ 1599 TEMP_PWM_FAN_MAP, index - 1), \ 1600 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \ 1601 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \ 1602 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \ 1603 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \ 1604 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \ 1605 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \ 1606 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \ 1607 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \ 1608 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ 1609 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \ 1610 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ 1611 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \ 1612 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ 1613 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \ 1614 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ 1615 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \ 1616 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ 1617 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \ 1618 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ 1619 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \ 1620 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ 1621 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \ 1622 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ 1623 show_sf4_temp, store_sf4_temp, 0, index - 1), \ 1624 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ 1625 show_sf4_temp, store_sf4_temp, 1, index - 1), \ 1626 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ 1627 show_sf4_temp, store_sf4_temp, 2, index - 1), \ 1628 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ 1629 show_sf4_temp, store_sf4_temp, 3, index - 1), \ 1630 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ 1631 show_sf4_temp, store_sf4_temp, 4, index - 1), \ 1632 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ 1633 show_sf4_temp, store_sf4_temp, 5, index - 1), \ 1634 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ 1635 show_sf4_temp, store_sf4_temp, 6, index - 1) } 1636 1637 1638static struct sensor_device_attribute_2 w83795_in[][5] = { 1639 SENSOR_ATTR_IN(0), 1640 SENSOR_ATTR_IN(1), 1641 SENSOR_ATTR_IN(2), 1642 SENSOR_ATTR_IN(3), 1643 SENSOR_ATTR_IN(4), 1644 SENSOR_ATTR_IN(5), 1645 SENSOR_ATTR_IN(6), 1646 SENSOR_ATTR_IN(7), 1647 SENSOR_ATTR_IN(8), 1648 SENSOR_ATTR_IN(9), 1649 SENSOR_ATTR_IN(10), 1650 SENSOR_ATTR_IN(11), 1651 SENSOR_ATTR_IN(12), 1652 SENSOR_ATTR_IN(13), 1653 SENSOR_ATTR_IN(14), 1654 SENSOR_ATTR_IN(15), 1655 SENSOR_ATTR_IN(16), 1656 SENSOR_ATTR_IN(17), 1657 SENSOR_ATTR_IN(18), 1658 SENSOR_ATTR_IN(19), 1659 SENSOR_ATTR_IN(20), 1660}; 1661 1662static const struct sensor_device_attribute_2 w83795_fan[][4] = { 1663 SENSOR_ATTR_FAN(1), 1664 SENSOR_ATTR_FAN(2), 1665 SENSOR_ATTR_FAN(3), 1666 SENSOR_ATTR_FAN(4), 1667 SENSOR_ATTR_FAN(5), 1668 SENSOR_ATTR_FAN(6), 1669 SENSOR_ATTR_FAN(7), 1670 SENSOR_ATTR_FAN(8), 1671 SENSOR_ATTR_FAN(9), 1672 SENSOR_ATTR_FAN(10), 1673 SENSOR_ATTR_FAN(11), 1674 SENSOR_ATTR_FAN(12), 1675 SENSOR_ATTR_FAN(13), 1676 SENSOR_ATTR_FAN(14), 1677}; 1678 1679static const struct sensor_device_attribute_2 w83795_temp[][29] = { 1680 SENSOR_ATTR_TEMP(1), 1681 SENSOR_ATTR_TEMP(2), 1682 SENSOR_ATTR_TEMP(3), 1683 SENSOR_ATTR_TEMP(4), 1684 SENSOR_ATTR_TEMP(5), 1685 SENSOR_ATTR_TEMP(6), 1686}; 1687 1688static const struct sensor_device_attribute_2 w83795_dts[][8] = { 1689 SENSOR_ATTR_DTS(7), 1690 SENSOR_ATTR_DTS(8), 1691 SENSOR_ATTR_DTS(9), 1692 SENSOR_ATTR_DTS(10), 1693 SENSOR_ATTR_DTS(11), 1694 SENSOR_ATTR_DTS(12), 1695 SENSOR_ATTR_DTS(13), 1696 SENSOR_ATTR_DTS(14), 1697}; 1698 1699static const struct sensor_device_attribute_2 w83795_pwm[][7] = { 1700 SENSOR_ATTR_PWM(1), 1701 SENSOR_ATTR_PWM(2), 1702 SENSOR_ATTR_PWM(3), 1703 SENSOR_ATTR_PWM(4), 1704 SENSOR_ATTR_PWM(5), 1705 SENSOR_ATTR_PWM(6), 1706 SENSOR_ATTR_PWM(7), 1707 SENSOR_ATTR_PWM(8), 1708}; 1709 1710static const struct sensor_device_attribute_2 sda_single_files[] = { 1711 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep, 1712 store_chassis_clear, ALARM_STATUS, 46), 1713 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep, 1714 store_beep, BEEP_ENABLE, 47), 1715 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin, 1716 store_fanin, FANIN_TOL, NOT_USED), 1717 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, 1718 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), 1719 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, 1720 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), 1721 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, 1722 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), 1723}; 1724 1725/* 1726 * Driver interface 1727 */ 1728 1729static void w83795_init_client(struct i2c_client *client) 1730{ 1731 struct w83795_data *data = i2c_get_clientdata(client); 1732 static const u16 clkin[4] = { /* in kHz */ 1733 14318, 24000, 33333, 48000 1734 }; 1735 u8 config; 1736 1737 if (reset) 1738 w83795_write(client, W83795_REG_CONFIG, 0x80); 1739 1740 /* Start monitoring if needed */ 1741 config = w83795_read(client, W83795_REG_CONFIG); 1742 if (!(config & W83795_REG_CONFIG_START)) { 1743 dev_info(&client->dev, "Enabling monitoring operations\n"); 1744 w83795_write(client, W83795_REG_CONFIG, 1745 config | W83795_REG_CONFIG_START); 1746 } 1747 1748 data->clkin = clkin[(config >> 3) & 0x3]; 1749 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin); 1750} 1751 1752static int w83795_get_device_id(struct i2c_client *client) 1753{ 1754 int device_id; 1755 1756 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID); 1757 1758 /* Special case for rev. A chips; can't be checked first because later 1759 revisions emulate this for compatibility */ 1760 if (device_id < 0 || (device_id & 0xf0) != 0x50) { 1761 int alt_id; 1762 1763 alt_id = i2c_smbus_read_byte_data(client, 1764 W83795_REG_DEVICEID_A); 1765 if (alt_id == 0x50) 1766 device_id = alt_id; 1767 } 1768 1769 return device_id; 1770} 1771 1772/* Return 0 if detection is successful, -ENODEV otherwise */ 1773static int w83795_detect(struct i2c_client *client, 1774 struct i2c_board_info *info) 1775{ 1776 int bank, vendor_id, device_id, expected, i2c_addr, config; 1777 struct i2c_adapter *adapter = client->adapter; 1778 unsigned short address = client->addr; 1779 const char *chip_name; 1780 1781 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1782 return -ENODEV; 1783 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1784 if (bank < 0 || (bank & 0x7c)) { 1785 dev_dbg(&adapter->dev, 1786 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1787 address, "bank"); 1788 return -ENODEV; 1789 } 1790 1791 /* Check Nuvoton vendor ID */ 1792 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID); 1793 expected = bank & 0x80 ? 0x5c : 0xa3; 1794 if (vendor_id != expected) { 1795 dev_dbg(&adapter->dev, 1796 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1797 address, "vendor id"); 1798 return -ENODEV; 1799 } 1800 1801 /* Check device ID */ 1802 device_id = w83795_get_device_id(client) | 1803 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8); 1804 if ((device_id >> 4) != 0x795) { 1805 dev_dbg(&adapter->dev, 1806 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1807 address, "device id\n"); 1808 return -ENODEV; 1809 } 1810 1811 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR 1812 should match */ 1813 if ((bank & 0x07) == 0) { 1814 i2c_addr = i2c_smbus_read_byte_data(client, 1815 W83795_REG_I2C_ADDR); 1816 if ((i2c_addr & 0x7f) != address) { 1817 dev_dbg(&adapter->dev, 1818 "w83795: Detection failed at addr 0x%02hx, " 1819 "check %s\n", address, "i2c addr"); 1820 return -ENODEV; 1821 } 1822 } 1823 1824 /* Check 795 chip type: 795G or 795ADG 1825 Usually we don't write to chips during detection, but here we don't 1826 quite have the choice; hopefully it's OK, we are about to return 1827 success anyway */ 1828 if ((bank & 0x07) != 0) 1829 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, 1830 bank & ~0x07); 1831 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG); 1832 if (config & W83795_REG_CONFIG_CONFIG48) 1833 chip_name = "w83795adg"; 1834 else 1835 chip_name = "w83795g"; 1836 1837 strlcpy(info->type, chip_name, I2C_NAME_SIZE); 1838 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name, 1839 'A' + (device_id & 0xf), address); 1840 1841 return 0; 1842} 1843 1844static int w83795_handle_files(struct device *dev, int (*fn)(struct device *, 1845 const struct device_attribute *)) 1846{ 1847 struct w83795_data *data = dev_get_drvdata(dev); 1848 int err, i, j; 1849 1850 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) { 1851 if (!(data->has_in & (1 << i))) 1852 continue; 1853 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) { 1854 err = fn(dev, &w83795_in[i][j].dev_attr); 1855 if (err) 1856 return err; 1857 } 1858 } 1859 1860 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) { 1861 if (!(data->has_fan & (1 << i))) 1862 continue; 1863 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) { 1864 err = fn(dev, &w83795_fan[i][j].dev_attr); 1865 if (err) 1866 return err; 1867 } 1868 } 1869 1870 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { 1871 err = fn(dev, &sda_single_files[i].dev_attr); 1872 if (err) 1873 return err; 1874 } 1875 1876 for (i = 0; i < data->has_pwm; i++) { 1877 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) { 1878 err = fn(dev, &w83795_pwm[i][j].dev_attr); 1879 if (err) 1880 return err; 1881 } 1882 } 1883 1884 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) { 1885 if (!(data->has_temp & (1 << i))) 1886 continue; 1887 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) { 1888 err = fn(dev, &w83795_temp[i][j].dev_attr); 1889 if (err) 1890 return err; 1891 } 1892 } 1893 1894 if (data->enable_dts != 0) { 1895 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) { 1896 if (!(data->has_dts & (1 << i))) 1897 continue; 1898 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) { 1899 err = fn(dev, &w83795_dts[i][j].dev_attr); 1900 if (err) 1901 return err; 1902 } 1903 } 1904 } 1905 1906 return 0; 1907} 1908 1909/* We need a wrapper that fits in w83795_handle_files */ 1910static int device_remove_file_wrapper(struct device *dev, 1911 const struct device_attribute *attr) 1912{ 1913 device_remove_file(dev, attr); 1914 return 0; 1915} 1916 1917static void w83795_check_dynamic_in_limits(struct i2c_client *client) 1918{ 1919 struct w83795_data *data = i2c_get_clientdata(client); 1920 u8 vid_ctl; 1921 int i, err_max, err_min; 1922 1923 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL); 1924 1925 /* Return immediately if VRM isn't configured */ 1926 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07) 1927 return; 1928 1929 data->has_dyn_in = (vid_ctl >> 3) & 0x07; 1930 for (i = 0; i < 2; i++) { 1931 if (!(data->has_dyn_in & (1 << i))) 1932 continue; 1933 1934 /* Voltage limits in dynamic mode, switch to read-only */ 1935 err_max = sysfs_chmod_file(&client->dev.kobj, 1936 &w83795_in[i][2].dev_attr.attr, 1937 S_IRUGO); 1938 err_min = sysfs_chmod_file(&client->dev.kobj, 1939 &w83795_in[i][3].dev_attr.attr, 1940 S_IRUGO); 1941 if (err_max || err_min) 1942 dev_warn(&client->dev, "Failed to set in%d limits " 1943 "read-only (%d, %d)\n", i, err_max, err_min); 1944 else 1945 dev_info(&client->dev, "in%d limits set dynamically " 1946 "from VID\n", i); 1947 } 1948} 1949 1950/* Check pins that can be used for either temperature or voltage monitoring */ 1951static void w83795_apply_temp_config(struct w83795_data *data, u8 config, 1952 int temp_chan, int in_chan) 1953{ 1954 /* config is a 2-bit value */ 1955 switch (config) { 1956 case 0x2: /* Voltage monitoring */ 1957 data->has_in |= 1 << in_chan; 1958 break; 1959 case 0x1: /* Thermal diode */ 1960 if (temp_chan >= 4) 1961 break; 1962 data->temp_mode |= 1 << temp_chan; 1963 /* fall through */ 1964 case 0x3: /* Thermistor */ 1965 data->has_temp |= 1 << temp_chan; 1966 break; 1967 } 1968} 1969 1970static int w83795_probe(struct i2c_client *client, 1971 const struct i2c_device_id *id) 1972{ 1973 int i; 1974 u8 tmp; 1975 struct device *dev = &client->dev; 1976 struct w83795_data *data; 1977 int err; 1978 1979 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL); 1980 if (!data) { 1981 err = -ENOMEM; 1982 goto exit; 1983 } 1984 1985 i2c_set_clientdata(client, data); 1986 data->chip_type = id->driver_data; 1987 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1988 mutex_init(&data->update_lock); 1989 1990 /* Initialize the chip */ 1991 w83795_init_client(client); 1992 1993 /* Check which voltages and fans are present */ 1994 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1) 1995 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8); 1996 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1) 1997 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8); 1998 1999 /* Check which analog temperatures and extra voltages are present */ 2000 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 2001 if (tmp & 0x20) 2002 data->enable_dts = 1; 2003 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16); 2004 w83795_apply_temp_config(data, tmp & 0x3, 4, 15); 2005 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 2006 w83795_apply_temp_config(data, tmp >> 6, 3, 20); 2007 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19); 2008 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18); 2009 w83795_apply_temp_config(data, tmp & 0x3, 0, 17); 2010 2011 /* Check DTS enable status */ 2012 if (data->enable_dts) { 2013 if (1 & w83795_read(client, W83795_REG_DTSC)) 2014 data->enable_dts |= 2; 2015 data->has_dts = w83795_read(client, W83795_REG_DTSE); 2016 } 2017 2018 /* Report PECI Tbase values */ 2019 if (data->enable_dts == 1) { 2020 for (i = 0; i < 8; i++) { 2021 if (!(data->has_dts & (1 << i))) 2022 continue; 2023 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i)); 2024 dev_info(&client->dev, 2025 "PECI agent %d Tbase temperature: %u\n", 2026 i + 1, (unsigned int)tmp & 0x7f); 2027 } 2028 } 2029 2030 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f; 2031 2032 /* pwm and smart fan */ 2033 if (data->chip_type == w83795g) 2034 data->has_pwm = 8; 2035 else 2036 data->has_pwm = 2; 2037 2038 err = w83795_handle_files(dev, device_create_file); 2039 if (err) 2040 goto exit_remove; 2041 2042 if (data->chip_type == w83795g) 2043 w83795_check_dynamic_in_limits(client); 2044 2045 data->hwmon_dev = hwmon_device_register(dev); 2046 if (IS_ERR(data->hwmon_dev)) { 2047 err = PTR_ERR(data->hwmon_dev); 2048 goto exit_remove; 2049 } 2050 2051 return 0; 2052 2053exit_remove: 2054 w83795_handle_files(dev, device_remove_file_wrapper); 2055 kfree(data); 2056exit: 2057 return err; 2058} 2059 2060static int w83795_remove(struct i2c_client *client) 2061{ 2062 struct w83795_data *data = i2c_get_clientdata(client); 2063 2064 hwmon_device_unregister(data->hwmon_dev); 2065 w83795_handle_files(&client->dev, device_remove_file_wrapper); 2066 kfree(data); 2067 2068 return 0; 2069} 2070 2071 2072static const struct i2c_device_id w83795_id[] = { 2073 { "w83795g", w83795g }, 2074 { "w83795adg", w83795adg }, 2075 { } 2076}; 2077MODULE_DEVICE_TABLE(i2c, w83795_id); 2078 2079static struct i2c_driver w83795_driver = { 2080 .driver = { 2081 .name = "w83795", 2082 }, 2083 .probe = w83795_probe, 2084 .remove = w83795_remove, 2085 .id_table = w83795_id, 2086 2087 .class = I2C_CLASS_HWMON, 2088 .detect = w83795_detect, 2089 .address_list = normal_i2c, 2090}; 2091 2092static int __init sensors_w83795_init(void) 2093{ 2094 return i2c_add_driver(&w83795_driver); 2095} 2096 2097static void __exit sensors_w83795_exit(void) 2098{ 2099 i2c_del_driver(&w83795_driver); 2100} 2101 2102MODULE_AUTHOR("Wei Song"); 2103MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver"); 2104MODULE_LICENSE("GPL"); 2105 2106module_init(sensors_w83795_init); 2107module_exit(sensors_w83795_exit); 2108