w83795.c revision 6f9dfd85f7b14dd3ea87106909dc54def08947b1
1/* 2 * w83795.c - Linux kernel driver for hardware monitoring 3 * Copyright (C) 2008 Nuvoton Technology Corp. 4 * Wei Song 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation - version 2. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 18 * 02110-1301 USA. 19 * 20 * Supports following chips: 21 * 22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA 23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no 24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no 25 */ 26 27#include <linux/kernel.h> 28#include <linux/module.h> 29#include <linux/init.h> 30#include <linux/slab.h> 31#include <linux/i2c.h> 32#include <linux/hwmon.h> 33#include <linux/hwmon-sysfs.h> 34#include <linux/err.h> 35#include <linux/mutex.h> 36#include <linux/delay.h> 37 38/* Addresses to scan */ 39static const unsigned short normal_i2c[] = { 40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END 41}; 42 43 44static int reset; 45module_param(reset, bool, 0); 46MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); 47 48 49#define W83795_REG_BANKSEL 0x00 50#define W83795_REG_VENDORID 0xfd 51#define W83795_REG_CHIPID 0xfe 52#define W83795_REG_DEVICEID 0xfb 53#define W83795_REG_DEVICEID_A 0xff 54 55#define W83795_REG_I2C_ADDR 0xfc 56#define W83795_REG_CONFIG 0x01 57#define W83795_REG_CONFIG_CONFIG48 0x04 58#define W83795_REG_CONFIG_START 0x01 59 60/* Multi-Function Pin Ctrl Registers */ 61#define W83795_REG_VOLT_CTRL1 0x02 62#define W83795_REG_VOLT_CTRL2 0x03 63#define W83795_REG_TEMP_CTRL1 0x04 64#define W83795_REG_TEMP_CTRL2 0x05 65#define W83795_REG_FANIN_CTRL1 0x06 66#define W83795_REG_FANIN_CTRL2 0x07 67#define W83795_REG_VMIGB_CTRL 0x08 68 69#define TEMP_CTRL_DISABLE 0 70#define TEMP_CTRL_TD 1 71#define TEMP_CTRL_VSEN 2 72#define TEMP_CTRL_TR 3 73#define TEMP_CTRL_SHIFT 4 74#define TEMP_CTRL_HASIN_SHIFT 5 75/* temp mode may effect VSEN17-12 (in20-15) */ 76static const u16 W83795_REG_TEMP_CTRL[][6] = { 77 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */ 78 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */ 79 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */ 80 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */ 81 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */ 82 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */ 83 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */ 84}; 85 86#define TEMP_READ 0 87#define TEMP_CRIT 1 88#define TEMP_CRIT_HYST 2 89#define TEMP_WARN 3 90#define TEMP_WARN_HYST 4 91/* only crit and crit_hyst affect real-time alarm status 92 * current crit crit_hyst warn warn_hyst */ 93static const u16 W83795_REG_TEMP[][5] = { 94 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */ 95 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */ 96 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */ 97 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */ 98 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */ 99 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */ 100}; 101 102#define IN_READ 0 103#define IN_MAX 1 104#define IN_LOW 2 105static const u16 W83795_REG_IN[][3] = { 106 /* Current, HL, LL */ 107 {0x10, 0x70, 0x71}, /* VSEN1 */ 108 {0x11, 0x72, 0x73}, /* VSEN2 */ 109 {0x12, 0x74, 0x75}, /* VSEN3 */ 110 {0x13, 0x76, 0x77}, /* VSEN4 */ 111 {0x14, 0x78, 0x79}, /* VSEN5 */ 112 {0x15, 0x7a, 0x7b}, /* VSEN6 */ 113 {0x16, 0x7c, 0x7d}, /* VSEN7 */ 114 {0x17, 0x7e, 0x7f}, /* VSEN8 */ 115 {0x18, 0x80, 0x81}, /* VSEN9 */ 116 {0x19, 0x82, 0x83}, /* VSEN10 */ 117 {0x1A, 0x84, 0x85}, /* VSEN11 */ 118 {0x1B, 0x86, 0x87}, /* VTT */ 119 {0x1C, 0x88, 0x89}, /* 3VDD */ 120 {0x1D, 0x8a, 0x8b}, /* 3VSB */ 121 {0x1E, 0x8c, 0x8d}, /* VBAT */ 122 {0x1F, 0xa6, 0xa7}, /* VSEN12 */ 123 {0x20, 0xaa, 0xab}, /* VSEN13 */ 124 {0x21, 0x96, 0x97}, /* VSEN14 */ 125 {0x22, 0x9a, 0x9b}, /* VSEN15 */ 126 {0x23, 0x9e, 0x9f}, /* VSEN16 */ 127 {0x24, 0xa2, 0xa3}, /* VSEN17 */ 128}; 129#define W83795_REG_VRLSB 0x3C 130#define VRLSB_SHIFT 6 131 132static const u8 W83795_REG_IN_HL_LSB[] = { 133 0x8e, /* VSEN1-4 */ 134 0x90, /* VSEN5-8 */ 135 0x92, /* VSEN9-11 */ 136 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */ 137 0xa8, /* VSEN12 */ 138 0xac, /* VSEN13 */ 139 0x98, /* VSEN14 */ 140 0x9c, /* VSEN15 */ 141 0xa0, /* VSEN16 */ 142 0xa4, /* VSEN17 */ 143}; 144 145#define IN_LSB_REG(index, type) \ 146 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \ 147 : (W83795_REG_IN_HL_LSB[(index)] + 1)) 148 149#define IN_LSB_REG_NUM 10 150 151#define IN_LSB_SHIFT 0 152#define IN_LSB_IDX 1 153static const u8 IN_LSB_SHIFT_IDX[][2] = { 154 /* High/Low LSB shift, LSB No. */ 155 {0x00, 0x00}, /* VSEN1 */ 156 {0x02, 0x00}, /* VSEN2 */ 157 {0x04, 0x00}, /* VSEN3 */ 158 {0x06, 0x00}, /* VSEN4 */ 159 {0x00, 0x01}, /* VSEN5 */ 160 {0x02, 0x01}, /* VSEN6 */ 161 {0x04, 0x01}, /* VSEN7 */ 162 {0x06, 0x01}, /* VSEN8 */ 163 {0x00, 0x02}, /* VSEN9 */ 164 {0x02, 0x02}, /* VSEN10 */ 165 {0x04, 0x02}, /* VSEN11 */ 166 {0x00, 0x03}, /* VTT */ 167 {0x02, 0x03}, /* 3VDD */ 168 {0x04, 0x03}, /* 3VSB */ 169 {0x06, 0x03}, /* VBAT */ 170 {0x06, 0x04}, /* VSEN12 */ 171 {0x06, 0x05}, /* VSEN13 */ 172 {0x06, 0x06}, /* VSEN14 */ 173 {0x06, 0x07}, /* VSEN15 */ 174 {0x06, 0x08}, /* VSEN16 */ 175 {0x06, 0x09}, /* VSEN17 */ 176}; 177 178 179/* 3VDD, 3VSB, VBAT * 0.006 */ 180#define REST_VLT_BEGIN 12 /* the 13th volt to 15th */ 181#define REST_VLT_END 14 /* the 13th volt to 15th */ 182 183#define W83795_REG_FAN(index) (0x2E + (index)) 184#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index)) 185#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2) 186#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \ 187 (((index) % 1) ? 4 : 0) 188 189#define W83795_REG_VID_CTRL 0x6A 190 191#define ALARM_BEEP_REG_NUM 6 192#define W83795_REG_ALARM(index) (0x41 + (index)) 193#define W83795_REG_BEEP(index) (0x50 + (index)) 194 195#define W83795_REG_CLR_CHASSIS 0x4D 196 197 198#define W83795_REG_TEMP_NUM 6 199#define W83795_REG_FCMS1 0x201 200#define W83795_REG_FCMS2 0x208 201#define W83795_REG_TFMR(index) (0x202 + (index)) 202#define W83795_REG_FOMC 0x20F 203#define W83795_REG_FOPFP(index) (0x218 + (index)) 204 205#define W83795_REG_TSS(index) (0x209 + (index)) 206 207#define PWM_OUTPUT 0 208#define PWM_START 1 209#define PWM_NONSTOP 2 210#define PWM_STOP_TIME 3 211#define PWM_DIV 4 212#define W83795_REG_PWM(index, nr) \ 213 (((nr) == 0 ? 0x210 : \ 214 (nr) == 1 ? 0x220 : \ 215 (nr) == 2 ? 0x228 : \ 216 (nr) == 3 ? 0x230 : 0x218) + (index)) 217 218#define W83795_REG_FOPFP_DIV(index) \ 219 (((index) < 8) ? ((index) + 1) : \ 220 ((index) == 8) ? 12 : \ 221 (16 << ((index) - 9))) 222 223#define W83795_REG_FTSH(index) (0x240 + (index) * 2) 224#define W83795_REG_FTSL(index) (0x241 + (index) * 2) 225#define W83795_REG_TFTS 0x250 226 227#define TEMP_PWM_TTTI 0 228#define TEMP_PWM_CTFS 1 229#define TEMP_PWM_HCT 2 230#define TEMP_PWM_HOT 3 231#define W83795_REG_TTTI(index) (0x260 + (index)) 232#define W83795_REG_CTFS(index) (0x268 + (index)) 233#define W83795_REG_HT(index) (0x270 + (index)) 234 235#define SF4_TEMP 0 236#define SF4_PWM 1 237#define W83795_REG_SF4_TEMP(temp_num, index) \ 238 (0x280 + 0x10 * (temp_num) + (index)) 239#define W83795_REG_SF4_PWM(temp_num, index) \ 240 (0x288 + 0x10 * (temp_num) + (index)) 241 242#define W83795_REG_DTSC 0x301 243#define W83795_REG_DTSE 0x302 244#define W83795_REG_DTS(index) (0x26 + (index)) 245 246#define DTS_CRIT 0 247#define DTS_CRIT_HYST 1 248#define DTS_WARN 2 249#define DTS_WARN_HYST 3 250#define W83795_REG_DTS_EXT(index) (0xB2 + (index)) 251 252#define SETUP_PWM_DEFAULT 0 253#define SETUP_PWM_UPTIME 1 254#define SETUP_PWM_DOWNTIME 2 255#define W83795_REG_SETUP_PWM(index) (0x20C + (index)) 256 257static inline u16 in_from_reg(u8 index, u16 val) 258{ 259 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END)) 260 return val * 6; 261 else 262 return val * 2; 263} 264 265static inline u16 in_to_reg(u8 index, u16 val) 266{ 267 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END)) 268 return val / 6; 269 else 270 return val / 2; 271} 272 273static inline unsigned long fan_from_reg(u16 val) 274{ 275 if ((val >= 0xff0) || (val == 0)) 276 return 0; 277 return 1350000UL / val; 278} 279 280static inline u16 fan_to_reg(long rpm) 281{ 282 if (rpm <= 0) 283 return 0x0fff; 284 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); 285} 286 287static inline unsigned long time_from_reg(u8 reg) 288{ 289 return reg * 100; 290} 291 292static inline u8 time_to_reg(unsigned long val) 293{ 294 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff); 295} 296 297static inline long temp_from_reg(s8 reg) 298{ 299 return reg * 1000; 300} 301 302static inline s8 temp_to_reg(long val, s8 min, s8 max) 303{ 304 return SENSORS_LIMIT((val < 0 ? -val : val) / 1000, min, max); 305} 306 307 308enum chip_types {w83795g, w83795adg}; 309 310struct w83795_data { 311 struct device *hwmon_dev; 312 struct mutex update_lock; 313 unsigned long last_updated; /* In jiffies */ 314 enum chip_types chip_type; 315 316 u8 bank; 317 318 u32 has_in; /* Enable monitor VIN or not */ 319 u16 in[21][3]; /* Register value, read/high/low */ 320 u8 in_lsb[10][3]; /* LSB Register value, high/low */ 321 u8 has_gain; /* has gain: in17-20 * 8 */ 322 323 u16 has_fan; /* Enable fan14-1 or not */ 324 u16 fan[14]; /* Register value combine */ 325 u16 fan_min[14]; /* Register value combine */ 326 327 u8 has_temp; /* Enable monitor temp6-1 or not */ 328 u8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */ 329 u8 temp_read_vrlsb[6]; 330 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */ 331 u8 temp_src[3]; /* Register value */ 332 333 u8 enable_dts; /* Enable PECI and SB-TSI, 334 * bit 0: =1 enable, =0 disable, 335 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */ 336 u8 has_dts; /* Enable monitor DTS temp */ 337 u8 dts[8]; /* Register value */ 338 u8 dts_read_vrlsb[8]; /* Register value */ 339 u8 dts_ext[4]; /* Register value */ 340 341 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2, 342 * no config register, only affected by chip 343 * type */ 344 u8 pwm[8][5]; /* Register value, output, start, non stop, stop 345 * time, div */ 346 u8 pwm_fcms[2]; /* Register value */ 347 u8 pwm_tfmr[6]; /* Register value */ 348 u8 pwm_fomc; /* Register value */ 349 350 u16 target_speed[8]; /* Register value, target speed for speed 351 * cruise */ 352 u8 tol_speed; /* tolerance of target speed */ 353 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */ 354 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */ 355 356 u8 setup_pwm[3]; /* Register value */ 357 358 u8 alarms[6]; /* Register value */ 359 u8 beeps[6]; /* Register value */ 360 u8 beep_enable; 361 362 char valid; 363}; 364 365/* 366 * Hardware access 367 * We assume that nobdody can change the bank outside the driver. 368 */ 369 370/* Must be called with data->update_lock held, except during initialization */ 371static int w83795_set_bank(struct i2c_client *client, u8 bank) 372{ 373 struct w83795_data *data = i2c_get_clientdata(client); 374 int err; 375 376 /* If the same bank is already set, nothing to do */ 377 if ((data->bank & 0x07) == bank) 378 return 0; 379 380 /* Change to new bank, preserve all other bits */ 381 bank |= data->bank & ~0x07; 382 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank); 383 if (err < 0) { 384 dev_err(&client->dev, 385 "Failed to set bank to %d, err %d\n", 386 (int)bank, err); 387 return err; 388 } 389 data->bank = bank; 390 391 return 0; 392} 393 394/* Must be called with data->update_lock held, except during initialization */ 395static u8 w83795_read(struct i2c_client *client, u16 reg) 396{ 397 int err; 398 399 err = w83795_set_bank(client, reg >> 8); 400 if (err < 0) 401 return 0x00; /* Arbitrary */ 402 403 err = i2c_smbus_read_byte_data(client, reg & 0xff); 404 if (err < 0) { 405 dev_err(&client->dev, 406 "Failed to read from register 0x%03x, err %d\n", 407 (int)reg, err); 408 return 0x00; /* Arbitrary */ 409 } 410 return err; 411} 412 413/* Must be called with data->update_lock held, except during initialization */ 414static int w83795_write(struct i2c_client *client, u16 reg, u8 value) 415{ 416 int err; 417 418 err = w83795_set_bank(client, reg >> 8); 419 if (err < 0) 420 return err; 421 422 err = i2c_smbus_write_byte_data(client, reg & 0xff, value); 423 if (err < 0) 424 dev_err(&client->dev, 425 "Failed to write to register 0x%03x, err %d\n", 426 (int)reg, err); 427 return err; 428} 429 430static struct w83795_data *w83795_update_device(struct device *dev) 431{ 432 struct i2c_client *client = to_i2c_client(dev); 433 struct w83795_data *data = i2c_get_clientdata(client); 434 u16 tmp; 435 int i; 436 437 mutex_lock(&data->update_lock); 438 439 if (!(time_after(jiffies, data->last_updated + HZ * 2) 440 || !data->valid)) 441 goto END; 442 443 /* Update the voltages value */ 444 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 445 if (!(data->has_in & (1 << i))) 446 continue; 447 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 448 tmp |= (w83795_read(client, W83795_REG_VRLSB) 449 >> VRLSB_SHIFT) & 0x03; 450 data->in[i][IN_READ] = tmp; 451 } 452 453 /* Update fan */ 454 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 455 if (!(data->has_fan & (1 << i))) 456 continue; 457 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 458 data->fan[i] |= 459 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F; 460 } 461 462 /* Update temperature */ 463 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 464 /* even stop monitor, register still keep value, just read out 465 * it */ 466 if (!(data->has_temp & (1 << i))) { 467 data->temp[i][TEMP_READ] = 0; 468 data->temp_read_vrlsb[i] = 0; 469 continue; 470 } 471 data->temp[i][TEMP_READ] = 472 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 473 data->temp_read_vrlsb[i] = 474 w83795_read(client, W83795_REG_VRLSB); 475 } 476 477 /* Update dts temperature */ 478 if (data->enable_dts != 0) { 479 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 480 if (!(data->has_dts & (1 << i))) 481 continue; 482 data->dts[i] = 483 w83795_read(client, W83795_REG_DTS(i)); 484 data->dts_read_vrlsb[i] = 485 w83795_read(client, W83795_REG_VRLSB); 486 } 487 } 488 489 /* Update pwm output */ 490 for (i = 0; i < data->has_pwm; i++) { 491 data->pwm[i][PWM_OUTPUT] = 492 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT)); 493 } 494 495 /* update alarm */ 496 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) 497 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 498 499 data->last_updated = jiffies; 500 data->valid = 1; 501 502END: 503 mutex_unlock(&data->update_lock); 504 return data; 505} 506 507/* 508 * Sysfs attributes 509 */ 510 511#define ALARM_STATUS 0 512#define BEEP_ENABLE 1 513static ssize_t 514show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) 515{ 516 struct w83795_data *data = w83795_update_device(dev); 517 struct sensor_device_attribute_2 *sensor_attr = 518 to_sensor_dev_attr_2(attr); 519 int nr = sensor_attr->nr; 520 int index = sensor_attr->index >> 3; 521 int bit = sensor_attr->index & 0x07; 522 u8 val; 523 524 if (ALARM_STATUS == nr) { 525 val = (data->alarms[index] >> (bit)) & 1; 526 } else { /* BEEP_ENABLE */ 527 val = (data->beeps[index] >> (bit)) & 1; 528 } 529 530 return sprintf(buf, "%u\n", val); 531} 532 533static ssize_t 534store_beep(struct device *dev, struct device_attribute *attr, 535 const char *buf, size_t count) 536{ 537 struct i2c_client *client = to_i2c_client(dev); 538 struct w83795_data *data = i2c_get_clientdata(client); 539 struct sensor_device_attribute_2 *sensor_attr = 540 to_sensor_dev_attr_2(attr); 541 int index = sensor_attr->index >> 3; 542 int shift = sensor_attr->index & 0x07; 543 u8 beep_bit = 1 << shift; 544 unsigned long val; 545 546 if (strict_strtoul(buf, 10, &val) < 0) 547 return -EINVAL; 548 if (val != 0 && val != 1) 549 return -EINVAL; 550 551 mutex_lock(&data->update_lock); 552 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index)); 553 data->beeps[index] &= ~beep_bit; 554 data->beeps[index] |= val << shift; 555 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]); 556 mutex_unlock(&data->update_lock); 557 558 return count; 559} 560 561static ssize_t 562show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf) 563{ 564 struct i2c_client *client = to_i2c_client(dev); 565 struct w83795_data *data = i2c_get_clientdata(client); 566 return sprintf(buf, "%u\n", data->beep_enable); 567} 568 569static ssize_t 570store_beep_enable(struct device *dev, struct device_attribute *attr, 571 const char *buf, size_t count) 572{ 573 struct i2c_client *client = to_i2c_client(dev); 574 struct w83795_data *data = i2c_get_clientdata(client); 575 unsigned long val; 576 u8 tmp; 577 578 if (strict_strtoul(buf, 10, &val) < 0) 579 return -EINVAL; 580 if (val != 0 && val != 1) 581 return -EINVAL; 582 583 mutex_lock(&data->update_lock); 584 data->beep_enable = val; 585 tmp = w83795_read(client, W83795_REG_BEEP(5)); 586 tmp &= 0x7f; 587 tmp |= val << 7; 588 w83795_write(client, W83795_REG_BEEP(5), tmp); 589 mutex_unlock(&data->update_lock); 590 591 return count; 592} 593 594/* Write any value to clear chassis alarm */ 595static ssize_t 596store_chassis_clear(struct device *dev, 597 struct device_attribute *attr, const char *buf, 598 size_t count) 599{ 600 struct i2c_client *client = to_i2c_client(dev); 601 struct w83795_data *data = i2c_get_clientdata(client); 602 u8 val; 603 604 mutex_lock(&data->update_lock); 605 val = w83795_read(client, W83795_REG_CLR_CHASSIS); 606 val |= 0x80; 607 w83795_write(client, W83795_REG_CLR_CHASSIS, val); 608 mutex_unlock(&data->update_lock); 609 return count; 610} 611 612#define FAN_INPUT 0 613#define FAN_MIN 1 614static ssize_t 615show_fan(struct device *dev, struct device_attribute *attr, char *buf) 616{ 617 struct sensor_device_attribute_2 *sensor_attr = 618 to_sensor_dev_attr_2(attr); 619 int nr = sensor_attr->nr; 620 int index = sensor_attr->index; 621 struct w83795_data *data = w83795_update_device(dev); 622 u16 val; 623 624 if (FAN_INPUT == nr) 625 val = data->fan[index] & 0x0fff; 626 else 627 val = data->fan_min[index] & 0x0fff; 628 629 return sprintf(buf, "%lu\n", fan_from_reg(val)); 630} 631 632static ssize_t 633store_fan_min(struct device *dev, struct device_attribute *attr, 634 const char *buf, size_t count) 635{ 636 struct sensor_device_attribute_2 *sensor_attr = 637 to_sensor_dev_attr_2(attr); 638 int index = sensor_attr->index; 639 struct i2c_client *client = to_i2c_client(dev); 640 struct w83795_data *data = i2c_get_clientdata(client); 641 unsigned long val; 642 643 if (strict_strtoul(buf, 10, &val)) 644 return -EINVAL; 645 val = fan_to_reg(val); 646 647 mutex_lock(&data->update_lock); 648 data->fan_min[index] = val; 649 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff); 650 val &= 0x0f; 651 if (index % 1) { 652 val <<= 4; 653 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 654 & 0x0f; 655 } else { 656 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 657 & 0xf0; 658 } 659 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff); 660 mutex_unlock(&data->update_lock); 661 662 return count; 663} 664 665static ssize_t 666show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 667{ 668 struct w83795_data *data = w83795_update_device(dev); 669 struct sensor_device_attribute_2 *sensor_attr = 670 to_sensor_dev_attr_2(attr); 671 int nr = sensor_attr->nr; 672 int index = sensor_attr->index; 673 u16 val; 674 675 switch (nr) { 676 case PWM_STOP_TIME: 677 val = time_from_reg(data->pwm[index][nr]); 678 break; 679 case PWM_DIV: 680 val = W83795_REG_FOPFP_DIV(data->pwm[index][nr] & 0x0f); 681 break; 682 default: 683 val = data->pwm[index][nr]; 684 break; 685 } 686 687 return sprintf(buf, "%u\n", val); 688} 689 690static ssize_t 691store_pwm(struct device *dev, struct device_attribute *attr, 692 const char *buf, size_t count) 693{ 694 struct i2c_client *client = to_i2c_client(dev); 695 struct w83795_data *data = i2c_get_clientdata(client); 696 struct sensor_device_attribute_2 *sensor_attr = 697 to_sensor_dev_attr_2(attr); 698 int nr = sensor_attr->nr; 699 int index = sensor_attr->index; 700 unsigned long val; 701 int i; 702 703 if (strict_strtoul(buf, 10, &val) < 0) 704 return -EINVAL; 705 706 mutex_lock(&data->update_lock); 707 switch (nr) { 708 case PWM_STOP_TIME: 709 val = time_to_reg(val); 710 break; 711 case PWM_DIV: 712 for (i = 0; i < 16; i++) { 713 if (W83795_REG_FOPFP_DIV(i) == val) { 714 val = i; 715 break; 716 } 717 } 718 if (i >= 16) 719 goto err_end; 720 val |= w83795_read(client, W83795_REG_PWM(index, nr)) & 0x80; 721 break; 722 default: 723 val = SENSORS_LIMIT(val, 0, 0xff); 724 break; 725 } 726 w83795_write(client, W83795_REG_PWM(index, nr), val); 727 data->pwm[index][nr] = val & 0xff; 728 mutex_unlock(&data->update_lock); 729 return count; 730err_end: 731 mutex_unlock(&data->update_lock); 732 return -EINVAL; 733} 734 735static ssize_t 736show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 737{ 738 struct sensor_device_attribute_2 *sensor_attr = 739 to_sensor_dev_attr_2(attr); 740 struct i2c_client *client = to_i2c_client(dev); 741 struct w83795_data *data = i2c_get_clientdata(client); 742 int index = sensor_attr->index; 743 u8 tmp; 744 745 if (1 == (data->pwm_fcms[0] & (1 << index))) { 746 tmp = 2; 747 goto out; 748 } 749 for (tmp = 0; tmp < 6; tmp++) { 750 if (data->pwm_tfmr[tmp] & (1 << index)) { 751 tmp = 3; 752 goto out; 753 } 754 } 755 if (data->pwm_fomc & (1 << index)) 756 tmp = 0; 757 else 758 tmp = 1; 759 760out: 761 return sprintf(buf, "%u\n", tmp); 762} 763 764static ssize_t 765store_pwm_enable(struct device *dev, struct device_attribute *attr, 766 const char *buf, size_t count) 767{ 768 struct i2c_client *client = to_i2c_client(dev); 769 struct w83795_data *data = i2c_get_clientdata(client); 770 struct sensor_device_attribute_2 *sensor_attr = 771 to_sensor_dev_attr_2(attr); 772 int index = sensor_attr->index; 773 unsigned long val; 774 int i; 775 776 if (strict_strtoul(buf, 10, &val) < 0) 777 return -EINVAL; 778 if (val > 2) 779 return -EINVAL; 780 781 mutex_lock(&data->update_lock); 782 switch (val) { 783 case 0: 784 case 1: 785 data->pwm_fcms[0] &= ~(1 << index); 786 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 787 for (i = 0; i < 6; i++) { 788 data->pwm_tfmr[i] &= ~(1 << index); 789 w83795_write(client, W83795_REG_TFMR(i), 790 data->pwm_tfmr[i]); 791 } 792 data->pwm_fomc |= 1 << index; 793 data->pwm_fomc ^= val << index; 794 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc); 795 break; 796 case 2: 797 data->pwm_fcms[0] |= (1 << index); 798 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 799 break; 800 } 801 mutex_unlock(&data->update_lock); 802 return count; 803} 804 805static ssize_t 806show_temp_src(struct device *dev, struct device_attribute *attr, char *buf) 807{ 808 struct sensor_device_attribute_2 *sensor_attr = 809 to_sensor_dev_attr_2(attr); 810 struct i2c_client *client = to_i2c_client(dev); 811 struct w83795_data *data = i2c_get_clientdata(client); 812 int index = sensor_attr->index; 813 u8 val = index / 2; 814 u8 tmp = data->temp_src[val]; 815 816 if (index % 1) 817 val = 4; 818 else 819 val = 0; 820 tmp >>= val; 821 tmp &= 0x0f; 822 823 return sprintf(buf, "%u\n", tmp); 824} 825 826static ssize_t 827store_temp_src(struct device *dev, struct device_attribute *attr, 828 const char *buf, size_t count) 829{ 830 struct i2c_client *client = to_i2c_client(dev); 831 struct w83795_data *data = i2c_get_clientdata(client); 832 struct sensor_device_attribute_2 *sensor_attr = 833 to_sensor_dev_attr_2(attr); 834 int index = sensor_attr->index; 835 unsigned long tmp; 836 u8 val = index / 2; 837 838 if (strict_strtoul(buf, 10, &tmp) < 0) 839 return -EINVAL; 840 tmp = SENSORS_LIMIT(tmp, 0, 15); 841 842 mutex_lock(&data->update_lock); 843 if (index % 1) { 844 tmp <<= 4; 845 data->temp_src[val] &= 0x0f; 846 } else { 847 data->temp_src[val] &= 0xf0; 848 } 849 data->temp_src[val] |= tmp; 850 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]); 851 mutex_unlock(&data->update_lock); 852 853 return count; 854} 855 856#define TEMP_PWM_ENABLE 0 857#define TEMP_PWM_FAN_MAP 1 858static ssize_t 859show_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 860 char *buf) 861{ 862 struct i2c_client *client = to_i2c_client(dev); 863 struct w83795_data *data = i2c_get_clientdata(client); 864 struct sensor_device_attribute_2 *sensor_attr = 865 to_sensor_dev_attr_2(attr); 866 int nr = sensor_attr->nr; 867 int index = sensor_attr->index; 868 u8 tmp = 0xff; 869 870 switch (nr) { 871 case TEMP_PWM_ENABLE: 872 tmp = (data->pwm_fcms[1] >> index) & 1; 873 if (tmp) 874 tmp = 4; 875 else 876 tmp = 3; 877 break; 878 case TEMP_PWM_FAN_MAP: 879 tmp = data->pwm_tfmr[index]; 880 break; 881 } 882 883 return sprintf(buf, "%u\n", tmp); 884} 885 886static ssize_t 887store_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 888 const char *buf, size_t count) 889{ 890 struct i2c_client *client = to_i2c_client(dev); 891 struct w83795_data *data = i2c_get_clientdata(client); 892 struct sensor_device_attribute_2 *sensor_attr = 893 to_sensor_dev_attr_2(attr); 894 int nr = sensor_attr->nr; 895 int index = sensor_attr->index; 896 unsigned long tmp; 897 898 if (strict_strtoul(buf, 10, &tmp) < 0) 899 return -EINVAL; 900 901 switch (nr) { 902 case TEMP_PWM_ENABLE: 903 if ((tmp != 3) && (tmp != 4)) 904 return -EINVAL; 905 tmp -= 3; 906 mutex_lock(&data->update_lock); 907 data->pwm_fcms[1] &= ~(1 << index); 908 data->pwm_fcms[1] |= tmp << index; 909 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]); 910 mutex_unlock(&data->update_lock); 911 break; 912 case TEMP_PWM_FAN_MAP: 913 mutex_lock(&data->update_lock); 914 tmp = SENSORS_LIMIT(tmp, 0, 0xff); 915 w83795_write(client, W83795_REG_TFMR(index), tmp); 916 data->pwm_tfmr[index] = tmp; 917 mutex_unlock(&data->update_lock); 918 break; 919 } 920 return count; 921} 922 923#define FANIN_TARGET 0 924#define FANIN_TOL 1 925static ssize_t 926show_fanin(struct device *dev, struct device_attribute *attr, char *buf) 927{ 928 struct i2c_client *client = to_i2c_client(dev); 929 struct w83795_data *data = i2c_get_clientdata(client); 930 struct sensor_device_attribute_2 *sensor_attr = 931 to_sensor_dev_attr_2(attr); 932 int nr = sensor_attr->nr; 933 int index = sensor_attr->index; 934 u16 tmp = 0; 935 936 switch (nr) { 937 case FANIN_TARGET: 938 tmp = fan_from_reg(data->target_speed[index]); 939 break; 940 case FANIN_TOL: 941 tmp = data->tol_speed; 942 break; 943 } 944 945 return sprintf(buf, "%u\n", tmp); 946} 947 948static ssize_t 949store_fanin(struct device *dev, struct device_attribute *attr, 950 const char *buf, size_t count) 951{ 952 struct i2c_client *client = to_i2c_client(dev); 953 struct w83795_data *data = i2c_get_clientdata(client); 954 struct sensor_device_attribute_2 *sensor_attr = 955 to_sensor_dev_attr_2(attr); 956 int nr = sensor_attr->nr; 957 int index = sensor_attr->index; 958 unsigned long val; 959 960 if (strict_strtoul(buf, 10, &val) < 0) 961 return -EINVAL; 962 963 mutex_lock(&data->update_lock); 964 switch (nr) { 965 case FANIN_TARGET: 966 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff)); 967 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff); 968 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0); 969 data->target_speed[index] = val; 970 break; 971 case FANIN_TOL: 972 val = SENSORS_LIMIT(val, 0, 0x3f); 973 w83795_write(client, W83795_REG_TFTS, val); 974 data->tol_speed = val; 975 break; 976 } 977 mutex_unlock(&data->update_lock); 978 979 return count; 980} 981 982 983static ssize_t 984show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf) 985{ 986 struct i2c_client *client = to_i2c_client(dev); 987 struct w83795_data *data = i2c_get_clientdata(client); 988 struct sensor_device_attribute_2 *sensor_attr = 989 to_sensor_dev_attr_2(attr); 990 int nr = sensor_attr->nr; 991 int index = sensor_attr->index; 992 long tmp = temp_from_reg(data->pwm_temp[index][nr]); 993 994 return sprintf(buf, "%ld\n", tmp); 995} 996 997static ssize_t 998store_temp_pwm(struct device *dev, struct device_attribute *attr, 999 const char *buf, size_t count) 1000{ 1001 struct i2c_client *client = to_i2c_client(dev); 1002 struct w83795_data *data = i2c_get_clientdata(client); 1003 struct sensor_device_attribute_2 *sensor_attr = 1004 to_sensor_dev_attr_2(attr); 1005 int nr = sensor_attr->nr; 1006 int index = sensor_attr->index; 1007 unsigned long val; 1008 u8 tmp; 1009 1010 if (strict_strtoul(buf, 10, &val) < 0) 1011 return -EINVAL; 1012 val /= 1000; 1013 1014 mutex_lock(&data->update_lock); 1015 switch (nr) { 1016 case TEMP_PWM_TTTI: 1017 val = SENSORS_LIMIT(val, 0, 0x7f); 1018 w83795_write(client, W83795_REG_TTTI(index), val); 1019 break; 1020 case TEMP_PWM_CTFS: 1021 val = SENSORS_LIMIT(val, 0, 0x7f); 1022 w83795_write(client, W83795_REG_CTFS(index), val); 1023 break; 1024 case TEMP_PWM_HCT: 1025 val = SENSORS_LIMIT(val, 0, 0x0f); 1026 tmp = w83795_read(client, W83795_REG_HT(index)); 1027 tmp &= 0x0f; 1028 tmp |= (val << 4) & 0xf0; 1029 w83795_write(client, W83795_REG_HT(index), tmp); 1030 break; 1031 case TEMP_PWM_HOT: 1032 val = SENSORS_LIMIT(val, 0, 0x0f); 1033 tmp = w83795_read(client, W83795_REG_HT(index)); 1034 tmp &= 0xf0; 1035 tmp |= val & 0x0f; 1036 w83795_write(client, W83795_REG_HT(index), tmp); 1037 break; 1038 } 1039 data->pwm_temp[index][nr] = val; 1040 mutex_unlock(&data->update_lock); 1041 1042 return count; 1043} 1044 1045static ssize_t 1046show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1047{ 1048 struct i2c_client *client = to_i2c_client(dev); 1049 struct w83795_data *data = i2c_get_clientdata(client); 1050 struct sensor_device_attribute_2 *sensor_attr = 1051 to_sensor_dev_attr_2(attr); 1052 int nr = sensor_attr->nr; 1053 int index = sensor_attr->index; 1054 1055 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]); 1056} 1057 1058static ssize_t 1059store_sf4_pwm(struct device *dev, struct device_attribute *attr, 1060 const char *buf, size_t count) 1061{ 1062 struct i2c_client *client = to_i2c_client(dev); 1063 struct w83795_data *data = i2c_get_clientdata(client); 1064 struct sensor_device_attribute_2 *sensor_attr = 1065 to_sensor_dev_attr_2(attr); 1066 int nr = sensor_attr->nr; 1067 int index = sensor_attr->index; 1068 unsigned long val; 1069 1070 if (strict_strtoul(buf, 10, &val) < 0) 1071 return -EINVAL; 1072 1073 mutex_lock(&data->update_lock); 1074 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val); 1075 data->sf4_reg[index][SF4_PWM][nr] = val; 1076 mutex_unlock(&data->update_lock); 1077 1078 return count; 1079} 1080 1081static ssize_t 1082show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf) 1083{ 1084 struct i2c_client *client = to_i2c_client(dev); 1085 struct w83795_data *data = i2c_get_clientdata(client); 1086 struct sensor_device_attribute_2 *sensor_attr = 1087 to_sensor_dev_attr_2(attr); 1088 int nr = sensor_attr->nr; 1089 int index = sensor_attr->index; 1090 1091 return sprintf(buf, "%u\n", 1092 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000); 1093} 1094 1095static ssize_t 1096store_sf4_temp(struct device *dev, struct device_attribute *attr, 1097 const char *buf, size_t count) 1098{ 1099 struct i2c_client *client = to_i2c_client(dev); 1100 struct w83795_data *data = i2c_get_clientdata(client); 1101 struct sensor_device_attribute_2 *sensor_attr = 1102 to_sensor_dev_attr_2(attr); 1103 int nr = sensor_attr->nr; 1104 int index = sensor_attr->index; 1105 unsigned long val; 1106 1107 if (strict_strtoul(buf, 10, &val) < 0) 1108 return -EINVAL; 1109 val /= 1000; 1110 1111 mutex_lock(&data->update_lock); 1112 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val); 1113 data->sf4_reg[index][SF4_TEMP][nr] = val; 1114 mutex_unlock(&data->update_lock); 1115 1116 return count; 1117} 1118 1119 1120static ssize_t 1121show_temp(struct device *dev, struct device_attribute *attr, char *buf) 1122{ 1123 struct sensor_device_attribute_2 *sensor_attr = 1124 to_sensor_dev_attr_2(attr); 1125 int nr = sensor_attr->nr; 1126 int index = sensor_attr->index; 1127 struct w83795_data *data = w83795_update_device(dev); 1128 long temp = temp_from_reg(data->temp[index][nr] & 0x7f); 1129 1130 if (TEMP_READ == nr) 1131 temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) 1132 * 250; 1133 if (data->temp[index][nr] & 0x80) 1134 temp = -temp; 1135 return sprintf(buf, "%ld\n", temp); 1136} 1137 1138static ssize_t 1139store_temp(struct device *dev, struct device_attribute *attr, 1140 const char *buf, size_t count) 1141{ 1142 struct sensor_device_attribute_2 *sensor_attr = 1143 to_sensor_dev_attr_2(attr); 1144 int nr = sensor_attr->nr; 1145 int index = sensor_attr->index; 1146 struct i2c_client *client = to_i2c_client(dev); 1147 struct w83795_data *data = i2c_get_clientdata(client); 1148 long tmp; 1149 1150 if (strict_strtol(buf, 10, &tmp) < 0) 1151 return -EINVAL; 1152 1153 mutex_lock(&data->update_lock); 1154 data->temp[index][nr] = temp_to_reg(tmp, -128, 127); 1155 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]); 1156 mutex_unlock(&data->update_lock); 1157 return count; 1158} 1159 1160 1161static ssize_t 1162show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf) 1163{ 1164 struct i2c_client *client = to_i2c_client(dev); 1165 struct w83795_data *data = i2c_get_clientdata(client); 1166 struct sensor_device_attribute_2 *sensor_attr = 1167 to_sensor_dev_attr_2(attr); 1168 int index = sensor_attr->index; 1169 u8 tmp; 1170 1171 if (data->enable_dts == 0) 1172 return sprintf(buf, "%d\n", 0); 1173 1174 if ((data->has_dts >> index) & 0x01) { 1175 if (data->enable_dts & 2) 1176 tmp = 5; 1177 else 1178 tmp = 6; 1179 } else { 1180 tmp = 0; 1181 } 1182 1183 return sprintf(buf, "%d\n", tmp); 1184} 1185 1186static ssize_t 1187show_dts(struct device *dev, struct device_attribute *attr, char *buf) 1188{ 1189 struct sensor_device_attribute_2 *sensor_attr = 1190 to_sensor_dev_attr_2(attr); 1191 int index = sensor_attr->index; 1192 struct w83795_data *data = w83795_update_device(dev); 1193 long temp = temp_from_reg(data->dts[index] & 0x7f); 1194 1195 temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250; 1196 if (data->dts[index] & 0x80) 1197 temp = -temp; 1198 return sprintf(buf, "%ld\n", temp); 1199} 1200 1201static ssize_t 1202show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf) 1203{ 1204 struct sensor_device_attribute_2 *sensor_attr = 1205 to_sensor_dev_attr_2(attr); 1206 int nr = sensor_attr->nr; 1207 struct i2c_client *client = to_i2c_client(dev); 1208 struct w83795_data *data = i2c_get_clientdata(client); 1209 long temp = temp_from_reg(data->dts_ext[nr] & 0x7f); 1210 1211 if (data->dts_ext[nr] & 0x80) 1212 temp = -temp; 1213 return sprintf(buf, "%ld\n", temp); 1214} 1215 1216static ssize_t 1217store_dts_ext(struct device *dev, struct device_attribute *attr, 1218 const char *buf, size_t count) 1219{ 1220 struct sensor_device_attribute_2 *sensor_attr = 1221 to_sensor_dev_attr_2(attr); 1222 int nr = sensor_attr->nr; 1223 struct i2c_client *client = to_i2c_client(dev); 1224 struct w83795_data *data = i2c_get_clientdata(client); 1225 long tmp; 1226 1227 if (strict_strtol(buf, 10, &tmp) < 0) 1228 return -EINVAL; 1229 1230 mutex_lock(&data->update_lock); 1231 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127); 1232 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]); 1233 mutex_unlock(&data->update_lock); 1234 return count; 1235} 1236 1237 1238/* 1239 Type 3: Thermal diode 1240 Type 4: Thermistor 1241 1242 Temp5-6, default TR 1243 Temp1-4, default TD 1244*/ 1245 1246static ssize_t 1247show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) 1248{ 1249 struct i2c_client *client = to_i2c_client(dev); 1250 struct w83795_data *data = i2c_get_clientdata(client); 1251 struct sensor_device_attribute_2 *sensor_attr = 1252 to_sensor_dev_attr_2(attr); 1253 int index = sensor_attr->index; 1254 u8 tmp; 1255 1256 if (data->has_temp >> index & 0x01) { 1257 if (data->temp_mode >> index & 0x01) 1258 tmp = 3; 1259 else 1260 tmp = 4; 1261 } else { 1262 tmp = 0; 1263 } 1264 1265 return sprintf(buf, "%d\n", tmp); 1266} 1267 1268static ssize_t 1269store_temp_mode(struct device *dev, struct device_attribute *attr, 1270 const char *buf, size_t count) 1271{ 1272 struct i2c_client *client = to_i2c_client(dev); 1273 struct w83795_data *data = i2c_get_clientdata(client); 1274 struct sensor_device_attribute_2 *sensor_attr = 1275 to_sensor_dev_attr_2(attr); 1276 int index = sensor_attr->index; 1277 unsigned long val; 1278 u8 tmp; 1279 u32 mask; 1280 1281 if (strict_strtoul(buf, 10, &val) < 0) 1282 return -EINVAL; 1283 if ((val != 4) && (val != 3)) 1284 return -EINVAL; 1285 if ((index > 3) && (val == 3)) 1286 return -EINVAL; 1287 1288 mutex_lock(&data->update_lock); 1289 if (val == 3) { 1290 val = TEMP_CTRL_TD; 1291 data->has_temp |= 1 << index; 1292 data->temp_mode |= 1 << index; 1293 } else if (val == 4) { 1294 val = TEMP_CTRL_TR; 1295 data->has_temp |= 1 << index; 1296 tmp = 1 << index; 1297 data->temp_mode &= ~tmp; 1298 } 1299 1300 if (index > 3) 1301 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 1302 else 1303 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1304 1305 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT]; 1306 tmp &= ~mask; 1307 tmp |= W83795_REG_TEMP_CTRL[index][val]; 1308 1309 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT]; 1310 data->has_in &= ~mask; 1311 1312 if (index > 3) 1313 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp); 1314 else 1315 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp); 1316 1317 mutex_unlock(&data->update_lock); 1318 return count; 1319} 1320 1321 1322/* show/store VIN */ 1323static ssize_t 1324show_in(struct device *dev, struct device_attribute *attr, char *buf) 1325{ 1326 struct sensor_device_attribute_2 *sensor_attr = 1327 to_sensor_dev_attr_2(attr); 1328 int nr = sensor_attr->nr; 1329 int index = sensor_attr->index; 1330 struct w83795_data *data = w83795_update_device(dev); 1331 u16 val = data->in[index][nr]; 1332 u8 lsb_idx; 1333 1334 switch (nr) { 1335 case IN_READ: 1336 /* calculate this value again by sensors as sensors3.conf */ 1337 if ((index >= 17) && 1338 !((data->has_gain >> (index - 17)) & 1)) 1339 val *= 8; 1340 break; 1341 case IN_MAX: 1342 case IN_LOW: 1343 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1344 val <<= 2; 1345 val |= (data->in_lsb[lsb_idx][nr] >> 1346 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03; 1347 if ((index >= 17) && 1348 !((data->has_gain >> (index - 17)) & 1)) 1349 val *= 8; 1350 break; 1351 } 1352 val = in_from_reg(index, val); 1353 1354 return sprintf(buf, "%d\n", val); 1355} 1356 1357static ssize_t 1358store_in(struct device *dev, struct device_attribute *attr, 1359 const char *buf, size_t count) 1360{ 1361 struct sensor_device_attribute_2 *sensor_attr = 1362 to_sensor_dev_attr_2(attr); 1363 int nr = sensor_attr->nr; 1364 int index = sensor_attr->index; 1365 struct i2c_client *client = to_i2c_client(dev); 1366 struct w83795_data *data = i2c_get_clientdata(client); 1367 unsigned long val; 1368 u8 tmp; 1369 u8 lsb_idx; 1370 1371 if (strict_strtoul(buf, 10, &val) < 0) 1372 return -EINVAL; 1373 val = in_to_reg(index, val); 1374 1375 if ((index >= 17) && 1376 !((data->has_gain >> (index - 17)) & 1)) 1377 val /= 8; 1378 val = SENSORS_LIMIT(val, 0, 0x3FF); 1379 mutex_lock(&data->update_lock); 1380 1381 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1382 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr)); 1383 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]); 1384 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]; 1385 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp); 1386 data->in_lsb[lsb_idx][nr] = tmp; 1387 1388 tmp = (val >> 2) & 0xff; 1389 w83795_write(client, W83795_REG_IN[index][nr], tmp); 1390 data->in[index][nr] = tmp; 1391 1392 mutex_unlock(&data->update_lock); 1393 return count; 1394} 1395 1396 1397static ssize_t 1398show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) 1399{ 1400 struct sensor_device_attribute_2 *sensor_attr = 1401 to_sensor_dev_attr_2(attr); 1402 int nr = sensor_attr->nr; 1403 struct i2c_client *client = to_i2c_client(dev); 1404 struct w83795_data *data = i2c_get_clientdata(client); 1405 u16 val = data->setup_pwm[nr]; 1406 1407 switch (nr) { 1408 case SETUP_PWM_UPTIME: 1409 case SETUP_PWM_DOWNTIME: 1410 val = time_from_reg(val); 1411 break; 1412 } 1413 1414 return sprintf(buf, "%d\n", val); 1415} 1416 1417static ssize_t 1418store_sf_setup(struct device *dev, struct device_attribute *attr, 1419 const char *buf, size_t count) 1420{ 1421 struct sensor_device_attribute_2 *sensor_attr = 1422 to_sensor_dev_attr_2(attr); 1423 int nr = sensor_attr->nr; 1424 struct i2c_client *client = to_i2c_client(dev); 1425 struct w83795_data *data = i2c_get_clientdata(client); 1426 unsigned long val; 1427 1428 if (strict_strtoul(buf, 10, &val) < 0) 1429 return -EINVAL; 1430 1431 switch (nr) { 1432 case SETUP_PWM_DEFAULT: 1433 val = SENSORS_LIMIT(val, 0, 0xff); 1434 break; 1435 case SETUP_PWM_UPTIME: 1436 case SETUP_PWM_DOWNTIME: 1437 val = time_to_reg(val); 1438 if (val == 0) 1439 return -EINVAL; 1440 break; 1441 } 1442 1443 mutex_lock(&data->update_lock); 1444 data->setup_pwm[nr] = val; 1445 w83795_write(client, W83795_REG_SETUP_PWM(nr), val); 1446 mutex_unlock(&data->update_lock); 1447 return count; 1448} 1449 1450 1451#define NOT_USED -1 1452 1453#define SENSOR_ATTR_IN(index) { \ 1454 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ 1455 IN_READ, index), \ 1456 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ 1457 store_in, IN_MAX, index), \ 1458 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ 1459 store_in, IN_LOW, index), \ 1460 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ 1461 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \ 1462 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ 1463 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1464 index + ((index > 14) ? 1 : 0)) } 1465 1466#define SENSOR_ATTR_FAN(index) { \ 1467 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ 1468 NULL, FAN_INPUT, index - 1), \ 1469 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ 1470 show_fan, store_fan_min, FAN_MIN, index - 1), \ 1471 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ 1472 NULL, ALARM_STATUS, index + 31), \ 1473 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ 1474 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) } 1475 1476#define SENSOR_ATTR_PWM(index) { \ 1477 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ 1478 store_pwm, PWM_OUTPUT, index - 1), \ 1479 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ 1480 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ 1481 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ 1482 show_pwm, store_pwm, PWM_START, index - 1), \ 1483 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ 1484 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \ 1485 SENSOR_ATTR_2(fan##index##_div, S_IWUSR | S_IRUGO, \ 1486 show_pwm, store_pwm, PWM_DIV, index - 1), \ 1487 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \ 1488 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \ 1489 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \ 1490 show_fanin, store_fanin, FANIN_TARGET, index - 1) } 1491 1492#define SENSOR_ATTR_DTS(index) { \ 1493 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \ 1494 show_dts_mode, NULL, NOT_USED, index - 7), \ 1495 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \ 1496 NULL, NOT_USED, index - 7), \ 1497 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \ 1498 store_dts_ext, DTS_CRIT, NOT_USED), \ 1499 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1500 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \ 1501 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_dts_ext, \ 1502 store_dts_ext, DTS_WARN, NOT_USED), \ 1503 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \ 1504 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \ 1505 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1506 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \ 1507 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1508 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) } 1509 1510#define SENSOR_ATTR_TEMP(index) { \ 1511 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \ 1512 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ 1513 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ 1514 NULL, TEMP_READ, index - 1), \ 1515 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ 1516 store_temp, TEMP_CRIT, index - 1), \ 1517 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1518 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ 1519 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \ 1520 store_temp, TEMP_WARN, index - 1), \ 1521 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \ 1522 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ 1523 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1524 show_alarm_beep, NULL, ALARM_STATUS, \ 1525 index + (index > 4 ? 11 : 17)), \ 1526 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1527 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1528 index + (index > 4 ? 11 : 17)), \ 1529 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \ 1530 show_temp_src, store_temp_src, NOT_USED, index - 1), \ 1531 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ 1532 show_temp_pwm_enable, store_temp_pwm_enable, \ 1533 TEMP_PWM_ENABLE, index - 1), \ 1534 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \ 1535 show_temp_pwm_enable, store_temp_pwm_enable, \ 1536 TEMP_PWM_FAN_MAP, index - 1), \ 1537 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \ 1538 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \ 1539 SENSOR_ATTR_2(temp##index##_crit, S_IWUSR | S_IRUGO, \ 1540 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \ 1541 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IWUSR | S_IRUGO, \ 1542 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \ 1543 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \ 1544 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \ 1545 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ 1546 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \ 1547 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ 1548 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \ 1549 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ 1550 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \ 1551 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ 1552 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \ 1553 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ 1554 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \ 1555 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ 1556 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \ 1557 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ 1558 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \ 1559 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ 1560 show_sf4_temp, store_sf4_temp, 0, index - 1), \ 1561 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ 1562 show_sf4_temp, store_sf4_temp, 1, index - 1), \ 1563 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ 1564 show_sf4_temp, store_sf4_temp, 2, index - 1), \ 1565 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ 1566 show_sf4_temp, store_sf4_temp, 3, index - 1), \ 1567 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ 1568 show_sf4_temp, store_sf4_temp, 4, index - 1), \ 1569 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ 1570 show_sf4_temp, store_sf4_temp, 5, index - 1), \ 1571 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ 1572 show_sf4_temp, store_sf4_temp, 6, index - 1) } 1573 1574 1575static struct sensor_device_attribute_2 w83795_in[][5] = { 1576 SENSOR_ATTR_IN(0), 1577 SENSOR_ATTR_IN(1), 1578 SENSOR_ATTR_IN(2), 1579 SENSOR_ATTR_IN(3), 1580 SENSOR_ATTR_IN(4), 1581 SENSOR_ATTR_IN(5), 1582 SENSOR_ATTR_IN(6), 1583 SENSOR_ATTR_IN(7), 1584 SENSOR_ATTR_IN(8), 1585 SENSOR_ATTR_IN(9), 1586 SENSOR_ATTR_IN(10), 1587 SENSOR_ATTR_IN(11), 1588 SENSOR_ATTR_IN(12), 1589 SENSOR_ATTR_IN(13), 1590 SENSOR_ATTR_IN(14), 1591 SENSOR_ATTR_IN(15), 1592 SENSOR_ATTR_IN(16), 1593 SENSOR_ATTR_IN(17), 1594 SENSOR_ATTR_IN(18), 1595 SENSOR_ATTR_IN(19), 1596 SENSOR_ATTR_IN(20), 1597}; 1598 1599static const struct sensor_device_attribute_2 w83795_fan[][4] = { 1600 SENSOR_ATTR_FAN(1), 1601 SENSOR_ATTR_FAN(2), 1602 SENSOR_ATTR_FAN(3), 1603 SENSOR_ATTR_FAN(4), 1604 SENSOR_ATTR_FAN(5), 1605 SENSOR_ATTR_FAN(6), 1606 SENSOR_ATTR_FAN(7), 1607 SENSOR_ATTR_FAN(8), 1608 SENSOR_ATTR_FAN(9), 1609 SENSOR_ATTR_FAN(10), 1610 SENSOR_ATTR_FAN(11), 1611 SENSOR_ATTR_FAN(12), 1612 SENSOR_ATTR_FAN(13), 1613 SENSOR_ATTR_FAN(14), 1614}; 1615 1616static const struct sensor_device_attribute_2 w83795_temp[][29] = { 1617 SENSOR_ATTR_TEMP(1), 1618 SENSOR_ATTR_TEMP(2), 1619 SENSOR_ATTR_TEMP(3), 1620 SENSOR_ATTR_TEMP(4), 1621 SENSOR_ATTR_TEMP(5), 1622 SENSOR_ATTR_TEMP(6), 1623}; 1624 1625static const struct sensor_device_attribute_2 w83795_dts[][8] = { 1626 SENSOR_ATTR_DTS(7), 1627 SENSOR_ATTR_DTS(8), 1628 SENSOR_ATTR_DTS(9), 1629 SENSOR_ATTR_DTS(10), 1630 SENSOR_ATTR_DTS(11), 1631 SENSOR_ATTR_DTS(12), 1632 SENSOR_ATTR_DTS(13), 1633 SENSOR_ATTR_DTS(14), 1634}; 1635 1636static const struct sensor_device_attribute_2 w83795_pwm[][7] = { 1637 SENSOR_ATTR_PWM(1), 1638 SENSOR_ATTR_PWM(2), 1639 SENSOR_ATTR_PWM(3), 1640 SENSOR_ATTR_PWM(4), 1641 SENSOR_ATTR_PWM(5), 1642 SENSOR_ATTR_PWM(6), 1643 SENSOR_ATTR_PWM(7), 1644 SENSOR_ATTR_PWM(8), 1645}; 1646 1647static const struct sensor_device_attribute_2 sda_single_files[] = { 1648 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep, 1649 store_chassis_clear, ALARM_STATUS, 46), 1650 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable, 1651 store_beep_enable, NOT_USED, NOT_USED), 1652 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin, 1653 store_fanin, FANIN_TOL, NOT_USED), 1654 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, 1655 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), 1656 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, 1657 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), 1658 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, 1659 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), 1660}; 1661 1662/* 1663 * Driver interface 1664 */ 1665 1666static void w83795_init_client(struct i2c_client *client) 1667{ 1668 u8 config; 1669 1670 if (reset) 1671 w83795_write(client, W83795_REG_CONFIG, 0x80); 1672 1673 /* Start monitoring if needed */ 1674 config = w83795_read(client, W83795_REG_CONFIG); 1675 if (!(config & W83795_REG_CONFIG_START)) { 1676 dev_info(&client->dev, "Enabling monitoring operations\n"); 1677 w83795_write(client, W83795_REG_CONFIG, 1678 config | W83795_REG_CONFIG_START); 1679 } 1680} 1681 1682static int w83795_get_device_id(struct i2c_client *client) 1683{ 1684 int device_id; 1685 1686 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID); 1687 1688 /* Special case for rev. A chips; can't be checked first because later 1689 revisions emulate this for compatibility */ 1690 if (device_id < 0 || (device_id & 0xf0) != 0x50) { 1691 int alt_id; 1692 1693 alt_id = i2c_smbus_read_byte_data(client, 1694 W83795_REG_DEVICEID_A); 1695 if (alt_id == 0x50) 1696 device_id = alt_id; 1697 } 1698 1699 return device_id; 1700} 1701 1702/* Return 0 if detection is successful, -ENODEV otherwise */ 1703static int w83795_detect(struct i2c_client *client, 1704 struct i2c_board_info *info) 1705{ 1706 int bank, vendor_id, device_id, expected, i2c_addr, config; 1707 struct i2c_adapter *adapter = client->adapter; 1708 unsigned short address = client->addr; 1709 const char *chip_name; 1710 1711 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1712 return -ENODEV; 1713 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1714 if (bank < 0 || (bank & 0x7c)) { 1715 dev_dbg(&adapter->dev, 1716 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1717 address, "bank"); 1718 return -ENODEV; 1719 } 1720 1721 /* Check Nuvoton vendor ID */ 1722 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID); 1723 expected = bank & 0x80 ? 0x5c : 0xa3; 1724 if (vendor_id != expected) { 1725 dev_dbg(&adapter->dev, 1726 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1727 address, "vendor id"); 1728 return -ENODEV; 1729 } 1730 1731 /* Check device ID */ 1732 device_id = w83795_get_device_id(client) | 1733 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8); 1734 if ((device_id >> 4) != 0x795) { 1735 dev_dbg(&adapter->dev, 1736 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1737 address, "device id\n"); 1738 return -ENODEV; 1739 } 1740 1741 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR 1742 should match */ 1743 if ((bank & 0x07) == 0) { 1744 i2c_addr = i2c_smbus_read_byte_data(client, 1745 W83795_REG_I2C_ADDR); 1746 if ((i2c_addr & 0x7f) != address) { 1747 dev_dbg(&adapter->dev, 1748 "w83795: Detection failed at addr 0x%02hx, " 1749 "check %s\n", address, "i2c addr"); 1750 return -ENODEV; 1751 } 1752 } 1753 1754 /* Check 795 chip type: 795G or 795ADG 1755 Usually we don't write to chips during detection, but here we don't 1756 quite have the choice; hopefully it's OK, we are about to return 1757 success anyway */ 1758 if ((bank & 0x07) != 0) 1759 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, 1760 bank & ~0x07); 1761 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG); 1762 if (config & W83795_REG_CONFIG_CONFIG48) 1763 chip_name = "w83795adg"; 1764 else 1765 chip_name = "w83795g"; 1766 1767 strlcpy(info->type, chip_name, I2C_NAME_SIZE); 1768 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name, 1769 'A' + (device_id & 0xf), address); 1770 1771 return 0; 1772} 1773 1774static int w83795_handle_files(struct device *dev, int (*fn)(struct device *, 1775 const struct device_attribute *)) 1776{ 1777 struct w83795_data *data = dev_get_drvdata(dev); 1778 int err, i, j; 1779 1780 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) { 1781 if (!(data->has_in & (1 << i))) 1782 continue; 1783 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) { 1784 err = fn(dev, &w83795_in[i][j].dev_attr); 1785 if (err) 1786 return err; 1787 } 1788 } 1789 1790 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) { 1791 if (!(data->has_fan & (1 << i))) 1792 continue; 1793 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) { 1794 err = fn(dev, &w83795_fan[i][j].dev_attr); 1795 if (err) 1796 return err; 1797 } 1798 } 1799 1800 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { 1801 err = fn(dev, &sda_single_files[i].dev_attr); 1802 if (err) 1803 return err; 1804 } 1805 1806 for (i = 0; i < data->has_pwm; i++) { 1807 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) { 1808 err = fn(dev, &w83795_pwm[i][j].dev_attr); 1809 if (err) 1810 return err; 1811 } 1812 } 1813 1814 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) { 1815 if (!(data->has_temp & (1 << i))) 1816 continue; 1817 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) { 1818 err = fn(dev, &w83795_temp[i][j].dev_attr); 1819 if (err) 1820 return err; 1821 } 1822 } 1823 1824 if (data->enable_dts != 0) { 1825 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) { 1826 if (!(data->has_dts & (1 << i))) 1827 continue; 1828 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) { 1829 err = fn(dev, &w83795_dts[i][j].dev_attr); 1830 if (err) 1831 return err; 1832 } 1833 } 1834 } 1835 1836 return 0; 1837} 1838 1839/* We need a wrapper that fits in w83795_handle_files */ 1840static int device_remove_file_wrapper(struct device *dev, 1841 const struct device_attribute *attr) 1842{ 1843 device_remove_file(dev, attr); 1844 return 0; 1845} 1846 1847static int w83795_probe(struct i2c_client *client, 1848 const struct i2c_device_id *id) 1849{ 1850 int i; 1851 u8 tmp; 1852 struct device *dev = &client->dev; 1853 struct w83795_data *data; 1854 int err = 0; 1855 1856 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL); 1857 if (!data) { 1858 err = -ENOMEM; 1859 goto exit; 1860 } 1861 1862 i2c_set_clientdata(client, data); 1863 data->chip_type = id->driver_data; 1864 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1865 mutex_init(&data->update_lock); 1866 1867 /* Initialize the chip */ 1868 w83795_init_client(client); 1869 1870 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1); 1871 data->has_in |= w83795_read(client, W83795_REG_VOLT_CTRL2) << 8; 1872 /* VSEN11-9 not for 795adg */ 1873 if (data->chip_type == w83795adg) 1874 data->has_in &= 0xf8ff; 1875 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1); 1876 data->has_fan |= w83795_read(client, W83795_REG_FANIN_CTRL2) << 8; 1877 1878 /* VDSEN12-17 and TR1-6, TD1-4 use same register */ 1879 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 1880 if (tmp & 0x20) 1881 data->enable_dts = 1; 1882 else 1883 data->enable_dts = 0; 1884 data->has_temp = 0; 1885 data->temp_mode = 0; 1886 if (tmp & 0x08) { 1887 if (tmp & 0x04) 1888 data->has_temp |= 0x20; 1889 else 1890 data->has_in |= 0x10000; 1891 } 1892 if (tmp & 0x02) { 1893 if (tmp & 0x01) 1894 data->has_temp |= 0x10; 1895 else 1896 data->has_in |= 0x8000; 1897 } 1898 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1899 if (tmp & 0x40) { 1900 data->has_temp |= 0x08; 1901 if (!(tmp & 0x80)) 1902 data->temp_mode |= 0x08; 1903 } else if (tmp & 0x80) { 1904 data->has_in |= 0x100000; 1905 } 1906 if (tmp & 0x10) { 1907 data->has_temp |= 0x04; 1908 if (!(tmp & 0x20)) 1909 data->temp_mode |= 0x04; 1910 } else if (tmp & 0x20) { 1911 data->has_in |= 0x80000; 1912 } 1913 if (tmp & 0x04) { 1914 data->has_temp |= 0x02; 1915 if (!(tmp & 0x08)) 1916 data->temp_mode |= 0x02; 1917 } else if (tmp & 0x08) { 1918 data->has_in |= 0x40000; 1919 } 1920 if (tmp & 0x01) { 1921 data->has_temp |= 0x01; 1922 if (!(tmp & 0x02)) 1923 data->temp_mode |= 0x01; 1924 } else if (tmp & 0x02) { 1925 data->has_in |= 0x20000; 1926 } 1927 1928 /* Check DTS enable status */ 1929 if (data->enable_dts == 0) { 1930 data->has_dts = 0; 1931 } else { 1932 if (1 & w83795_read(client, W83795_REG_DTSC)) 1933 data->enable_dts |= 2; 1934 data->has_dts = w83795_read(client, W83795_REG_DTSE); 1935 } 1936 1937 /* First update the voltages measured value and limits */ 1938 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 1939 if (!(data->has_in & (1 << i))) 1940 continue; 1941 data->in[i][IN_MAX] = 1942 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 1943 data->in[i][IN_LOW] = 1944 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 1945 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 1946 tmp |= (w83795_read(client, W83795_REG_VRLSB) 1947 >> VRLSB_SHIFT) & 0x03; 1948 data->in[i][IN_READ] = tmp; 1949 } 1950 for (i = 0; i < IN_LSB_REG_NUM; i++) { 1951 data->in_lsb[i][IN_MAX] = 1952 w83795_read(client, IN_LSB_REG(i, IN_MAX)); 1953 data->in_lsb[i][IN_LOW] = 1954 w83795_read(client, IN_LSB_REG(i, IN_LOW)); 1955 } 1956 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f; 1957 1958 /* First update fan and limits */ 1959 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 1960 if (!(data->has_fan & (1 << i))) 1961 continue; 1962 data->fan_min[i] = 1963 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4; 1964 data->fan_min[i] |= 1965 (w83795_read(client, W83795_REG_FAN_MIN_LSB(i) >> 1966 W83795_REG_FAN_MIN_LSB_SHIFT(i))) & 0x0F; 1967 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 1968 data->fan[i] |= 1969 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F; 1970 } 1971 1972 /* temperature and limits */ 1973 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 1974 if (!(data->has_temp & (1 << i))) 1975 continue; 1976 data->temp[i][TEMP_CRIT] = 1977 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]); 1978 data->temp[i][TEMP_CRIT_HYST] = 1979 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]); 1980 data->temp[i][TEMP_WARN] = 1981 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]); 1982 data->temp[i][TEMP_WARN_HYST] = 1983 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]); 1984 data->temp[i][TEMP_READ] = 1985 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 1986 data->temp_read_vrlsb[i] = 1987 w83795_read(client, W83795_REG_VRLSB); 1988 } 1989 1990 /* dts temperature and limits */ 1991 if (data->enable_dts != 0) { 1992 data->dts_ext[DTS_CRIT] = 1993 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT)); 1994 data->dts_ext[DTS_CRIT_HYST] = 1995 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST)); 1996 data->dts_ext[DTS_WARN] = 1997 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN)); 1998 data->dts_ext[DTS_WARN_HYST] = 1999 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST)); 2000 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 2001 if (!(data->has_dts & (1 << i))) 2002 continue; 2003 data->dts[i] = w83795_read(client, W83795_REG_DTS(i)); 2004 data->dts_read_vrlsb[i] = 2005 w83795_read(client, W83795_REG_VRLSB); 2006 } 2007 } 2008 2009 /* First update temp source selction */ 2010 for (i = 0; i < 3; i++) 2011 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i)); 2012 2013 /* pwm and smart fan */ 2014 if (data->chip_type == w83795g) 2015 data->has_pwm = 8; 2016 else 2017 data->has_pwm = 2; 2018 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1); 2019 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2); 2020 /* w83795adg only support pwm2-0 */ 2021 for (i = 0; i < W83795_REG_TEMP_NUM; i++) 2022 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i)); 2023 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC); 2024 for (i = 0; i < data->has_pwm; i++) { 2025 for (tmp = 0; tmp < 5; tmp++) { 2026 data->pwm[i][tmp] = 2027 w83795_read(client, W83795_REG_PWM(i, tmp)); 2028 } 2029 } 2030 for (i = 0; i < 8; i++) { 2031 data->target_speed[i] = 2032 w83795_read(client, W83795_REG_FTSH(i)) << 4; 2033 data->target_speed[i] |= 2034 w83795_read(client, W83795_REG_FTSL(i)) >> 4; 2035 } 2036 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f; 2037 2038 for (i = 0; i < W83795_REG_TEMP_NUM; i++) { 2039 data->pwm_temp[i][TEMP_PWM_TTTI] = 2040 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f; 2041 data->pwm_temp[i][TEMP_PWM_CTFS] = 2042 w83795_read(client, W83795_REG_CTFS(i)); 2043 tmp = w83795_read(client, W83795_REG_HT(i)); 2044 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f; 2045 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f; 2046 } 2047 for (i = 0; i < W83795_REG_TEMP_NUM; i++) { 2048 for (tmp = 0; tmp < 7; tmp++) { 2049 data->sf4_reg[i][SF4_TEMP][tmp] = 2050 w83795_read(client, 2051 W83795_REG_SF4_TEMP(i, tmp)); 2052 data->sf4_reg[i][SF4_PWM][tmp] = 2053 w83795_read(client, W83795_REG_SF4_PWM(i, tmp)); 2054 } 2055 } 2056 2057 /* Setup PWM Register */ 2058 for (i = 0; i < 3; i++) { 2059 data->setup_pwm[i] = 2060 w83795_read(client, W83795_REG_SETUP_PWM(i)); 2061 } 2062 2063 /* alarm and beep */ 2064 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) { 2065 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 2066 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i)); 2067 } 2068 data->beep_enable = 2069 (w83795_read(client, W83795_REG_BEEP(5)) >> 7) & 0x01; 2070 2071 err = w83795_handle_files(dev, device_create_file); 2072 if (err) 2073 goto exit_remove; 2074 2075 data->hwmon_dev = hwmon_device_register(dev); 2076 if (IS_ERR(data->hwmon_dev)) { 2077 err = PTR_ERR(data->hwmon_dev); 2078 goto exit_remove; 2079 } 2080 2081 return 0; 2082 2083exit_remove: 2084 w83795_handle_files(dev, device_remove_file_wrapper); 2085 kfree(data); 2086exit: 2087 return err; 2088} 2089 2090static int w83795_remove(struct i2c_client *client) 2091{ 2092 struct w83795_data *data = i2c_get_clientdata(client); 2093 2094 hwmon_device_unregister(data->hwmon_dev); 2095 w83795_handle_files(&client->dev, device_remove_file_wrapper); 2096 kfree(data); 2097 2098 return 0; 2099} 2100 2101 2102static const struct i2c_device_id w83795_id[] = { 2103 { "w83795g", w83795g }, 2104 { "w83795adg", w83795adg }, 2105 { } 2106}; 2107MODULE_DEVICE_TABLE(i2c, w83795_id); 2108 2109static struct i2c_driver w83795_driver = { 2110 .driver = { 2111 .name = "w83795", 2112 }, 2113 .probe = w83795_probe, 2114 .remove = w83795_remove, 2115 .id_table = w83795_id, 2116 2117 .class = I2C_CLASS_HWMON, 2118 .detect = w83795_detect, 2119 .address_list = normal_i2c, 2120}; 2121 2122static int __init sensors_w83795_init(void) 2123{ 2124 return i2c_add_driver(&w83795_driver); 2125} 2126 2127static void __exit sensors_w83795_exit(void) 2128{ 2129 i2c_del_driver(&w83795_driver); 2130} 2131 2132MODULE_AUTHOR("Wei Song"); 2133MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver"); 2134MODULE_LICENSE("GPL"); 2135 2136module_init(sensors_w83795_init); 2137module_exit(sensors_w83795_exit); 2138