w83795.c revision 86ef4d2fd5921ff0bcfd1c0d88403a08862087bc
1/* 2 * w83795.c - Linux kernel driver for hardware monitoring 3 * Copyright (C) 2008 Nuvoton Technology Corp. 4 * Wei Song 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation - version 2. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 18 * 02110-1301 USA. 19 * 20 * Supports following chips: 21 * 22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA 23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no 24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no 25 */ 26 27#include <linux/kernel.h> 28#include <linux/module.h> 29#include <linux/init.h> 30#include <linux/slab.h> 31#include <linux/i2c.h> 32#include <linux/hwmon.h> 33#include <linux/hwmon-sysfs.h> 34#include <linux/err.h> 35#include <linux/mutex.h> 36#include <linux/delay.h> 37 38/* Addresses to scan */ 39static const unsigned short normal_i2c[] = { 40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END 41}; 42 43 44static int reset; 45module_param(reset, bool, 0); 46MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); 47 48 49#define W83795_REG_BANKSEL 0x00 50#define W83795_REG_VENDORID 0xfd 51#define W83795_REG_CHIPID 0xfe 52#define W83795_REG_DEVICEID 0xfb 53#define W83795_REG_DEVICEID_A 0xff 54 55#define W83795_REG_I2C_ADDR 0xfc 56#define W83795_REG_CONFIG 0x01 57#define W83795_REG_CONFIG_CONFIG48 0x04 58 59/* Multi-Function Pin Ctrl Registers */ 60#define W83795_REG_VOLT_CTRL1 0x02 61#define W83795_REG_VOLT_CTRL2 0x03 62#define W83795_REG_TEMP_CTRL1 0x04 63#define W83795_REG_TEMP_CTRL2 0x05 64#define W83795_REG_FANIN_CTRL1 0x06 65#define W83795_REG_FANIN_CTRL2 0x07 66#define W83795_REG_VMIGB_CTRL 0x08 67 68#define TEMP_CTRL_DISABLE 0 69#define TEMP_CTRL_TD 1 70#define TEMP_CTRL_VSEN 2 71#define TEMP_CTRL_TR 3 72#define TEMP_CTRL_SHIFT 4 73#define TEMP_CTRL_HASIN_SHIFT 5 74/* temp mode may effect VSEN17-12 (in20-15) */ 75static const u16 W83795_REG_TEMP_CTRL[][6] = { 76 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */ 77 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */ 78 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */ 79 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */ 80 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */ 81 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */ 82 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */ 83}; 84 85#define TEMP_READ 0 86#define TEMP_CRIT 1 87#define TEMP_CRIT_HYST 2 88#define TEMP_WARN 3 89#define TEMP_WARN_HYST 4 90/* only crit and crit_hyst affect real-time alarm status 91 * current crit crit_hyst warn warn_hyst */ 92static const u16 W83795_REG_TEMP[][5] = { 93 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */ 94 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */ 95 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */ 96 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */ 97 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */ 98 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */ 99}; 100 101#define IN_READ 0 102#define IN_MAX 1 103#define IN_LOW 2 104static const u16 W83795_REG_IN[][3] = { 105 /* Current, HL, LL */ 106 {0x10, 0x70, 0x71}, /* VSEN1 */ 107 {0x11, 0x72, 0x73}, /* VSEN2 */ 108 {0x12, 0x74, 0x75}, /* VSEN3 */ 109 {0x13, 0x76, 0x77}, /* VSEN4 */ 110 {0x14, 0x78, 0x79}, /* VSEN5 */ 111 {0x15, 0x7a, 0x7b}, /* VSEN6 */ 112 {0x16, 0x7c, 0x7d}, /* VSEN7 */ 113 {0x17, 0x7e, 0x7f}, /* VSEN8 */ 114 {0x18, 0x80, 0x81}, /* VSEN9 */ 115 {0x19, 0x82, 0x83}, /* VSEN10 */ 116 {0x1A, 0x84, 0x85}, /* VSEN11 */ 117 {0x1B, 0x86, 0x87}, /* VTT */ 118 {0x1C, 0x88, 0x89}, /* 3VDD */ 119 {0x1D, 0x8a, 0x8b}, /* 3VSB */ 120 {0x1E, 0x8c, 0x8d}, /* VBAT */ 121 {0x1F, 0xa6, 0xa7}, /* VSEN12 */ 122 {0x20, 0xaa, 0xab}, /* VSEN13 */ 123 {0x21, 0x96, 0x97}, /* VSEN14 */ 124 {0x22, 0x9a, 0x9b}, /* VSEN15 */ 125 {0x23, 0x9e, 0x9f}, /* VSEN16 */ 126 {0x24, 0xa2, 0xa3}, /* VSEN17 */ 127}; 128#define W83795_REG_VRLSB 0x3C 129#define VRLSB_SHIFT 6 130 131static const u8 W83795_REG_IN_HL_LSB[] = { 132 0x8e, /* VSEN1-4 */ 133 0x90, /* VSEN5-8 */ 134 0x92, /* VSEN9-11 */ 135 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */ 136 0xa8, /* VSEN12 */ 137 0xac, /* VSEN13 */ 138 0x98, /* VSEN14 */ 139 0x9c, /* VSEN15 */ 140 0xa0, /* VSEN16 */ 141 0xa4, /* VSEN17 */ 142}; 143 144#define IN_LSB_REG(index, type) \ 145 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \ 146 : (W83795_REG_IN_HL_LSB[(index)] + 1)) 147 148#define IN_LSB_REG_NUM 10 149 150#define IN_LSB_SHIFT 0 151#define IN_LSB_IDX 1 152static const u8 IN_LSB_SHIFT_IDX[][2] = { 153 /* High/Low LSB shift, LSB No. */ 154 {0x00, 0x00}, /* VSEN1 */ 155 {0x02, 0x00}, /* VSEN2 */ 156 {0x04, 0x00}, /* VSEN3 */ 157 {0x06, 0x00}, /* VSEN4 */ 158 {0x00, 0x01}, /* VSEN5 */ 159 {0x02, 0x01}, /* VSEN6 */ 160 {0x04, 0x01}, /* VSEN7 */ 161 {0x06, 0x01}, /* VSEN8 */ 162 {0x00, 0x02}, /* VSEN9 */ 163 {0x02, 0x02}, /* VSEN10 */ 164 {0x04, 0x02}, /* VSEN11 */ 165 {0x00, 0x03}, /* VTT */ 166 {0x02, 0x03}, /* 3VDD */ 167 {0x04, 0x03}, /* 3VSB */ 168 {0x06, 0x03}, /* VBAT */ 169 {0x06, 0x04}, /* VSEN12 */ 170 {0x06, 0x05}, /* VSEN13 */ 171 {0x06, 0x06}, /* VSEN14 */ 172 {0x06, 0x07}, /* VSEN15 */ 173 {0x06, 0x08}, /* VSEN16 */ 174 {0x06, 0x09}, /* VSEN17 */ 175}; 176 177 178/* 3VDD, 3VSB, VBAT * 0.006 */ 179#define REST_VLT_BEGIN 12 /* the 13th volt to 15th */ 180#define REST_VLT_END 14 /* the 13th volt to 15th */ 181 182#define W83795_REG_FAN(index) (0x2E + (index)) 183#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index)) 184#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2) 185#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \ 186 (((index) % 1) ? 4 : 0) 187 188#define W83795_REG_VID_CTRL 0x6A 189 190#define ALARM_BEEP_REG_NUM 6 191#define W83795_REG_ALARM(index) (0x41 + (index)) 192#define W83795_REG_BEEP(index) (0x50 + (index)) 193 194#define W83795_REG_CLR_CHASSIS 0x4D 195 196 197#define W83795_REG_TEMP_NUM 6 198#define W83795_REG_FCMS1 0x201 199#define W83795_REG_FCMS2 0x208 200#define W83795_REG_TFMR(index) (0x202 + (index)) 201#define W83795_REG_FOMC 0x20F 202#define W83795_REG_FOPFP(index) (0x218 + (index)) 203 204#define W83795_REG_TSS(index) (0x209 + (index)) 205 206#define PWM_OUTPUT 0 207#define PWM_START 1 208#define PWM_NONSTOP 2 209#define PWM_STOP_TIME 3 210#define PWM_DIV 4 211#define W83795_REG_PWM(index, nr) \ 212 (((nr) == 0 ? 0x210 : \ 213 (nr) == 1 ? 0x220 : \ 214 (nr) == 2 ? 0x228 : \ 215 (nr) == 3 ? 0x230 : 0x218) + (index)) 216 217#define W83795_REG_FOPFP_DIV(index) \ 218 (((index) < 8) ? ((index) + 1) : \ 219 ((index) == 8) ? 12 : \ 220 (16 << ((index) - 9))) 221 222#define W83795_REG_FTSH(index) (0x240 + (index) * 2) 223#define W83795_REG_FTSL(index) (0x241 + (index) * 2) 224#define W83795_REG_TFTS 0x250 225 226#define TEMP_PWM_TTTI 0 227#define TEMP_PWM_CTFS 1 228#define TEMP_PWM_HCT 2 229#define TEMP_PWM_HOT 3 230#define W83795_REG_TTTI(index) (0x260 + (index)) 231#define W83795_REG_CTFS(index) (0x268 + (index)) 232#define W83795_REG_HT(index) (0x270 + (index)) 233 234#define SF4_TEMP 0 235#define SF4_PWM 1 236#define W83795_REG_SF4_TEMP(temp_num, index) \ 237 (0x280 + 0x10 * (temp_num) + (index)) 238#define W83795_REG_SF4_PWM(temp_num, index) \ 239 (0x288 + 0x10 * (temp_num) + (index)) 240 241#define W83795_REG_DTSC 0x301 242#define W83795_REG_DTSE 0x302 243#define W83795_REG_DTS(index) (0x26 + (index)) 244 245#define DTS_CRIT 0 246#define DTS_CRIT_HYST 1 247#define DTS_WARN 2 248#define DTS_WARN_HYST 3 249#define W83795_REG_DTS_EXT(index) (0xB2 + (index)) 250 251#define SETUP_PWM_DEFAULT 0 252#define SETUP_PWM_UPTIME 1 253#define SETUP_PWM_DOWNTIME 2 254#define W83795_REG_SETUP_PWM(index) (0x20C + (index)) 255 256static inline u16 in_from_reg(u8 index, u16 val) 257{ 258 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END)) 259 return val * 6; 260 else 261 return val * 2; 262} 263 264static inline u16 in_to_reg(u8 index, u16 val) 265{ 266 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END)) 267 return val / 6; 268 else 269 return val / 2; 270} 271 272static inline unsigned long fan_from_reg(u16 val) 273{ 274 if ((val >= 0xff0) || (val == 0)) 275 return 0; 276 return 1350000UL / val; 277} 278 279static inline u16 fan_to_reg(long rpm) 280{ 281 if (rpm <= 0) 282 return 0x0fff; 283 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); 284} 285 286static inline unsigned long time_from_reg(u8 reg) 287{ 288 return reg * 100; 289} 290 291static inline u8 time_to_reg(unsigned long val) 292{ 293 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff); 294} 295 296static inline long temp_from_reg(s8 reg) 297{ 298 return reg * 1000; 299} 300 301static inline s8 temp_to_reg(long val, s8 min, s8 max) 302{ 303 return SENSORS_LIMIT((val < 0 ? -val : val) / 1000, min, max); 304} 305 306 307enum chip_types {w83795g, w83795adg}; 308 309struct w83795_data { 310 struct device *hwmon_dev; 311 struct mutex update_lock; 312 unsigned long last_updated; /* In jiffies */ 313 enum chip_types chip_type; 314 315 u8 bank; 316 317 u32 has_in; /* Enable monitor VIN or not */ 318 u16 in[21][3]; /* Register value, read/high/low */ 319 u8 in_lsb[10][3]; /* LSB Register value, high/low */ 320 u8 has_gain; /* has gain: in17-20 * 8 */ 321 322 u16 has_fan; /* Enable fan14-1 or not */ 323 u16 fan[14]; /* Register value combine */ 324 u16 fan_min[14]; /* Register value combine */ 325 326 u8 has_temp; /* Enable monitor temp6-1 or not */ 327 u8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */ 328 u8 temp_read_vrlsb[6]; 329 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */ 330 u8 temp_src[3]; /* Register value */ 331 332 u8 enable_dts; /* Enable PECI and SB-TSI, 333 * bit 0: =1 enable, =0 disable, 334 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */ 335 u8 has_dts; /* Enable monitor DTS temp */ 336 u8 dts[8]; /* Register value */ 337 u8 dts_read_vrlsb[8]; /* Register value */ 338 u8 dts_ext[4]; /* Register value */ 339 340 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2, 341 * no config register, only affected by chip 342 * type */ 343 u8 pwm[8][5]; /* Register value, output, start, non stop, stop 344 * time, div */ 345 u8 pwm_fcms[2]; /* Register value */ 346 u8 pwm_tfmr[6]; /* Register value */ 347 u8 pwm_fomc; /* Register value */ 348 349 u16 target_speed[8]; /* Register value, target speed for speed 350 * cruise */ 351 u8 tol_speed; /* tolerance of target speed */ 352 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */ 353 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */ 354 355 u8 setup_pwm[3]; /* Register value */ 356 357 u8 alarms[6]; /* Register value */ 358 u8 beeps[6]; /* Register value */ 359 u8 beep_enable; 360 361 char valid; 362}; 363 364/* 365 * Hardware access 366 * We assume that nobdody can change the bank outside the driver. 367 */ 368 369/* Must be called with data->update_lock held, except during initialization */ 370static int w83795_set_bank(struct i2c_client *client, u8 bank) 371{ 372 struct w83795_data *data = i2c_get_clientdata(client); 373 int err; 374 375 /* If the same bank is already set, nothing to do */ 376 if ((data->bank & 0x07) == bank) 377 return 0; 378 379 /* Change to new bank, preserve all other bits */ 380 bank |= data->bank & ~0x07; 381 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank); 382 if (err < 0) { 383 dev_err(&client->dev, 384 "Failed to set bank to %d, err %d\n", 385 (int)bank, err); 386 return err; 387 } 388 data->bank = bank; 389 390 return 0; 391} 392 393/* Must be called with data->update_lock held, except during initialization */ 394static u8 w83795_read(struct i2c_client *client, u16 reg) 395{ 396 int err; 397 398 err = w83795_set_bank(client, reg >> 8); 399 if (err < 0) 400 return 0x00; /* Arbitrary */ 401 402 err = i2c_smbus_read_byte_data(client, reg & 0xff); 403 if (err < 0) { 404 dev_err(&client->dev, 405 "Failed to read from register 0x%03x, err %d\n", 406 (int)reg, err); 407 return 0x00; /* Arbitrary */ 408 } 409 return err; 410} 411 412/* Must be called with data->update_lock held, except during initialization */ 413static int w83795_write(struct i2c_client *client, u16 reg, u8 value) 414{ 415 int err; 416 417 err = w83795_set_bank(client, reg >> 8); 418 if (err < 0) 419 return err; 420 421 err = i2c_smbus_write_byte_data(client, reg & 0xff, value); 422 if (err < 0) 423 dev_err(&client->dev, 424 "Failed to write to register 0x%03x, err %d\n", 425 (int)reg, err); 426 return err; 427} 428 429static struct w83795_data *w83795_update_device(struct device *dev) 430{ 431 struct i2c_client *client = to_i2c_client(dev); 432 struct w83795_data *data = i2c_get_clientdata(client); 433 u16 tmp; 434 int i; 435 436 mutex_lock(&data->update_lock); 437 438 if (!(time_after(jiffies, data->last_updated + HZ * 2) 439 || !data->valid)) 440 goto END; 441 442 /* Update the voltages value */ 443 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 444 if (!(data->has_in & (1 << i))) 445 continue; 446 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 447 tmp |= (w83795_read(client, W83795_REG_VRLSB) 448 >> VRLSB_SHIFT) & 0x03; 449 data->in[i][IN_READ] = tmp; 450 } 451 452 /* Update fan */ 453 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 454 if (!(data->has_fan & (1 << i))) 455 continue; 456 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 457 data->fan[i] |= 458 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F; 459 } 460 461 /* Update temperature */ 462 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 463 /* even stop monitor, register still keep value, just read out 464 * it */ 465 if (!(data->has_temp & (1 << i))) { 466 data->temp[i][TEMP_READ] = 0; 467 data->temp_read_vrlsb[i] = 0; 468 continue; 469 } 470 data->temp[i][TEMP_READ] = 471 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 472 data->temp_read_vrlsb[i] = 473 w83795_read(client, W83795_REG_VRLSB); 474 } 475 476 /* Update dts temperature */ 477 if (data->enable_dts != 0) { 478 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 479 if (!(data->has_dts & (1 << i))) 480 continue; 481 data->dts[i] = 482 w83795_read(client, W83795_REG_DTS(i)); 483 data->dts_read_vrlsb[i] = 484 w83795_read(client, W83795_REG_VRLSB); 485 } 486 } 487 488 /* Update pwm output */ 489 for (i = 0; i < data->has_pwm; i++) { 490 data->pwm[i][PWM_OUTPUT] = 491 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT)); 492 } 493 494 /* update alarm */ 495 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) 496 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 497 498 data->last_updated = jiffies; 499 data->valid = 1; 500 501END: 502 mutex_unlock(&data->update_lock); 503 return data; 504} 505 506/* 507 * Sysfs attributes 508 */ 509 510#define ALARM_STATUS 0 511#define BEEP_ENABLE 1 512static ssize_t 513show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) 514{ 515 struct w83795_data *data = w83795_update_device(dev); 516 struct sensor_device_attribute_2 *sensor_attr = 517 to_sensor_dev_attr_2(attr); 518 int nr = sensor_attr->nr; 519 int index = sensor_attr->index >> 3; 520 int bit = sensor_attr->index & 0x07; 521 u8 val; 522 523 if (ALARM_STATUS == nr) { 524 val = (data->alarms[index] >> (bit)) & 1; 525 } else { /* BEEP_ENABLE */ 526 val = (data->beeps[index] >> (bit)) & 1; 527 } 528 529 return sprintf(buf, "%u\n", val); 530} 531 532static ssize_t 533store_beep(struct device *dev, struct device_attribute *attr, 534 const char *buf, size_t count) 535{ 536 struct i2c_client *client = to_i2c_client(dev); 537 struct w83795_data *data = i2c_get_clientdata(client); 538 struct sensor_device_attribute_2 *sensor_attr = 539 to_sensor_dev_attr_2(attr); 540 int index = sensor_attr->index >> 3; 541 int shift = sensor_attr->index & 0x07; 542 u8 beep_bit = 1 << shift; 543 unsigned long val; 544 545 if (strict_strtoul(buf, 10, &val) < 0) 546 return -EINVAL; 547 if (val != 0 && val != 1) 548 return -EINVAL; 549 550 mutex_lock(&data->update_lock); 551 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index)); 552 data->beeps[index] &= ~beep_bit; 553 data->beeps[index] |= val << shift; 554 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]); 555 mutex_unlock(&data->update_lock); 556 557 return count; 558} 559 560static ssize_t 561show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf) 562{ 563 struct i2c_client *client = to_i2c_client(dev); 564 struct w83795_data *data = i2c_get_clientdata(client); 565 return sprintf(buf, "%u\n", data->beep_enable); 566} 567 568static ssize_t 569store_beep_enable(struct device *dev, struct device_attribute *attr, 570 const char *buf, size_t count) 571{ 572 struct i2c_client *client = to_i2c_client(dev); 573 struct w83795_data *data = i2c_get_clientdata(client); 574 unsigned long val; 575 u8 tmp; 576 577 if (strict_strtoul(buf, 10, &val) < 0) 578 return -EINVAL; 579 if (val != 0 && val != 1) 580 return -EINVAL; 581 582 mutex_lock(&data->update_lock); 583 data->beep_enable = val; 584 tmp = w83795_read(client, W83795_REG_BEEP(5)); 585 tmp &= 0x7f; 586 tmp |= val << 7; 587 w83795_write(client, W83795_REG_BEEP(5), tmp); 588 mutex_unlock(&data->update_lock); 589 590 return count; 591} 592 593/* Write any value to clear chassis alarm */ 594static ssize_t 595store_chassis_clear(struct device *dev, 596 struct device_attribute *attr, const char *buf, 597 size_t count) 598{ 599 struct i2c_client *client = to_i2c_client(dev); 600 struct w83795_data *data = i2c_get_clientdata(client); 601 u8 val; 602 603 mutex_lock(&data->update_lock); 604 val = w83795_read(client, W83795_REG_CLR_CHASSIS); 605 val |= 0x80; 606 w83795_write(client, W83795_REG_CLR_CHASSIS, val); 607 mutex_unlock(&data->update_lock); 608 return count; 609} 610 611#define FAN_INPUT 0 612#define FAN_MIN 1 613static ssize_t 614show_fan(struct device *dev, struct device_attribute *attr, char *buf) 615{ 616 struct sensor_device_attribute_2 *sensor_attr = 617 to_sensor_dev_attr_2(attr); 618 int nr = sensor_attr->nr; 619 int index = sensor_attr->index; 620 struct w83795_data *data = w83795_update_device(dev); 621 u16 val; 622 623 if (FAN_INPUT == nr) 624 val = data->fan[index] & 0x0fff; 625 else 626 val = data->fan_min[index] & 0x0fff; 627 628 return sprintf(buf, "%lu\n", fan_from_reg(val)); 629} 630 631static ssize_t 632store_fan_min(struct device *dev, struct device_attribute *attr, 633 const char *buf, size_t count) 634{ 635 struct sensor_device_attribute_2 *sensor_attr = 636 to_sensor_dev_attr_2(attr); 637 int index = sensor_attr->index; 638 struct i2c_client *client = to_i2c_client(dev); 639 struct w83795_data *data = i2c_get_clientdata(client); 640 unsigned long val; 641 642 if (strict_strtoul(buf, 10, &val)) 643 return -EINVAL; 644 val = fan_to_reg(val); 645 646 mutex_lock(&data->update_lock); 647 data->fan_min[index] = val; 648 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff); 649 val &= 0x0f; 650 if (index % 1) { 651 val <<= 4; 652 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 653 & 0x0f; 654 } else { 655 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 656 & 0xf0; 657 } 658 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff); 659 mutex_unlock(&data->update_lock); 660 661 return count; 662} 663 664static ssize_t 665show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 666{ 667 struct w83795_data *data = w83795_update_device(dev); 668 struct sensor_device_attribute_2 *sensor_attr = 669 to_sensor_dev_attr_2(attr); 670 int nr = sensor_attr->nr; 671 int index = sensor_attr->index; 672 u16 val; 673 674 switch (nr) { 675 case PWM_STOP_TIME: 676 val = time_from_reg(data->pwm[index][nr]); 677 break; 678 case PWM_DIV: 679 val = W83795_REG_FOPFP_DIV(data->pwm[index][nr] & 0x0f); 680 break; 681 default: 682 val = data->pwm[index][nr]; 683 break; 684 } 685 686 return sprintf(buf, "%u\n", val); 687} 688 689static ssize_t 690store_pwm(struct device *dev, struct device_attribute *attr, 691 const char *buf, size_t count) 692{ 693 struct i2c_client *client = to_i2c_client(dev); 694 struct w83795_data *data = i2c_get_clientdata(client); 695 struct sensor_device_attribute_2 *sensor_attr = 696 to_sensor_dev_attr_2(attr); 697 int nr = sensor_attr->nr; 698 int index = sensor_attr->index; 699 unsigned long val; 700 int i; 701 702 if (strict_strtoul(buf, 10, &val) < 0) 703 return -EINVAL; 704 705 mutex_lock(&data->update_lock); 706 switch (nr) { 707 case PWM_STOP_TIME: 708 val = time_to_reg(val); 709 break; 710 case PWM_DIV: 711 for (i = 0; i < 16; i++) { 712 if (W83795_REG_FOPFP_DIV(i) == val) { 713 val = i; 714 break; 715 } 716 } 717 if (i >= 16) 718 goto err_end; 719 val |= w83795_read(client, W83795_REG_PWM(index, nr)) & 0x80; 720 break; 721 default: 722 val = SENSORS_LIMIT(val, 0, 0xff); 723 break; 724 } 725 w83795_write(client, W83795_REG_PWM(index, nr), val); 726 data->pwm[index][nr] = val & 0xff; 727 mutex_unlock(&data->update_lock); 728 return count; 729err_end: 730 mutex_unlock(&data->update_lock); 731 return -EINVAL; 732} 733 734static ssize_t 735show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 736{ 737 struct sensor_device_attribute_2 *sensor_attr = 738 to_sensor_dev_attr_2(attr); 739 struct i2c_client *client = to_i2c_client(dev); 740 struct w83795_data *data = i2c_get_clientdata(client); 741 int index = sensor_attr->index; 742 u8 tmp; 743 744 if (1 == (data->pwm_fcms[0] & (1 << index))) { 745 tmp = 2; 746 goto out; 747 } 748 for (tmp = 0; tmp < 6; tmp++) { 749 if (data->pwm_tfmr[tmp] & (1 << index)) { 750 tmp = 3; 751 goto out; 752 } 753 } 754 if (data->pwm_fomc & (1 << index)) 755 tmp = 0; 756 else 757 tmp = 1; 758 759out: 760 return sprintf(buf, "%u\n", tmp); 761} 762 763static ssize_t 764store_pwm_enable(struct device *dev, struct device_attribute *attr, 765 const char *buf, size_t count) 766{ 767 struct i2c_client *client = to_i2c_client(dev); 768 struct w83795_data *data = i2c_get_clientdata(client); 769 struct sensor_device_attribute_2 *sensor_attr = 770 to_sensor_dev_attr_2(attr); 771 int index = sensor_attr->index; 772 unsigned long val; 773 int i; 774 775 if (strict_strtoul(buf, 10, &val) < 0) 776 return -EINVAL; 777 if (val > 2) 778 return -EINVAL; 779 780 mutex_lock(&data->update_lock); 781 switch (val) { 782 case 0: 783 case 1: 784 data->pwm_fcms[0] &= ~(1 << index); 785 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 786 for (i = 0; i < 6; i++) { 787 data->pwm_tfmr[i] &= ~(1 << index); 788 w83795_write(client, W83795_REG_TFMR(i), 789 data->pwm_tfmr[i]); 790 } 791 data->pwm_fomc |= 1 << index; 792 data->pwm_fomc ^= val << index; 793 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc); 794 break; 795 case 2: 796 data->pwm_fcms[0] |= (1 << index); 797 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 798 break; 799 } 800 mutex_unlock(&data->update_lock); 801 return count; 802} 803 804static ssize_t 805show_temp_src(struct device *dev, struct device_attribute *attr, char *buf) 806{ 807 struct sensor_device_attribute_2 *sensor_attr = 808 to_sensor_dev_attr_2(attr); 809 struct i2c_client *client = to_i2c_client(dev); 810 struct w83795_data *data = i2c_get_clientdata(client); 811 int index = sensor_attr->index; 812 u8 val = index / 2; 813 u8 tmp = data->temp_src[val]; 814 815 if (index % 1) 816 val = 4; 817 else 818 val = 0; 819 tmp >>= val; 820 tmp &= 0x0f; 821 822 return sprintf(buf, "%u\n", tmp); 823} 824 825static ssize_t 826store_temp_src(struct device *dev, struct device_attribute *attr, 827 const char *buf, size_t count) 828{ 829 struct i2c_client *client = to_i2c_client(dev); 830 struct w83795_data *data = i2c_get_clientdata(client); 831 struct sensor_device_attribute_2 *sensor_attr = 832 to_sensor_dev_attr_2(attr); 833 int index = sensor_attr->index; 834 unsigned long tmp; 835 u8 val = index / 2; 836 837 if (strict_strtoul(buf, 10, &tmp) < 0) 838 return -EINVAL; 839 tmp = SENSORS_LIMIT(tmp, 0, 15); 840 841 mutex_lock(&data->update_lock); 842 if (index % 1) { 843 tmp <<= 4; 844 data->temp_src[val] &= 0x0f; 845 } else { 846 data->temp_src[val] &= 0xf0; 847 } 848 data->temp_src[val] |= tmp; 849 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]); 850 mutex_unlock(&data->update_lock); 851 852 return count; 853} 854 855#define TEMP_PWM_ENABLE 0 856#define TEMP_PWM_FAN_MAP 1 857static ssize_t 858show_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 859 char *buf) 860{ 861 struct i2c_client *client = to_i2c_client(dev); 862 struct w83795_data *data = i2c_get_clientdata(client); 863 struct sensor_device_attribute_2 *sensor_attr = 864 to_sensor_dev_attr_2(attr); 865 int nr = sensor_attr->nr; 866 int index = sensor_attr->index; 867 u8 tmp = 0xff; 868 869 switch (nr) { 870 case TEMP_PWM_ENABLE: 871 tmp = (data->pwm_fcms[1] >> index) & 1; 872 if (tmp) 873 tmp = 4; 874 else 875 tmp = 3; 876 break; 877 case TEMP_PWM_FAN_MAP: 878 tmp = data->pwm_tfmr[index]; 879 break; 880 } 881 882 return sprintf(buf, "%u\n", tmp); 883} 884 885static ssize_t 886store_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 887 const char *buf, size_t count) 888{ 889 struct i2c_client *client = to_i2c_client(dev); 890 struct w83795_data *data = i2c_get_clientdata(client); 891 struct sensor_device_attribute_2 *sensor_attr = 892 to_sensor_dev_attr_2(attr); 893 int nr = sensor_attr->nr; 894 int index = sensor_attr->index; 895 unsigned long tmp; 896 897 if (strict_strtoul(buf, 10, &tmp) < 0) 898 return -EINVAL; 899 900 switch (nr) { 901 case TEMP_PWM_ENABLE: 902 if ((tmp != 3) && (tmp != 4)) 903 return -EINVAL; 904 tmp -= 3; 905 mutex_lock(&data->update_lock); 906 data->pwm_fcms[1] &= ~(1 << index); 907 data->pwm_fcms[1] |= tmp << index; 908 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]); 909 mutex_unlock(&data->update_lock); 910 break; 911 case TEMP_PWM_FAN_MAP: 912 mutex_lock(&data->update_lock); 913 tmp = SENSORS_LIMIT(tmp, 0, 0xff); 914 w83795_write(client, W83795_REG_TFMR(index), tmp); 915 data->pwm_tfmr[index] = tmp; 916 mutex_unlock(&data->update_lock); 917 break; 918 } 919 return count; 920} 921 922#define FANIN_TARGET 0 923#define FANIN_TOL 1 924static ssize_t 925show_fanin(struct device *dev, struct device_attribute *attr, char *buf) 926{ 927 struct i2c_client *client = to_i2c_client(dev); 928 struct w83795_data *data = i2c_get_clientdata(client); 929 struct sensor_device_attribute_2 *sensor_attr = 930 to_sensor_dev_attr_2(attr); 931 int nr = sensor_attr->nr; 932 int index = sensor_attr->index; 933 u16 tmp = 0; 934 935 switch (nr) { 936 case FANIN_TARGET: 937 tmp = fan_from_reg(data->target_speed[index]); 938 break; 939 case FANIN_TOL: 940 tmp = data->tol_speed; 941 break; 942 } 943 944 return sprintf(buf, "%u\n", tmp); 945} 946 947static ssize_t 948store_fanin(struct device *dev, struct device_attribute *attr, 949 const char *buf, size_t count) 950{ 951 struct i2c_client *client = to_i2c_client(dev); 952 struct w83795_data *data = i2c_get_clientdata(client); 953 struct sensor_device_attribute_2 *sensor_attr = 954 to_sensor_dev_attr_2(attr); 955 int nr = sensor_attr->nr; 956 int index = sensor_attr->index; 957 unsigned long val; 958 959 if (strict_strtoul(buf, 10, &val) < 0) 960 return -EINVAL; 961 962 mutex_lock(&data->update_lock); 963 switch (nr) { 964 case FANIN_TARGET: 965 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff)); 966 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff); 967 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0); 968 data->target_speed[index] = val; 969 break; 970 case FANIN_TOL: 971 val = SENSORS_LIMIT(val, 0, 0x3f); 972 w83795_write(client, W83795_REG_TFTS, val); 973 data->tol_speed = val; 974 break; 975 } 976 mutex_unlock(&data->update_lock); 977 978 return count; 979} 980 981 982static ssize_t 983show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf) 984{ 985 struct i2c_client *client = to_i2c_client(dev); 986 struct w83795_data *data = i2c_get_clientdata(client); 987 struct sensor_device_attribute_2 *sensor_attr = 988 to_sensor_dev_attr_2(attr); 989 int nr = sensor_attr->nr; 990 int index = sensor_attr->index; 991 long tmp = temp_from_reg(data->pwm_temp[index][nr]); 992 993 return sprintf(buf, "%ld\n", tmp); 994} 995 996static ssize_t 997store_temp_pwm(struct device *dev, struct device_attribute *attr, 998 const char *buf, size_t count) 999{ 1000 struct i2c_client *client = to_i2c_client(dev); 1001 struct w83795_data *data = i2c_get_clientdata(client); 1002 struct sensor_device_attribute_2 *sensor_attr = 1003 to_sensor_dev_attr_2(attr); 1004 int nr = sensor_attr->nr; 1005 int index = sensor_attr->index; 1006 unsigned long val; 1007 u8 tmp; 1008 1009 if (strict_strtoul(buf, 10, &val) < 0) 1010 return -EINVAL; 1011 val /= 1000; 1012 1013 mutex_lock(&data->update_lock); 1014 switch (nr) { 1015 case TEMP_PWM_TTTI: 1016 val = SENSORS_LIMIT(val, 0, 0x7f); 1017 w83795_write(client, W83795_REG_TTTI(index), val); 1018 break; 1019 case TEMP_PWM_CTFS: 1020 val = SENSORS_LIMIT(val, 0, 0x7f); 1021 w83795_write(client, W83795_REG_CTFS(index), val); 1022 break; 1023 case TEMP_PWM_HCT: 1024 val = SENSORS_LIMIT(val, 0, 0x0f); 1025 tmp = w83795_read(client, W83795_REG_HT(index)); 1026 tmp &= 0x0f; 1027 tmp |= (val << 4) & 0xf0; 1028 w83795_write(client, W83795_REG_HT(index), tmp); 1029 break; 1030 case TEMP_PWM_HOT: 1031 val = SENSORS_LIMIT(val, 0, 0x0f); 1032 tmp = w83795_read(client, W83795_REG_HT(index)); 1033 tmp &= 0xf0; 1034 tmp |= val & 0x0f; 1035 w83795_write(client, W83795_REG_HT(index), tmp); 1036 break; 1037 } 1038 data->pwm_temp[index][nr] = val; 1039 mutex_unlock(&data->update_lock); 1040 1041 return count; 1042} 1043 1044static ssize_t 1045show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1046{ 1047 struct i2c_client *client = to_i2c_client(dev); 1048 struct w83795_data *data = i2c_get_clientdata(client); 1049 struct sensor_device_attribute_2 *sensor_attr = 1050 to_sensor_dev_attr_2(attr); 1051 int nr = sensor_attr->nr; 1052 int index = sensor_attr->index; 1053 1054 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]); 1055} 1056 1057static ssize_t 1058store_sf4_pwm(struct device *dev, struct device_attribute *attr, 1059 const char *buf, size_t count) 1060{ 1061 struct i2c_client *client = to_i2c_client(dev); 1062 struct w83795_data *data = i2c_get_clientdata(client); 1063 struct sensor_device_attribute_2 *sensor_attr = 1064 to_sensor_dev_attr_2(attr); 1065 int nr = sensor_attr->nr; 1066 int index = sensor_attr->index; 1067 unsigned long val; 1068 1069 if (strict_strtoul(buf, 10, &val) < 0) 1070 return -EINVAL; 1071 1072 mutex_lock(&data->update_lock); 1073 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val); 1074 data->sf4_reg[index][SF4_PWM][nr] = val; 1075 mutex_unlock(&data->update_lock); 1076 1077 return count; 1078} 1079 1080static ssize_t 1081show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf) 1082{ 1083 struct i2c_client *client = to_i2c_client(dev); 1084 struct w83795_data *data = i2c_get_clientdata(client); 1085 struct sensor_device_attribute_2 *sensor_attr = 1086 to_sensor_dev_attr_2(attr); 1087 int nr = sensor_attr->nr; 1088 int index = sensor_attr->index; 1089 1090 return sprintf(buf, "%u\n", 1091 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000); 1092} 1093 1094static ssize_t 1095store_sf4_temp(struct device *dev, struct device_attribute *attr, 1096 const char *buf, size_t count) 1097{ 1098 struct i2c_client *client = to_i2c_client(dev); 1099 struct w83795_data *data = i2c_get_clientdata(client); 1100 struct sensor_device_attribute_2 *sensor_attr = 1101 to_sensor_dev_attr_2(attr); 1102 int nr = sensor_attr->nr; 1103 int index = sensor_attr->index; 1104 unsigned long val; 1105 1106 if (strict_strtoul(buf, 10, &val) < 0) 1107 return -EINVAL; 1108 val /= 1000; 1109 1110 mutex_lock(&data->update_lock); 1111 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val); 1112 data->sf4_reg[index][SF4_TEMP][nr] = val; 1113 mutex_unlock(&data->update_lock); 1114 1115 return count; 1116} 1117 1118 1119static ssize_t 1120show_temp(struct device *dev, struct device_attribute *attr, char *buf) 1121{ 1122 struct sensor_device_attribute_2 *sensor_attr = 1123 to_sensor_dev_attr_2(attr); 1124 int nr = sensor_attr->nr; 1125 int index = sensor_attr->index; 1126 struct w83795_data *data = w83795_update_device(dev); 1127 long temp = temp_from_reg(data->temp[index][nr] & 0x7f); 1128 1129 if (TEMP_READ == nr) 1130 temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) 1131 * 250; 1132 if (data->temp[index][nr] & 0x80) 1133 temp = -temp; 1134 return sprintf(buf, "%ld\n", temp); 1135} 1136 1137static ssize_t 1138store_temp(struct device *dev, struct device_attribute *attr, 1139 const char *buf, size_t count) 1140{ 1141 struct sensor_device_attribute_2 *sensor_attr = 1142 to_sensor_dev_attr_2(attr); 1143 int nr = sensor_attr->nr; 1144 int index = sensor_attr->index; 1145 struct i2c_client *client = to_i2c_client(dev); 1146 struct w83795_data *data = i2c_get_clientdata(client); 1147 long tmp; 1148 1149 if (strict_strtol(buf, 10, &tmp) < 0) 1150 return -EINVAL; 1151 1152 mutex_lock(&data->update_lock); 1153 data->temp[index][nr] = temp_to_reg(tmp, -128, 127); 1154 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]); 1155 mutex_unlock(&data->update_lock); 1156 return count; 1157} 1158 1159 1160static ssize_t 1161show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf) 1162{ 1163 struct i2c_client *client = to_i2c_client(dev); 1164 struct w83795_data *data = i2c_get_clientdata(client); 1165 struct sensor_device_attribute_2 *sensor_attr = 1166 to_sensor_dev_attr_2(attr); 1167 int index = sensor_attr->index; 1168 u8 tmp; 1169 1170 if (data->enable_dts == 0) 1171 return sprintf(buf, "%d\n", 0); 1172 1173 if ((data->has_dts >> index) & 0x01) { 1174 if (data->enable_dts & 2) 1175 tmp = 5; 1176 else 1177 tmp = 6; 1178 } else { 1179 tmp = 0; 1180 } 1181 1182 return sprintf(buf, "%d\n", tmp); 1183} 1184 1185static ssize_t 1186show_dts(struct device *dev, struct device_attribute *attr, char *buf) 1187{ 1188 struct sensor_device_attribute_2 *sensor_attr = 1189 to_sensor_dev_attr_2(attr); 1190 int index = sensor_attr->index; 1191 struct w83795_data *data = w83795_update_device(dev); 1192 long temp = temp_from_reg(data->dts[index] & 0x7f); 1193 1194 temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250; 1195 if (data->dts[index] & 0x80) 1196 temp = -temp; 1197 return sprintf(buf, "%ld\n", temp); 1198} 1199 1200static ssize_t 1201show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf) 1202{ 1203 struct sensor_device_attribute_2 *sensor_attr = 1204 to_sensor_dev_attr_2(attr); 1205 int nr = sensor_attr->nr; 1206 struct i2c_client *client = to_i2c_client(dev); 1207 struct w83795_data *data = i2c_get_clientdata(client); 1208 long temp = temp_from_reg(data->dts_ext[nr] & 0x7f); 1209 1210 if (data->dts_ext[nr] & 0x80) 1211 temp = -temp; 1212 return sprintf(buf, "%ld\n", temp); 1213} 1214 1215static ssize_t 1216store_dts_ext(struct device *dev, struct device_attribute *attr, 1217 const char *buf, size_t count) 1218{ 1219 struct sensor_device_attribute_2 *sensor_attr = 1220 to_sensor_dev_attr_2(attr); 1221 int nr = sensor_attr->nr; 1222 struct i2c_client *client = to_i2c_client(dev); 1223 struct w83795_data *data = i2c_get_clientdata(client); 1224 long tmp; 1225 1226 if (strict_strtol(buf, 10, &tmp) < 0) 1227 return -EINVAL; 1228 1229 mutex_lock(&data->update_lock); 1230 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127); 1231 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]); 1232 mutex_unlock(&data->update_lock); 1233 return count; 1234} 1235 1236 1237/* 1238 Type 3: Thermal diode 1239 Type 4: Thermistor 1240 1241 Temp5-6, default TR 1242 Temp1-4, default TD 1243*/ 1244 1245static ssize_t 1246show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) 1247{ 1248 struct i2c_client *client = to_i2c_client(dev); 1249 struct w83795_data *data = i2c_get_clientdata(client); 1250 struct sensor_device_attribute_2 *sensor_attr = 1251 to_sensor_dev_attr_2(attr); 1252 int index = sensor_attr->index; 1253 u8 tmp; 1254 1255 if (data->has_temp >> index & 0x01) { 1256 if (data->temp_mode >> index & 0x01) 1257 tmp = 3; 1258 else 1259 tmp = 4; 1260 } else { 1261 tmp = 0; 1262 } 1263 1264 return sprintf(buf, "%d\n", tmp); 1265} 1266 1267static ssize_t 1268store_temp_mode(struct device *dev, struct device_attribute *attr, 1269 const char *buf, size_t count) 1270{ 1271 struct i2c_client *client = to_i2c_client(dev); 1272 struct w83795_data *data = i2c_get_clientdata(client); 1273 struct sensor_device_attribute_2 *sensor_attr = 1274 to_sensor_dev_attr_2(attr); 1275 int index = sensor_attr->index; 1276 unsigned long val; 1277 u8 tmp; 1278 u32 mask; 1279 1280 if (strict_strtoul(buf, 10, &val) < 0) 1281 return -EINVAL; 1282 if ((val != 4) && (val != 3)) 1283 return -EINVAL; 1284 if ((index > 3) && (val == 3)) 1285 return -EINVAL; 1286 1287 mutex_lock(&data->update_lock); 1288 if (val == 3) { 1289 val = TEMP_CTRL_TD; 1290 data->has_temp |= 1 << index; 1291 data->temp_mode |= 1 << index; 1292 } else if (val == 4) { 1293 val = TEMP_CTRL_TR; 1294 data->has_temp |= 1 << index; 1295 tmp = 1 << index; 1296 data->temp_mode &= ~tmp; 1297 } 1298 1299 if (index > 3) 1300 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 1301 else 1302 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1303 1304 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT]; 1305 tmp &= ~mask; 1306 tmp |= W83795_REG_TEMP_CTRL[index][val]; 1307 1308 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT]; 1309 data->has_in &= ~mask; 1310 1311 if (index > 3) 1312 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp); 1313 else 1314 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp); 1315 1316 mutex_unlock(&data->update_lock); 1317 return count; 1318} 1319 1320 1321/* show/store VIN */ 1322static ssize_t 1323show_in(struct device *dev, struct device_attribute *attr, char *buf) 1324{ 1325 struct sensor_device_attribute_2 *sensor_attr = 1326 to_sensor_dev_attr_2(attr); 1327 int nr = sensor_attr->nr; 1328 int index = sensor_attr->index; 1329 struct w83795_data *data = w83795_update_device(dev); 1330 u16 val = data->in[index][nr]; 1331 u8 lsb_idx; 1332 1333 switch (nr) { 1334 case IN_READ: 1335 /* calculate this value again by sensors as sensors3.conf */ 1336 if ((index >= 17) && 1337 ((data->has_gain >> (index - 17)) & 1)) 1338 val *= 8; 1339 break; 1340 case IN_MAX: 1341 case IN_LOW: 1342 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1343 val <<= 2; 1344 val |= (data->in_lsb[lsb_idx][nr] >> 1345 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03; 1346 if ((index >= 17) && 1347 ((data->has_gain >> (index - 17)) & 1)) 1348 val *= 8; 1349 break; 1350 } 1351 val = in_from_reg(index, val); 1352 1353 return sprintf(buf, "%d\n", val); 1354} 1355 1356static ssize_t 1357store_in(struct device *dev, struct device_attribute *attr, 1358 const char *buf, size_t count) 1359{ 1360 struct sensor_device_attribute_2 *sensor_attr = 1361 to_sensor_dev_attr_2(attr); 1362 int nr = sensor_attr->nr; 1363 int index = sensor_attr->index; 1364 struct i2c_client *client = to_i2c_client(dev); 1365 struct w83795_data *data = i2c_get_clientdata(client); 1366 unsigned long val; 1367 u8 tmp; 1368 u8 lsb_idx; 1369 1370 if (strict_strtoul(buf, 10, &val) < 0) 1371 return -EINVAL; 1372 val = in_to_reg(index, val); 1373 1374 if ((index >= 17) && 1375 ((data->has_gain >> (index - 17)) & 1)) 1376 val /= 8; 1377 val = SENSORS_LIMIT(val, 0, 0x3FF); 1378 mutex_lock(&data->update_lock); 1379 1380 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1381 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr)); 1382 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]); 1383 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]; 1384 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp); 1385 data->in_lsb[lsb_idx][nr] = tmp; 1386 1387 tmp = (val >> 2) & 0xff; 1388 w83795_write(client, W83795_REG_IN[index][nr], tmp); 1389 data->in[index][nr] = tmp; 1390 1391 mutex_unlock(&data->update_lock); 1392 return count; 1393} 1394 1395 1396static ssize_t 1397show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) 1398{ 1399 struct sensor_device_attribute_2 *sensor_attr = 1400 to_sensor_dev_attr_2(attr); 1401 int nr = sensor_attr->nr; 1402 struct i2c_client *client = to_i2c_client(dev); 1403 struct w83795_data *data = i2c_get_clientdata(client); 1404 u16 val = data->setup_pwm[nr]; 1405 1406 switch (nr) { 1407 case SETUP_PWM_UPTIME: 1408 case SETUP_PWM_DOWNTIME: 1409 val = time_from_reg(val); 1410 break; 1411 } 1412 1413 return sprintf(buf, "%d\n", val); 1414} 1415 1416static ssize_t 1417store_sf_setup(struct device *dev, struct device_attribute *attr, 1418 const char *buf, size_t count) 1419{ 1420 struct sensor_device_attribute_2 *sensor_attr = 1421 to_sensor_dev_attr_2(attr); 1422 int nr = sensor_attr->nr; 1423 struct i2c_client *client = to_i2c_client(dev); 1424 struct w83795_data *data = i2c_get_clientdata(client); 1425 unsigned long val; 1426 1427 if (strict_strtoul(buf, 10, &val) < 0) 1428 return -EINVAL; 1429 1430 switch (nr) { 1431 case SETUP_PWM_DEFAULT: 1432 val = SENSORS_LIMIT(val, 0, 0xff); 1433 break; 1434 case SETUP_PWM_UPTIME: 1435 case SETUP_PWM_DOWNTIME: 1436 val = time_to_reg(val); 1437 if (val == 0) 1438 return -EINVAL; 1439 break; 1440 } 1441 1442 mutex_lock(&data->update_lock); 1443 data->setup_pwm[nr] = val; 1444 w83795_write(client, W83795_REG_SETUP_PWM(nr), val); 1445 mutex_unlock(&data->update_lock); 1446 return count; 1447} 1448 1449 1450#define NOT_USED -1 1451 1452#define SENSOR_ATTR_IN(index) { \ 1453 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ 1454 IN_READ, index), \ 1455 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ 1456 store_in, IN_MAX, index), \ 1457 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ 1458 store_in, IN_LOW, index), \ 1459 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ 1460 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \ 1461 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ 1462 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1463 index + ((index > 14) ? 1 : 0)) } 1464 1465#define SENSOR_ATTR_FAN(index) { \ 1466 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ 1467 NULL, FAN_INPUT, index - 1), \ 1468 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ 1469 show_fan, store_fan_min, FAN_MIN, index - 1), \ 1470 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ 1471 NULL, ALARM_STATUS, index + 31), \ 1472 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ 1473 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) } 1474 1475#define SENSOR_ATTR_PWM(index) { \ 1476 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ 1477 store_pwm, PWM_OUTPUT, index - 1), \ 1478 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ 1479 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ 1480 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ 1481 show_pwm, store_pwm, PWM_START, index - 1), \ 1482 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ 1483 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \ 1484 SENSOR_ATTR_2(fan##index##_div, S_IWUSR | S_IRUGO, \ 1485 show_pwm, store_pwm, PWM_DIV, index - 1), \ 1486 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \ 1487 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \ 1488 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \ 1489 show_fanin, store_fanin, FANIN_TARGET, index - 1) } 1490 1491#define SENSOR_ATTR_DTS(index) { \ 1492 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \ 1493 show_dts_mode, NULL, NOT_USED, index - 7), \ 1494 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \ 1495 NULL, NOT_USED, index - 7), \ 1496 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \ 1497 store_dts_ext, DTS_CRIT, NOT_USED), \ 1498 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1499 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \ 1500 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_dts_ext, \ 1501 store_dts_ext, DTS_WARN, NOT_USED), \ 1502 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \ 1503 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \ 1504 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1505 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \ 1506 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1507 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) } 1508 1509#define SENSOR_ATTR_TEMP(index) { \ 1510 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \ 1511 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ 1512 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ 1513 NULL, TEMP_READ, index - 1), \ 1514 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ 1515 store_temp, TEMP_CRIT, index - 1), \ 1516 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1517 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ 1518 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \ 1519 store_temp, TEMP_WARN, index - 1), \ 1520 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \ 1521 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ 1522 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1523 show_alarm_beep, NULL, ALARM_STATUS, \ 1524 index + (index > 4 ? 11 : 17)), \ 1525 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1526 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1527 index + (index > 4 ? 11 : 17)), \ 1528 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \ 1529 show_temp_src, store_temp_src, NOT_USED, index - 1), \ 1530 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ 1531 show_temp_pwm_enable, store_temp_pwm_enable, \ 1532 TEMP_PWM_ENABLE, index - 1), \ 1533 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \ 1534 show_temp_pwm_enable, store_temp_pwm_enable, \ 1535 TEMP_PWM_FAN_MAP, index - 1), \ 1536 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \ 1537 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \ 1538 SENSOR_ATTR_2(temp##index##_crit, S_IWUSR | S_IRUGO, \ 1539 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \ 1540 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IWUSR | S_IRUGO, \ 1541 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \ 1542 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \ 1543 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \ 1544 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ 1545 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \ 1546 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ 1547 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \ 1548 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ 1549 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \ 1550 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ 1551 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \ 1552 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ 1553 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \ 1554 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ 1555 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \ 1556 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ 1557 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \ 1558 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ 1559 show_sf4_temp, store_sf4_temp, 0, index - 1), \ 1560 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ 1561 show_sf4_temp, store_sf4_temp, 1, index - 1), \ 1562 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ 1563 show_sf4_temp, store_sf4_temp, 2, index - 1), \ 1564 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ 1565 show_sf4_temp, store_sf4_temp, 3, index - 1), \ 1566 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ 1567 show_sf4_temp, store_sf4_temp, 4, index - 1), \ 1568 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ 1569 show_sf4_temp, store_sf4_temp, 5, index - 1), \ 1570 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ 1571 show_sf4_temp, store_sf4_temp, 6, index - 1) } 1572 1573 1574static struct sensor_device_attribute_2 w83795_in[][5] = { 1575 SENSOR_ATTR_IN(0), 1576 SENSOR_ATTR_IN(1), 1577 SENSOR_ATTR_IN(2), 1578 SENSOR_ATTR_IN(3), 1579 SENSOR_ATTR_IN(4), 1580 SENSOR_ATTR_IN(5), 1581 SENSOR_ATTR_IN(6), 1582 SENSOR_ATTR_IN(7), 1583 SENSOR_ATTR_IN(8), 1584 SENSOR_ATTR_IN(9), 1585 SENSOR_ATTR_IN(10), 1586 SENSOR_ATTR_IN(11), 1587 SENSOR_ATTR_IN(12), 1588 SENSOR_ATTR_IN(13), 1589 SENSOR_ATTR_IN(14), 1590 SENSOR_ATTR_IN(15), 1591 SENSOR_ATTR_IN(16), 1592 SENSOR_ATTR_IN(17), 1593 SENSOR_ATTR_IN(18), 1594 SENSOR_ATTR_IN(19), 1595 SENSOR_ATTR_IN(20), 1596}; 1597 1598static const struct sensor_device_attribute_2 w83795_fan[][4] = { 1599 SENSOR_ATTR_FAN(1), 1600 SENSOR_ATTR_FAN(2), 1601 SENSOR_ATTR_FAN(3), 1602 SENSOR_ATTR_FAN(4), 1603 SENSOR_ATTR_FAN(5), 1604 SENSOR_ATTR_FAN(6), 1605 SENSOR_ATTR_FAN(7), 1606 SENSOR_ATTR_FAN(8), 1607 SENSOR_ATTR_FAN(9), 1608 SENSOR_ATTR_FAN(10), 1609 SENSOR_ATTR_FAN(11), 1610 SENSOR_ATTR_FAN(12), 1611 SENSOR_ATTR_FAN(13), 1612 SENSOR_ATTR_FAN(14), 1613}; 1614 1615static const struct sensor_device_attribute_2 w83795_temp[][29] = { 1616 SENSOR_ATTR_TEMP(1), 1617 SENSOR_ATTR_TEMP(2), 1618 SENSOR_ATTR_TEMP(3), 1619 SENSOR_ATTR_TEMP(4), 1620 SENSOR_ATTR_TEMP(5), 1621 SENSOR_ATTR_TEMP(6), 1622}; 1623 1624static const struct sensor_device_attribute_2 w83795_dts[][8] = { 1625 SENSOR_ATTR_DTS(7), 1626 SENSOR_ATTR_DTS(8), 1627 SENSOR_ATTR_DTS(9), 1628 SENSOR_ATTR_DTS(10), 1629 SENSOR_ATTR_DTS(11), 1630 SENSOR_ATTR_DTS(12), 1631 SENSOR_ATTR_DTS(13), 1632 SENSOR_ATTR_DTS(14), 1633}; 1634 1635static const struct sensor_device_attribute_2 w83795_pwm[][7] = { 1636 SENSOR_ATTR_PWM(1), 1637 SENSOR_ATTR_PWM(2), 1638 SENSOR_ATTR_PWM(3), 1639 SENSOR_ATTR_PWM(4), 1640 SENSOR_ATTR_PWM(5), 1641 SENSOR_ATTR_PWM(6), 1642 SENSOR_ATTR_PWM(7), 1643 SENSOR_ATTR_PWM(8), 1644}; 1645 1646static const struct sensor_device_attribute_2 sda_single_files[] = { 1647 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep, 1648 store_chassis_clear, ALARM_STATUS, 46), 1649 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable, 1650 store_beep_enable, NOT_USED, NOT_USED), 1651 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin, 1652 store_fanin, FANIN_TOL, NOT_USED), 1653 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, 1654 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), 1655 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, 1656 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), 1657 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, 1658 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), 1659}; 1660 1661/* 1662 * Driver interface 1663 */ 1664 1665static void w83795_init_client(struct i2c_client *client) 1666{ 1667 if (reset) 1668 w83795_write(client, W83795_REG_CONFIG, 0x80); 1669 1670 /* Start monitoring */ 1671 w83795_write(client, W83795_REG_CONFIG, 1672 w83795_read(client, W83795_REG_CONFIG) | 0x01); 1673} 1674 1675static int w83795_get_device_id(struct i2c_client *client) 1676{ 1677 int device_id; 1678 1679 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID); 1680 1681 /* Special case for rev. A chips; can't be checked first because later 1682 revisions emulate this for compatibility */ 1683 if (device_id < 0 || (device_id & 0xf0) != 0x50) { 1684 int alt_id; 1685 1686 alt_id = i2c_smbus_read_byte_data(client, 1687 W83795_REG_DEVICEID_A); 1688 if (alt_id == 0x50) 1689 device_id = alt_id; 1690 } 1691 1692 return device_id; 1693} 1694 1695/* Return 0 if detection is successful, -ENODEV otherwise */ 1696static int w83795_detect(struct i2c_client *client, 1697 struct i2c_board_info *info) 1698{ 1699 int bank, vendor_id, device_id, expected, i2c_addr, config; 1700 struct i2c_adapter *adapter = client->adapter; 1701 unsigned short address = client->addr; 1702 const char *chip_name; 1703 1704 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1705 return -ENODEV; 1706 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1707 if (bank < 0 || (bank & 0x7c)) { 1708 dev_dbg(&adapter->dev, 1709 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1710 address, "bank"); 1711 return -ENODEV; 1712 } 1713 1714 /* Check Nuvoton vendor ID */ 1715 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID); 1716 expected = bank & 0x80 ? 0x5c : 0xa3; 1717 if (vendor_id != expected) { 1718 dev_dbg(&adapter->dev, 1719 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1720 address, "vendor id"); 1721 return -ENODEV; 1722 } 1723 1724 /* Check device ID */ 1725 device_id = w83795_get_device_id(client) | 1726 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8); 1727 if ((device_id >> 4) != 0x795) { 1728 dev_dbg(&adapter->dev, 1729 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1730 address, "device id\n"); 1731 return -ENODEV; 1732 } 1733 1734 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR 1735 should match */ 1736 if ((bank & 0x07) == 0) { 1737 i2c_addr = i2c_smbus_read_byte_data(client, 1738 W83795_REG_I2C_ADDR); 1739 if ((i2c_addr & 0x7f) != address) { 1740 dev_dbg(&adapter->dev, 1741 "w83795: Detection failed at addr 0x%02hx, " 1742 "check %s\n", address, "i2c addr"); 1743 return -ENODEV; 1744 } 1745 } 1746 1747 /* Check 795 chip type: 795G or 795ADG 1748 Usually we don't write to chips during detection, but here we don't 1749 quite have the choice; hopefully it's OK, we are about to return 1750 success anyway */ 1751 if ((bank & 0x07) != 0) 1752 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, 1753 bank & ~0x07); 1754 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG); 1755 if (config & W83795_REG_CONFIG_CONFIG48) 1756 chip_name = "w83795adg"; 1757 else 1758 chip_name = "w83795g"; 1759 1760 strlcpy(info->type, chip_name, I2C_NAME_SIZE); 1761 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name, 1762 'A' + (device_id & 0xf), address); 1763 1764 return 0; 1765} 1766 1767static int w83795_handle_files(struct device *dev, int (*fn)(struct device *, 1768 const struct device_attribute *)) 1769{ 1770 struct w83795_data *data = dev_get_drvdata(dev); 1771 int err, i, j; 1772 1773 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) { 1774 if (!(data->has_in & (1 << i))) 1775 continue; 1776 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) { 1777 err = fn(dev, &w83795_in[i][j].dev_attr); 1778 if (err) 1779 return err; 1780 } 1781 } 1782 1783 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) { 1784 if (!(data->has_fan & (1 << i))) 1785 continue; 1786 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) { 1787 err = fn(dev, &w83795_fan[i][j].dev_attr); 1788 if (err) 1789 return err; 1790 } 1791 } 1792 1793 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { 1794 err = fn(dev, &sda_single_files[i].dev_attr); 1795 if (err) 1796 return err; 1797 } 1798 1799 for (i = 0; i < data->has_pwm; i++) { 1800 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) { 1801 err = fn(dev, &w83795_pwm[i][j].dev_attr); 1802 if (err) 1803 return err; 1804 } 1805 } 1806 1807 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) { 1808 if (!(data->has_temp & (1 << i))) 1809 continue; 1810 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) { 1811 err = fn(dev, &w83795_temp[i][j].dev_attr); 1812 if (err) 1813 return err; 1814 } 1815 } 1816 1817 if (data->enable_dts != 0) { 1818 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) { 1819 if (!(data->has_dts & (1 << i))) 1820 continue; 1821 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) { 1822 err = fn(dev, &w83795_dts[i][j].dev_attr); 1823 if (err) 1824 return err; 1825 } 1826 } 1827 } 1828 1829 return 0; 1830} 1831 1832/* We need a wrapper that fits in w83795_handle_files */ 1833static int device_remove_file_wrapper(struct device *dev, 1834 const struct device_attribute *attr) 1835{ 1836 device_remove_file(dev, attr); 1837 return 0; 1838} 1839 1840static int w83795_probe(struct i2c_client *client, 1841 const struct i2c_device_id *id) 1842{ 1843 int i; 1844 u8 tmp; 1845 struct device *dev = &client->dev; 1846 struct w83795_data *data; 1847 int err = 0; 1848 1849 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL); 1850 if (!data) { 1851 err = -ENOMEM; 1852 goto exit; 1853 } 1854 1855 i2c_set_clientdata(client, data); 1856 data->chip_type = id->driver_data; 1857 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1858 mutex_init(&data->update_lock); 1859 1860 /* Initialize the chip */ 1861 w83795_init_client(client); 1862 1863 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1); 1864 data->has_in |= w83795_read(client, W83795_REG_VOLT_CTRL2) << 8; 1865 /* VSEN11-9 not for 795adg */ 1866 if (data->chip_type == w83795adg) 1867 data->has_in &= 0xf8ff; 1868 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1); 1869 data->has_fan |= w83795_read(client, W83795_REG_FANIN_CTRL2) << 8; 1870 1871 /* VDSEN12-17 and TR1-6, TD1-4 use same register */ 1872 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 1873 if (tmp & 0x20) 1874 data->enable_dts = 1; 1875 else 1876 data->enable_dts = 0; 1877 data->has_temp = 0; 1878 data->temp_mode = 0; 1879 if (tmp & 0x08) { 1880 if (tmp & 0x04) 1881 data->has_temp |= 0x20; 1882 else 1883 data->has_in |= 0x10000; 1884 } 1885 if (tmp & 0x02) { 1886 if (tmp & 0x01) 1887 data->has_temp |= 0x10; 1888 else 1889 data->has_in |= 0x8000; 1890 } 1891 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1892 if (tmp & 0x40) { 1893 data->has_temp |= 0x08; 1894 if (!(tmp & 0x80)) 1895 data->temp_mode |= 0x08; 1896 } else if (tmp & 0x80) { 1897 data->has_in |= 0x100000; 1898 } 1899 if (tmp & 0x10) { 1900 data->has_temp |= 0x04; 1901 if (!(tmp & 0x20)) 1902 data->temp_mode |= 0x04; 1903 } else if (tmp & 0x20) { 1904 data->has_in |= 0x80000; 1905 } 1906 if (tmp & 0x04) { 1907 data->has_temp |= 0x02; 1908 if (!(tmp & 0x08)) 1909 data->temp_mode |= 0x02; 1910 } else if (tmp & 0x08) { 1911 data->has_in |= 0x40000; 1912 } 1913 if (tmp & 0x01) { 1914 data->has_temp |= 0x01; 1915 if (!(tmp & 0x02)) 1916 data->temp_mode |= 0x01; 1917 } else if (tmp & 0x02) { 1918 data->has_in |= 0x20000; 1919 } 1920 1921 /* Check DTS enable status */ 1922 if (data->enable_dts == 0) { 1923 data->has_dts = 0; 1924 } else { 1925 if (1 & w83795_read(client, W83795_REG_DTSC)) 1926 data->enable_dts |= 2; 1927 data->has_dts = w83795_read(client, W83795_REG_DTSE); 1928 } 1929 1930 /* First update the voltages measured value and limits */ 1931 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 1932 if (!(data->has_in & (1 << i))) 1933 continue; 1934 data->in[i][IN_MAX] = 1935 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 1936 data->in[i][IN_LOW] = 1937 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 1938 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 1939 tmp |= (w83795_read(client, W83795_REG_VRLSB) 1940 >> VRLSB_SHIFT) & 0x03; 1941 data->in[i][IN_READ] = tmp; 1942 } 1943 for (i = 0; i < IN_LSB_REG_NUM; i++) { 1944 data->in_lsb[i][IN_MAX] = 1945 w83795_read(client, IN_LSB_REG(i, IN_MAX)); 1946 data->in_lsb[i][IN_LOW] = 1947 w83795_read(client, IN_LSB_REG(i, IN_LOW)); 1948 } 1949 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f; 1950 1951 /* First update fan and limits */ 1952 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 1953 if (!(data->has_fan & (1 << i))) 1954 continue; 1955 data->fan_min[i] = 1956 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4; 1957 data->fan_min[i] |= 1958 (w83795_read(client, W83795_REG_FAN_MIN_LSB(i) >> 1959 W83795_REG_FAN_MIN_LSB_SHIFT(i))) & 0x0F; 1960 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 1961 data->fan[i] |= 1962 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F; 1963 } 1964 1965 /* temperature and limits */ 1966 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 1967 if (!(data->has_temp & (1 << i))) 1968 continue; 1969 data->temp[i][TEMP_CRIT] = 1970 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]); 1971 data->temp[i][TEMP_CRIT_HYST] = 1972 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]); 1973 data->temp[i][TEMP_WARN] = 1974 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]); 1975 data->temp[i][TEMP_WARN_HYST] = 1976 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]); 1977 data->temp[i][TEMP_READ] = 1978 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 1979 data->temp_read_vrlsb[i] = 1980 w83795_read(client, W83795_REG_VRLSB); 1981 } 1982 1983 /* dts temperature and limits */ 1984 if (data->enable_dts != 0) { 1985 data->dts_ext[DTS_CRIT] = 1986 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT)); 1987 data->dts_ext[DTS_CRIT_HYST] = 1988 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST)); 1989 data->dts_ext[DTS_WARN] = 1990 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN)); 1991 data->dts_ext[DTS_WARN_HYST] = 1992 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST)); 1993 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 1994 if (!(data->has_dts & (1 << i))) 1995 continue; 1996 data->dts[i] = w83795_read(client, W83795_REG_DTS(i)); 1997 data->dts_read_vrlsb[i] = 1998 w83795_read(client, W83795_REG_VRLSB); 1999 } 2000 } 2001 2002 /* First update temp source selction */ 2003 for (i = 0; i < 3; i++) 2004 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i)); 2005 2006 /* pwm and smart fan */ 2007 if (data->chip_type == w83795g) 2008 data->has_pwm = 8; 2009 else 2010 data->has_pwm = 2; 2011 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1); 2012 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2); 2013 /* w83795adg only support pwm2-0 */ 2014 for (i = 0; i < W83795_REG_TEMP_NUM; i++) 2015 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i)); 2016 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC); 2017 for (i = 0; i < data->has_pwm; i++) { 2018 for (tmp = 0; tmp < 5; tmp++) { 2019 data->pwm[i][tmp] = 2020 w83795_read(client, W83795_REG_PWM(i, tmp)); 2021 } 2022 } 2023 for (i = 0; i < 8; i++) { 2024 data->target_speed[i] = 2025 w83795_read(client, W83795_REG_FTSH(i)) << 4; 2026 data->target_speed[i] |= 2027 w83795_read(client, W83795_REG_FTSL(i)) >> 4; 2028 } 2029 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f; 2030 2031 for (i = 0; i < W83795_REG_TEMP_NUM; i++) { 2032 data->pwm_temp[i][TEMP_PWM_TTTI] = 2033 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f; 2034 data->pwm_temp[i][TEMP_PWM_CTFS] = 2035 w83795_read(client, W83795_REG_CTFS(i)); 2036 tmp = w83795_read(client, W83795_REG_HT(i)); 2037 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f; 2038 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f; 2039 } 2040 for (i = 0; i < W83795_REG_TEMP_NUM; i++) { 2041 for (tmp = 0; tmp < 7; tmp++) { 2042 data->sf4_reg[i][SF4_TEMP][tmp] = 2043 w83795_read(client, 2044 W83795_REG_SF4_TEMP(i, tmp)); 2045 data->sf4_reg[i][SF4_PWM][tmp] = 2046 w83795_read(client, W83795_REG_SF4_PWM(i, tmp)); 2047 } 2048 } 2049 2050 /* Setup PWM Register */ 2051 for (i = 0; i < 3; i++) { 2052 data->setup_pwm[i] = 2053 w83795_read(client, W83795_REG_SETUP_PWM(i)); 2054 } 2055 2056 /* alarm and beep */ 2057 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) { 2058 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 2059 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i)); 2060 } 2061 data->beep_enable = 2062 (w83795_read(client, W83795_REG_BEEP(5)) >> 7) & 0x01; 2063 2064 err = w83795_handle_files(dev, device_create_file); 2065 if (err) 2066 goto exit_remove; 2067 2068 data->hwmon_dev = hwmon_device_register(dev); 2069 if (IS_ERR(data->hwmon_dev)) { 2070 err = PTR_ERR(data->hwmon_dev); 2071 goto exit_remove; 2072 } 2073 2074 return 0; 2075 2076exit_remove: 2077 w83795_handle_files(dev, device_remove_file_wrapper); 2078 kfree(data); 2079exit: 2080 return err; 2081} 2082 2083static int w83795_remove(struct i2c_client *client) 2084{ 2085 struct w83795_data *data = i2c_get_clientdata(client); 2086 2087 hwmon_device_unregister(data->hwmon_dev); 2088 w83795_handle_files(&client->dev, device_remove_file_wrapper); 2089 kfree(data); 2090 2091 return 0; 2092} 2093 2094 2095static const struct i2c_device_id w83795_id[] = { 2096 { "w83795g", w83795g }, 2097 { "w83795adg", w83795adg }, 2098 { } 2099}; 2100MODULE_DEVICE_TABLE(i2c, w83795_id); 2101 2102static struct i2c_driver w83795_driver = { 2103 .driver = { 2104 .name = "w83795", 2105 }, 2106 .probe = w83795_probe, 2107 .remove = w83795_remove, 2108 .id_table = w83795_id, 2109 2110 .class = I2C_CLASS_HWMON, 2111 .detect = w83795_detect, 2112 .address_list = normal_i2c, 2113}; 2114 2115static int __init sensors_w83795_init(void) 2116{ 2117 return i2c_add_driver(&w83795_driver); 2118} 2119 2120static void __exit sensors_w83795_exit(void) 2121{ 2122 i2c_del_driver(&w83795_driver); 2123} 2124 2125MODULE_AUTHOR("Wei Song"); 2126MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver"); 2127MODULE_LICENSE("GPL"); 2128 2129module_init(sensors_w83795_init); 2130module_exit(sensors_w83795_exit); 2131