w83795.c revision dcd8f39230b9f724ba4f55f14ed2bb8119204385
1/*
2 *  w83795.c - Linux kernel driver for hardware monitoring
3 *  Copyright (C) 2008 Nuvoton Technology Corp.
4 *                Wei Song
5 *  Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
6 *
7 *  This program is free software; you can redistribute it and/or modify
8 *  it under the terms of the GNU General Public License as published by
9 *  the Free Software Foundation - version 2.
10 *
11 *  This program is distributed in the hope that it will be useful,
12 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 *  GNU General Public License for more details.
15 *
16 *  You should have received a copy of the GNU General Public License
17 *  along with this program; if not, write to the Free Software
18 *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 *  02110-1301 USA.
20 *
21 *  Supports following chips:
22 *
23 *  Chip       #vin   #fanin #pwm #temp #dts wchipid  vendid  i2c  ISA
24 *  w83795g     21     14     8     6     8    0x79   0x5ca3  yes   no
25 *  w83795adg   18     14     2     6     8    0x79   0x5ca3  yes   no
26 */
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/i2c.h>
33#include <linux/hwmon.h>
34#include <linux/hwmon-sysfs.h>
35#include <linux/err.h>
36#include <linux/mutex.h>
37#include <linux/delay.h>
38#include <linux/jiffies.h>
39
40/* Addresses to scan */
41static const unsigned short normal_i2c[] = {
42	0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
43};
44
45
46static bool reset;
47module_param(reset, bool, 0);
48MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
49
50
51#define W83795_REG_BANKSEL		0x00
52#define W83795_REG_VENDORID		0xfd
53#define W83795_REG_CHIPID		0xfe
54#define W83795_REG_DEVICEID		0xfb
55#define W83795_REG_DEVICEID_A		0xff
56
57#define W83795_REG_I2C_ADDR		0xfc
58#define W83795_REG_CONFIG		0x01
59#define W83795_REG_CONFIG_CONFIG48	0x04
60#define W83795_REG_CONFIG_START	0x01
61
62/* Multi-Function Pin Ctrl Registers */
63#define W83795_REG_VOLT_CTRL1		0x02
64#define W83795_REG_VOLT_CTRL2		0x03
65#define W83795_REG_TEMP_CTRL1		0x04
66#define W83795_REG_TEMP_CTRL2		0x05
67#define W83795_REG_FANIN_CTRL1		0x06
68#define W83795_REG_FANIN_CTRL2		0x07
69#define W83795_REG_VMIGB_CTRL		0x08
70
71#define TEMP_READ			0
72#define TEMP_CRIT			1
73#define TEMP_CRIT_HYST			2
74#define TEMP_WARN			3
75#define TEMP_WARN_HYST			4
76/*
77 * only crit and crit_hyst affect real-time alarm status
78 * current crit crit_hyst warn warn_hyst
79 */
80static const u16 W83795_REG_TEMP[][5] = {
81	{0x21, 0x96, 0x97, 0x98, 0x99},	/* TD1/TR1 */
82	{0x22, 0x9a, 0x9b, 0x9c, 0x9d},	/* TD2/TR2 */
83	{0x23, 0x9e, 0x9f, 0xa0, 0xa1},	/* TD3/TR3 */
84	{0x24, 0xa2, 0xa3, 0xa4, 0xa5},	/* TD4/TR4 */
85	{0x1f, 0xa6, 0xa7, 0xa8, 0xa9},	/* TR5 */
86	{0x20, 0xaa, 0xab, 0xac, 0xad},	/* TR6 */
87};
88
89#define IN_READ				0
90#define IN_MAX				1
91#define IN_LOW				2
92static const u16 W83795_REG_IN[][3] = {
93	/* Current, HL, LL */
94	{0x10, 0x70, 0x71},	/* VSEN1 */
95	{0x11, 0x72, 0x73},	/* VSEN2 */
96	{0x12, 0x74, 0x75},	/* VSEN3 */
97	{0x13, 0x76, 0x77},	/* VSEN4 */
98	{0x14, 0x78, 0x79},	/* VSEN5 */
99	{0x15, 0x7a, 0x7b},	/* VSEN6 */
100	{0x16, 0x7c, 0x7d},	/* VSEN7 */
101	{0x17, 0x7e, 0x7f},	/* VSEN8 */
102	{0x18, 0x80, 0x81},	/* VSEN9 */
103	{0x19, 0x82, 0x83},	/* VSEN10 */
104	{0x1A, 0x84, 0x85},	/* VSEN11 */
105	{0x1B, 0x86, 0x87},	/* VTT */
106	{0x1C, 0x88, 0x89},	/* 3VDD */
107	{0x1D, 0x8a, 0x8b},	/* 3VSB */
108	{0x1E, 0x8c, 0x8d},	/* VBAT */
109	{0x1F, 0xa6, 0xa7},	/* VSEN12 */
110	{0x20, 0xaa, 0xab},	/* VSEN13 */
111	{0x21, 0x96, 0x97},	/* VSEN14 */
112	{0x22, 0x9a, 0x9b},	/* VSEN15 */
113	{0x23, 0x9e, 0x9f},	/* VSEN16 */
114	{0x24, 0xa2, 0xa3},	/* VSEN17 */
115};
116#define W83795_REG_VRLSB		0x3C
117
118static const u8 W83795_REG_IN_HL_LSB[] = {
119	0x8e,	/* VSEN1-4 */
120	0x90,	/* VSEN5-8 */
121	0x92,	/* VSEN9-11 */
122	0x94,	/* VTT, 3VDD, 3VSB, 3VBAT */
123	0xa8,	/* VSEN12 */
124	0xac,	/* VSEN13 */
125	0x98,	/* VSEN14 */
126	0x9c,	/* VSEN15 */
127	0xa0,	/* VSEN16 */
128	0xa4,	/* VSEN17 */
129};
130
131#define IN_LSB_REG(index, type) \
132	(((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
133	: (W83795_REG_IN_HL_LSB[(index)] + 1))
134
135#define IN_LSB_SHIFT			0
136#define IN_LSB_IDX			1
137static const u8 IN_LSB_SHIFT_IDX[][2] = {
138	/* High/Low LSB shift, LSB No. */
139	{0x00, 0x00},	/* VSEN1 */
140	{0x02, 0x00},	/* VSEN2 */
141	{0x04, 0x00},	/* VSEN3 */
142	{0x06, 0x00},	/* VSEN4 */
143	{0x00, 0x01},	/* VSEN5 */
144	{0x02, 0x01},	/* VSEN6 */
145	{0x04, 0x01},	/* VSEN7 */
146	{0x06, 0x01},	/* VSEN8 */
147	{0x00, 0x02},	/* VSEN9 */
148	{0x02, 0x02},	/* VSEN10 */
149	{0x04, 0x02},	/* VSEN11 */
150	{0x00, 0x03},	/* VTT */
151	{0x02, 0x03},	/* 3VDD */
152	{0x04, 0x03},	/* 3VSB	*/
153	{0x06, 0x03},	/* VBAT	*/
154	{0x06, 0x04},	/* VSEN12 */
155	{0x06, 0x05},	/* VSEN13 */
156	{0x06, 0x06},	/* VSEN14 */
157	{0x06, 0x07},	/* VSEN15 */
158	{0x06, 0x08},	/* VSEN16 */
159	{0x06, 0x09},	/* VSEN17 */
160};
161
162
163#define W83795_REG_FAN(index)		(0x2E + (index))
164#define W83795_REG_FAN_MIN_HL(index)	(0xB6 + (index))
165#define W83795_REG_FAN_MIN_LSB(index)	(0xC4 + (index) / 2)
166#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
167	(((index) & 1) ? 4 : 0)
168
169#define W83795_REG_VID_CTRL		0x6A
170
171#define W83795_REG_ALARM_CTRL		0x40
172#define ALARM_CTRL_RTSACS		(1 << 7)
173#define W83795_REG_ALARM(index)		(0x41 + (index))
174#define W83795_REG_CLR_CHASSIS		0x4D
175#define W83795_REG_BEEP(index)		(0x50 + (index))
176
177#define W83795_REG_OVT_CFG		0x58
178#define OVT_CFG_SEL			(1 << 7)
179
180
181#define W83795_REG_FCMS1		0x201
182#define W83795_REG_FCMS2		0x208
183#define W83795_REG_TFMR(index)		(0x202 + (index))
184#define W83795_REG_FOMC			0x20F
185
186#define W83795_REG_TSS(index)		(0x209 + (index))
187
188#define TSS_MAP_RESERVED		0xff
189static const u8 tss_map[4][6] = {
190	{ 0,  1,  2,  3,  4,  5},
191	{ 6,  7,  8,  9,  0,  1},
192	{10, 11, 12, 13,  2,  3},
193	{ 4,  5,  4,  5, TSS_MAP_RESERVED, TSS_MAP_RESERVED},
194};
195
196#define PWM_OUTPUT			0
197#define PWM_FREQ			1
198#define PWM_START			2
199#define PWM_NONSTOP			3
200#define PWM_STOP_TIME			4
201#define W83795_REG_PWM(index, nr)	(0x210 + (nr) * 8 + (index))
202
203#define W83795_REG_FTSH(index)		(0x240 + (index) * 2)
204#define W83795_REG_FTSL(index)		(0x241 + (index) * 2)
205#define W83795_REG_TFTS			0x250
206
207#define TEMP_PWM_TTTI			0
208#define TEMP_PWM_CTFS			1
209#define TEMP_PWM_HCT			2
210#define TEMP_PWM_HOT			3
211#define W83795_REG_TTTI(index)		(0x260 + (index))
212#define W83795_REG_CTFS(index)		(0x268 + (index))
213#define W83795_REG_HT(index)		(0x270 + (index))
214
215#define SF4_TEMP			0
216#define SF4_PWM				1
217#define W83795_REG_SF4_TEMP(temp_num, index) \
218	(0x280 + 0x10 * (temp_num) + (index))
219#define W83795_REG_SF4_PWM(temp_num, index) \
220	(0x288 + 0x10 * (temp_num) + (index))
221
222#define W83795_REG_DTSC			0x301
223#define W83795_REG_DTSE			0x302
224#define W83795_REG_DTS(index)		(0x26 + (index))
225#define W83795_REG_PECI_TBASE(index)	(0x320 + (index))
226
227#define DTS_CRIT			0
228#define DTS_CRIT_HYST			1
229#define DTS_WARN			2
230#define DTS_WARN_HYST			3
231#define W83795_REG_DTS_EXT(index)	(0xB2 + (index))
232
233#define SETUP_PWM_DEFAULT		0
234#define SETUP_PWM_UPTIME		1
235#define SETUP_PWM_DOWNTIME		2
236#define W83795_REG_SETUP_PWM(index)    (0x20C + (index))
237
238static inline u16 in_from_reg(u8 index, u16 val)
239{
240	/* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
241	if (index >= 12 && index <= 14)
242		return val * 6;
243	else
244		return val * 2;
245}
246
247static inline u16 in_to_reg(u8 index, u16 val)
248{
249	if (index >= 12 && index <= 14)
250		return val / 6;
251	else
252		return val / 2;
253}
254
255static inline unsigned long fan_from_reg(u16 val)
256{
257	if ((val == 0xfff) || (val == 0))
258		return 0;
259	return 1350000UL / val;
260}
261
262static inline u16 fan_to_reg(long rpm)
263{
264	if (rpm <= 0)
265		return 0x0fff;
266	return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
267}
268
269static inline unsigned long time_from_reg(u8 reg)
270{
271	return reg * 100;
272}
273
274static inline u8 time_to_reg(unsigned long val)
275{
276	return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
277}
278
279static inline long temp_from_reg(s8 reg)
280{
281	return reg * 1000;
282}
283
284static inline s8 temp_to_reg(long val, s8 min, s8 max)
285{
286	return SENSORS_LIMIT(val / 1000, min, max);
287}
288
289static const u16 pwm_freq_cksel0[16] = {
290	1024, 512, 341, 256, 205, 171, 146, 128,
291	85, 64, 32, 16, 8, 4, 2, 1
292};
293
294static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
295{
296	unsigned long base_clock;
297
298	if (reg & 0x80) {
299		base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
300		return base_clock / ((reg & 0x7f) + 1);
301	} else
302		return pwm_freq_cksel0[reg & 0x0f];
303}
304
305static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
306{
307	unsigned long base_clock;
308	u8 reg0, reg1;
309	unsigned long best0, best1;
310
311	/* Best fit for cksel = 0 */
312	for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
313		if (val > (pwm_freq_cksel0[reg0] +
314			   pwm_freq_cksel0[reg0 + 1]) / 2)
315			break;
316	}
317	if (val < 375)	/* cksel = 1 can't beat this */
318		return reg0;
319	best0 = pwm_freq_cksel0[reg0];
320
321	/* Best fit for cksel = 1 */
322	base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
323	reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
324	best1 = base_clock / reg1;
325	reg1 = 0x80 | (reg1 - 1);
326
327	/* Choose the closest one */
328	if (abs(val - best0) > abs(val - best1))
329		return reg1;
330	else
331		return reg0;
332}
333
334enum chip_types {w83795g, w83795adg};
335
336struct w83795_data {
337	struct device *hwmon_dev;
338	struct mutex update_lock;
339	unsigned long last_updated;	/* In jiffies */
340	enum chip_types chip_type;
341
342	u8 bank;
343
344	u32 has_in;		/* Enable monitor VIN or not */
345	u8 has_dyn_in;		/* Only in2-0 can have this */
346	u16 in[21][3];		/* Register value, read/high/low */
347	u8 in_lsb[10][3];	/* LSB Register value, high/low */
348	u8 has_gain;		/* has gain: in17-20 * 8 */
349
350	u16 has_fan;		/* Enable fan14-1 or not */
351	u16 fan[14];		/* Register value combine */
352	u16 fan_min[14];	/* Register value combine */
353
354	u8 has_temp;		/* Enable monitor temp6-1 or not */
355	s8 temp[6][5];		/* current, crit, crit_hyst, warn, warn_hyst */
356	u8 temp_read_vrlsb[6];
357	u8 temp_mode;		/* Bit vector, 0 = TR, 1 = TD */
358	u8 temp_src[3];		/* Register value */
359
360	u8 enable_dts;		/*
361				 * Enable PECI and SB-TSI,
362				 * bit 0: =1 enable, =0 disable,
363				 * bit 1: =1 AMD SB-TSI, =0 Intel PECI
364				 */
365	u8 has_dts;		/* Enable monitor DTS temp */
366	s8 dts[8];		/* Register value */
367	u8 dts_read_vrlsb[8];	/* Register value */
368	s8 dts_ext[4];		/* Register value */
369
370	u8 has_pwm;		/*
371				 * 795g supports 8 pwm, 795adg only supports 2,
372				 * no config register, only affected by chip
373				 * type
374				 */
375	u8 pwm[8][5];		/*
376				 * Register value, output, freq, start,
377				 *  non stop, stop time
378				 */
379	u16 clkin;		/* CLKIN frequency in kHz */
380	u8 pwm_fcms[2];		/* Register value */
381	u8 pwm_tfmr[6];		/* Register value */
382	u8 pwm_fomc;		/* Register value */
383
384	u16 target_speed[8];	/*
385				 * Register value, target speed for speed
386				 * cruise
387				 */
388	u8 tol_speed;		/* tolerance of target speed */
389	u8 pwm_temp[6][4];	/* TTTI, CTFS, HCT, HOT */
390	u8 sf4_reg[6][2][7];	/* 6 temp, temp/dcpwm, 7 registers */
391
392	u8 setup_pwm[3];	/* Register value */
393
394	u8 alarms[6];		/* Register value */
395	u8 enable_beep;
396	u8 beeps[6];		/* Register value */
397
398	char valid;
399	char valid_limits;
400	char valid_pwm_config;
401};
402
403/*
404 * Hardware access
405 * We assume that nobdody can change the bank outside the driver.
406 */
407
408/* Must be called with data->update_lock held, except during initialization */
409static int w83795_set_bank(struct i2c_client *client, u8 bank)
410{
411	struct w83795_data *data = i2c_get_clientdata(client);
412	int err;
413
414	/* If the same bank is already set, nothing to do */
415	if ((data->bank & 0x07) == bank)
416		return 0;
417
418	/* Change to new bank, preserve all other bits */
419	bank |= data->bank & ~0x07;
420	err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
421	if (err < 0) {
422		dev_err(&client->dev,
423			"Failed to set bank to %d, err %d\n",
424			(int)bank, err);
425		return err;
426	}
427	data->bank = bank;
428
429	return 0;
430}
431
432/* Must be called with data->update_lock held, except during initialization */
433static u8 w83795_read(struct i2c_client *client, u16 reg)
434{
435	int err;
436
437	err = w83795_set_bank(client, reg >> 8);
438	if (err < 0)
439		return 0x00;	/* Arbitrary */
440
441	err = i2c_smbus_read_byte_data(client, reg & 0xff);
442	if (err < 0) {
443		dev_err(&client->dev,
444			"Failed to read from register 0x%03x, err %d\n",
445			(int)reg, err);
446		return 0x00;	/* Arbitrary */
447	}
448	return err;
449}
450
451/* Must be called with data->update_lock held, except during initialization */
452static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
453{
454	int err;
455
456	err = w83795_set_bank(client, reg >> 8);
457	if (err < 0)
458		return err;
459
460	err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
461	if (err < 0)
462		dev_err(&client->dev,
463			"Failed to write to register 0x%03x, err %d\n",
464			(int)reg, err);
465	return err;
466}
467
468static void w83795_update_limits(struct i2c_client *client)
469{
470	struct w83795_data *data = i2c_get_clientdata(client);
471	int i, limit;
472	u8 lsb;
473
474	/* Read the voltage limits */
475	for (i = 0; i < ARRAY_SIZE(data->in); i++) {
476		if (!(data->has_in & (1 << i)))
477			continue;
478		data->in[i][IN_MAX] =
479			w83795_read(client, W83795_REG_IN[i][IN_MAX]);
480		data->in[i][IN_LOW] =
481			w83795_read(client, W83795_REG_IN[i][IN_LOW]);
482	}
483	for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
484		if ((i == 2 && data->chip_type == w83795adg) ||
485		    (i >= 4 && !(data->has_in & (1 << (i + 11)))))
486			continue;
487		data->in_lsb[i][IN_MAX] =
488			w83795_read(client, IN_LSB_REG(i, IN_MAX));
489		data->in_lsb[i][IN_LOW] =
490			w83795_read(client, IN_LSB_REG(i, IN_LOW));
491	}
492
493	/* Read the fan limits */
494	lsb = 0; /* Silent false gcc warning */
495	for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
496		/*
497		 * Each register contains LSB for 2 fans, but we want to
498		 * read it only once to save time
499		 */
500		if ((i & 1) == 0 && (data->has_fan & (3 << i)))
501			lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
502
503		if (!(data->has_fan & (1 << i)))
504			continue;
505		data->fan_min[i] =
506			w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
507		data->fan_min[i] |=
508			(lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
509	}
510
511	/* Read the temperature limits */
512	for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
513		if (!(data->has_temp & (1 << i)))
514			continue;
515		for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
516			data->temp[i][limit] =
517				w83795_read(client, W83795_REG_TEMP[i][limit]);
518	}
519
520	/* Read the DTS limits */
521	if (data->enable_dts) {
522		for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
523			data->dts_ext[limit] =
524				w83795_read(client, W83795_REG_DTS_EXT(limit));
525	}
526
527	/* Read beep settings */
528	if (data->enable_beep) {
529		for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
530			data->beeps[i] =
531				w83795_read(client, W83795_REG_BEEP(i));
532	}
533
534	data->valid_limits = 1;
535}
536
537static struct w83795_data *w83795_update_pwm_config(struct device *dev)
538{
539	struct i2c_client *client = to_i2c_client(dev);
540	struct w83795_data *data = i2c_get_clientdata(client);
541	int i, tmp;
542
543	mutex_lock(&data->update_lock);
544
545	if (data->valid_pwm_config)
546		goto END;
547
548	/* Read temperature source selection */
549	for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
550		data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
551
552	/* Read automatic fan speed control settings */
553	data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
554	data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
555	for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
556		data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
557	data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
558	for (i = 0; i < data->has_pwm; i++) {
559		for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
560			data->pwm[i][tmp] =
561				w83795_read(client, W83795_REG_PWM(i, tmp));
562	}
563	for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
564		data->target_speed[i] =
565			w83795_read(client, W83795_REG_FTSH(i)) << 4;
566		data->target_speed[i] |=
567			w83795_read(client, W83795_REG_FTSL(i)) >> 4;
568	}
569	data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
570
571	for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
572		data->pwm_temp[i][TEMP_PWM_TTTI] =
573			w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
574		data->pwm_temp[i][TEMP_PWM_CTFS] =
575			w83795_read(client, W83795_REG_CTFS(i));
576		tmp = w83795_read(client, W83795_REG_HT(i));
577		data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
578		data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
579	}
580
581	/* Read SmartFanIV trip points */
582	for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
583		for (tmp = 0; tmp < 7; tmp++) {
584			data->sf4_reg[i][SF4_TEMP][tmp] =
585				w83795_read(client,
586					    W83795_REG_SF4_TEMP(i, tmp));
587			data->sf4_reg[i][SF4_PWM][tmp] =
588				w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
589		}
590	}
591
592	/* Read setup PWM */
593	for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
594		data->setup_pwm[i] =
595			w83795_read(client, W83795_REG_SETUP_PWM(i));
596
597	data->valid_pwm_config = 1;
598
599END:
600	mutex_unlock(&data->update_lock);
601	return data;
602}
603
604static struct w83795_data *w83795_update_device(struct device *dev)
605{
606	struct i2c_client *client = to_i2c_client(dev);
607	struct w83795_data *data = i2c_get_clientdata(client);
608	u16 tmp;
609	u8 intrusion;
610	int i;
611
612	mutex_lock(&data->update_lock);
613
614	if (!data->valid_limits)
615		w83795_update_limits(client);
616
617	if (!(time_after(jiffies, data->last_updated + HZ * 2)
618	      || !data->valid))
619		goto END;
620
621	/* Update the voltages value */
622	for (i = 0; i < ARRAY_SIZE(data->in); i++) {
623		if (!(data->has_in & (1 << i)))
624			continue;
625		tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
626		tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
627		data->in[i][IN_READ] = tmp;
628	}
629
630	/* in0-2 can have dynamic limits (W83795G only) */
631	if (data->has_dyn_in) {
632		u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
633		u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
634
635		for (i = 0; i < 3; i++) {
636			if (!(data->has_dyn_in & (1 << i)))
637				continue;
638			data->in[i][IN_MAX] =
639				w83795_read(client, W83795_REG_IN[i][IN_MAX]);
640			data->in[i][IN_LOW] =
641				w83795_read(client, W83795_REG_IN[i][IN_LOW]);
642			data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
643			data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
644		}
645	}
646
647	/* Update fan */
648	for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
649		if (!(data->has_fan & (1 << i)))
650			continue;
651		data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
652		data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
653	}
654
655	/* Update temperature */
656	for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
657		data->temp[i][TEMP_READ] =
658			w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
659		data->temp_read_vrlsb[i] =
660			w83795_read(client, W83795_REG_VRLSB);
661	}
662
663	/* Update dts temperature */
664	if (data->enable_dts) {
665		for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
666			if (!(data->has_dts & (1 << i)))
667				continue;
668			data->dts[i] =
669				w83795_read(client, W83795_REG_DTS(i));
670			data->dts_read_vrlsb[i] =
671				w83795_read(client, W83795_REG_VRLSB);
672		}
673	}
674
675	/* Update pwm output */
676	for (i = 0; i < data->has_pwm; i++) {
677		data->pwm[i][PWM_OUTPUT] =
678		    w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
679	}
680
681	/*
682	 * Update intrusion and alarms
683	 * It is important to read intrusion first, because reading from
684	 * register SMI STS6 clears the interrupt status temporarily.
685	 */
686	tmp = w83795_read(client, W83795_REG_ALARM_CTRL);
687	/* Switch to interrupt status for intrusion if needed */
688	if (tmp & ALARM_CTRL_RTSACS)
689		w83795_write(client, W83795_REG_ALARM_CTRL,
690			     tmp & ~ALARM_CTRL_RTSACS);
691	intrusion = w83795_read(client, W83795_REG_ALARM(5)) & (1 << 6);
692	/* Switch to real-time alarms */
693	w83795_write(client, W83795_REG_ALARM_CTRL, tmp | ALARM_CTRL_RTSACS);
694	for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
695		data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
696	data->alarms[5] |= intrusion;
697	/* Restore original configuration if needed */
698	if (!(tmp & ALARM_CTRL_RTSACS))
699		w83795_write(client, W83795_REG_ALARM_CTRL,
700			     tmp & ~ALARM_CTRL_RTSACS);
701
702	data->last_updated = jiffies;
703	data->valid = 1;
704
705END:
706	mutex_unlock(&data->update_lock);
707	return data;
708}
709
710/*
711 * Sysfs attributes
712 */
713
714#define ALARM_STATUS      0
715#define BEEP_ENABLE       1
716static ssize_t
717show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
718{
719	struct w83795_data *data = w83795_update_device(dev);
720	struct sensor_device_attribute_2 *sensor_attr =
721	    to_sensor_dev_attr_2(attr);
722	int nr = sensor_attr->nr;
723	int index = sensor_attr->index >> 3;
724	int bit = sensor_attr->index & 0x07;
725	u8 val;
726
727	if (nr == ALARM_STATUS)
728		val = (data->alarms[index] >> bit) & 1;
729	else		/* BEEP_ENABLE */
730		val = (data->beeps[index] >> bit) & 1;
731
732	return sprintf(buf, "%u\n", val);
733}
734
735static ssize_t
736store_beep(struct device *dev, struct device_attribute *attr,
737	   const char *buf, size_t count)
738{
739	struct i2c_client *client = to_i2c_client(dev);
740	struct w83795_data *data = i2c_get_clientdata(client);
741	struct sensor_device_attribute_2 *sensor_attr =
742	    to_sensor_dev_attr_2(attr);
743	int index = sensor_attr->index >> 3;
744	int shift = sensor_attr->index & 0x07;
745	u8 beep_bit = 1 << shift;
746	unsigned long val;
747
748	if (kstrtoul(buf, 10, &val) < 0)
749		return -EINVAL;
750	if (val != 0 && val != 1)
751		return -EINVAL;
752
753	mutex_lock(&data->update_lock);
754	data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
755	data->beeps[index] &= ~beep_bit;
756	data->beeps[index] |= val << shift;
757	w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
758	mutex_unlock(&data->update_lock);
759
760	return count;
761}
762
763/* Write 0 to clear chassis alarm */
764static ssize_t
765store_chassis_clear(struct device *dev,
766		    struct device_attribute *attr, const char *buf,
767		    size_t count)
768{
769	struct i2c_client *client = to_i2c_client(dev);
770	struct w83795_data *data = i2c_get_clientdata(client);
771	unsigned long val;
772
773	if (kstrtoul(buf, 10, &val) < 0 || val != 0)
774		return -EINVAL;
775
776	mutex_lock(&data->update_lock);
777	val = w83795_read(client, W83795_REG_CLR_CHASSIS);
778	val |= 0x80;
779	w83795_write(client, W83795_REG_CLR_CHASSIS, val);
780
781	/* Clear status and force cache refresh */
782	w83795_read(client, W83795_REG_ALARM(5));
783	data->valid = 0;
784	mutex_unlock(&data->update_lock);
785	return count;
786}
787
788#define FAN_INPUT     0
789#define FAN_MIN       1
790static ssize_t
791show_fan(struct device *dev, struct device_attribute *attr, char *buf)
792{
793	struct sensor_device_attribute_2 *sensor_attr =
794	    to_sensor_dev_attr_2(attr);
795	int nr = sensor_attr->nr;
796	int index = sensor_attr->index;
797	struct w83795_data *data = w83795_update_device(dev);
798	u16 val;
799
800	if (nr == FAN_INPUT)
801		val = data->fan[index] & 0x0fff;
802	else
803		val = data->fan_min[index] & 0x0fff;
804
805	return sprintf(buf, "%lu\n", fan_from_reg(val));
806}
807
808static ssize_t
809store_fan_min(struct device *dev, struct device_attribute *attr,
810	      const char *buf, size_t count)
811{
812	struct sensor_device_attribute_2 *sensor_attr =
813	    to_sensor_dev_attr_2(attr);
814	int index = sensor_attr->index;
815	struct i2c_client *client = to_i2c_client(dev);
816	struct w83795_data *data = i2c_get_clientdata(client);
817	unsigned long val;
818
819	if (kstrtoul(buf, 10, &val))
820		return -EINVAL;
821	val = fan_to_reg(val);
822
823	mutex_lock(&data->update_lock);
824	data->fan_min[index] = val;
825	w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
826	val &= 0x0f;
827	if (index & 1) {
828		val <<= 4;
829		val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
830		       & 0x0f;
831	} else {
832		val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
833		       & 0xf0;
834	}
835	w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
836	mutex_unlock(&data->update_lock);
837
838	return count;
839}
840
841static ssize_t
842show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
843{
844	struct w83795_data *data;
845	struct sensor_device_attribute_2 *sensor_attr =
846	    to_sensor_dev_attr_2(attr);
847	int nr = sensor_attr->nr;
848	int index = sensor_attr->index;
849	unsigned int val;
850
851	data = nr == PWM_OUTPUT ? w83795_update_device(dev)
852				: w83795_update_pwm_config(dev);
853
854	switch (nr) {
855	case PWM_STOP_TIME:
856		val = time_from_reg(data->pwm[index][nr]);
857		break;
858	case PWM_FREQ:
859		val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
860		break;
861	default:
862		val = data->pwm[index][nr];
863		break;
864	}
865
866	return sprintf(buf, "%u\n", val);
867}
868
869static ssize_t
870store_pwm(struct device *dev, struct device_attribute *attr,
871	  const char *buf, size_t count)
872{
873	struct i2c_client *client = to_i2c_client(dev);
874	struct w83795_data *data = i2c_get_clientdata(client);
875	struct sensor_device_attribute_2 *sensor_attr =
876	    to_sensor_dev_attr_2(attr);
877	int nr = sensor_attr->nr;
878	int index = sensor_attr->index;
879	unsigned long val;
880
881	if (kstrtoul(buf, 10, &val) < 0)
882		return -EINVAL;
883
884	mutex_lock(&data->update_lock);
885	switch (nr) {
886	case PWM_STOP_TIME:
887		val = time_to_reg(val);
888		break;
889	case PWM_FREQ:
890		val = pwm_freq_to_reg(val, data->clkin);
891		break;
892	default:
893		val = SENSORS_LIMIT(val, 0, 0xff);
894		break;
895	}
896	w83795_write(client, W83795_REG_PWM(index, nr), val);
897	data->pwm[index][nr] = val;
898	mutex_unlock(&data->update_lock);
899	return count;
900}
901
902static ssize_t
903show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
904{
905	struct sensor_device_attribute_2 *sensor_attr =
906	    to_sensor_dev_attr_2(attr);
907	struct w83795_data *data = w83795_update_pwm_config(dev);
908	int index = sensor_attr->index;
909	u8 tmp;
910
911	/* Speed cruise mode */
912	if (data->pwm_fcms[0] & (1 << index)) {
913		tmp = 2;
914		goto out;
915	}
916	/* Thermal cruise or SmartFan IV mode */
917	for (tmp = 0; tmp < 6; tmp++) {
918		if (data->pwm_tfmr[tmp] & (1 << index)) {
919			tmp = 3;
920			goto out;
921		}
922	}
923	/* Manual mode */
924	tmp = 1;
925
926out:
927	return sprintf(buf, "%u\n", tmp);
928}
929
930static ssize_t
931store_pwm_enable(struct device *dev, struct device_attribute *attr,
932	  const char *buf, size_t count)
933{
934	struct i2c_client *client = to_i2c_client(dev);
935	struct w83795_data *data = w83795_update_pwm_config(dev);
936	struct sensor_device_attribute_2 *sensor_attr =
937	    to_sensor_dev_attr_2(attr);
938	int index = sensor_attr->index;
939	unsigned long val;
940	int i;
941
942	if (kstrtoul(buf, 10, &val) < 0)
943		return -EINVAL;
944	if (val < 1 || val > 2)
945		return -EINVAL;
946
947#ifndef CONFIG_SENSORS_W83795_FANCTRL
948	if (val > 1) {
949		dev_warn(dev, "Automatic fan speed control support disabled\n");
950		dev_warn(dev, "Build with CONFIG_SENSORS_W83795_FANCTRL=y if you want it\n");
951		return -EOPNOTSUPP;
952	}
953#endif
954
955	mutex_lock(&data->update_lock);
956	switch (val) {
957	case 1:
958		/* Clear speed cruise mode bits */
959		data->pwm_fcms[0] &= ~(1 << index);
960		w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
961		/* Clear thermal cruise mode bits */
962		for (i = 0; i < 6; i++) {
963			data->pwm_tfmr[i] &= ~(1 << index);
964			w83795_write(client, W83795_REG_TFMR(i),
965				data->pwm_tfmr[i]);
966		}
967		break;
968	case 2:
969		data->pwm_fcms[0] |= (1 << index);
970		w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
971		break;
972	}
973	mutex_unlock(&data->update_lock);
974	return count;
975}
976
977static ssize_t
978show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
979{
980	struct w83795_data *data = w83795_update_pwm_config(dev);
981	int index = to_sensor_dev_attr_2(attr)->index;
982	unsigned int mode;
983
984	if (data->pwm_fomc & (1 << index))
985		mode = 0;	/* DC */
986	else
987		mode = 1;	/* PWM */
988
989	return sprintf(buf, "%u\n", mode);
990}
991
992/*
993 * Check whether a given temperature source can ever be useful.
994 * Returns the number of selectable temperature channels which are
995 * enabled.
996 */
997static int w83795_tss_useful(const struct w83795_data *data, int tsrc)
998{
999	int useful = 0, i;
1000
1001	for (i = 0; i < 4; i++) {
1002		if (tss_map[i][tsrc] == TSS_MAP_RESERVED)
1003			continue;
1004		if (tss_map[i][tsrc] < 6)	/* Analog */
1005			useful += (data->has_temp >> tss_map[i][tsrc]) & 1;
1006		else				/* Digital */
1007			useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1;
1008	}
1009
1010	return useful;
1011}
1012
1013static ssize_t
1014show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
1015{
1016	struct sensor_device_attribute_2 *sensor_attr =
1017	    to_sensor_dev_attr_2(attr);
1018	struct w83795_data *data = w83795_update_pwm_config(dev);
1019	int index = sensor_attr->index;
1020	u8 tmp = data->temp_src[index / 2];
1021
1022	if (index & 1)
1023		tmp >>= 4;	/* Pick high nibble */
1024	else
1025		tmp &= 0x0f;	/* Pick low nibble */
1026
1027	/* Look-up the actual temperature channel number */
1028	if (tmp >= 4 || tss_map[tmp][index] == TSS_MAP_RESERVED)
1029		return -EINVAL;		/* Shouldn't happen */
1030
1031	return sprintf(buf, "%u\n", (unsigned int)tss_map[tmp][index] + 1);
1032}
1033
1034static ssize_t
1035store_temp_src(struct device *dev, struct device_attribute *attr,
1036	  const char *buf, size_t count)
1037{
1038	struct i2c_client *client = to_i2c_client(dev);
1039	struct w83795_data *data = w83795_update_pwm_config(dev);
1040	struct sensor_device_attribute_2 *sensor_attr =
1041	    to_sensor_dev_attr_2(attr);
1042	int index = sensor_attr->index;
1043	int tmp;
1044	unsigned long channel;
1045	u8 val = index / 2;
1046
1047	if (kstrtoul(buf, 10, &channel) < 0 ||
1048	    channel < 1 || channel > 14)
1049		return -EINVAL;
1050
1051	/* Check if request can be fulfilled */
1052	for (tmp = 0; tmp < 4; tmp++) {
1053		if (tss_map[tmp][index] == channel - 1)
1054			break;
1055	}
1056	if (tmp == 4)	/* No match */
1057		return -EINVAL;
1058
1059	mutex_lock(&data->update_lock);
1060	if (index & 1) {
1061		tmp <<= 4;
1062		data->temp_src[val] &= 0x0f;
1063	} else {
1064		data->temp_src[val] &= 0xf0;
1065	}
1066	data->temp_src[val] |= tmp;
1067	w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
1068	mutex_unlock(&data->update_lock);
1069
1070	return count;
1071}
1072
1073#define TEMP_PWM_ENABLE   0
1074#define TEMP_PWM_FAN_MAP  1
1075static ssize_t
1076show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
1077		     char *buf)
1078{
1079	struct w83795_data *data = w83795_update_pwm_config(dev);
1080	struct sensor_device_attribute_2 *sensor_attr =
1081	    to_sensor_dev_attr_2(attr);
1082	int nr = sensor_attr->nr;
1083	int index = sensor_attr->index;
1084	u8 tmp = 0xff;
1085
1086	switch (nr) {
1087	case TEMP_PWM_ENABLE:
1088		tmp = (data->pwm_fcms[1] >> index) & 1;
1089		if (tmp)
1090			tmp = 4;
1091		else
1092			tmp = 3;
1093		break;
1094	case TEMP_PWM_FAN_MAP:
1095		tmp = data->pwm_tfmr[index];
1096		break;
1097	}
1098
1099	return sprintf(buf, "%u\n", tmp);
1100}
1101
1102static ssize_t
1103store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
1104	  const char *buf, size_t count)
1105{
1106	struct i2c_client *client = to_i2c_client(dev);
1107	struct w83795_data *data = w83795_update_pwm_config(dev);
1108	struct sensor_device_attribute_2 *sensor_attr =
1109	    to_sensor_dev_attr_2(attr);
1110	int nr = sensor_attr->nr;
1111	int index = sensor_attr->index;
1112	unsigned long tmp;
1113
1114	if (kstrtoul(buf, 10, &tmp) < 0)
1115		return -EINVAL;
1116
1117	switch (nr) {
1118	case TEMP_PWM_ENABLE:
1119		if (tmp != 3 && tmp != 4)
1120			return -EINVAL;
1121		tmp -= 3;
1122		mutex_lock(&data->update_lock);
1123		data->pwm_fcms[1] &= ~(1 << index);
1124		data->pwm_fcms[1] |= tmp << index;
1125		w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
1126		mutex_unlock(&data->update_lock);
1127		break;
1128	case TEMP_PWM_FAN_MAP:
1129		mutex_lock(&data->update_lock);
1130		tmp = SENSORS_LIMIT(tmp, 0, 0xff);
1131		w83795_write(client, W83795_REG_TFMR(index), tmp);
1132		data->pwm_tfmr[index] = tmp;
1133		mutex_unlock(&data->update_lock);
1134		break;
1135	}
1136	return count;
1137}
1138
1139#define FANIN_TARGET   0
1140#define FANIN_TOL      1
1141static ssize_t
1142show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
1143{
1144	struct w83795_data *data = w83795_update_pwm_config(dev);
1145	struct sensor_device_attribute_2 *sensor_attr =
1146	    to_sensor_dev_attr_2(attr);
1147	int nr = sensor_attr->nr;
1148	int index = sensor_attr->index;
1149	u16 tmp = 0;
1150
1151	switch (nr) {
1152	case FANIN_TARGET:
1153		tmp = fan_from_reg(data->target_speed[index]);
1154		break;
1155	case FANIN_TOL:
1156		tmp = data->tol_speed;
1157		break;
1158	}
1159
1160	return sprintf(buf, "%u\n", tmp);
1161}
1162
1163static ssize_t
1164store_fanin(struct device *dev, struct device_attribute *attr,
1165	  const char *buf, size_t count)
1166{
1167	struct i2c_client *client = to_i2c_client(dev);
1168	struct w83795_data *data = i2c_get_clientdata(client);
1169	struct sensor_device_attribute_2 *sensor_attr =
1170	    to_sensor_dev_attr_2(attr);
1171	int nr = sensor_attr->nr;
1172	int index = sensor_attr->index;
1173	unsigned long val;
1174
1175	if (kstrtoul(buf, 10, &val) < 0)
1176		return -EINVAL;
1177
1178	mutex_lock(&data->update_lock);
1179	switch (nr) {
1180	case FANIN_TARGET:
1181		val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
1182		w83795_write(client, W83795_REG_FTSH(index), val >> 4);
1183		w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
1184		data->target_speed[index] = val;
1185		break;
1186	case FANIN_TOL:
1187		val = SENSORS_LIMIT(val, 0, 0x3f);
1188		w83795_write(client, W83795_REG_TFTS, val);
1189		data->tol_speed = val;
1190		break;
1191	}
1192	mutex_unlock(&data->update_lock);
1193
1194	return count;
1195}
1196
1197
1198static ssize_t
1199show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1200{
1201	struct w83795_data *data = w83795_update_pwm_config(dev);
1202	struct sensor_device_attribute_2 *sensor_attr =
1203	    to_sensor_dev_attr_2(attr);
1204	int nr = sensor_attr->nr;
1205	int index = sensor_attr->index;
1206	long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1207
1208	return sprintf(buf, "%ld\n", tmp);
1209}
1210
1211static ssize_t
1212store_temp_pwm(struct device *dev, struct device_attribute *attr,
1213	  const char *buf, size_t count)
1214{
1215	struct i2c_client *client = to_i2c_client(dev);
1216	struct w83795_data *data = i2c_get_clientdata(client);
1217	struct sensor_device_attribute_2 *sensor_attr =
1218	    to_sensor_dev_attr_2(attr);
1219	int nr = sensor_attr->nr;
1220	int index = sensor_attr->index;
1221	unsigned long val;
1222	u8 tmp;
1223
1224	if (kstrtoul(buf, 10, &val) < 0)
1225		return -EINVAL;
1226	val /= 1000;
1227
1228	mutex_lock(&data->update_lock);
1229	switch (nr) {
1230	case TEMP_PWM_TTTI:
1231		val = SENSORS_LIMIT(val, 0, 0x7f);
1232		w83795_write(client, W83795_REG_TTTI(index), val);
1233		break;
1234	case TEMP_PWM_CTFS:
1235		val = SENSORS_LIMIT(val, 0, 0x7f);
1236		w83795_write(client, W83795_REG_CTFS(index), val);
1237		break;
1238	case TEMP_PWM_HCT:
1239		val = SENSORS_LIMIT(val, 0, 0x0f);
1240		tmp = w83795_read(client, W83795_REG_HT(index));
1241		tmp &= 0x0f;
1242		tmp |= (val << 4) & 0xf0;
1243		w83795_write(client, W83795_REG_HT(index), tmp);
1244		break;
1245	case TEMP_PWM_HOT:
1246		val = SENSORS_LIMIT(val, 0, 0x0f);
1247		tmp = w83795_read(client, W83795_REG_HT(index));
1248		tmp &= 0xf0;
1249		tmp |= val & 0x0f;
1250		w83795_write(client, W83795_REG_HT(index), tmp);
1251		break;
1252	}
1253	data->pwm_temp[index][nr] = val;
1254	mutex_unlock(&data->update_lock);
1255
1256	return count;
1257}
1258
1259static ssize_t
1260show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1261{
1262	struct w83795_data *data = w83795_update_pwm_config(dev);
1263	struct sensor_device_attribute_2 *sensor_attr =
1264	    to_sensor_dev_attr_2(attr);
1265	int nr = sensor_attr->nr;
1266	int index = sensor_attr->index;
1267
1268	return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1269}
1270
1271static ssize_t
1272store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1273	  const char *buf, size_t count)
1274{
1275	struct i2c_client *client = to_i2c_client(dev);
1276	struct w83795_data *data = i2c_get_clientdata(client);
1277	struct sensor_device_attribute_2 *sensor_attr =
1278	    to_sensor_dev_attr_2(attr);
1279	int nr = sensor_attr->nr;
1280	int index = sensor_attr->index;
1281	unsigned long val;
1282
1283	if (kstrtoul(buf, 10, &val) < 0)
1284		return -EINVAL;
1285
1286	mutex_lock(&data->update_lock);
1287	w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1288	data->sf4_reg[index][SF4_PWM][nr] = val;
1289	mutex_unlock(&data->update_lock);
1290
1291	return count;
1292}
1293
1294static ssize_t
1295show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1296{
1297	struct w83795_data *data = w83795_update_pwm_config(dev);
1298	struct sensor_device_attribute_2 *sensor_attr =
1299	    to_sensor_dev_attr_2(attr);
1300	int nr = sensor_attr->nr;
1301	int index = sensor_attr->index;
1302
1303	return sprintf(buf, "%u\n",
1304		(data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1305}
1306
1307static ssize_t
1308store_sf4_temp(struct device *dev, struct device_attribute *attr,
1309	  const char *buf, size_t count)
1310{
1311	struct i2c_client *client = to_i2c_client(dev);
1312	struct w83795_data *data = i2c_get_clientdata(client);
1313	struct sensor_device_attribute_2 *sensor_attr =
1314	    to_sensor_dev_attr_2(attr);
1315	int nr = sensor_attr->nr;
1316	int index = sensor_attr->index;
1317	unsigned long val;
1318
1319	if (kstrtoul(buf, 10, &val) < 0)
1320		return -EINVAL;
1321	val /= 1000;
1322
1323	mutex_lock(&data->update_lock);
1324	w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1325	data->sf4_reg[index][SF4_TEMP][nr] = val;
1326	mutex_unlock(&data->update_lock);
1327
1328	return count;
1329}
1330
1331
1332static ssize_t
1333show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1334{
1335	struct sensor_device_attribute_2 *sensor_attr =
1336	    to_sensor_dev_attr_2(attr);
1337	int nr = sensor_attr->nr;
1338	int index = sensor_attr->index;
1339	struct w83795_data *data = w83795_update_device(dev);
1340	long temp = temp_from_reg(data->temp[index][nr]);
1341
1342	if (nr == TEMP_READ)
1343		temp += (data->temp_read_vrlsb[index] >> 6) * 250;
1344	return sprintf(buf, "%ld\n", temp);
1345}
1346
1347static ssize_t
1348store_temp(struct device *dev, struct device_attribute *attr,
1349	   const char *buf, size_t count)
1350{
1351	struct sensor_device_attribute_2 *sensor_attr =
1352	    to_sensor_dev_attr_2(attr);
1353	int nr = sensor_attr->nr;
1354	int index = sensor_attr->index;
1355	struct i2c_client *client = to_i2c_client(dev);
1356	struct w83795_data *data = i2c_get_clientdata(client);
1357	long tmp;
1358
1359	if (kstrtol(buf, 10, &tmp) < 0)
1360		return -EINVAL;
1361
1362	mutex_lock(&data->update_lock);
1363	data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1364	w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1365	mutex_unlock(&data->update_lock);
1366	return count;
1367}
1368
1369
1370static ssize_t
1371show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1372{
1373	struct w83795_data *data = dev_get_drvdata(dev);
1374	int tmp;
1375
1376	if (data->enable_dts & 2)
1377		tmp = 5;
1378	else
1379		tmp = 6;
1380
1381	return sprintf(buf, "%d\n", tmp);
1382}
1383
1384static ssize_t
1385show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1386{
1387	struct sensor_device_attribute_2 *sensor_attr =
1388	    to_sensor_dev_attr_2(attr);
1389	int index = sensor_attr->index;
1390	struct w83795_data *data = w83795_update_device(dev);
1391	long temp = temp_from_reg(data->dts[index]);
1392
1393	temp += (data->dts_read_vrlsb[index] >> 6) * 250;
1394	return sprintf(buf, "%ld\n", temp);
1395}
1396
1397static ssize_t
1398show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1399{
1400	struct sensor_device_attribute_2 *sensor_attr =
1401	    to_sensor_dev_attr_2(attr);
1402	int nr = sensor_attr->nr;
1403	struct w83795_data *data = dev_get_drvdata(dev);
1404	long temp = temp_from_reg(data->dts_ext[nr]);
1405
1406	return sprintf(buf, "%ld\n", temp);
1407}
1408
1409static ssize_t
1410store_dts_ext(struct device *dev, struct device_attribute *attr,
1411	   const char *buf, size_t count)
1412{
1413	struct sensor_device_attribute_2 *sensor_attr =
1414	    to_sensor_dev_attr_2(attr);
1415	int nr = sensor_attr->nr;
1416	struct i2c_client *client = to_i2c_client(dev);
1417	struct w83795_data *data = i2c_get_clientdata(client);
1418	long tmp;
1419
1420	if (kstrtol(buf, 10, &tmp) < 0)
1421		return -EINVAL;
1422
1423	mutex_lock(&data->update_lock);
1424	data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1425	w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1426	mutex_unlock(&data->update_lock);
1427	return count;
1428}
1429
1430
1431static ssize_t
1432show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1433{
1434	struct w83795_data *data = dev_get_drvdata(dev);
1435	struct sensor_device_attribute_2 *sensor_attr =
1436	    to_sensor_dev_attr_2(attr);
1437	int index = sensor_attr->index;
1438	int tmp;
1439
1440	if (data->temp_mode & (1 << index))
1441		tmp = 3;	/* Thermal diode */
1442	else
1443		tmp = 4;	/* Thermistor */
1444
1445	return sprintf(buf, "%d\n", tmp);
1446}
1447
1448/* Only for temp1-4 (temp5-6 can only be thermistor) */
1449static ssize_t
1450store_temp_mode(struct device *dev, struct device_attribute *attr,
1451		const char *buf, size_t count)
1452{
1453	struct i2c_client *client = to_i2c_client(dev);
1454	struct w83795_data *data = i2c_get_clientdata(client);
1455	struct sensor_device_attribute_2 *sensor_attr =
1456	    to_sensor_dev_attr_2(attr);
1457	int index = sensor_attr->index;
1458	int reg_shift;
1459	unsigned long val;
1460	u8 tmp;
1461
1462	if (kstrtoul(buf, 10, &val) < 0)
1463		return -EINVAL;
1464	if ((val != 4) && (val != 3))
1465		return -EINVAL;
1466
1467	mutex_lock(&data->update_lock);
1468	if (val == 3) {
1469		/* Thermal diode */
1470		val = 0x01;
1471		data->temp_mode |= 1 << index;
1472	} else if (val == 4) {
1473		/* Thermistor */
1474		val = 0x03;
1475		data->temp_mode &= ~(1 << index);
1476	}
1477
1478	reg_shift = 2 * index;
1479	tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1480	tmp &= ~(0x03 << reg_shift);
1481	tmp |= val << reg_shift;
1482	w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
1483
1484	mutex_unlock(&data->update_lock);
1485	return count;
1486}
1487
1488
1489/* show/store VIN */
1490static ssize_t
1491show_in(struct device *dev, struct device_attribute *attr, char *buf)
1492{
1493	struct sensor_device_attribute_2 *sensor_attr =
1494	    to_sensor_dev_attr_2(attr);
1495	int nr = sensor_attr->nr;
1496	int index = sensor_attr->index;
1497	struct w83795_data *data = w83795_update_device(dev);
1498	u16 val = data->in[index][nr];
1499	u8 lsb_idx;
1500
1501	switch (nr) {
1502	case IN_READ:
1503		/* calculate this value again by sensors as sensors3.conf */
1504		if ((index >= 17) &&
1505		    !((data->has_gain >> (index - 17)) & 1))
1506			val *= 8;
1507		break;
1508	case IN_MAX:
1509	case IN_LOW:
1510		lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1511		val <<= 2;
1512		val |= (data->in_lsb[lsb_idx][nr] >>
1513			IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
1514		if ((index >= 17) &&
1515		    !((data->has_gain >> (index - 17)) & 1))
1516			val *= 8;
1517		break;
1518	}
1519	val = in_from_reg(index, val);
1520
1521	return sprintf(buf, "%d\n", val);
1522}
1523
1524static ssize_t
1525store_in(struct device *dev, struct device_attribute *attr,
1526	 const char *buf, size_t count)
1527{
1528	struct sensor_device_attribute_2 *sensor_attr =
1529	    to_sensor_dev_attr_2(attr);
1530	int nr = sensor_attr->nr;
1531	int index = sensor_attr->index;
1532	struct i2c_client *client = to_i2c_client(dev);
1533	struct w83795_data *data = i2c_get_clientdata(client);
1534	unsigned long val;
1535	u8 tmp;
1536	u8 lsb_idx;
1537
1538	if (kstrtoul(buf, 10, &val) < 0)
1539		return -EINVAL;
1540	val = in_to_reg(index, val);
1541
1542	if ((index >= 17) &&
1543	    !((data->has_gain >> (index - 17)) & 1))
1544		val /= 8;
1545	val = SENSORS_LIMIT(val, 0, 0x3FF);
1546	mutex_lock(&data->update_lock);
1547
1548	lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1549	tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1550	tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1551	tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1552	w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1553	data->in_lsb[lsb_idx][nr] = tmp;
1554
1555	tmp = (val >> 2) & 0xff;
1556	w83795_write(client, W83795_REG_IN[index][nr], tmp);
1557	data->in[index][nr] = tmp;
1558
1559	mutex_unlock(&data->update_lock);
1560	return count;
1561}
1562
1563
1564#ifdef CONFIG_SENSORS_W83795_FANCTRL
1565static ssize_t
1566show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1567{
1568	struct sensor_device_attribute_2 *sensor_attr =
1569	    to_sensor_dev_attr_2(attr);
1570	int nr = sensor_attr->nr;
1571	struct w83795_data *data = w83795_update_pwm_config(dev);
1572	u16 val = data->setup_pwm[nr];
1573
1574	switch (nr) {
1575	case SETUP_PWM_UPTIME:
1576	case SETUP_PWM_DOWNTIME:
1577		val = time_from_reg(val);
1578		break;
1579	}
1580
1581	return sprintf(buf, "%d\n", val);
1582}
1583
1584static ssize_t
1585store_sf_setup(struct device *dev, struct device_attribute *attr,
1586	 const char *buf, size_t count)
1587{
1588	struct sensor_device_attribute_2 *sensor_attr =
1589	    to_sensor_dev_attr_2(attr);
1590	int nr = sensor_attr->nr;
1591	struct i2c_client *client = to_i2c_client(dev);
1592	struct w83795_data *data = i2c_get_clientdata(client);
1593	unsigned long val;
1594
1595	if (kstrtoul(buf, 10, &val) < 0)
1596		return -EINVAL;
1597
1598	switch (nr) {
1599	case SETUP_PWM_DEFAULT:
1600		val = SENSORS_LIMIT(val, 0, 0xff);
1601		break;
1602	case SETUP_PWM_UPTIME:
1603	case SETUP_PWM_DOWNTIME:
1604		val = time_to_reg(val);
1605		if (val == 0)
1606			return -EINVAL;
1607		break;
1608	}
1609
1610	mutex_lock(&data->update_lock);
1611	data->setup_pwm[nr] = val;
1612	w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1613	mutex_unlock(&data->update_lock);
1614	return count;
1615}
1616#endif
1617
1618
1619#define NOT_USED			-1
1620
1621/*
1622 * Don't change the attribute order, _max, _min and _beep are accessed by index
1623 * somewhere else in the code
1624 */
1625#define SENSOR_ATTR_IN(index) {						\
1626	SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL,	\
1627		IN_READ, index), \
1628	SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in,	\
1629		store_in, IN_MAX, index),				\
1630	SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in,	\
1631		store_in, IN_LOW, index),				\
1632	SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep,	\
1633		NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1634	SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO,		\
1635		show_alarm_beep, store_beep, BEEP_ENABLE,		\
1636		index + ((index > 14) ? 1 : 0)) }
1637
1638/*
1639 * Don't change the attribute order, _beep is accessed by index
1640 * somewhere else in the code
1641 */
1642#define SENSOR_ATTR_FAN(index) {					\
1643	SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan,		\
1644		NULL, FAN_INPUT, index - 1), \
1645	SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO,		\
1646		show_fan, store_fan_min, FAN_MIN, index - 1),	\
1647	SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep,	\
1648		NULL, ALARM_STATUS, index + 31),			\
1649	SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO,		\
1650		show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
1651
1652#define SENSOR_ATTR_PWM(index) {					\
1653	SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm,		\
1654		store_pwm, PWM_OUTPUT, index - 1),			\
1655	SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO,		\
1656		show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1657	SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO,			\
1658		show_pwm_mode, NULL, NOT_USED, index - 1),		\
1659	SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO,		\
1660		show_pwm, store_pwm, PWM_FREQ, index - 1),		\
1661	SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO,		\
1662		show_pwm, store_pwm, PWM_NONSTOP, index - 1),		\
1663	SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO,		\
1664		show_pwm, store_pwm, PWM_START, index - 1),		\
1665	SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO,	\
1666		show_pwm, store_pwm, PWM_STOP_TIME, index - 1),	 \
1667	SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1668		show_fanin, store_fanin, FANIN_TARGET, index - 1) }
1669
1670/*
1671 * Don't change the attribute order, _beep is accessed by index
1672 * somewhere else in the code
1673 */
1674#define SENSOR_ATTR_DTS(index) {					\
1675	SENSOR_ATTR_2(temp##index##_type, S_IRUGO ,		\
1676		show_dts_mode, NULL, NOT_USED, index - 7),	\
1677	SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts,		\
1678		NULL, NOT_USED, index - 7),				\
1679	SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
1680		store_dts_ext, DTS_CRIT, NOT_USED),			\
1681	SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR,	\
1682		show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED),	\
1683	SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
1684		store_dts_ext, DTS_WARN, NOT_USED),			\
1685	SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR,	\
1686		show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED),	\
1687	SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO,			\
1688		show_alarm_beep, NULL, ALARM_STATUS, index + 17),	\
1689	SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO,		\
1690		show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
1691
1692/*
1693 * Don't change the attribute order, _beep is accessed by index
1694 * somewhere else in the code
1695 */
1696#define SENSOR_ATTR_TEMP(index) {					\
1697	SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
1698		show_temp_mode, store_temp_mode, NOT_USED, index - 1),	\
1699	SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp,		\
1700		NULL, TEMP_READ, index - 1),				\
1701	SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp,	\
1702		store_temp, TEMP_CRIT, index - 1),			\
1703	SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR,	\
1704		show_temp, store_temp, TEMP_CRIT_HYST, index - 1),	\
1705	SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp,	\
1706		store_temp, TEMP_WARN, index - 1),			\
1707	SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR,	\
1708		show_temp, store_temp, TEMP_WARN_HYST, index - 1),	\
1709	SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO,			\
1710		show_alarm_beep, NULL, ALARM_STATUS,			\
1711		index + (index > 4 ? 11 : 17)),				\
1712	SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO,		\
1713		show_alarm_beep, store_beep, BEEP_ENABLE,		\
1714		index + (index > 4 ? 11 : 17)),				\
1715	SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO,	\
1716		show_temp_pwm_enable, store_temp_pwm_enable,		\
1717		TEMP_PWM_ENABLE, index - 1),				\
1718	SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1719		show_temp_pwm_enable, store_temp_pwm_enable,		\
1720		TEMP_PWM_FAN_MAP, index - 1),				\
1721	SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO,		\
1722		show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
1723	SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO,		\
1724		show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
1725	SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO,	\
1726		show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1727	SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO,	\
1728		show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1729	SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1730		show_sf4_pwm, store_sf4_pwm, 0, index - 1),		\
1731	SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1732		show_sf4_pwm, store_sf4_pwm, 1, index - 1),		\
1733	SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1734		show_sf4_pwm, store_sf4_pwm, 2, index - 1),		\
1735	SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1736		show_sf4_pwm, store_sf4_pwm, 3, index - 1),		\
1737	SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1738		show_sf4_pwm, store_sf4_pwm, 4, index - 1),		\
1739	SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1740		show_sf4_pwm, store_sf4_pwm, 5, index - 1),		\
1741	SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1742		show_sf4_pwm, store_sf4_pwm, 6, index - 1),		\
1743	SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1744		show_sf4_temp, store_sf4_temp, 0, index - 1),		\
1745	SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1746		show_sf4_temp, store_sf4_temp, 1, index - 1),		\
1747	SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1748		show_sf4_temp, store_sf4_temp, 2, index - 1),		\
1749	SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1750		show_sf4_temp, store_sf4_temp, 3, index - 1),		\
1751	SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1752		show_sf4_temp, store_sf4_temp, 4, index - 1),		\
1753	SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1754		show_sf4_temp, store_sf4_temp, 5, index - 1),		\
1755	SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1756		show_sf4_temp, store_sf4_temp, 6, index - 1) }
1757
1758
1759static struct sensor_device_attribute_2 w83795_in[][5] = {
1760	SENSOR_ATTR_IN(0),
1761	SENSOR_ATTR_IN(1),
1762	SENSOR_ATTR_IN(2),
1763	SENSOR_ATTR_IN(3),
1764	SENSOR_ATTR_IN(4),
1765	SENSOR_ATTR_IN(5),
1766	SENSOR_ATTR_IN(6),
1767	SENSOR_ATTR_IN(7),
1768	SENSOR_ATTR_IN(8),
1769	SENSOR_ATTR_IN(9),
1770	SENSOR_ATTR_IN(10),
1771	SENSOR_ATTR_IN(11),
1772	SENSOR_ATTR_IN(12),
1773	SENSOR_ATTR_IN(13),
1774	SENSOR_ATTR_IN(14),
1775	SENSOR_ATTR_IN(15),
1776	SENSOR_ATTR_IN(16),
1777	SENSOR_ATTR_IN(17),
1778	SENSOR_ATTR_IN(18),
1779	SENSOR_ATTR_IN(19),
1780	SENSOR_ATTR_IN(20),
1781};
1782
1783static const struct sensor_device_attribute_2 w83795_fan[][4] = {
1784	SENSOR_ATTR_FAN(1),
1785	SENSOR_ATTR_FAN(2),
1786	SENSOR_ATTR_FAN(3),
1787	SENSOR_ATTR_FAN(4),
1788	SENSOR_ATTR_FAN(5),
1789	SENSOR_ATTR_FAN(6),
1790	SENSOR_ATTR_FAN(7),
1791	SENSOR_ATTR_FAN(8),
1792	SENSOR_ATTR_FAN(9),
1793	SENSOR_ATTR_FAN(10),
1794	SENSOR_ATTR_FAN(11),
1795	SENSOR_ATTR_FAN(12),
1796	SENSOR_ATTR_FAN(13),
1797	SENSOR_ATTR_FAN(14),
1798};
1799
1800static const struct sensor_device_attribute_2 w83795_temp[][28] = {
1801	SENSOR_ATTR_TEMP(1),
1802	SENSOR_ATTR_TEMP(2),
1803	SENSOR_ATTR_TEMP(3),
1804	SENSOR_ATTR_TEMP(4),
1805	SENSOR_ATTR_TEMP(5),
1806	SENSOR_ATTR_TEMP(6),
1807};
1808
1809static const struct sensor_device_attribute_2 w83795_dts[][8] = {
1810	SENSOR_ATTR_DTS(7),
1811	SENSOR_ATTR_DTS(8),
1812	SENSOR_ATTR_DTS(9),
1813	SENSOR_ATTR_DTS(10),
1814	SENSOR_ATTR_DTS(11),
1815	SENSOR_ATTR_DTS(12),
1816	SENSOR_ATTR_DTS(13),
1817	SENSOR_ATTR_DTS(14),
1818};
1819
1820static const struct sensor_device_attribute_2 w83795_pwm[][8] = {
1821	SENSOR_ATTR_PWM(1),
1822	SENSOR_ATTR_PWM(2),
1823	SENSOR_ATTR_PWM(3),
1824	SENSOR_ATTR_PWM(4),
1825	SENSOR_ATTR_PWM(5),
1826	SENSOR_ATTR_PWM(6),
1827	SENSOR_ATTR_PWM(7),
1828	SENSOR_ATTR_PWM(8),
1829};
1830
1831static const struct sensor_device_attribute_2 w83795_tss[6] = {
1832	SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO,
1833		      show_temp_src, store_temp_src, NOT_USED, 0),
1834	SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO,
1835		      show_temp_src, store_temp_src, NOT_USED, 1),
1836	SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO,
1837		      show_temp_src, store_temp_src, NOT_USED, 2),
1838	SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO,
1839		      show_temp_src, store_temp_src, NOT_USED, 3),
1840	SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO,
1841		      show_temp_src, store_temp_src, NOT_USED, 4),
1842	SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO,
1843		      show_temp_src, store_temp_src, NOT_USED, 5),
1844};
1845
1846static const struct sensor_device_attribute_2 sda_single_files[] = {
1847	SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
1848		      store_chassis_clear, ALARM_STATUS, 46),
1849#ifdef CONFIG_SENSORS_W83795_FANCTRL
1850	SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1851		store_fanin, FANIN_TOL, NOT_USED),
1852	SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1853		      store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1854	SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1855		      store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1856	SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1857		      store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1858#endif
1859};
1860
1861static const struct sensor_device_attribute_2 sda_beep_files[] = {
1862	SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep,
1863		      store_beep, BEEP_ENABLE, 46),
1864	SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1865		      store_beep, BEEP_ENABLE, 47),
1866};
1867
1868/*
1869 * Driver interface
1870 */
1871
1872static void w83795_init_client(struct i2c_client *client)
1873{
1874	struct w83795_data *data = i2c_get_clientdata(client);
1875	static const u16 clkin[4] = {	/* in kHz */
1876		14318, 24000, 33333, 48000
1877	};
1878	u8 config;
1879
1880	if (reset)
1881		w83795_write(client, W83795_REG_CONFIG, 0x80);
1882
1883	/* Start monitoring if needed */
1884	config = w83795_read(client, W83795_REG_CONFIG);
1885	if (!(config & W83795_REG_CONFIG_START)) {
1886		dev_info(&client->dev, "Enabling monitoring operations\n");
1887		w83795_write(client, W83795_REG_CONFIG,
1888			     config | W83795_REG_CONFIG_START);
1889	}
1890
1891	data->clkin = clkin[(config >> 3) & 0x3];
1892	dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
1893}
1894
1895static int w83795_get_device_id(struct i2c_client *client)
1896{
1897	int device_id;
1898
1899	device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1900
1901	/*
1902	 * Special case for rev. A chips; can't be checked first because later
1903	 * revisions emulate this for compatibility
1904	 */
1905	if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1906		int alt_id;
1907
1908		alt_id = i2c_smbus_read_byte_data(client,
1909						  W83795_REG_DEVICEID_A);
1910		if (alt_id == 0x50)
1911			device_id = alt_id;
1912	}
1913
1914	return device_id;
1915}
1916
1917/* Return 0 if detection is successful, -ENODEV otherwise */
1918static int w83795_detect(struct i2c_client *client,
1919			 struct i2c_board_info *info)
1920{
1921	int bank, vendor_id, device_id, expected, i2c_addr, config;
1922	struct i2c_adapter *adapter = client->adapter;
1923	unsigned short address = client->addr;
1924	const char *chip_name;
1925
1926	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1927		return -ENODEV;
1928	bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1929	if (bank < 0 || (bank & 0x7c)) {
1930		dev_dbg(&adapter->dev,
1931			"w83795: Detection failed at addr 0x%02hx, check %s\n",
1932			address, "bank");
1933		return -ENODEV;
1934	}
1935
1936	/* Check Nuvoton vendor ID */
1937	vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1938	expected = bank & 0x80 ? 0x5c : 0xa3;
1939	if (vendor_id != expected) {
1940		dev_dbg(&adapter->dev,
1941			"w83795: Detection failed at addr 0x%02hx, check %s\n",
1942			address, "vendor id");
1943		return -ENODEV;
1944	}
1945
1946	/* Check device ID */
1947	device_id = w83795_get_device_id(client) |
1948		    (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1949	if ((device_id >> 4) != 0x795) {
1950		dev_dbg(&adapter->dev,
1951			"w83795: Detection failed at addr 0x%02hx, check %s\n",
1952			address, "device id\n");
1953		return -ENODEV;
1954	}
1955
1956	/*
1957	 * If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1958	 * should match
1959	 */
1960	if ((bank & 0x07) == 0) {
1961		i2c_addr = i2c_smbus_read_byte_data(client,
1962						    W83795_REG_I2C_ADDR);
1963		if ((i2c_addr & 0x7f) != address) {
1964			dev_dbg(&adapter->dev,
1965				"w83795: Detection failed at addr 0x%02hx, "
1966				"check %s\n", address, "i2c addr");
1967			return -ENODEV;
1968		}
1969	}
1970
1971	/*
1972	 * Check 795 chip type: 795G or 795ADG
1973	 * Usually we don't write to chips during detection, but here we don't
1974	 * quite have the choice; hopefully it's OK, we are about to return
1975	 * success anyway
1976	 */
1977	if ((bank & 0x07) != 0)
1978		i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1979					  bank & ~0x07);
1980	config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1981	if (config & W83795_REG_CONFIG_CONFIG48)
1982		chip_name = "w83795adg";
1983	else
1984		chip_name = "w83795g";
1985
1986	strlcpy(info->type, chip_name, I2C_NAME_SIZE);
1987	dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1988		 'A' + (device_id & 0xf), address);
1989
1990	return 0;
1991}
1992
1993#ifdef CONFIG_SENSORS_W83795_FANCTRL
1994#define NUM_PWM_ATTRIBUTES	ARRAY_SIZE(w83795_pwm[0])
1995#define NUM_TEMP_ATTRIBUTES	ARRAY_SIZE(w83795_temp[0])
1996#else
1997#define NUM_PWM_ATTRIBUTES	4
1998#define NUM_TEMP_ATTRIBUTES	8
1999#endif
2000
2001static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
2002			       const struct device_attribute *))
2003{
2004	struct w83795_data *data = dev_get_drvdata(dev);
2005	int err, i, j;
2006
2007	for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
2008		if (!(data->has_in & (1 << i)))
2009			continue;
2010		for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
2011			if (j == 4 && !data->enable_beep)
2012				continue;
2013			err = fn(dev, &w83795_in[i][j].dev_attr);
2014			if (err)
2015				return err;
2016		}
2017	}
2018
2019	for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
2020		if (!(data->has_fan & (1 << i)))
2021			continue;
2022		for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
2023			if (j == 3 && !data->enable_beep)
2024				continue;
2025			err = fn(dev, &w83795_fan[i][j].dev_attr);
2026			if (err)
2027				return err;
2028		}
2029	}
2030
2031	for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) {
2032		j = w83795_tss_useful(data, i);
2033		if (!j)
2034			continue;
2035		err = fn(dev, &w83795_tss[i].dev_attr);
2036		if (err)
2037			return err;
2038	}
2039
2040	for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
2041		err = fn(dev, &sda_single_files[i].dev_attr);
2042		if (err)
2043			return err;
2044	}
2045
2046	if (data->enable_beep) {
2047		for (i = 0; i < ARRAY_SIZE(sda_beep_files); i++) {
2048			err = fn(dev, &sda_beep_files[i].dev_attr);
2049			if (err)
2050				return err;
2051		}
2052	}
2053
2054	for (i = 0; i < data->has_pwm; i++) {
2055		for (j = 0; j < NUM_PWM_ATTRIBUTES; j++) {
2056			err = fn(dev, &w83795_pwm[i][j].dev_attr);
2057			if (err)
2058				return err;
2059		}
2060	}
2061
2062	for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
2063		if (!(data->has_temp & (1 << i)))
2064			continue;
2065		for (j = 0; j < NUM_TEMP_ATTRIBUTES; j++) {
2066			if (j == 7 && !data->enable_beep)
2067				continue;
2068			err = fn(dev, &w83795_temp[i][j].dev_attr);
2069			if (err)
2070				return err;
2071		}
2072	}
2073
2074	if (data->enable_dts) {
2075		for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
2076			if (!(data->has_dts & (1 << i)))
2077				continue;
2078			for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
2079				if (j == 7 && !data->enable_beep)
2080					continue;
2081				err = fn(dev, &w83795_dts[i][j].dev_attr);
2082				if (err)
2083					return err;
2084			}
2085		}
2086	}
2087
2088	return 0;
2089}
2090
2091/* We need a wrapper that fits in w83795_handle_files */
2092static int device_remove_file_wrapper(struct device *dev,
2093				      const struct device_attribute *attr)
2094{
2095	device_remove_file(dev, attr);
2096	return 0;
2097}
2098
2099static void w83795_check_dynamic_in_limits(struct i2c_client *client)
2100{
2101	struct w83795_data *data = i2c_get_clientdata(client);
2102	u8 vid_ctl;
2103	int i, err_max, err_min;
2104
2105	vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
2106
2107	/* Return immediately if VRM isn't configured */
2108	if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
2109		return;
2110
2111	data->has_dyn_in = (vid_ctl >> 3) & 0x07;
2112	for (i = 0; i < 2; i++) {
2113		if (!(data->has_dyn_in & (1 << i)))
2114			continue;
2115
2116		/* Voltage limits in dynamic mode, switch to read-only */
2117		err_max = sysfs_chmod_file(&client->dev.kobj,
2118					   &w83795_in[i][2].dev_attr.attr,
2119					   S_IRUGO);
2120		err_min = sysfs_chmod_file(&client->dev.kobj,
2121					   &w83795_in[i][3].dev_attr.attr,
2122					   S_IRUGO);
2123		if (err_max || err_min)
2124			dev_warn(&client->dev, "Failed to set in%d limits "
2125				 "read-only (%d, %d)\n", i, err_max, err_min);
2126		else
2127			dev_info(&client->dev, "in%d limits set dynamically "
2128				 "from VID\n", i);
2129	}
2130}
2131
2132/* Check pins that can be used for either temperature or voltage monitoring */
2133static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
2134				     int temp_chan, int in_chan)
2135{
2136	/* config is a 2-bit value */
2137	switch (config) {
2138	case 0x2: /* Voltage monitoring */
2139		data->has_in |= 1 << in_chan;
2140		break;
2141	case 0x1: /* Thermal diode */
2142		if (temp_chan >= 4)
2143			break;
2144		data->temp_mode |= 1 << temp_chan;
2145		/* fall through */
2146	case 0x3: /* Thermistor */
2147		data->has_temp |= 1 << temp_chan;
2148		break;
2149	}
2150}
2151
2152static int w83795_probe(struct i2c_client *client,
2153			const struct i2c_device_id *id)
2154{
2155	int i;
2156	u8 tmp;
2157	struct device *dev = &client->dev;
2158	struct w83795_data *data;
2159	int err;
2160
2161	data = devm_kzalloc(dev, sizeof(struct w83795_data), GFP_KERNEL);
2162	if (!data)
2163		return -ENOMEM;
2164
2165	i2c_set_clientdata(client, data);
2166	data->chip_type = id->driver_data;
2167	data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2168	mutex_init(&data->update_lock);
2169
2170	/* Initialize the chip */
2171	w83795_init_client(client);
2172
2173	/* Check which voltages and fans are present */
2174	data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
2175		     | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
2176	data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
2177		      | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
2178
2179	/* Check which analog temperatures and extra voltages are present */
2180	tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
2181	if (tmp & 0x20)
2182		data->enable_dts = 1;
2183	w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
2184	w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
2185	tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
2186	w83795_apply_temp_config(data, tmp >> 6, 3, 20);
2187	w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
2188	w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
2189	w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
2190
2191	/* Check DTS enable status */
2192	if (data->enable_dts) {
2193		if (1 & w83795_read(client, W83795_REG_DTSC))
2194			data->enable_dts |= 2;
2195		data->has_dts = w83795_read(client, W83795_REG_DTSE);
2196	}
2197
2198	/* Report PECI Tbase values */
2199	if (data->enable_dts == 1) {
2200		for (i = 0; i < 8; i++) {
2201			if (!(data->has_dts & (1 << i)))
2202				continue;
2203			tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
2204			dev_info(&client->dev,
2205				 "PECI agent %d Tbase temperature: %u\n",
2206				 i + 1, (unsigned int)tmp & 0x7f);
2207		}
2208	}
2209
2210	data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
2211
2212	/* pwm and smart fan */
2213	if (data->chip_type == w83795g)
2214		data->has_pwm = 8;
2215	else
2216		data->has_pwm = 2;
2217
2218	/* Check if BEEP pin is available */
2219	if (data->chip_type == w83795g) {
2220		/* The W83795G has a dedicated BEEP pin */
2221		data->enable_beep = 1;
2222	} else {
2223		/*
2224		 * The W83795ADG has a shared pin for OVT# and BEEP, so you
2225		 * can't have both
2226		 */
2227		tmp = w83795_read(client, W83795_REG_OVT_CFG);
2228		if ((tmp & OVT_CFG_SEL) == 0)
2229			data->enable_beep = 1;
2230	}
2231
2232	err = w83795_handle_files(dev, device_create_file);
2233	if (err)
2234		goto exit_remove;
2235
2236	if (data->chip_type == w83795g)
2237		w83795_check_dynamic_in_limits(client);
2238
2239	data->hwmon_dev = hwmon_device_register(dev);
2240	if (IS_ERR(data->hwmon_dev)) {
2241		err = PTR_ERR(data->hwmon_dev);
2242		goto exit_remove;
2243	}
2244
2245	return 0;
2246
2247exit_remove:
2248	w83795_handle_files(dev, device_remove_file_wrapper);
2249	return err;
2250}
2251
2252static int w83795_remove(struct i2c_client *client)
2253{
2254	struct w83795_data *data = i2c_get_clientdata(client);
2255
2256	hwmon_device_unregister(data->hwmon_dev);
2257	w83795_handle_files(&client->dev, device_remove_file_wrapper);
2258
2259	return 0;
2260}
2261
2262
2263static const struct i2c_device_id w83795_id[] = {
2264	{ "w83795g", w83795g },
2265	{ "w83795adg", w83795adg },
2266	{ }
2267};
2268MODULE_DEVICE_TABLE(i2c, w83795_id);
2269
2270static struct i2c_driver w83795_driver = {
2271	.driver = {
2272		   .name = "w83795",
2273	},
2274	.probe		= w83795_probe,
2275	.remove		= w83795_remove,
2276	.id_table	= w83795_id,
2277
2278	.class		= I2C_CLASS_HWMON,
2279	.detect		= w83795_detect,
2280	.address_list	= normal_i2c,
2281};
2282
2283module_i2c_driver(w83795_driver);
2284
2285MODULE_AUTHOR("Wei Song, Jean Delvare <khali@linux-fr.org>");
2286MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
2287MODULE_LICENSE("GPL");
2288