113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* 213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * This file is provided under a dual BSD/GPLv2 license. When using or 313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * redistributing this file, you may do so under either license. 413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * 513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Copyright(c) 2012 Intel Corporation. All rights reserved. 613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * 713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * GPL LICENSE SUMMARY 813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * 913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * This program is free software; you can redistribute it and/or modify 1013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * it under the terms of version 2 of the GNU General Public License as 1113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * published by the Free Software Foundation. 1213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * 1313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * This program is distributed in the hope that it will be useful, but 1413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * WITHOUT ANY WARRANTY; without even the implied warranty of 1513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 1613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * General Public License for more details. 1713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * The full GNU General Public License is included in this distribution 1813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * in the file called LICENSE.GPL. 1913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * 2013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * BSD LICENSE 2113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * 2213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Redistribution and use in source and binary forms, with or without 2313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * modification, are permitted provided that the following conditions 2413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * are met: 2513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * 2613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * * Redistributions of source code must retain the above copyright 2713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * notice, this list of conditions and the following disclaimer. 2813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * * Redistributions in binary form must reproduce the above copyright 2913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * notice, this list of conditions and the following disclaimer in 3013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * the documentation and/or other materials provided with the 3113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * distribution. 3213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * * Neither the name of Intel Corporation nor the names of its 3313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * contributors may be used to endorse or promote products derived 3413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * from this software without specific prior written permission. 3513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * 3613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 3713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 3813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 4013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 4113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 4213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 4313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 4413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 4513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 4613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 4713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 4813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 4913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* 5013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Supports the SMBus Message Transport (SMT) in the Intel Atom Processor 5113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * S12xx Product Family. 5213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * 5313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Features supported by this driver: 5413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Hardware PEC yes 5513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Block buffer yes 5613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Block process call transaction no 5713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Slave mode no 5813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 5913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 6013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#include <linux/module.h> 6113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#include <linux/pci.h> 6213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#include <linux/kernel.h> 6313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#include <linux/stddef.h> 6413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#include <linux/completion.h> 6513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#include <linux/dma-mapping.h> 6613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#include <linux/i2c.h> 6713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#include <linux/acpi.h> 6813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#include <linux/interrupt.h> 6913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 7013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#include <asm-generic/io-64-nonatomic-lo-hi.h> 7113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 7213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* PCI Address Constants */ 7313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define SMBBAR 0 7413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 7513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */ 7613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define PCI_DEVICE_ID_INTEL_S1200_SMT0 0x0c59 7713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define PCI_DEVICE_ID_INTEL_S1200_SMT1 0x0c5a 78488b926923f6da5b90555cddb624ad783f4952b0Seth Heasley#define PCI_DEVICE_ID_INTEL_AVOTON_SMT 0x1f15 7913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 808b57cebedd3e8a384ab678a69e9b7128eb438a1fFan Du#define ISMT_DESC_ENTRIES 2 /* number of descriptor entries */ 8113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MAX_RETRIES 3 /* number of SMBus retries to attempt */ 8213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 8313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* Hardware Descriptor Constants - Control Field */ 8413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_CWRL 0x01 /* Command/Write Length */ 8513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_BLK 0X04 /* Perform Block Transaction */ 8613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_FAIR 0x08 /* Set fairness flag upon successful arbit. */ 8713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_PEC 0x10 /* Packet Error Code */ 8813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_I2C 0x20 /* I2C Enable */ 8913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_INT 0x40 /* Interrupt */ 9013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_SOE 0x80 /* Stop On Error */ 9113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 9213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* Hardware Descriptor Constants - Status Field */ 9313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_SCS 0x01 /* Success */ 9413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_DLTO 0x04 /* Data Low Time Out */ 9513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_NAK 0x08 /* NAK Received */ 9613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_CRC 0x10 /* CRC Error */ 9713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_CLTO 0x20 /* Clock Low Time Out */ 9813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_COL 0x40 /* Collisions */ 9913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_LPR 0x80 /* Large Packet Received */ 10013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 10113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* Macros */ 10213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_DESC_ADDR_RW(addr, rw) (((addr) << 1) | (rw)) 10313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 10413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* iSMT General Register address offsets (SMBBAR + <addr>) */ 10513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_GR_GCTRL 0x000 /* General Control */ 10613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_GR_SMTICL 0x008 /* SMT Interrupt Cause Location */ 10713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_GR_ERRINTMSK 0x010 /* Error Interrupt Mask */ 10813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_GR_ERRAERMSK 0x014 /* Error AER Mask */ 10913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_GR_ERRSTS 0x018 /* Error Status */ 11013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_GR_ERRINFO 0x01c /* Error Information */ 11113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 11213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* iSMT Master Registers */ 11313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MSTR_MDBA 0x100 /* Master Descriptor Base Address */ 11413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MSTR_MCTRL 0x108 /* Master Control */ 11513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MSTR_MSTS 0x10c /* Master Status */ 11613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MSTR_MDS 0x110 /* Master Descriptor Size */ 11713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MSTR_RPOLICY 0x114 /* Retry Policy */ 11813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 11913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* iSMT Miscellaneous Registers */ 12013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_SPGT 0x300 /* SMBus PHY Global Timing */ 12113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 12213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* General Control Register (GCTRL) bit definitions */ 12313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_GCTRL_TRST 0x04 /* Target Reset */ 12413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_GCTRL_KILL 0x08 /* Kill */ 12513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_GCTRL_SRST 0x40 /* Soft Reset */ 12613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 12713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* Master Control Register (MCTRL) bit definitions */ 12813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MCTRL_SS 0x01 /* Start/Stop */ 12913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MCTRL_MEIE 0x10 /* Master Error Interrupt Enable */ 13013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MCTRL_FMHP 0x00ff0000 /* Firmware Master Head Ptr (FMHP) */ 13113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 13213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* Master Status Register (MSTS) bit definitions */ 13313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MSTS_HMTP 0xff0000 /* HW Master Tail Pointer (HMTP) */ 13413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MSTS_MIS 0x20 /* Master Interrupt Status (MIS) */ 13513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MSTS_MEIS 0x10 /* Master Error Int Status (MEIS) */ 13613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MSTS_IP 0x01 /* In Progress */ 13713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 13813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* Master Descriptor Size (MDS) bit definitions */ 13913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MDS_MASK 0xff /* Master Descriptor Size mask (MDS) */ 14013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 14113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* SMBus PHY Global Timing Register (SPGT) bit definitions */ 14213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_SPGT_SPD_MASK 0xc0000000 /* SMBus Speed mask */ 14313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_SPGT_SPD_80K 0x00 /* 80 kHz */ 14413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_SPGT_SPD_100K (0x1 << 30) /* 100 kHz */ 14513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_SPGT_SPD_400K (0x2 << 30) /* 400 kHz */ 14613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_SPGT_SPD_1M (0x3 << 30) /* 1 MHz */ 14713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 14813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 14913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* MSI Control Register (MSICTL) bit definitions */ 15013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ISMT_MSICTL_MSIE 0x01 /* MSI Enable */ 15113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 15213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* iSMT Hardware Descriptor */ 15313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstruct ismt_desc { 15413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 tgtaddr_rw; /* target address & r/w bit */ 15513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 wr_len_cmd; /* write length in bytes or a command */ 15613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 rd_len; /* read length */ 15713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 control; /* control bits */ 15813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 status; /* status bits */ 15913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 retry; /* collision retry and retry count */ 16013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 rxbytes; /* received bytes */ 16113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 txbytes; /* transmitted bytes */ 16213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u32 dptr_low; /* lower 32 bit of the data pointer */ 16313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u32 dptr_high; /* upper 32 bit of the data pointer */ 16413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} __packed; 16513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 16613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstruct ismt_priv { 16713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct i2c_adapter adapter; 16813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman void *smba; /* PCI BAR */ 16913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct pci_dev *pci_dev; 17013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct ismt_desc *hw; /* descriptor virt base addr */ 17113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_addr_t io_rng_dma; /* descriptor HW base addr */ 17213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 head; /* ring buffer head pointer */ 17313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct completion cmp; /* interrupt completion */ 17413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* temp R/W data buffer */ 17513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman bool using_msi; /* type of interrupt flag */ 17613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman}; 17713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 17813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 17913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_ids - PCI device IDs supported by this driver 18013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 181392debf11656dedd79da44416747d5b2b1747f5eJingoo Hanstatic const struct pci_device_id ismt_ids[] = { 18213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) }, 18313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) }, 184488b926923f6da5b90555cddb624ad783f4952b0Seth Heasley { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) }, 18513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman { 0, } 18613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman}; 18713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 18813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil HormanMODULE_DEVICE_TABLE(pci, ismt_ids); 18913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 19013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/* Bus speed control bits for slow debuggers - refer to the docs for usage */ 19113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic unsigned int bus_speed; 19213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanmodule_param(bus_speed, uint, S_IRUGO); 19313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil HormanMODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)"); 19413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 19513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 19613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * __ismt_desc_dump() - dump the contents of a specific descriptor 19713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 19813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic void __ismt_desc_dump(struct device *dev, const struct ismt_desc *desc) 19913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 20013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 20113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "Descriptor struct: %p\n", desc); 20213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "\ttgtaddr_rw=0x%02X\n", desc->tgtaddr_rw); 20313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "\twr_len_cmd=0x%02X\n", desc->wr_len_cmd); 20413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "\trd_len= 0x%02X\n", desc->rd_len); 20513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "\tcontrol= 0x%02X\n", desc->control); 20613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "\tstatus= 0x%02X\n", desc->status); 20713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "\tretry= 0x%02X\n", desc->retry); 20813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "\trxbytes= 0x%02X\n", desc->rxbytes); 20913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "\ttxbytes= 0x%02X\n", desc->txbytes); 21013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "\tdptr_low= 0x%08X\n", desc->dptr_low); 21113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "\tdptr_high= 0x%08X\n", desc->dptr_high); 21213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 21313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 21413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_desc_dump() - dump the contents of a descriptor for debug purposes 21513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @priv: iSMT private data 21613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 21713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic void ismt_desc_dump(struct ismt_priv *priv) 21813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 21913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct device *dev = &priv->pci_dev->dev; 22013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct ismt_desc *desc = &priv->hw[priv->head]; 22113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 22213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "Dump of the descriptor struct: 0x%X\n", priv->head); 22313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman __ismt_desc_dump(dev, desc); 22413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 22513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 22613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 22713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_gen_reg_dump() - dump the iSMT General Registers 22813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @priv: iSMT private data 22913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 23013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic void ismt_gen_reg_dump(struct ismt_priv *priv) 23113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 23213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct device *dev = &priv->pci_dev->dev; 23313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 23413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "Dump of the iSMT General Registers\n"); 23513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " GCTRL.... : (0x%p)=0x%X\n", 23613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_GR_GCTRL, 23713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman readl(priv->smba + ISMT_GR_GCTRL)); 23813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " SMTICL... : (0x%p)=0x%016llX\n", 23913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_GR_SMTICL, 24013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman (long long unsigned int)readq(priv->smba + ISMT_GR_SMTICL)); 24113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " ERRINTMSK : (0x%p)=0x%X\n", 24213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_GR_ERRINTMSK, 24313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman readl(priv->smba + ISMT_GR_ERRINTMSK)); 24413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " ERRAERMSK : (0x%p)=0x%X\n", 24513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_GR_ERRAERMSK, 24613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman readl(priv->smba + ISMT_GR_ERRAERMSK)); 24713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " ERRSTS... : (0x%p)=0x%X\n", 24813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_GR_ERRSTS, 24913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman readl(priv->smba + ISMT_GR_ERRSTS)); 25013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " ERRINFO.. : (0x%p)=0x%X\n", 25113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_GR_ERRINFO, 25213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman readl(priv->smba + ISMT_GR_ERRINFO)); 25313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 25413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 25513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 25613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_mstr_reg_dump() - dump the iSMT Master Registers 25713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @priv: iSMT private data 25813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 25913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic void ismt_mstr_reg_dump(struct ismt_priv *priv) 26013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 26113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct device *dev = &priv->pci_dev->dev; 26213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 26313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "Dump of the iSMT Master Registers\n"); 26413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " MDBA..... : (0x%p)=0x%016llX\n", 26513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_MSTR_MDBA, 26613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman (long long unsigned int)readq(priv->smba + ISMT_MSTR_MDBA)); 26713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " MCTRL.... : (0x%p)=0x%X\n", 26813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_MSTR_MCTRL, 26913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman readl(priv->smba + ISMT_MSTR_MCTRL)); 27013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " MSTS..... : (0x%p)=0x%X\n", 27113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_MSTR_MSTS, 27213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman readl(priv->smba + ISMT_MSTR_MSTS)); 27313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " MDS...... : (0x%p)=0x%X\n", 27413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_MSTR_MDS, 27513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman readl(priv->smba + ISMT_MSTR_MDS)); 27613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " RPOLICY.. : (0x%p)=0x%X\n", 27713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_MSTR_RPOLICY, 27813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman readl(priv->smba + ISMT_MSTR_RPOLICY)); 27913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " SPGT..... : (0x%p)=0x%X\n", 28013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_SPGT, 28113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman readl(priv->smba + ISMT_SPGT)); 28213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 28313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 28413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 28513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_submit_desc() - add a descriptor to the ring 28613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @priv: iSMT private data 28713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 28813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic void ismt_submit_desc(struct ismt_priv *priv) 28913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 29013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman uint fmhp; 29113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman uint val; 29213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 29313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman ismt_desc_dump(priv); 29413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman ismt_gen_reg_dump(priv); 29513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman ismt_mstr_reg_dump(priv); 29613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 29713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Set the FMHP (Firmware Master Head Pointer)*/ 29813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman fmhp = ((priv->head + 1) % ISMT_DESC_ENTRIES) << 16; 29913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman val = readl(priv->smba + ISMT_MSTR_MCTRL); 30013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman writel((val & ~ISMT_MCTRL_FMHP) | fmhp, 30113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_MSTR_MCTRL); 30213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 30313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Set the start bit */ 30413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman val = readl(priv->smba + ISMT_MSTR_MCTRL); 30513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman writel(val | ISMT_MCTRL_SS, 30613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_MSTR_MCTRL); 30713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 30813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 30913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 31013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_process_desc() - handle the completion of the descriptor 31113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @desc: the iSMT hardware descriptor 31213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @data: data buffer from the upper layer 31313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @priv: ismt_priv struct holding our dma buffer 31413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @size: SMBus transaction type 31513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @read_write: flag to indicate if this is a read or write 31613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 31713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic int ismt_process_desc(const struct ismt_desc *desc, 31813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman union i2c_smbus_data *data, 31913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct ismt_priv *priv, int size, 32013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman char read_write) 32113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 32213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 *dma_buffer = priv->dma_buffer; 32313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 32413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(&priv->pci_dev->dev, "Processing completed descriptor\n"); 32513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman __ismt_desc_dump(&priv->pci_dev->dev, desc); 32613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 32713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (desc->status & ISMT_DESC_SCS) { 32813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (read_write == I2C_SMBUS_WRITE && 32913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman size != I2C_SMBUS_PROC_CALL) 33013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return 0; 33113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 33213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman switch (size) { 33313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case I2C_SMBUS_BYTE: 33413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case I2C_SMBUS_BYTE_DATA: 33513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman data->byte = dma_buffer[0]; 33613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 33713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case I2C_SMBUS_WORD_DATA: 33813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case I2C_SMBUS_PROC_CALL: 33913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman data->word = dma_buffer[0] | (dma_buffer[1] << 8); 34013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 34113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case I2C_SMBUS_BLOCK_DATA: 342001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com case I2C_SMBUS_I2C_BLOCK_DATA: 34313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman memcpy(&data->block[1], dma_buffer, desc->rxbytes); 34413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman data->block[0] = desc->rxbytes; 34513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 34613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 34713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return 0; 34813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 34913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 35013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (likely(desc->status & ISMT_DESC_NAK)) 35113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -ENXIO; 35213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 35313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (desc->status & ISMT_DESC_CRC) 35413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -EBADMSG; 35513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 35613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (desc->status & ISMT_DESC_COL) 35713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -EAGAIN; 35813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 35913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (desc->status & ISMT_DESC_LPR) 36013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -EPROTO; 36113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 36213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (desc->status & (ISMT_DESC_DLTO | ISMT_DESC_CLTO)) 36313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -ETIMEDOUT; 36413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 36513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -EIO; 36613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 36713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 36813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 36913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_access() - process an SMBus command 37013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @adap: the i2c host adapter 37113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @addr: address of the i2c/SMBus target 37213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @flags: command options 37313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @read_write: read from or write to device 37413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @command: the i2c/SMBus command to issue 37513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @size: SMBus transaction type 37613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @data: read/write data buffer 37713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 37813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic int ismt_access(struct i2c_adapter *adap, u16 addr, 37913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman unsigned short flags, char read_write, u8 command, 38013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman int size, union i2c_smbus_data *data) 38113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 38213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman int ret; 38313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_addr_t dma_addr = 0; /* address of the data buffer */ 38413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u8 dma_size = 0; 38513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman enum dma_data_direction dma_direction = 0; 38613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct ismt_desc *desc; 38713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct ismt_priv *priv = i2c_get_adapdata(adap); 38813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct device *dev = &priv->pci_dev->dev; 38913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 39013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc = &priv->hw[priv->head]; 391bf4169100c909667ede6af67668b3ecce6928343James Ralston 392bf4169100c909667ede6af67668b3ecce6928343James Ralston /* Initialize the DMA buffer */ 393bf4169100c909667ede6af67668b3ecce6928343James Ralston memset(priv->dma_buffer, 0, sizeof(priv->dma_buffer)); 39413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 39513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Initialize the descriptor */ 39613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman memset(desc, 0, sizeof(struct ismt_desc)); 39713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write); 39813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 39913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Initialize common control bits */ 40013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (likely(priv->using_msi)) 40113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->control = ISMT_DESC_INT | ISMT_DESC_FAIR; 40213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman else 40313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->control = ISMT_DESC_FAIR; 40413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 40513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if ((flags & I2C_CLIENT_PEC) && (size != I2C_SMBUS_QUICK) 40613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman && (size != I2C_SMBUS_I2C_BLOCK_DATA)) 40713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->control |= ISMT_DESC_PEC; 40813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 40913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman switch (size) { 41013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case I2C_SMBUS_QUICK: 41113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "I2C_SMBUS_QUICK\n"); 41213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 41313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 41413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case I2C_SMBUS_BYTE: 41513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (read_write == I2C_SMBUS_WRITE) { 41613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* 41713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Send Byte 41813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * The command field contains the write data 41913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 42013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "I2C_SMBUS_BYTE: WRITE\n"); 42113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->control |= ISMT_DESC_CWRL; 42213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->wr_len_cmd = command; 42313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } else { 42413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Receive Byte */ 42513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "I2C_SMBUS_BYTE: READ\n"); 42613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_size = 1; 42713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_direction = DMA_FROM_DEVICE; 42813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->rd_len = 1; 42913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 43013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 43113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 43213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case I2C_SMBUS_BYTE_DATA: 43313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (read_write == I2C_SMBUS_WRITE) { 43413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* 43513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Write Byte 43613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Command plus 1 data byte 43713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 43813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "I2C_SMBUS_BYTE_DATA: WRITE\n"); 43913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->wr_len_cmd = 2; 44013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_size = 2; 44113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_direction = DMA_TO_DEVICE; 44213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->dma_buffer[0] = command; 44313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->dma_buffer[1] = data->byte; 44413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } else { 44513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Read Byte */ 44613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "I2C_SMBUS_BYTE_DATA: READ\n"); 44713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->control |= ISMT_DESC_CWRL; 44813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->wr_len_cmd = command; 44913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->rd_len = 1; 45013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_size = 1; 45113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_direction = DMA_FROM_DEVICE; 45213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 45313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 45413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 45513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case I2C_SMBUS_WORD_DATA: 45613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (read_write == I2C_SMBUS_WRITE) { 45713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Write Word */ 45813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "I2C_SMBUS_WORD_DATA: WRITE\n"); 45913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->wr_len_cmd = 3; 46013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_size = 3; 46113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_direction = DMA_TO_DEVICE; 46213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->dma_buffer[0] = command; 46313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->dma_buffer[1] = data->word & 0xff; 46413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->dma_buffer[2] = data->word >> 8; 46513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } else { 46613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Read Word */ 46713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "I2C_SMBUS_WORD_DATA: READ\n"); 46813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->wr_len_cmd = command; 46913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->control |= ISMT_DESC_CWRL; 47013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->rd_len = 2; 47113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_size = 2; 47213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_direction = DMA_FROM_DEVICE; 47313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 47413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 47513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 47613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case I2C_SMBUS_PROC_CALL: 47713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "I2C_SMBUS_PROC_CALL\n"); 47813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->wr_len_cmd = 3; 47913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->rd_len = 2; 48013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_size = 3; 48113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_direction = DMA_BIDIRECTIONAL; 48213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->dma_buffer[0] = command; 48313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->dma_buffer[1] = data->word & 0xff; 48413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->dma_buffer[2] = data->word >> 8; 48513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 48613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 48713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case I2C_SMBUS_BLOCK_DATA: 48813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (read_write == I2C_SMBUS_WRITE) { 48913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Block Write */ 49013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA: WRITE\n"); 49113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_size = data->block[0] + 1; 49213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_direction = DMA_TO_DEVICE; 49313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->wr_len_cmd = dma_size; 49413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->control |= ISMT_DESC_BLK; 49513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->dma_buffer[0] = command; 496979bbf7b7ae75cfc06e09d09eda38009a3bdc4a4Fan Du memcpy(&priv->dma_buffer[1], &data->block[1], dma_size - 1); 49713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } else { 49813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Block Read */ 49913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA: READ\n"); 50013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_size = I2C_SMBUS_BLOCK_MAX; 50113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_direction = DMA_FROM_DEVICE; 50213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->rd_len = dma_size; 50313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->wr_len_cmd = command; 50413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->control |= (ISMT_DESC_BLK | ISMT_DESC_CWRL); 50513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 50613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 50713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 508001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com case I2C_SMBUS_I2C_BLOCK_DATA: 509001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com /* Make sure the length is valid */ 510001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com if (data->block[0] < 1) 511001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com data->block[0] = 1; 512001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com 513001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com if (data->block[0] > I2C_SMBUS_BLOCK_MAX) 514001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com data->block[0] = I2C_SMBUS_BLOCK_MAX; 515001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com 516001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com if (read_write == I2C_SMBUS_WRITE) { 517001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com /* i2c Block Write */ 518001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA: WRITE\n"); 519001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com dma_size = data->block[0] + 1; 520001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com dma_direction = DMA_TO_DEVICE; 521001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com desc->wr_len_cmd = dma_size; 522001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com desc->control |= ISMT_DESC_I2C; 523001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com priv->dma_buffer[0] = command; 524979bbf7b7ae75cfc06e09d09eda38009a3bdc4a4Fan Du memcpy(&priv->dma_buffer[1], &data->block[1], dma_size - 1); 525001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com } else { 526001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com /* i2c Block Read */ 527001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA: READ\n"); 528001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com dma_size = data->block[0]; 529001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com dma_direction = DMA_FROM_DEVICE; 530001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com desc->rd_len = dma_size; 531001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com desc->wr_len_cmd = command; 532001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com desc->control |= (ISMT_DESC_I2C | ISMT_DESC_CWRL); 533001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com /* 534001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com * Per the "Table 15-15. I2C Commands", 535001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com * in the External Design Specification (EDS), 536001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com * (Document Number: 508084, Revision: 2.0), 537001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com * the _rw bit must be 0 538001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com */ 539001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 0); 540001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com } 541001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com break; 542001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com 54313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman default: 54413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_err(dev, "Unsupported transaction %d\n", 54513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman size); 54613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -EOPNOTSUPP; 54713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 54813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 54913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* map the data buffer */ 55013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (dma_size != 0) { 55113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " dev=%p\n", dev); 55213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " data=%p\n", data); 55313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " dma_buffer=%p\n", priv->dma_buffer); 55413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " dma_size=%d\n", dma_size); 55513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " dma_direction=%d\n", dma_direction); 55613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 55713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_addr = dma_map_single(dev, 55813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->dma_buffer, 55913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_size, 56013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_direction); 56113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 56213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (dma_mapping_error(dev, dma_addr)) { 56313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_err(dev, "Error in mapping dma buffer %p\n", 56413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->dma_buffer); 56513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -EIO; 56613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 56713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 56813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, " dma_addr = 0x%016llX\n", 569724d5edac76d8c9a4198b74c80286df38ed81679Randy Dunlap (unsigned long long)dma_addr); 57013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 57113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->dptr_low = lower_32_bits(dma_addr); 57213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman desc->dptr_high = upper_32_bits(dma_addr); 57313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 57413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 57516735d022f72b20ddbb2274b8e109f69575e9b2bWolfram Sang reinit_completion(&priv->cmp); 57613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 57713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Add the descriptor */ 57813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman ismt_submit_desc(priv); 57913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 58013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Now we wait for interrupt completion, 1s */ 58113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman ret = wait_for_completion_timeout(&priv->cmp, HZ*1); 58213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 58313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* unmap the data buffer */ 58413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (dma_size != 0) 58513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dma_unmap_single(&adap->dev, dma_addr, dma_size, dma_direction); 58613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 58713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (unlikely(!ret)) { 58813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_err(dev, "completion wait timed out\n"); 58913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman ret = -ETIMEDOUT; 59013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman goto out; 59113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 59213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 59313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* do any post processing of the descriptor here */ 59413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman ret = ismt_process_desc(desc, data, priv, size, read_write); 59513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 59613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanout: 59713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Update the ring pointer */ 59813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->head++; 59913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->head %= ISMT_DESC_ENTRIES; 60013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 60113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return ret; 60213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 60313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 60413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 60513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_func() - report which i2c commands are supported by this adapter 60613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @adap: the i2c host adapter 60713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 60813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic u32 ismt_func(struct i2c_adapter *adap) 60913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 61013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return I2C_FUNC_SMBUS_QUICK | 61113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman I2C_FUNC_SMBUS_BYTE | 61213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman I2C_FUNC_SMBUS_BYTE_DATA | 61313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman I2C_FUNC_SMBUS_WORD_DATA | 61413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman I2C_FUNC_SMBUS_PROC_CALL | 61513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman I2C_FUNC_SMBUS_BLOCK_DATA | 616001cebf03f918c85404cb76db3a60c748be5efb5robert.valiquette@intel.com I2C_FUNC_SMBUS_I2C_BLOCK | 61713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman I2C_FUNC_SMBUS_PEC; 61813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 61913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 62013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 62113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * smbus_algorithm - the adapter algorithm and supported functionality 62213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @smbus_xfer: the adapter algorithm 62313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @functionality: functionality supported by the adapter 62413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 62513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic const struct i2c_algorithm smbus_algorithm = { 62613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman .smbus_xfer = ismt_access, 62713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman .functionality = ismt_func, 62813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman}; 62913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 63013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 63113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_handle_isr() - interrupt handler bottom half 63213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @priv: iSMT private data 63313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 63413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic irqreturn_t ismt_handle_isr(struct ismt_priv *priv) 63513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 63613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman complete(&priv->cmp); 63713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 63813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return IRQ_HANDLED; 63913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 64013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 64113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 64213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 64313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_do_interrupt() - IRQ interrupt handler 64413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @vec: interrupt vector 64513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @data: iSMT private data 64613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 64713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic irqreturn_t ismt_do_interrupt(int vec, void *data) 64813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 64913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u32 val; 65013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct ismt_priv *priv = data; 65113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 65213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* 65313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * check to see it's our interrupt, return IRQ_NONE if not ours 65413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * since we are sharing interrupt 65513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 65613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman val = readl(priv->smba + ISMT_MSTR_MSTS); 65713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 65813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (!(val & (ISMT_MSTS_MIS | ISMT_MSTS_MEIS))) 65913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return IRQ_NONE; 66013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman else 66113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman writel(val | ISMT_MSTS_MIS | ISMT_MSTS_MEIS, 66213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_MSTR_MSTS); 66313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 66413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return ismt_handle_isr(priv); 66513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 66613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 66713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 66813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_do_msi_interrupt() - MSI interrupt handler 66913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @vec: interrupt vector 67013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @data: iSMT private data 67113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 67213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic irqreturn_t ismt_do_msi_interrupt(int vec, void *data) 67313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 67413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return ismt_handle_isr(data); 67513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 67613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 67713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 67813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_hw_init() - initialize the iSMT hardware 67913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @priv: iSMT private data 68013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 68113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic void ismt_hw_init(struct ismt_priv *priv) 68213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 68313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman u32 val; 68413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct device *dev = &priv->pci_dev->dev; 68513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 68613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* initialize the Master Descriptor Base Address (MDBA) */ 68713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman writeq(priv->io_rng_dma, priv->smba + ISMT_MSTR_MDBA); 68813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 68913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* initialize the Master Control Register (MCTRL) */ 69013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman writel(ISMT_MCTRL_MEIE, priv->smba + ISMT_MSTR_MCTRL); 69113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 69213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* initialize the Master Status Register (MSTS) */ 69313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman writel(0, priv->smba + ISMT_MSTR_MSTS); 69413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 69513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* initialize the Master Descriptor Size (MDS) */ 69613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman val = readl(priv->smba + ISMT_MSTR_MDS); 69713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman writel((val & ~ISMT_MDS_MASK) | (ISMT_DESC_ENTRIES - 1), 69813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_MSTR_MDS); 69913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 70013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* 70113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * Set the SMBus speed (could use this for slow HW debuggers) 70213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 70313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 70413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman val = readl(priv->smba + ISMT_SPGT); 70513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 70613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman switch (bus_speed) { 70713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case 0: 70813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 70913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 71013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case 80: 71113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "Setting SMBus clock to 80 kHz\n"); 71213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_80K), 71313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_SPGT); 71413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 71513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 71613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case 100: 71713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "Setting SMBus clock to 100 kHz\n"); 71813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_100K), 71913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_SPGT); 72013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 72113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 72213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case 400: 72313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "Setting SMBus clock to 400 kHz\n"); 72413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_400K), 72513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_SPGT); 72613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 72713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 72813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case 1000: 72913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n"); 73013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_1M), 73113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba + ISMT_SPGT); 73213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 73313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 73413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman default: 73513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_warn(dev, "Invalid SMBus clock speed, only 0, 80, 100, 400, and 1000 are valid\n"); 73613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 73713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 73813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 73913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman val = readl(priv->smba + ISMT_SPGT); 74013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 74113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman switch (val & ISMT_SPGT_SPD_MASK) { 74213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case ISMT_SPGT_SPD_80K: 74313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman bus_speed = 80; 74413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 74513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case ISMT_SPGT_SPD_100K: 74613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman bus_speed = 100; 74713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 74813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case ISMT_SPGT_SPD_400K: 74913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman bus_speed = 400; 75013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 75113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman case ISMT_SPGT_SPD_1M: 75213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman bus_speed = 1000; 75313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman break; 75413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 75513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed); 75613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 75713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 75813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 75913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_dev_init() - initialize the iSMT data structures 76013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @priv: iSMT private data 76113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 76213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic int ismt_dev_init(struct ismt_priv *priv) 76313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 76413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* allocate memory for the descriptor */ 76513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->hw = dmam_alloc_coherent(&priv->pci_dev->dev, 76613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman (ISMT_DESC_ENTRIES 76713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * sizeof(struct ismt_desc)), 76813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman &priv->io_rng_dma, 76913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman GFP_KERNEL); 77013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (!priv->hw) 77113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -ENOMEM; 77213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 77313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman memset(priv->hw, 0, (ISMT_DESC_ENTRIES * sizeof(struct ismt_desc))); 77413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 77513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->head = 0; 77613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman init_completion(&priv->cmp); 77713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 77813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return 0; 77913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 78013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 78113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 78213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_int_init() - initialize interrupts 78313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @priv: iSMT private data 78413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 78513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic int ismt_int_init(struct ismt_priv *priv) 78613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 78713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman int err; 78813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 78913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Try using MSI interrupts */ 79013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err = pci_enable_msi(priv->pci_dev); 79113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (err) { 79213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_warn(&priv->pci_dev->dev, 79313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman "Unable to use MSI interrupts, falling back to legacy\n"); 79413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman goto intx; 79513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 79613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 79713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err = devm_request_irq(&priv->pci_dev->dev, 79813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->pci_dev->irq, 79913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman ismt_do_msi_interrupt, 80013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 0, 80113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman "ismt-msi", 80213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv); 80313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (err) { 80413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman pci_disable_msi(priv->pci_dev); 80513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman goto intx; 80613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 80713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 80813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->using_msi = true; 80913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman goto done; 81013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 81113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Try using legacy interrupts */ 81213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanintx: 81313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err = devm_request_irq(&priv->pci_dev->dev, 81413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->pci_dev->irq, 81513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman ismt_do_interrupt, 81613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman IRQF_SHARED, 81713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman "ismt-intx", 81813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv); 81913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (err) { 82013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_err(&priv->pci_dev->dev, "no usable interrupts\n"); 82113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -ENODEV; 82213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 82313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 82413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->using_msi = false; 82513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 82613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormandone: 82713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return 0; 82813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 82913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 83013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic struct pci_driver ismt_driver; 83113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 83213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 83313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_probe() - probe for iSMT devices 83413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @pdev: PCI-Express device 83513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @id: PCI-Express device ID 83613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 83713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic int 83813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanismt_probe(struct pci_dev *pdev, const struct pci_device_id *id) 83913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 84013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman int err; 84113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct ismt_priv *priv; 84213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman unsigned long start, len; 84313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 84413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 84513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (!priv) 84613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -ENOMEM; 84713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 84813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman pci_set_drvdata(pdev, priv); 84913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman i2c_set_adapdata(&priv->adapter, priv); 85013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->adapter.owner = THIS_MODULE; 85113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 85213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->adapter.class = I2C_CLASS_HWMON; 85313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 85413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->adapter.algo = &smbus_algorithm; 85513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 85613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* set up the sysfs linkage to our parent device */ 85713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->adapter.dev.parent = &pdev->dev; 85813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 85913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* number of retries on lost arbitration */ 86013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->adapter.retries = ISMT_MAX_RETRIES; 86113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 86213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->pci_dev = pdev; 86313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 86413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err = pcim_enable_device(pdev); 86513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (err) { 86613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_err(&pdev->dev, "Failed to enable SMBus PCI device (%d)\n", 86713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err); 86813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return err; 86913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 87013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 87113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* enable bus mastering */ 87213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman pci_set_master(pdev); 87313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 87413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman /* Determine the address of the SMBus area */ 87513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman start = pci_resource_start(pdev, SMBBAR); 87613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman len = pci_resource_len(pdev, SMBBAR); 87713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (!start || !len) { 87813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_err(&pdev->dev, 87913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman "SMBus base address uninitialized, upgrade BIOS\n"); 88013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return -ENODEV; 88113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 88213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 88313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman snprintf(priv->adapter.name, sizeof(priv->adapter.name), 88413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman "SMBus iSMT adapter at %lx", start); 88513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 88613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(&priv->pci_dev->dev, " start=0x%lX\n", start); 88713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_dbg(&priv->pci_dev->dev, " len=0x%lX\n", len); 88813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 88913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err = acpi_check_resource_conflict(&pdev->resource[SMBBAR]); 89013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (err) { 89113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_err(&pdev->dev, "ACPI resource conflict!\n"); 89213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return err; 89313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 89413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 89513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err = pci_request_region(pdev, SMBBAR, ismt_driver.name); 89613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (err) { 89713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_err(&pdev->dev, 89813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman "Failed to request SMBus region 0x%lx-0x%lx\n", 89913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman start, start + len); 90013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return err; 90113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 90213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 90313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman priv->smba = pcim_iomap(pdev, SMBBAR, len); 90413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (!priv->smba) { 90513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_err(&pdev->dev, "Unable to ioremap SMBus BAR\n"); 90613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err = -ENODEV; 90713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman goto fail; 90813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 90913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 91013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) || 91113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0)) { 91213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 91313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman (pci_set_consistent_dma_mask(pdev, 91413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman DMA_BIT_MASK(32)) != 0)) { 91513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_err(&pdev->dev, "pci_set_dma_mask fail %p\n", 91613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman pdev); 917370257b287a3959f1d12398b51fb0c50063b4ca8Wolfram Sang err = -ENODEV; 91813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman goto fail; 91913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 92013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 92113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 92213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err = ismt_dev_init(priv); 92313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (err) 92413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman goto fail; 92513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 92613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman ismt_hw_init(priv); 92713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 92813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err = ismt_int_init(priv); 92913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (err) 93013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman goto fail; 93113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 93213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err = i2c_add_adapter(&priv->adapter); 93313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman if (err) { 93413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman dev_err(&pdev->dev, "Failed to add SMBus iSMT adapter\n"); 93513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman err = -ENODEV; 93613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman goto fail; 93713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman } 93813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return 0; 93913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 94013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanfail: 94113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman pci_release_region(pdev, SMBBAR); 94213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return err; 94313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 94413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 94513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 94613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_remove() - release driver resources 94713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @pdev: PCI-Express device 94813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 94913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic void ismt_remove(struct pci_dev *pdev) 95013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 95113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman struct ismt_priv *priv = pci_get_drvdata(pdev); 95213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 95313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman i2c_del_adapter(&priv->adapter); 95413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman pci_release_region(pdev, SMBBAR); 95513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 95613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 95713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 95813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_suspend() - place the device in suspend 95913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @pdev: PCI-Express device 96013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @mesg: PM message 96113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 96213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#ifdef CONFIG_PM 96313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic int ismt_suspend(struct pci_dev *pdev, pm_message_t mesg) 96413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 96513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman pci_save_state(pdev); 96613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman pci_set_power_state(pdev, pci_choose_state(pdev, mesg)); 96713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return 0; 96813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 96913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 97013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman/** 97113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * ismt_resume() - PCI resume code 97213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman * @pdev: PCI-Express device 97313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman */ 97413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic int ismt_resume(struct pci_dev *pdev) 97513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman{ 97613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman pci_set_power_state(pdev, PCI_D0); 97713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman pci_restore_state(pdev); 97813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman return pci_enable_device(pdev); 97913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman} 98013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 98113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#else 98213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 98313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ismt_suspend NULL 98413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#define ismt_resume NULL 98513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 98613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman#endif 98713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 98813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanstatic struct pci_driver ismt_driver = { 98913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman .name = "ismt_smbus", 99013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman .id_table = ismt_ids, 99113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman .probe = ismt_probe, 99213f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman .remove = ismt_remove, 99313f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman .suspend = ismt_suspend, 99413f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman .resume = ismt_resume, 99513f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman}; 99613f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 99713f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Hormanmodule_pci_driver(ismt_driver); 99813f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil Horman 99913f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil HormanMODULE_LICENSE("Dual BSD/GPL"); 100013f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil HormanMODULE_AUTHOR("Bill E. Brown <bill.e.brown@intel.com>"); 100113f35ac14cd0a9a1c4f0034c4c40d0ae98844ce9Neil HormanMODULE_DESCRIPTION("Intel SMBus Message Transport (iSMT) driver"); 1002