1310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang/* 2310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * Renesas RIIC driver 3310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 4310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * Copyright (C) 2013 Wolfram Sang <wsa@sang-engineering.com> 5310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * Copyright (C) 2013 Renesas Solutions Corp. 6310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 7310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * This program is free software; you can redistribute it and/or modify it 8310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * under the terms of the GNU General Public License version 2 as published by 9310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * the Free Software Foundation. 10310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang */ 11310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 12310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang/* 13310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * This i2c core has a lot of interrupts, namely 8. We use their chaining as 14310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * some kind of state machine. 15310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 16310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 1) The main xfer routine kicks off a transmission by putting the start bit 17310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * (or repeated start) on the bus and enabling the transmit interrupt (TIE) 18310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * since we need to send the slave address + RW bit in every case. 19310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 20310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 2) TIE sends slave address + RW bit and selects how to continue. 21310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 22310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 3a) Write case: We keep utilizing TIE as long as we have data to send. If we 23310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * are done, we switch over to the transmission done interrupt (TEIE) and mark 24310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * the message as completed (includes sending STOP) there. 25310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 26310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 3b) Read case: We switch over to receive interrupt (RIE). One dummy read is 27310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * needed to start clocking, then we keep receiving until we are done. Note 28310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * that we use the RDRFS mode all the time, i.e. we ACK/NACK every byte by 29310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * writing to the ACKBT bit. I tried using the RDRFS mode only at the end of a 30310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * message to create the final NACK as sketched in the datasheet. This caused 31310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * some subtle races (when byte n was processed and byte n+1 was already 32310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * waiting), though, and I started with the safe approach. 33310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 34310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 4) If we got a NACK somewhere, we flag the error and stop the transmission 35310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * via NAKIE. 36310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 37310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * Also check the comments in the interrupt routines for some gory details. 38310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang */ 39310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 40310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#include <linux/clk.h> 41310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#include <linux/completion.h> 42310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#include <linux/err.h> 43310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#include <linux/i2c.h> 44310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#include <linux/interrupt.h> 45310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#include <linux/io.h> 46310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#include <linux/module.h> 47310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#include <linux/of.h> 48310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#include <linux/platform_device.h> 49310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 50310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_ICCR1 0x00 51310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_ICCR2 0x04 52310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_ICMR1 0x08 53310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_ICMR3 0x10 54310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_ICSER 0x18 55310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_ICIER 0x1c 56310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_ICSR2 0x24 57310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_ICBRL 0x34 58310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_ICBRH 0x38 59310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_ICDRT 0x3c 60310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_ICDRR 0x40 61310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 62310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICCR1_ICE 0x80 63310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICCR1_IICRST 0x40 64310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICCR1_SOWP 0x10 65310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 66310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICCR2_BBSY 0x80 67310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICCR2_SP 0x08 68310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICCR2_RS 0x04 69310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICCR2_ST 0x02 70310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 71310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICMR1_CKS_MASK 0x70 72310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICMR1_BCWP 0x08 73310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICMR1_CKS(_x) ((((_x) << 4) & ICMR1_CKS_MASK) | ICMR1_BCWP) 74310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 75310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICMR3_RDRFS 0x20 76310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICMR3_ACKWP 0x10 77310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICMR3_ACKBT 0x08 78310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 79310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICIER_TIE 0x80 80310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICIER_TEIE 0x40 81310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICIER_RIE 0x20 82310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICIER_NAKIE 0x10 83310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 84310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICSR2_NACKF 0x10 85310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 86310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang/* ICBRx (@ PCLK 33MHz) */ 87310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICBR_RESERVED 0xe0 /* Should be 1 on writes */ 88310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICBRL_SP100K (19 | ICBR_RESERVED) 89310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICBRH_SP100K (16 | ICBR_RESERVED) 90310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICBRL_SP400K (21 | ICBR_RESERVED) 91310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define ICBRH_SP400K (9 | ICBR_RESERVED) 92310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 93310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang#define RIIC_INIT_MSG -1 94310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 95310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstruct riic_dev { 96310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang void __iomem *base; 97310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang u8 *buf; 98310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct i2c_msg *msg; 99310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang int bytes_left; 100310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang int err; 101310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang int is_last; 102310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct completion msg_done; 103310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct i2c_adapter adapter; 104310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct clk *clk; 105310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang}; 106310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 107310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstruct riic_irq_desc { 108310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang int res_num; 109310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang irq_handler_t isr; 110310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang char *name; 111310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang}; 112310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 113310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic inline void riic_clear_set_bit(struct riic_dev *riic, u8 clear, u8 set, u8 reg) 114310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang{ 115310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb((readb(riic->base + reg) & ~clear) | set, riic->base + reg); 116310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang} 117310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 118310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic int riic_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) 119310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang{ 120310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct riic_dev *riic = i2c_get_adapdata(adap); 121310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang unsigned long time_left; 122310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang int i, ret; 123310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang u8 start_bit; 124310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 125310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang ret = clk_prepare_enable(riic->clk); 126310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (ret) 127310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return ret; 128310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 129310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (readb(riic->base + RIIC_ICCR2) & ICCR2_BBSY) { 130310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->err = -EBUSY; 131310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang goto out; 132310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 133310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 134310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang reinit_completion(&riic->msg_done); 135310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->err = 0; 136310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 137310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(0, riic->base + RIIC_ICSR2); 138310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 139310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang for (i = 0, start_bit = ICCR2_ST; i < num; i++) { 140310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->bytes_left = RIIC_INIT_MSG; 141310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->buf = msgs[i].buf; 142310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->msg = &msgs[i]; 143310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->is_last = (i == num - 1); 144310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 145310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(ICIER_NAKIE | ICIER_TIE, riic->base + RIIC_ICIER); 146310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 147310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(start_bit, riic->base + RIIC_ICCR2); 148310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 149310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang time_left = wait_for_completion_timeout(&riic->msg_done, riic->adapter.timeout); 150310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (time_left == 0) 151310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->err = -ETIMEDOUT; 152310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 153310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (riic->err) 154310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang break; 155310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 156310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang start_bit = ICCR2_RS; 157310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 158310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 159310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang out: 160310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang clk_disable_unprepare(riic->clk); 161310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 162310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return riic->err ?: num; 163310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang} 164310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 165310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic irqreturn_t riic_tdre_isr(int irq, void *data) 166310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang{ 167310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct riic_dev *riic = data; 168310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang u8 val; 169310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 170310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (!riic->bytes_left) 171310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return IRQ_NONE; 172310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 173310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (riic->bytes_left == RIIC_INIT_MSG) { 174310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang val = !!(riic->msg->flags & I2C_M_RD); 175310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (val) 176310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang /* On read, switch over to receive interrupt */ 177310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic_clear_set_bit(riic, ICIER_TIE, ICIER_RIE, RIIC_ICIER); 178310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang else 179310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang /* On write, initialize length */ 180310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->bytes_left = riic->msg->len; 181310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 182310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang val |= (riic->msg->addr << 1); 183310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } else { 184310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang val = *riic->buf; 185310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->buf++; 186310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->bytes_left--; 187310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 188310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 189310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang /* 190310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * Switch to transmission ended interrupt when done. Do check here 191310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * after bytes_left was initialized to support SMBUS_QUICK (new msg has 192310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * 0 length then) 193310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang */ 194310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (riic->bytes_left == 0) 195310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic_clear_set_bit(riic, ICIER_TIE, ICIER_TEIE, RIIC_ICIER); 196310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 197310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang /* 198310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * This acks the TIE interrupt. We get another TIE immediately if our 199310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * value could be moved to the shadow shift register right away. So 200310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * this must be after updates to ICIER (where we want to disable TIE)! 201310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang */ 202310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(val, riic->base + RIIC_ICDRT); 203310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 204310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return IRQ_HANDLED; 205310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang} 206310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 207310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic irqreturn_t riic_tend_isr(int irq, void *data) 208310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang{ 209310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct riic_dev *riic = data; 210310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 211310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (readb(riic->base + RIIC_ICSR2) & ICSR2_NACKF) { 212310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang /* We got a NACKIE */ 213310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang readb(riic->base + RIIC_ICDRR); /* dummy read */ 214310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->err = -ENXIO; 215310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } else if (riic->bytes_left) { 216310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return IRQ_NONE; 217310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 218310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 219310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (riic->is_last || riic->err) 220310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(ICCR2_SP, riic->base + RIIC_ICCR2); 221310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 222310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(0, riic->base + RIIC_ICIER); 223310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang complete(&riic->msg_done); 224310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 225310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return IRQ_HANDLED; 226310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang} 227310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 228310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic irqreturn_t riic_rdrf_isr(int irq, void *data) 229310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang{ 230310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct riic_dev *riic = data; 231310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 232310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (!riic->bytes_left) 233310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return IRQ_NONE; 234310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 235310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (riic->bytes_left == RIIC_INIT_MSG) { 236310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->bytes_left = riic->msg->len; 237310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang readb(riic->base + RIIC_ICDRR); /* dummy read */ 238310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return IRQ_HANDLED; 239310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 240310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 241310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (riic->bytes_left == 1) { 242310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang /* STOP must come before we set ACKBT! */ 243310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (riic->is_last) 244310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(ICCR2_SP, riic->base + RIIC_ICCR2); 245310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 246310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic_clear_set_bit(riic, 0, ICMR3_ACKBT, RIIC_ICMR3); 247310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 248310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(0, riic->base + RIIC_ICIER); 249310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang complete(&riic->msg_done); 250310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } else { 251310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic_clear_set_bit(riic, ICMR3_ACKBT, 0, RIIC_ICMR3); 252310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 253310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 254310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang /* Reading acks the RIE interrupt */ 255310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang *riic->buf = readb(riic->base + RIIC_ICDRR); 256310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->buf++; 257310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->bytes_left--; 258310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 259310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return IRQ_HANDLED; 260310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang} 261310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 262310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic u32 riic_func(struct i2c_adapter *adap) 263310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang{ 264310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 265310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang} 266310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 267310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic const struct i2c_algorithm riic_algo = { 268310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang .master_xfer = riic_xfer, 269310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang .functionality = riic_func, 270310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang}; 271310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 272310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic int riic_init_hw(struct riic_dev *riic, u32 spd) 273310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang{ 274310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang int ret; 275310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang unsigned long rate; 276310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 277310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang ret = clk_prepare_enable(riic->clk); 278310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (ret) 279310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return ret; 280310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 281310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang /* 282310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * TODO: Implement formula to calculate the timing values depending on 283310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang * variable parent clock rate and arbitrary bus speed 284310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang */ 285310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang rate = clk_get_rate(riic->clk); 286310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (rate != 33325000) { 287310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang dev_err(&riic->adapter.dev, 288310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang "invalid parent clk (%lu). Must be 33325000Hz\n", rate); 289310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang clk_disable_unprepare(riic->clk); 290310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return -EINVAL; 291310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 292310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 293310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang /* Changing the order of accessing IICRST and ICE may break things! */ 294310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(ICCR1_IICRST | ICCR1_SOWP, riic->base + RIIC_ICCR1); 295310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic_clear_set_bit(riic, 0, ICCR1_ICE, RIIC_ICCR1); 296310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 297310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang switch (spd) { 298310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang case 100000: 299310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(ICMR1_CKS(3), riic->base + RIIC_ICMR1); 300310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(ICBRH_SP100K, riic->base + RIIC_ICBRH); 301310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(ICBRL_SP100K, riic->base + RIIC_ICBRL); 302310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang break; 303310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang case 400000: 304310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(ICMR1_CKS(1), riic->base + RIIC_ICMR1); 305310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(ICBRH_SP400K, riic->base + RIIC_ICBRH); 306310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(ICBRL_SP400K, riic->base + RIIC_ICBRL); 307310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang break; 308310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang default: 309310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang dev_err(&riic->adapter.dev, 310310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang "unsupported bus speed (%dHz). Use 100000 or 400000\n", spd); 311310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang clk_disable_unprepare(riic->clk); 312310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return -EINVAL; 313310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 314310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 315310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(0, riic->base + RIIC_ICSER); 316310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(ICMR3_ACKWP | ICMR3_RDRFS, riic->base + RIIC_ICMR3); 317310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 318310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic_clear_set_bit(riic, ICCR1_IICRST, 0, RIIC_ICCR1); 319310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 320310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang clk_disable_unprepare(riic->clk); 321310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 322310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return 0; 323310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang} 324310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 325310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic struct riic_irq_desc riic_irqs[] = { 326310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang { .res_num = 0, .isr = riic_tend_isr, .name = "riic-tend" }, 327310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang { .res_num = 1, .isr = riic_rdrf_isr, .name = "riic-rdrf" }, 328310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang { .res_num = 2, .isr = riic_tdre_isr, .name = "riic-tdre" }, 329310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang { .res_num = 5, .isr = riic_tend_isr, .name = "riic-nack" }, 330310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang}; 331310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 332310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic int riic_i2c_probe(struct platform_device *pdev) 333310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang{ 334310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct device_node *np = pdev->dev.of_node; 335310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct riic_dev *riic; 336310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct i2c_adapter *adap; 337310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct resource *res; 338310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang u32 bus_rate = 0; 339310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang int i, ret; 340310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 341310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic = devm_kzalloc(&pdev->dev, sizeof(*riic), GFP_KERNEL); 342310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (!riic) 343310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return -ENOMEM; 344310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 345310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 346310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->base = devm_ioremap_resource(&pdev->dev, res); 347310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (IS_ERR(riic->base)) 348310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return PTR_ERR(riic->base); 349310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 350310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang riic->clk = devm_clk_get(&pdev->dev, NULL); 351310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (IS_ERR(riic->clk)) { 352310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang dev_err(&pdev->dev, "missing controller clock"); 353310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return PTR_ERR(riic->clk); 354310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 355310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 356310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) { 357310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang res = platform_get_resource(pdev, IORESOURCE_IRQ, riic_irqs[i].res_num); 358310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (!res) 359310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return -ENODEV; 360310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 361310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang ret = devm_request_irq(&pdev->dev, res->start, riic_irqs[i].isr, 362310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 0, riic_irqs[i].name, riic); 363310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (ret) { 364310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang dev_err(&pdev->dev, "failed to request irq %s\n", riic_irqs[i].name); 365310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return ret; 366310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 367310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 368310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 369310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang adap = &riic->adapter; 370310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang i2c_set_adapdata(adap, riic); 371310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang strlcpy(adap->name, "Renesas RIIC adapter", sizeof(adap->name)); 372310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang adap->owner = THIS_MODULE; 373310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang adap->algo = &riic_algo; 374310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang adap->dev.parent = &pdev->dev; 375310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang adap->dev.of_node = pdev->dev.of_node; 376310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 377310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang init_completion(&riic->msg_done); 378310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 379310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang of_property_read_u32(np, "clock-frequency", &bus_rate); 380310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang ret = riic_init_hw(riic, bus_rate); 381310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (ret) 382310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return ret; 383310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 384310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 385310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang ret = i2c_add_adapter(adap); 386310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang if (ret) { 387310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang dev_err(&pdev->dev, "failed to add adapter\n"); 388310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return ret; 389310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang } 390310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 391310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang platform_set_drvdata(pdev, riic); 392310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 393310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang dev_info(&pdev->dev, "registered with %dHz bus speed\n", bus_rate); 394310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return 0; 395310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang} 396310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 397310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic int riic_i2c_remove(struct platform_device *pdev) 398310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang{ 399310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang struct riic_dev *riic = platform_get_drvdata(pdev); 400310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 401310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang writeb(0, riic->base + RIIC_ICIER); 402310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang i2c_del_adapter(&riic->adapter); 403310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 404310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang return 0; 405310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang} 406310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 407eae45e5dd229d5c6f0aed9789a5d1e84f7ea6100Jingoo Hanstatic const struct of_device_id riic_i2c_dt_ids[] = { 408310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang { .compatible = "renesas,riic-rz" }, 409310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang { /* Sentinel */ }, 410310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang}; 411310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 412310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangstatic struct platform_driver riic_i2c_driver = { 413310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang .probe = riic_i2c_probe, 414310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang .remove = riic_i2c_remove, 415310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang .driver = { 416310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang .name = "i2c-riic", 417310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang .owner = THIS_MODULE, 418310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang .of_match_table = riic_i2c_dt_ids, 419310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang }, 420310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang}; 421310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 422310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sangmodule_platform_driver(riic_i2c_driver); 423310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram Sang 424310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram SangMODULE_DESCRIPTION("Renesas RIIC adapter"); 425310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram SangMODULE_AUTHOR("Wolfram Sang <wsa@sang-engineering.com>"); 426310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram SangMODULE_LICENSE("GPL v2"); 427310c18a414504e42dbeb96263bc81ca865c7c3e5Wolfram SangMODULE_DEVICE_TABLE(of, riic_i2c_dt_ids); 428