1/* 2 * Copyright (C) 1998-2000 Michel Aubry, Maintainer 3 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer 4 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer 5 * 6 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) 7 * May be copied or modified under the terms of the GNU General Public License 8 * Copyright (C) 2002 Alan Cox 9 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> 10 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> 11 * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz 12 * 13 * (U)DMA capable version of ali 1533/1543(C), 1535(D) 14 * 15 ********************************************************************** 16 * 9/7/99 --Parts from the above author are included and need to be 17 * converted into standard interface, once I finish the thought. 18 * 19 * Recent changes 20 * Don't use LBA48 mode on ALi <= 0xC4 21 * Don't poke 0x79 with a non ALi northbridge 22 * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang) 23 * Allow UDMA6 on revisions > 0xC4 24 * 25 * Documentation 26 * Chipset documentation available under NDA only 27 * 28 */ 29 30#include <linux/module.h> 31#include <linux/types.h> 32#include <linux/kernel.h> 33#include <linux/pci.h> 34#include <linux/ide.h> 35#include <linux/init.h> 36#include <linux/dmi.h> 37 38#include <asm/io.h> 39 40#define DRV_NAME "alim15x3" 41 42/* 43 * ALi devices are not plug in. Otherwise these static values would 44 * need to go. They ought to go away anyway 45 */ 46 47static u8 m5229_revision; 48static u8 chip_is_1543c_e; 49static struct pci_dev *isa_dev; 50 51static void ali_fifo_control(ide_hwif_t *hwif, ide_drive_t *drive, int on) 52{ 53 struct pci_dev *pdev = to_pci_dev(hwif->dev); 54 int pio_fifo = 0x54 + hwif->channel; 55 u8 fifo; 56 int shift = 4 * (drive->dn & 1); 57 58 pci_read_config_byte(pdev, pio_fifo, &fifo); 59 fifo &= ~(0x0F << shift); 60 fifo |= (on << shift); 61 pci_write_config_byte(pdev, pio_fifo, fifo); 62} 63 64static void ali_program_timings(ide_hwif_t *hwif, ide_drive_t *drive, 65 struct ide_timing *t, u8 ultra) 66{ 67 struct pci_dev *dev = to_pci_dev(hwif->dev); 68 int port = hwif->channel ? 0x5c : 0x58; 69 int udmat = 0x56 + hwif->channel; 70 u8 unit = drive->dn & 1, udma; 71 int shift = 4 * unit; 72 73 /* Set up the UDMA */ 74 pci_read_config_byte(dev, udmat, &udma); 75 udma &= ~(0x0F << shift); 76 udma |= ultra << shift; 77 pci_write_config_byte(dev, udmat, udma); 78 79 if (t == NULL) 80 return; 81 82 t->setup = clamp_val(t->setup, 1, 8) & 7; 83 t->act8b = clamp_val(t->act8b, 1, 8) & 7; 84 t->rec8b = clamp_val(t->rec8b, 1, 16) & 15; 85 t->active = clamp_val(t->active, 1, 8) & 7; 86 t->recover = clamp_val(t->recover, 1, 16) & 15; 87 88 pci_write_config_byte(dev, port, t->setup); 89 pci_write_config_byte(dev, port + 1, (t->act8b << 4) | t->rec8b); 90 pci_write_config_byte(dev, port + unit + 2, 91 (t->active << 4) | t->recover); 92} 93 94/** 95 * ali_set_pio_mode - set host controller for PIO mode 96 * @hwif: port 97 * @drive: drive 98 * 99 * Program the controller for the given PIO mode. 100 */ 101 102static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) 103{ 104 ide_drive_t *pair = ide_get_pair_dev(drive); 105 int bus_speed = ide_pci_clk ? ide_pci_clk : 33; 106 unsigned long T = 1000000 / bus_speed; /* PCI clock based */ 107 struct ide_timing t; 108 109 ide_timing_compute(drive, drive->pio_mode, &t, T, 1); 110 if (pair) { 111 struct ide_timing p; 112 113 ide_timing_compute(pair, pair->pio_mode, &p, T, 1); 114 ide_timing_merge(&p, &t, &t, 115 IDE_TIMING_SETUP | IDE_TIMING_8BIT); 116 if (pair->dma_mode) { 117 ide_timing_compute(pair, pair->dma_mode, &p, T, 1); 118 ide_timing_merge(&p, &t, &t, 119 IDE_TIMING_SETUP | IDE_TIMING_8BIT); 120 } 121 } 122 123 /* 124 * PIO mode => ATA FIFO on, ATAPI FIFO off 125 */ 126 ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00); 127 128 ali_program_timings(hwif, drive, &t, 0); 129} 130 131/** 132 * ali_udma_filter - compute UDMA mask 133 * @drive: IDE device 134 * 135 * Return available UDMA modes. 136 * 137 * The actual rules for the ALi are: 138 * No UDMA on revisions <= 0x20 139 * Disk only for revisions < 0xC2 140 * Not WDC drives on M1543C-E (?) 141 */ 142 143static u8 ali_udma_filter(ide_drive_t *drive) 144{ 145 if (m5229_revision > 0x20 && m5229_revision < 0xC2) { 146 if (drive->media != ide_disk) 147 return 0; 148 if (chip_is_1543c_e && 149 strstr((char *)&drive->id[ATA_ID_PROD], "WDC ")) 150 return 0; 151 } 152 153 return drive->hwif->ultra_mask; 154} 155 156/** 157 * ali_set_dma_mode - set host controller for DMA mode 158 * @hwif: port 159 * @drive: drive 160 * 161 * Configure the hardware for the desired IDE transfer mode. 162 */ 163 164static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) 165{ 166 static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD }; 167 struct pci_dev *dev = to_pci_dev(hwif->dev); 168 ide_drive_t *pair = ide_get_pair_dev(drive); 169 int bus_speed = ide_pci_clk ? ide_pci_clk : 33; 170 unsigned long T = 1000000 / bus_speed; /* PCI clock based */ 171 const u8 speed = drive->dma_mode; 172 u8 tmpbyte = 0x00; 173 struct ide_timing t; 174 175 if (speed < XFER_UDMA_0) { 176 ide_timing_compute(drive, drive->dma_mode, &t, T, 1); 177 if (pair) { 178 struct ide_timing p; 179 180 ide_timing_compute(pair, pair->pio_mode, &p, T, 1); 181 ide_timing_merge(&p, &t, &t, 182 IDE_TIMING_SETUP | IDE_TIMING_8BIT); 183 if (pair->dma_mode) { 184 ide_timing_compute(pair, pair->dma_mode, 185 &p, T, 1); 186 ide_timing_merge(&p, &t, &t, 187 IDE_TIMING_SETUP | IDE_TIMING_8BIT); 188 } 189 } 190 ali_program_timings(hwif, drive, &t, 0); 191 } else { 192 ali_program_timings(hwif, drive, NULL, 193 udma_timing[speed - XFER_UDMA_0]); 194 if (speed >= XFER_UDMA_3) { 195 pci_read_config_byte(dev, 0x4b, &tmpbyte); 196 tmpbyte |= 1; 197 pci_write_config_byte(dev, 0x4b, tmpbyte); 198 } 199 } 200} 201 202/** 203 * ali_dma_check - DMA check 204 * @drive: target device 205 * @cmd: command 206 * 207 * Returns 1 if the DMA cannot be performed, zero on success. 208 */ 209 210static int ali_dma_check(ide_drive_t *drive, struct ide_cmd *cmd) 211{ 212 if (m5229_revision < 0xC2 && drive->media != ide_disk) { 213 if (cmd->tf_flags & IDE_TFLAG_WRITE) 214 return 1; /* try PIO instead of DMA */ 215 } 216 return 0; 217} 218 219/** 220 * init_chipset_ali15x3 - Initialise an ALi IDE controller 221 * @dev: PCI device 222 * 223 * This function initializes the ALI IDE controller and where 224 * appropriate also sets up the 1533 southbridge. 225 */ 226 227static int init_chipset_ali15x3(struct pci_dev *dev) 228{ 229 unsigned long flags; 230 u8 tmpbyte; 231 struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0)); 232 233 m5229_revision = dev->revision; 234 235 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 236 237 local_irq_save(flags); 238 239 if (m5229_revision < 0xC2) { 240 /* 241 * revision 0x20 (1543-E, 1543-F) 242 * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E) 243 * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7 244 */ 245 pci_read_config_byte(dev, 0x4b, &tmpbyte); 246 /* 247 * clear bit 7 248 */ 249 pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F); 250 /* 251 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 252 */ 253 if (m5229_revision >= 0x20 && isa_dev) { 254 pci_read_config_byte(isa_dev, 0x5e, &tmpbyte); 255 chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0; 256 } 257 goto out; 258 } 259 260 /* 261 * 1543C-B?, 1535, 1535D, 1553 262 * Note 1: not all "motherboard" support this detection 263 * Note 2: if no udma 66 device, the detection may "error". 264 * but in this case, we will not set the device to 265 * ultra 66, the detection result is not important 266 */ 267 268 /* 269 * enable "Cable Detection", m5229, 0x4b, bit3 270 */ 271 pci_read_config_byte(dev, 0x4b, &tmpbyte); 272 pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08); 273 274 /* 275 * We should only tune the 1533 enable if we are using an ALi 276 * North bridge. We might have no north found on some zany 277 * box without a device at 0:0.0. The ALi bridge will be at 278 * 0:0.0 so if we didn't find one we know what is cooking. 279 */ 280 if (north && north->vendor != PCI_VENDOR_ID_AL) 281 goto out; 282 283 if (m5229_revision < 0xC5 && isa_dev) 284 { 285 /* 286 * set south-bridge's enable bit, m1533, 0x79 287 */ 288 289 pci_read_config_byte(isa_dev, 0x79, &tmpbyte); 290 if (m5229_revision == 0xC2) { 291 /* 292 * 1543C-B0 (m1533, 0x79, bit 2) 293 */ 294 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04); 295 } else if (m5229_revision >= 0xC3) { 296 /* 297 * 1553/1535 (m1533, 0x79, bit 1) 298 */ 299 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); 300 } 301 } 302 303out: 304 /* 305 * CD_ROM DMA on (m5229, 0x53, bit0) 306 * Enable this bit even if we want to use PIO. 307 * PIO FIFO off (m5229, 0x53, bit1) 308 * The hardware will use 0x54h and 0x55h to control PIO FIFO. 309 * (Not on later devices it seems) 310 * 311 * 0x53 changes meaning on later revs - we must no touch 312 * bit 1 on them. Need to check if 0x20 is the right break. 313 */ 314 if (m5229_revision >= 0x20) { 315 pci_read_config_byte(dev, 0x53, &tmpbyte); 316 317 if (m5229_revision <= 0x20) 318 tmpbyte = (tmpbyte & (~0x02)) | 0x01; 319 else if (m5229_revision == 0xc7 || m5229_revision == 0xc8) 320 tmpbyte |= 0x03; 321 else 322 tmpbyte |= 0x01; 323 324 pci_write_config_byte(dev, 0x53, tmpbyte); 325 } 326 pci_dev_put(north); 327 pci_dev_put(isa_dev); 328 local_irq_restore(flags); 329 return 0; 330} 331 332/* 333 * Cable special cases 334 */ 335 336static const struct dmi_system_id cable_dmi_table[] = { 337 { 338 .ident = "HP Pavilion N5430", 339 .matches = { 340 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 341 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), 342 }, 343 }, 344 { 345 .ident = "Toshiba Satellite S1800-814", 346 .matches = { 347 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 348 DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), 349 }, 350 }, 351 { } 352}; 353 354static int ali_cable_override(struct pci_dev *pdev) 355{ 356 /* Fujitsu P2000 */ 357 if (pdev->subsystem_vendor == 0x10CF && 358 pdev->subsystem_device == 0x10AF) 359 return 1; 360 361 /* Mitac 8317 (Winbook-A) and relatives */ 362 if (pdev->subsystem_vendor == 0x1071 && 363 pdev->subsystem_device == 0x8317) 364 return 1; 365 366 /* Systems by DMI */ 367 if (dmi_check_system(cable_dmi_table)) 368 return 1; 369 370 return 0; 371} 372 373/** 374 * ali_cable_detect - cable detection 375 * @hwif: IDE interface 376 * 377 * This checks if the controller and the cable are capable 378 * of UDMA66 transfers. It doesn't check the drives. 379 */ 380 381static u8 ali_cable_detect(ide_hwif_t *hwif) 382{ 383 struct pci_dev *dev = to_pci_dev(hwif->dev); 384 u8 cbl = ATA_CBL_PATA40, tmpbyte; 385 386 if (m5229_revision >= 0xC2) { 387 /* 388 * m5229 80-pin cable detection (from Host View) 389 * 390 * 0x4a bit0 is 0 => primary channel has 80-pin 391 * 0x4a bit1 is 0 => secondary channel has 80-pin 392 * 393 * Certain laptops use short but suitable cables 394 * and don't implement the detect logic. 395 */ 396 if (ali_cable_override(dev)) 397 cbl = ATA_CBL_PATA40_SHORT; 398 else { 399 pci_read_config_byte(dev, 0x4a, &tmpbyte); 400 if ((tmpbyte & (1 << hwif->channel)) == 0) 401 cbl = ATA_CBL_PATA80; 402 } 403 } 404 405 return cbl; 406} 407 408#ifndef CONFIG_SPARC64 409/** 410 * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff 411 * @hwif: interface to configure 412 * 413 * Obtain the IRQ tables for an ALi based IDE solution on the PC 414 * class platforms. This part of the code isn't applicable to the 415 * Sparc systems. 416 */ 417 418static void init_hwif_ali15x3(ide_hwif_t *hwif) 419{ 420 u8 ideic, inmir; 421 s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6, 422 1, 11, 0, 12, 0, 14, 0, 15 }; 423 int irq = -1; 424 425 if (isa_dev) { 426 /* 427 * read IDE interface control 428 */ 429 pci_read_config_byte(isa_dev, 0x58, &ideic); 430 431 /* bit0, bit1 */ 432 ideic = ideic & 0x03; 433 434 /* get IRQ for IDE Controller */ 435 if ((hwif->channel && ideic == 0x03) || 436 (!hwif->channel && !ideic)) { 437 /* 438 * get SIRQ1 routing table 439 */ 440 pci_read_config_byte(isa_dev, 0x44, &inmir); 441 inmir = inmir & 0x0f; 442 irq = irq_routing_table[inmir]; 443 } else if (hwif->channel && !(ideic & 0x01)) { 444 /* 445 * get SIRQ2 routing table 446 */ 447 pci_read_config_byte(isa_dev, 0x75, &inmir); 448 inmir = inmir & 0x0f; 449 irq = irq_routing_table[inmir]; 450 } 451 if(irq >= 0) 452 hwif->irq = irq; 453 } 454} 455#else 456#define init_hwif_ali15x3 NULL 457#endif /* CONFIG_SPARC64 */ 458 459/** 460 * init_dma_ali15x3 - set up DMA on ALi15x3 461 * @hwif: IDE interface 462 * @d: IDE port info 463 * 464 * Set up the DMA functionality on the ALi 15x3. 465 */ 466 467static int init_dma_ali15x3(ide_hwif_t *hwif, const struct ide_port_info *d) 468{ 469 struct pci_dev *dev = to_pci_dev(hwif->dev); 470 unsigned long base = ide_pci_dma_base(hwif, d); 471 472 if (base == 0) 473 return -1; 474 475 hwif->dma_base = base; 476 477 if (ide_pci_check_simplex(hwif, d) < 0) 478 return -1; 479 480 if (ide_pci_set_master(dev, d->name) < 0) 481 return -1; 482 483 if (!hwif->channel) 484 outb(inb(base + 2) & 0x60, base + 2); 485 486 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", 487 hwif->name, base, base + 7); 488 489 if (ide_allocate_dma_engine(hwif)) 490 return -1; 491 492 return 0; 493} 494 495static const struct ide_port_ops ali_port_ops = { 496 .set_pio_mode = ali_set_pio_mode, 497 .set_dma_mode = ali_set_dma_mode, 498 .udma_filter = ali_udma_filter, 499 .cable_detect = ali_cable_detect, 500}; 501 502static const struct ide_dma_ops ali_dma_ops = { 503 .dma_host_set = ide_dma_host_set, 504 .dma_setup = ide_dma_setup, 505 .dma_start = ide_dma_start, 506 .dma_end = ide_dma_end, 507 .dma_test_irq = ide_dma_test_irq, 508 .dma_lost_irq = ide_dma_lost_irq, 509 .dma_check = ali_dma_check, 510 .dma_timer_expiry = ide_dma_sff_timer_expiry, 511 .dma_sff_read_status = ide_dma_sff_read_status, 512}; 513 514static const struct ide_port_info ali15x3_chipset = { 515 .name = DRV_NAME, 516 .init_chipset = init_chipset_ali15x3, 517 .init_hwif = init_hwif_ali15x3, 518 .init_dma = init_dma_ali15x3, 519 .port_ops = &ali_port_ops, 520 .dma_ops = &sff_dma_ops, 521 .pio_mask = ATA_PIO5, 522 .swdma_mask = ATA_SWDMA2, 523 .mwdma_mask = ATA_MWDMA2, 524}; 525 526/** 527 * alim15x3_init_one - set up an ALi15x3 IDE controller 528 * @dev: PCI device to set up 529 * 530 * Perform the actual set up for an ALi15x3 that has been found by the 531 * hot plug layer. 532 */ 533 534static int alim15x3_init_one(struct pci_dev *dev, 535 const struct pci_device_id *id) 536{ 537 struct ide_port_info d = ali15x3_chipset; 538 u8 rev = dev->revision, idx = id->driver_data; 539 540 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ 541 if (rev <= 0xC4) 542 d.host_flags |= IDE_HFLAG_NO_LBA48_DMA; 543 544 if (rev >= 0x20) { 545 if (rev == 0x20) 546 d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA; 547 548 if (rev < 0xC2) 549 d.udma_mask = ATA_UDMA2; 550 else if (rev == 0xC2 || rev == 0xC3) 551 d.udma_mask = ATA_UDMA4; 552 else if (rev == 0xC4) 553 d.udma_mask = ATA_UDMA5; 554 else 555 d.udma_mask = ATA_UDMA6; 556 557 d.dma_ops = &ali_dma_ops; 558 } else { 559 d.host_flags |= IDE_HFLAG_NO_DMA; 560 561 d.mwdma_mask = d.swdma_mask = 0; 562 } 563 564 if (idx == 0) 565 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; 566 567 return ide_pci_init_one(dev, &d, NULL); 568} 569 570 571static const struct pci_device_id alim15x3_pci_tbl[] = { 572 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 }, 573 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 }, 574 { 0, }, 575}; 576MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl); 577 578static struct pci_driver alim15x3_pci_driver = { 579 .name = "ALI15x3_IDE", 580 .id_table = alim15x3_pci_tbl, 581 .probe = alim15x3_init_one, 582 .remove = ide_pci_remove, 583 .suspend = ide_pci_suspend, 584 .resume = ide_pci_resume, 585}; 586 587static int __init ali15x3_ide_init(void) 588{ 589 return ide_pci_register_driver(&alim15x3_pci_driver); 590} 591 592static void __exit ali15x3_ide_exit(void) 593{ 594 pci_unregister_driver(&alim15x3_pci_driver); 595} 596 597module_init(ali15x3_ide_init); 598module_exit(ali15x3_ide_exit); 599 600MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox, Bartlomiej Zolnierkiewicz"); 601MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE"); 602MODULE_LICENSE("GPL"); 603