ide-dma.c revision 5ae5412d9a23b05ab08461b202bad21ad8f6b66d
1/* 2 * IDE DMA support (including IDE PCI BM-DMA). 3 * 4 * Copyright (C) 1995-1998 Mark Lord 5 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 6 * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz 7 * 8 * May be copied or modified under the terms of the GNU General Public License 9 * 10 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies). 11 */ 12 13/* 14 * Special Thanks to Mark for his Six years of work. 15 */ 16 17/* 18 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for 19 * fixing the problem with the BIOS on some Acer motherboards. 20 * 21 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing 22 * "TX" chipset compatibility and for providing patches for the "TX" chipset. 23 * 24 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack 25 * at generic DMA -- his patches were referred to when preparing this code. 26 * 27 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com> 28 * for supplying a Promise UDMA board & WD UDMA drive for this work! 29 */ 30 31#include <linux/types.h> 32#include <linux/kernel.h> 33#include <linux/ide.h> 34#include <linux/scatterlist.h> 35#include <linux/dma-mapping.h> 36 37static const struct drive_list_entry drive_whitelist[] = { 38 { "Micropolis 2112A" , NULL }, 39 { "CONNER CTMA 4000" , NULL }, 40 { "CONNER CTT8000-A" , NULL }, 41 { "ST34342A" , NULL }, 42 { NULL , NULL } 43}; 44 45static const struct drive_list_entry drive_blacklist[] = { 46 { "WDC AC11000H" , NULL }, 47 { "WDC AC22100H" , NULL }, 48 { "WDC AC32500H" , NULL }, 49 { "WDC AC33100H" , NULL }, 50 { "WDC AC31600H" , NULL }, 51 { "WDC AC32100H" , "24.09P07" }, 52 { "WDC AC23200L" , "21.10N21" }, 53 { "Compaq CRD-8241B" , NULL }, 54 { "CRD-8400B" , NULL }, 55 { "CRD-8480B", NULL }, 56 { "CRD-8482B", NULL }, 57 { "CRD-84" , NULL }, 58 { "SanDisk SDP3B" , NULL }, 59 { "SanDisk SDP3B-64" , NULL }, 60 { "SANYO CD-ROM CRD" , NULL }, 61 { "HITACHI CDR-8" , NULL }, 62 { "HITACHI CDR-8335" , NULL }, 63 { "HITACHI CDR-8435" , NULL }, 64 { "Toshiba CD-ROM XM-6202B" , NULL }, 65 { "TOSHIBA CD-ROM XM-1702BC", NULL }, 66 { "CD-532E-A" , NULL }, 67 { "E-IDE CD-ROM CR-840", NULL }, 68 { "CD-ROM Drive/F5A", NULL }, 69 { "WPI CDD-820", NULL }, 70 { "SAMSUNG CD-ROM SC-148C", NULL }, 71 { "SAMSUNG CD-ROM SC", NULL }, 72 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL }, 73 { "_NEC DV5800A", NULL }, 74 { "SAMSUNG CD-ROM SN-124", "N001" }, 75 { "Seagate STT20000A", NULL }, 76 { "CD-ROM CDR_U200", "1.09" }, 77 { NULL , NULL } 78 79}; 80 81/** 82 * ide_dma_intr - IDE DMA interrupt handler 83 * @drive: the drive the interrupt is for 84 * 85 * Handle an interrupt completing a read/write DMA transfer on an 86 * IDE device 87 */ 88 89ide_startstop_t ide_dma_intr(ide_drive_t *drive) 90{ 91 ide_hwif_t *hwif = drive->hwif; 92 u8 stat = 0, dma_stat = 0; 93 94 dma_stat = hwif->dma_ops->dma_end(drive); 95 ide_destroy_dmatable(drive); 96 stat = hwif->tp_ops->read_status(hwif); 97 98 if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) { 99 if (!dma_stat) { 100 struct ide_cmd *cmd = &hwif->cmd; 101 102 if ((cmd->tf_flags & IDE_TFLAG_FS) == 0) 103 ide_finish_cmd(drive, cmd, stat); 104 else 105 ide_complete_rq(drive, 0, 106 cmd->rq->nr_sectors << 9); 107 return ide_stopped; 108 } 109 printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n", 110 drive->name, __func__, dma_stat); 111 } 112 return ide_error(drive, "dma_intr", stat); 113} 114 115int ide_dma_good_drive(ide_drive_t *drive) 116{ 117 return ide_in_drive_list(drive->id, drive_whitelist); 118} 119 120/** 121 * ide_build_sglist - map IDE scatter gather for DMA I/O 122 * @drive: the drive to build the DMA table for 123 * @cmd: command 124 * 125 * Perform the DMA mapping magic necessary to access the source or 126 * target buffers of a request via DMA. The lower layers of the 127 * kernel provide the necessary cache management so that we can 128 * operate in a portable fashion. 129 */ 130 131static int ide_build_sglist(ide_drive_t *drive, struct ide_cmd *cmd) 132{ 133 ide_hwif_t *hwif = drive->hwif; 134 struct scatterlist *sg = hwif->sg_table; 135 int i; 136 137 ide_map_sg(drive, cmd); 138 139 if (cmd->tf_flags & IDE_TFLAG_WRITE) 140 cmd->sg_dma_direction = DMA_TO_DEVICE; 141 else 142 cmd->sg_dma_direction = DMA_FROM_DEVICE; 143 144 i = dma_map_sg(hwif->dev, sg, cmd->sg_nents, cmd->sg_dma_direction); 145 if (i == 0) 146 ide_map_sg(drive, cmd); 147 else { 148 cmd->orig_sg_nents = cmd->sg_nents; 149 cmd->sg_nents = i; 150 } 151 152 return i; 153} 154 155/** 156 * ide_destroy_dmatable - clean up DMA mapping 157 * @drive: The drive to unmap 158 * 159 * Teardown mappings after DMA has completed. This must be called 160 * after the completion of each use of ide_build_dmatable and before 161 * the next use of ide_build_dmatable. Failure to do so will cause 162 * an oops as only one mapping can be live for each target at a given 163 * time. 164 */ 165 166void ide_destroy_dmatable(ide_drive_t *drive) 167{ 168 ide_hwif_t *hwif = drive->hwif; 169 struct ide_cmd *cmd = &hwif->cmd; 170 171 dma_unmap_sg(hwif->dev, hwif->sg_table, cmd->orig_sg_nents, 172 cmd->sg_dma_direction); 173} 174EXPORT_SYMBOL_GPL(ide_destroy_dmatable); 175 176/** 177 * ide_dma_off_quietly - Generic DMA kill 178 * @drive: drive to control 179 * 180 * Turn off the current DMA on this IDE controller. 181 */ 182 183void ide_dma_off_quietly(ide_drive_t *drive) 184{ 185 drive->dev_flags &= ~IDE_DFLAG_USING_DMA; 186 ide_toggle_bounce(drive, 0); 187 188 drive->hwif->dma_ops->dma_host_set(drive, 0); 189} 190EXPORT_SYMBOL(ide_dma_off_quietly); 191 192/** 193 * ide_dma_off - disable DMA on a device 194 * @drive: drive to disable DMA on 195 * 196 * Disable IDE DMA for a device on this IDE controller. 197 * Inform the user that DMA has been disabled. 198 */ 199 200void ide_dma_off(ide_drive_t *drive) 201{ 202 printk(KERN_INFO "%s: DMA disabled\n", drive->name); 203 ide_dma_off_quietly(drive); 204} 205EXPORT_SYMBOL(ide_dma_off); 206 207/** 208 * ide_dma_on - Enable DMA on a device 209 * @drive: drive to enable DMA on 210 * 211 * Enable IDE DMA for a device on this IDE controller. 212 */ 213 214void ide_dma_on(ide_drive_t *drive) 215{ 216 drive->dev_flags |= IDE_DFLAG_USING_DMA; 217 ide_toggle_bounce(drive, 1); 218 219 drive->hwif->dma_ops->dma_host_set(drive, 1); 220} 221 222int __ide_dma_bad_drive(ide_drive_t *drive) 223{ 224 u16 *id = drive->id; 225 226 int blacklist = ide_in_drive_list(id, drive_blacklist); 227 if (blacklist) { 228 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n", 229 drive->name, (char *)&id[ATA_ID_PROD]); 230 return blacklist; 231 } 232 return 0; 233} 234EXPORT_SYMBOL(__ide_dma_bad_drive); 235 236static const u8 xfer_mode_bases[] = { 237 XFER_UDMA_0, 238 XFER_MW_DMA_0, 239 XFER_SW_DMA_0, 240}; 241 242static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode) 243{ 244 u16 *id = drive->id; 245 ide_hwif_t *hwif = drive->hwif; 246 const struct ide_port_ops *port_ops = hwif->port_ops; 247 unsigned int mask = 0; 248 249 switch (base) { 250 case XFER_UDMA_0: 251 if ((id[ATA_ID_FIELD_VALID] & 4) == 0) 252 break; 253 254 if (port_ops && port_ops->udma_filter) 255 mask = port_ops->udma_filter(drive); 256 else 257 mask = hwif->ultra_mask; 258 mask &= id[ATA_ID_UDMA_MODES]; 259 260 /* 261 * avoid false cable warning from eighty_ninty_three() 262 */ 263 if (req_mode > XFER_UDMA_2) { 264 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0)) 265 mask &= 0x07; 266 } 267 break; 268 case XFER_MW_DMA_0: 269 if ((id[ATA_ID_FIELD_VALID] & 2) == 0) 270 break; 271 if (port_ops && port_ops->mdma_filter) 272 mask = port_ops->mdma_filter(drive); 273 else 274 mask = hwif->mwdma_mask; 275 mask &= id[ATA_ID_MWDMA_MODES]; 276 break; 277 case XFER_SW_DMA_0: 278 if (id[ATA_ID_FIELD_VALID] & 2) { 279 mask = id[ATA_ID_SWDMA_MODES] & hwif->swdma_mask; 280 } else if (id[ATA_ID_OLD_DMA_MODES] >> 8) { 281 u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8; 282 283 /* 284 * if the mode is valid convert it to the mask 285 * (the maximum allowed mode is XFER_SW_DMA_2) 286 */ 287 if (mode <= 2) 288 mask = ((2 << mode) - 1) & hwif->swdma_mask; 289 } 290 break; 291 default: 292 BUG(); 293 break; 294 } 295 296 return mask; 297} 298 299/** 300 * ide_find_dma_mode - compute DMA speed 301 * @drive: IDE device 302 * @req_mode: requested mode 303 * 304 * Checks the drive/host capabilities and finds the speed to use for 305 * the DMA transfer. The speed is then limited by the requested mode. 306 * 307 * Returns 0 if the drive/host combination is incapable of DMA transfers 308 * or if the requested mode is not a DMA mode. 309 */ 310 311u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode) 312{ 313 ide_hwif_t *hwif = drive->hwif; 314 unsigned int mask; 315 int x, i; 316 u8 mode = 0; 317 318 if (drive->media != ide_disk) { 319 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA) 320 return 0; 321 } 322 323 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) { 324 if (req_mode < xfer_mode_bases[i]) 325 continue; 326 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode); 327 x = fls(mask) - 1; 328 if (x >= 0) { 329 mode = xfer_mode_bases[i] + x; 330 break; 331 } 332 } 333 334 if (hwif->chipset == ide_acorn && mode == 0) { 335 /* 336 * is this correct? 337 */ 338 if (ide_dma_good_drive(drive) && 339 drive->id[ATA_ID_EIDE_DMA_TIME] < 150) 340 mode = XFER_MW_DMA_1; 341 } 342 343 mode = min(mode, req_mode); 344 345 printk(KERN_INFO "%s: %s mode selected\n", drive->name, 346 mode ? ide_xfer_verbose(mode) : "no DMA"); 347 348 return mode; 349} 350EXPORT_SYMBOL_GPL(ide_find_dma_mode); 351 352static int ide_tune_dma(ide_drive_t *drive) 353{ 354 ide_hwif_t *hwif = drive->hwif; 355 u8 speed; 356 357 if (ata_id_has_dma(drive->id) == 0 || 358 (drive->dev_flags & IDE_DFLAG_NODMA)) 359 return 0; 360 361 /* consult the list of known "bad" drives */ 362 if (__ide_dma_bad_drive(drive)) 363 return 0; 364 365 if (ide_id_dma_bug(drive)) 366 return 0; 367 368 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA) 369 return config_drive_for_dma(drive); 370 371 speed = ide_max_dma_mode(drive); 372 373 if (!speed) 374 return 0; 375 376 if (ide_set_dma_mode(drive, speed)) 377 return 0; 378 379 return 1; 380} 381 382static int ide_dma_check(ide_drive_t *drive) 383{ 384 ide_hwif_t *hwif = drive->hwif; 385 386 if (ide_tune_dma(drive)) 387 return 0; 388 389 /* TODO: always do PIO fallback */ 390 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA) 391 return -1; 392 393 ide_set_max_pio(drive); 394 395 return -1; 396} 397 398int ide_id_dma_bug(ide_drive_t *drive) 399{ 400 u16 *id = drive->id; 401 402 if (id[ATA_ID_FIELD_VALID] & 4) { 403 if ((id[ATA_ID_UDMA_MODES] >> 8) && 404 (id[ATA_ID_MWDMA_MODES] >> 8)) 405 goto err_out; 406 } else if (id[ATA_ID_FIELD_VALID] & 2) { 407 if ((id[ATA_ID_MWDMA_MODES] >> 8) && 408 (id[ATA_ID_SWDMA_MODES] >> 8)) 409 goto err_out; 410 } 411 return 0; 412err_out: 413 printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name); 414 return 1; 415} 416 417int ide_set_dma(ide_drive_t *drive) 418{ 419 int rc; 420 421 /* 422 * Force DMAing for the beginning of the check. 423 * Some chipsets appear to do interesting 424 * things, if not checked and cleared. 425 * PARANOIA!!! 426 */ 427 ide_dma_off_quietly(drive); 428 429 rc = ide_dma_check(drive); 430 if (rc) 431 return rc; 432 433 ide_dma_on(drive); 434 435 return 0; 436} 437 438void ide_check_dma_crc(ide_drive_t *drive) 439{ 440 u8 mode; 441 442 ide_dma_off_quietly(drive); 443 drive->crc_count = 0; 444 mode = drive->current_speed; 445 /* 446 * Don't try non Ultra-DMA modes without iCRC's. Force the 447 * device to PIO and make the user enable SWDMA/MWDMA modes. 448 */ 449 if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7) 450 mode--; 451 else 452 mode = XFER_PIO_4; 453 ide_set_xfer_rate(drive, mode); 454 if (drive->current_speed >= XFER_SW_DMA_0) 455 ide_dma_on(drive); 456} 457 458void ide_dma_lost_irq(ide_drive_t *drive) 459{ 460 printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name); 461} 462EXPORT_SYMBOL_GPL(ide_dma_lost_irq); 463 464/* 465 * un-busy the port etc, and clear any pending DMA status. we want to 466 * retry the current request in pio mode instead of risking tossing it 467 * all away 468 */ 469ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) 470{ 471 ide_hwif_t *hwif = drive->hwif; 472 const struct ide_dma_ops *dma_ops = hwif->dma_ops; 473 struct request *rq; 474 ide_startstop_t ret = ide_stopped; 475 476 /* 477 * end current dma transaction 478 */ 479 480 if (error < 0) { 481 printk(KERN_WARNING "%s: DMA timeout error\n", drive->name); 482 (void)dma_ops->dma_end(drive); 483 ide_destroy_dmatable(drive); 484 ret = ide_error(drive, "dma timeout error", 485 hwif->tp_ops->read_status(hwif)); 486 } else { 487 printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name); 488 if (dma_ops->dma_clear) 489 dma_ops->dma_clear(drive); 490 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name); 491 if (dma_ops->dma_test_irq(drive) == 0) { 492 ide_dump_status(drive, "DMA timeout", 493 hwif->tp_ops->read_status(hwif)); 494 (void)dma_ops->dma_end(drive); 495 ide_destroy_dmatable(drive); 496 } 497 } 498 499 /* 500 * disable dma for now, but remember that we did so because of 501 * a timeout -- we'll reenable after we finish this next request 502 * (or rather the first chunk of it) in pio. 503 */ 504 drive->dev_flags |= IDE_DFLAG_DMA_PIO_RETRY; 505 drive->retry_pio++; 506 ide_dma_off_quietly(drive); 507 508 /* 509 * un-busy drive etc and make sure request is sane 510 */ 511 512 rq = hwif->rq; 513 if (!rq) 514 goto out; 515 516 hwif->rq = NULL; 517 518 rq->errors = 0; 519 520 if (!rq->bio) 521 goto out; 522 523 rq->sector = rq->bio->bi_sector; 524 rq->current_nr_sectors = bio_iovec(rq->bio)->bv_len >> 9; 525 rq->hard_cur_sectors = rq->current_nr_sectors; 526 rq->buffer = bio_data(rq->bio); 527out: 528 return ret; 529} 530 531void ide_release_dma_engine(ide_hwif_t *hwif) 532{ 533 if (hwif->dmatable_cpu) { 534 int prd_size = hwif->prd_max_nents * hwif->prd_ent_size; 535 536 dma_free_coherent(hwif->dev, prd_size, 537 hwif->dmatable_cpu, hwif->dmatable_dma); 538 hwif->dmatable_cpu = NULL; 539 } 540} 541EXPORT_SYMBOL_GPL(ide_release_dma_engine); 542 543int ide_allocate_dma_engine(ide_hwif_t *hwif) 544{ 545 int prd_size; 546 547 if (hwif->prd_max_nents == 0) 548 hwif->prd_max_nents = PRD_ENTRIES; 549 if (hwif->prd_ent_size == 0) 550 hwif->prd_ent_size = PRD_BYTES; 551 552 prd_size = hwif->prd_max_nents * hwif->prd_ent_size; 553 554 hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size, 555 &hwif->dmatable_dma, 556 GFP_ATOMIC); 557 if (hwif->dmatable_cpu == NULL) { 558 printk(KERN_ERR "%s: unable to allocate PRD table\n", 559 hwif->name); 560 return -ENOMEM; 561 } 562 563 return 0; 564} 565EXPORT_SYMBOL_GPL(ide_allocate_dma_engine); 566 567int ide_dma_prepare(ide_drive_t *drive, struct ide_cmd *cmd) 568{ 569 if ((drive->dev_flags & IDE_DFLAG_USING_DMA) == 0 || 570 ide_build_sglist(drive, cmd) == 0 || 571 drive->hwif->dma_ops->dma_setup(drive, cmd)) 572 return 1; 573 return 0; 574} 575