ide-iops.c revision 0546cb045ea487d8702c5ae4da6e0eab7baa17ba
1/* 2 * linux/drivers/ide/ide-iops.c Version 0.37 Mar 05, 2003 3 * 4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 5 * Copyright (C) 2003 Red Hat <alan@redhat.com> 6 * 7 */ 8 9#include <linux/module.h> 10#include <linux/types.h> 11#include <linux/string.h> 12#include <linux/kernel.h> 13#include <linux/timer.h> 14#include <linux/mm.h> 15#include <linux/interrupt.h> 16#include <linux/major.h> 17#include <linux/errno.h> 18#include <linux/genhd.h> 19#include <linux/blkpg.h> 20#include <linux/slab.h> 21#include <linux/pci.h> 22#include <linux/delay.h> 23#include <linux/hdreg.h> 24#include <linux/ide.h> 25#include <linux/bitops.h> 26#include <linux/nmi.h> 27 28#include <asm/byteorder.h> 29#include <asm/irq.h> 30#include <asm/uaccess.h> 31#include <asm/io.h> 32 33/* 34 * Conventional PIO operations for ATA devices 35 */ 36 37static u8 ide_inb (unsigned long port) 38{ 39 return (u8) inb(port); 40} 41 42static u16 ide_inw (unsigned long port) 43{ 44 return (u16) inw(port); 45} 46 47static void ide_insw (unsigned long port, void *addr, u32 count) 48{ 49 insw(port, addr, count); 50} 51 52static void ide_insl (unsigned long port, void *addr, u32 count) 53{ 54 insl(port, addr, count); 55} 56 57static void ide_outb (u8 val, unsigned long port) 58{ 59 outb(val, port); 60} 61 62static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port) 63{ 64 outb(addr, port); 65} 66 67static void ide_outw (u16 val, unsigned long port) 68{ 69 outw(val, port); 70} 71 72static void ide_outsw (unsigned long port, void *addr, u32 count) 73{ 74 outsw(port, addr, count); 75} 76 77static void ide_outsl (unsigned long port, void *addr, u32 count) 78{ 79 outsl(port, addr, count); 80} 81 82void default_hwif_iops (ide_hwif_t *hwif) 83{ 84 hwif->OUTB = ide_outb; 85 hwif->OUTBSYNC = ide_outbsync; 86 hwif->OUTW = ide_outw; 87 hwif->OUTSW = ide_outsw; 88 hwif->OUTSL = ide_outsl; 89 hwif->INB = ide_inb; 90 hwif->INW = ide_inw; 91 hwif->INSW = ide_insw; 92 hwif->INSL = ide_insl; 93} 94 95/* 96 * MMIO operations, typically used for SATA controllers 97 */ 98 99static u8 ide_mm_inb (unsigned long port) 100{ 101 return (u8) readb((void __iomem *) port); 102} 103 104static u16 ide_mm_inw (unsigned long port) 105{ 106 return (u16) readw((void __iomem *) port); 107} 108 109static void ide_mm_insw (unsigned long port, void *addr, u32 count) 110{ 111 __ide_mm_insw((void __iomem *) port, addr, count); 112} 113 114static void ide_mm_insl (unsigned long port, void *addr, u32 count) 115{ 116 __ide_mm_insl((void __iomem *) port, addr, count); 117} 118 119static void ide_mm_outb (u8 value, unsigned long port) 120{ 121 writeb(value, (void __iomem *) port); 122} 123 124static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port) 125{ 126 writeb(value, (void __iomem *) port); 127} 128 129static void ide_mm_outw (u16 value, unsigned long port) 130{ 131 writew(value, (void __iomem *) port); 132} 133 134static void ide_mm_outsw (unsigned long port, void *addr, u32 count) 135{ 136 __ide_mm_outsw((void __iomem *) port, addr, count); 137} 138 139static void ide_mm_outsl (unsigned long port, void *addr, u32 count) 140{ 141 __ide_mm_outsl((void __iomem *) port, addr, count); 142} 143 144void default_hwif_mmiops (ide_hwif_t *hwif) 145{ 146 hwif->OUTB = ide_mm_outb; 147 /* Most systems will need to override OUTBSYNC, alas however 148 this one is controller specific! */ 149 hwif->OUTBSYNC = ide_mm_outbsync; 150 hwif->OUTW = ide_mm_outw; 151 hwif->OUTSW = ide_mm_outsw; 152 hwif->OUTSL = ide_mm_outsl; 153 hwif->INB = ide_mm_inb; 154 hwif->INW = ide_mm_inw; 155 hwif->INSW = ide_mm_insw; 156 hwif->INSL = ide_mm_insl; 157} 158 159EXPORT_SYMBOL(default_hwif_mmiops); 160 161u32 ide_read_24 (ide_drive_t *drive) 162{ 163 u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG); 164 u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG); 165 u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG); 166 return (hcyl<<16)|(lcyl<<8)|sect; 167} 168 169void SELECT_DRIVE (ide_drive_t *drive) 170{ 171 if (HWIF(drive)->selectproc) 172 HWIF(drive)->selectproc(drive); 173 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG); 174} 175 176EXPORT_SYMBOL(SELECT_DRIVE); 177 178void SELECT_INTERRUPT (ide_drive_t *drive) 179{ 180 if (HWIF(drive)->intrproc) 181 HWIF(drive)->intrproc(drive); 182 else 183 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG); 184} 185 186void SELECT_MASK (ide_drive_t *drive, int mask) 187{ 188 if (HWIF(drive)->maskproc) 189 HWIF(drive)->maskproc(drive, mask); 190} 191 192void QUIRK_LIST (ide_drive_t *drive) 193{ 194 if (HWIF(drive)->quirkproc) 195 drive->quirk_list = HWIF(drive)->quirkproc(drive); 196} 197 198/* 199 * Some localbus EIDE interfaces require a special access sequence 200 * when using 32-bit I/O instructions to transfer data. We call this 201 * the "vlb_sync" sequence, which consists of three successive reads 202 * of the sector count register location, with interrupts disabled 203 * to ensure that the reads all happen together. 204 */ 205static void ata_vlb_sync(ide_drive_t *drive, unsigned long port) 206{ 207 (void) HWIF(drive)->INB(port); 208 (void) HWIF(drive)->INB(port); 209 (void) HWIF(drive)->INB(port); 210} 211 212/* 213 * This is used for most PIO data transfers *from* the IDE interface 214 */ 215static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount) 216{ 217 ide_hwif_t *hwif = HWIF(drive); 218 u8 io_32bit = drive->io_32bit; 219 220 if (io_32bit) { 221 if (io_32bit & 2) { 222 unsigned long flags; 223 local_irq_save(flags); 224 ata_vlb_sync(drive, IDE_NSECTOR_REG); 225 hwif->INSL(IDE_DATA_REG, buffer, wcount); 226 local_irq_restore(flags); 227 } else 228 hwif->INSL(IDE_DATA_REG, buffer, wcount); 229 } else { 230 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1); 231 } 232} 233 234/* 235 * This is used for most PIO data transfers *to* the IDE interface 236 */ 237static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount) 238{ 239 ide_hwif_t *hwif = HWIF(drive); 240 u8 io_32bit = drive->io_32bit; 241 242 if (io_32bit) { 243 if (io_32bit & 2) { 244 unsigned long flags; 245 local_irq_save(flags); 246 ata_vlb_sync(drive, IDE_NSECTOR_REG); 247 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 248 local_irq_restore(flags); 249 } else 250 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 251 } else { 252 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1); 253 } 254} 255 256/* 257 * The following routines are mainly used by the ATAPI drivers. 258 * 259 * These routines will round up any request for an odd number of bytes, 260 * so if an odd bytecount is specified, be sure that there's at least one 261 * extra byte allocated for the buffer. 262 */ 263 264static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 265{ 266 ide_hwif_t *hwif = HWIF(drive); 267 268 ++bytecount; 269#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 270 if (MACH_IS_ATARI || MACH_IS_Q40) { 271 /* Atari has a byte-swapped IDE interface */ 272 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 273 return; 274 } 275#endif /* CONFIG_ATARI || CONFIG_Q40 */ 276 hwif->ata_input_data(drive, buffer, bytecount / 4); 277 if ((bytecount & 0x03) >= 2) 278 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1); 279} 280 281static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 282{ 283 ide_hwif_t *hwif = HWIF(drive); 284 285 ++bytecount; 286#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 287 if (MACH_IS_ATARI || MACH_IS_Q40) { 288 /* Atari has a byte-swapped IDE interface */ 289 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 290 return; 291 } 292#endif /* CONFIG_ATARI || CONFIG_Q40 */ 293 hwif->ata_output_data(drive, buffer, bytecount / 4); 294 if ((bytecount & 0x03) >= 2) 295 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1); 296} 297 298void default_hwif_transport(ide_hwif_t *hwif) 299{ 300 hwif->ata_input_data = ata_input_data; 301 hwif->ata_output_data = ata_output_data; 302 hwif->atapi_input_bytes = atapi_input_bytes; 303 hwif->atapi_output_bytes = atapi_output_bytes; 304} 305 306void ide_fix_driveid (struct hd_driveid *id) 307{ 308#ifndef __LITTLE_ENDIAN 309# ifdef __BIG_ENDIAN 310 int i; 311 u16 *stringcast; 312 313 id->config = __le16_to_cpu(id->config); 314 id->cyls = __le16_to_cpu(id->cyls); 315 id->reserved2 = __le16_to_cpu(id->reserved2); 316 id->heads = __le16_to_cpu(id->heads); 317 id->track_bytes = __le16_to_cpu(id->track_bytes); 318 id->sector_bytes = __le16_to_cpu(id->sector_bytes); 319 id->sectors = __le16_to_cpu(id->sectors); 320 id->vendor0 = __le16_to_cpu(id->vendor0); 321 id->vendor1 = __le16_to_cpu(id->vendor1); 322 id->vendor2 = __le16_to_cpu(id->vendor2); 323 stringcast = (u16 *)&id->serial_no[0]; 324 for (i = 0; i < (20/2); i++) 325 stringcast[i] = __le16_to_cpu(stringcast[i]); 326 id->buf_type = __le16_to_cpu(id->buf_type); 327 id->buf_size = __le16_to_cpu(id->buf_size); 328 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); 329 stringcast = (u16 *)&id->fw_rev[0]; 330 for (i = 0; i < (8/2); i++) 331 stringcast[i] = __le16_to_cpu(stringcast[i]); 332 stringcast = (u16 *)&id->model[0]; 333 for (i = 0; i < (40/2); i++) 334 stringcast[i] = __le16_to_cpu(stringcast[i]); 335 id->dword_io = __le16_to_cpu(id->dword_io); 336 id->reserved50 = __le16_to_cpu(id->reserved50); 337 id->field_valid = __le16_to_cpu(id->field_valid); 338 id->cur_cyls = __le16_to_cpu(id->cur_cyls); 339 id->cur_heads = __le16_to_cpu(id->cur_heads); 340 id->cur_sectors = __le16_to_cpu(id->cur_sectors); 341 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); 342 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); 343 id->lba_capacity = __le32_to_cpu(id->lba_capacity); 344 id->dma_1word = __le16_to_cpu(id->dma_1word); 345 id->dma_mword = __le16_to_cpu(id->dma_mword); 346 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); 347 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); 348 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); 349 id->eide_pio = __le16_to_cpu(id->eide_pio); 350 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); 351 for (i = 0; i < 2; ++i) 352 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); 353 for (i = 0; i < 4; ++i) 354 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); 355 id->queue_depth = __le16_to_cpu(id->queue_depth); 356 for (i = 0; i < 4; ++i) 357 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); 358 id->major_rev_num = __le16_to_cpu(id->major_rev_num); 359 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); 360 id->command_set_1 = __le16_to_cpu(id->command_set_1); 361 id->command_set_2 = __le16_to_cpu(id->command_set_2); 362 id->cfsse = __le16_to_cpu(id->cfsse); 363 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); 364 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); 365 id->csf_default = __le16_to_cpu(id->csf_default); 366 id->dma_ultra = __le16_to_cpu(id->dma_ultra); 367 id->trseuc = __le16_to_cpu(id->trseuc); 368 id->trsEuc = __le16_to_cpu(id->trsEuc); 369 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); 370 id->mprc = __le16_to_cpu(id->mprc); 371 id->hw_config = __le16_to_cpu(id->hw_config); 372 id->acoustic = __le16_to_cpu(id->acoustic); 373 id->msrqs = __le16_to_cpu(id->msrqs); 374 id->sxfert = __le16_to_cpu(id->sxfert); 375 id->sal = __le16_to_cpu(id->sal); 376 id->spg = __le32_to_cpu(id->spg); 377 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); 378 for (i = 0; i < 22; i++) 379 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); 380 id->last_lun = __le16_to_cpu(id->last_lun); 381 id->word127 = __le16_to_cpu(id->word127); 382 id->dlf = __le16_to_cpu(id->dlf); 383 id->csfo = __le16_to_cpu(id->csfo); 384 for (i = 0; i < 26; i++) 385 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); 386 id->word156 = __le16_to_cpu(id->word156); 387 for (i = 0; i < 3; i++) 388 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); 389 id->cfa_power = __le16_to_cpu(id->cfa_power); 390 for (i = 0; i < 14; i++) 391 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); 392 for (i = 0; i < 31; i++) 393 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); 394 for (i = 0; i < 48; i++) 395 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); 396 id->integrity_word = __le16_to_cpu(id->integrity_word); 397# else 398# error "Please fix <asm/byteorder.h>" 399# endif 400#endif 401} 402 403/* 404 * ide_fixstring() cleans up and (optionally) byte-swaps a text string, 405 * removing leading/trailing blanks and compressing internal blanks. 406 * It is primarily used to tidy up the model name/number fields as 407 * returned by the WIN_[P]IDENTIFY commands. 408 */ 409 410void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 411{ 412 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ 413 414 if (byteswap) { 415 /* convert from big-endian to host byte order */ 416 for (p = end ; p != s;) { 417 unsigned short *pp = (unsigned short *) (p -= 2); 418 *pp = ntohs(*pp); 419 } 420 } 421 /* strip leading blanks */ 422 while (s != end && *s == ' ') 423 ++s; 424 /* compress internal blanks and strip trailing blanks */ 425 while (s != end && *s) { 426 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 427 *p++ = *(s-1); 428 } 429 /* wipe out trailing garbage */ 430 while (p != end) 431 *p++ = '\0'; 432} 433 434EXPORT_SYMBOL(ide_fixstring); 435 436/* 437 * Needed for PCI irq sharing 438 */ 439int drive_is_ready (ide_drive_t *drive) 440{ 441 ide_hwif_t *hwif = HWIF(drive); 442 u8 stat = 0; 443 444 if (drive->waiting_for_dma) 445 return hwif->ide_dma_test_irq(drive); 446 447#if 0 448 /* need to guarantee 400ns since last command was issued */ 449 udelay(1); 450#endif 451 452#ifdef CONFIG_IDEPCI_SHARE_IRQ 453 /* 454 * We do a passive status test under shared PCI interrupts on 455 * cards that truly share the ATA side interrupt, but may also share 456 * an interrupt with another pci card/device. We make no assumptions 457 * about possible isa-pnp and pci-pnp issues yet. 458 */ 459 if (IDE_CONTROL_REG) 460 stat = hwif->INB(IDE_ALTSTATUS_REG); 461 else 462#endif /* CONFIG_IDEPCI_SHARE_IRQ */ 463 /* Note: this may clear a pending IRQ!! */ 464 stat = hwif->INB(IDE_STATUS_REG); 465 466 if (stat & BUSY_STAT) 467 /* drive busy: definitely not interrupting */ 468 return 0; 469 470 /* drive ready: *might* be interrupting */ 471 return 1; 472} 473 474EXPORT_SYMBOL(drive_is_ready); 475 476/* 477 * This routine busy-waits for the drive status to be not "busy". 478 * It then checks the status for all of the "good" bits and none 479 * of the "bad" bits, and if all is okay it returns 0. All other 480 * cases return error -- caller may then invoke ide_error(). 481 * 482 * This routine should get fixed to not hog the cpu during extra long waits.. 483 * That could be done by busy-waiting for the first jiffy or two, and then 484 * setting a timer to wake up at half second intervals thereafter, 485 * until timeout is achieved, before timing out. 486 */ 487static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) 488{ 489 ide_hwif_t *hwif = drive->hwif; 490 unsigned long flags; 491 int i; 492 u8 stat; 493 494 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 495 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 496 local_irq_set(flags); 497 timeout += jiffies; 498 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 499 if (time_after(jiffies, timeout)) { 500 /* 501 * One last read after the timeout in case 502 * heavy interrupt load made us not make any 503 * progress during the timeout.. 504 */ 505 stat = hwif->INB(IDE_STATUS_REG); 506 if (!(stat & BUSY_STAT)) 507 break; 508 509 local_irq_restore(flags); 510 *rstat = stat; 511 return -EBUSY; 512 } 513 } 514 local_irq_restore(flags); 515 } 516 /* 517 * Allow status to settle, then read it again. 518 * A few rare drives vastly violate the 400ns spec here, 519 * so we'll wait up to 10usec for a "good" status 520 * rather than expensively fail things immediately. 521 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 522 */ 523 for (i = 0; i < 10; i++) { 524 udelay(1); 525 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) { 526 *rstat = stat; 527 return 0; 528 } 529 } 530 *rstat = stat; 531 return -EFAULT; 532} 533 534/* 535 * In case of error returns error value after doing "*startstop = ide_error()". 536 * The caller should return the updated value of "startstop" in this case, 537 * "startstop" is unchanged when the function returns 0. 538 */ 539int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 540{ 541 int err; 542 u8 stat; 543 544 /* bail early if we've exceeded max_failures */ 545 if (drive->max_failures && (drive->failures > drive->max_failures)) { 546 *startstop = ide_stopped; 547 return 1; 548 } 549 550 err = __ide_wait_stat(drive, good, bad, timeout, &stat); 551 552 if (err) { 553 char *s = (err == -EBUSY) ? "status timeout" : "status error"; 554 *startstop = ide_error(drive, s, stat); 555 } 556 557 return err; 558} 559 560EXPORT_SYMBOL(ide_wait_stat); 561 562/** 563 * ide_in_drive_list - look for drive in black/white list 564 * @id: drive identifier 565 * @drive_table: list to inspect 566 * 567 * Look for a drive in the blacklist and the whitelist tables 568 * Returns 1 if the drive is found in the table. 569 */ 570 571int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table) 572{ 573 for ( ; drive_table->id_model; drive_table++) 574 if ((!strcmp(drive_table->id_model, id->model)) && 575 (!drive_table->id_firmware || 576 strstr(id->fw_rev, drive_table->id_firmware))) 577 return 1; 578 return 0; 579} 580 581EXPORT_SYMBOL_GPL(ide_in_drive_list); 582 583/* 584 * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. 585 * We list them here and depend on the device side cable detection for them. 586 * 587 * Some optical devices with the buggy firmwares have the same problem. 588 */ 589static const struct drive_list_entry ivb_list[] = { 590 { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, 591 { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, 592 { NULL , NULL } 593}; 594 595/* 596 * All hosts that use the 80c ribbon must use! 597 * The name is derived from upper byte of word 93 and the 80c ribbon. 598 */ 599u8 eighty_ninty_three (ide_drive_t *drive) 600{ 601 ide_hwif_t *hwif = drive->hwif; 602 struct hd_driveid *id = drive->id; 603 int ivb = ide_in_drive_list(id, ivb_list); 604 605 if (hwif->cbl == ATA_CBL_PATA40_SHORT) 606 return 1; 607 608 if (ivb) 609 printk(KERN_DEBUG "%s: skipping word 93 validity check\n", 610 drive->name); 611 612 if (hwif->cbl != ATA_CBL_PATA80 && !ivb) 613 goto no_80w; 614 615 if (ide_dev_is_sata(id)) 616 return 1; 617 618 /* 619 * FIXME: 620 * - force bit13 (80c cable present) check also for !ivb devices 621 * (unless the slave device is pre-ATA3) 622 */ 623 if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000))) 624 return 1; 625 626no_80w: 627 if (drive->udma33_warned == 1) 628 return 0; 629 630 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 631 "limiting max speed to UDMA33\n", 632 drive->name, 633 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); 634 635 drive->udma33_warned = 1; 636 637 return 0; 638} 639 640int ide_ata66_check (ide_drive_t *drive, ide_task_t *args) 641{ 642 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) && 643 (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) && 644 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) { 645 if (eighty_ninty_three(drive) == 0) { 646 printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot " 647 "be set\n", drive->name); 648 return 1; 649 } 650 } 651 652 return 0; 653} 654 655/* 656 * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER. 657 * 1 : Safe to update drive->id DMA registers. 658 * 0 : OOPs not allowed. 659 */ 660int set_transfer (ide_drive_t *drive, ide_task_t *args) 661{ 662 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) && 663 (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) && 664 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) && 665 (drive->id->dma_ultra || 666 drive->id->dma_mword || 667 drive->id->dma_1word)) 668 return 1; 669 670 return 0; 671} 672 673#ifdef CONFIG_BLK_DEV_IDEDMA 674static u8 ide_auto_reduce_xfer (ide_drive_t *drive) 675{ 676 if (!drive->crc_count) 677 return drive->current_speed; 678 drive->crc_count = 0; 679 680 switch(drive->current_speed) { 681 case XFER_UDMA_7: return XFER_UDMA_6; 682 case XFER_UDMA_6: return XFER_UDMA_5; 683 case XFER_UDMA_5: return XFER_UDMA_4; 684 case XFER_UDMA_4: return XFER_UDMA_3; 685 case XFER_UDMA_3: return XFER_UDMA_2; 686 case XFER_UDMA_2: return XFER_UDMA_1; 687 case XFER_UDMA_1: return XFER_UDMA_0; 688 /* 689 * OOPS we do not goto non Ultra DMA modes 690 * without iCRC's available we force 691 * the system to PIO and make the user 692 * invoke the ATA-1 ATA-2 DMA modes. 693 */ 694 case XFER_UDMA_0: 695 default: return XFER_PIO_4; 696 } 697} 698#endif /* CONFIG_BLK_DEV_IDEDMA */ 699 700int ide_driveid_update(ide_drive_t *drive) 701{ 702 ide_hwif_t *hwif = drive->hwif; 703 struct hd_driveid *id; 704 unsigned long timeout, flags; 705 706 /* 707 * Re-read drive->id for possible DMA mode 708 * change (copied from ide-probe.c) 709 */ 710 711 SELECT_MASK(drive, 1); 712 if (IDE_CONTROL_REG) 713 hwif->OUTB(drive->ctl,IDE_CONTROL_REG); 714 msleep(50); 715 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG); 716 timeout = jiffies + WAIT_WORSTCASE; 717 do { 718 if (time_after(jiffies, timeout)) { 719 SELECT_MASK(drive, 0); 720 return 0; /* drive timed-out */ 721 } 722 msleep(50); /* give drive a breather */ 723 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT); 724 msleep(50); /* wait for IRQ and DRQ_STAT */ 725 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) { 726 SELECT_MASK(drive, 0); 727 printk("%s: CHECK for good STATUS\n", drive->name); 728 return 0; 729 } 730 local_irq_save(flags); 731 SELECT_MASK(drive, 0); 732 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 733 if (!id) { 734 local_irq_restore(flags); 735 return 0; 736 } 737 ata_input_data(drive, id, SECTOR_WORDS); 738 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */ 739 local_irq_enable(); 740 local_irq_restore(flags); 741 ide_fix_driveid(id); 742 if (id) { 743 drive->id->dma_ultra = id->dma_ultra; 744 drive->id->dma_mword = id->dma_mword; 745 drive->id->dma_1word = id->dma_1word; 746 /* anything more ? */ 747 kfree(id); 748 } 749 750 return 1; 751} 752 753int ide_config_drive_speed(ide_drive_t *drive, u8 speed) 754{ 755 ide_hwif_t *hwif = drive->hwif; 756 int error = 0; 757 u8 stat; 758 759// while (HWGROUP(drive)->busy) 760// msleep(50); 761 762#ifdef CONFIG_BLK_DEV_IDEDMA 763 if (hwif->ide_dma_on) /* check if host supports DMA */ 764 hwif->dma_host_off(drive); 765#endif 766 767 /* Skip setting PIO flow-control modes on pre-EIDE drives */ 768 if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08)) 769 goto skip; 770 771 /* 772 * Don't use ide_wait_cmd here - it will 773 * attempt to set_geometry and recalibrate, 774 * but for some reason these don't work at 775 * this point (lost interrupt). 776 */ 777 /* 778 * Select the drive, and issue the SETFEATURES command 779 */ 780 disable_irq_nosync(hwif->irq); 781 782 /* 783 * FIXME: we race against the running IRQ here if 784 * this is called from non IRQ context. If we use 785 * disable_irq() we hang on the error path. Work 786 * is needed. 787 */ 788 789 udelay(1); 790 SELECT_DRIVE(drive); 791 SELECT_MASK(drive, 0); 792 udelay(1); 793 if (IDE_CONTROL_REG) 794 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG); 795 hwif->OUTB(speed, IDE_NSECTOR_REG); 796 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG); 797 hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG); 798 if ((IDE_CONTROL_REG) && (drive->quirk_list == 2)) 799 hwif->OUTB(drive->ctl, IDE_CONTROL_REG); 800 801 error = __ide_wait_stat(drive, drive->ready_stat, 802 BUSY_STAT|DRQ_STAT|ERR_STAT, 803 WAIT_CMD, &stat); 804 805 SELECT_MASK(drive, 0); 806 807 enable_irq(hwif->irq); 808 809 if (error) { 810 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 811 return error; 812 } 813 814 drive->id->dma_ultra &= ~0xFF00; 815 drive->id->dma_mword &= ~0x0F00; 816 drive->id->dma_1word &= ~0x0F00; 817 818 skip: 819#ifdef CONFIG_BLK_DEV_IDEDMA 820 if (speed >= XFER_SW_DMA_0) 821 hwif->dma_host_on(drive); 822 else if (hwif->ide_dma_on) /* check if host supports DMA */ 823 hwif->dma_off_quietly(drive); 824#endif 825 826 switch(speed) { 827 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break; 828 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break; 829 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break; 830 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break; 831 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break; 832 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break; 833 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break; 834 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break; 835 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break; 836 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break; 837 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break; 838 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break; 839 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break; 840 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break; 841 default: break; 842 } 843 if (!drive->init_speed) 844 drive->init_speed = speed; 845 drive->current_speed = speed; 846 return error; 847} 848 849/* 850 * This should get invoked any time we exit the driver to 851 * wait for an interrupt response from a drive. handler() points 852 * at the appropriate code to handle the next interrupt, and a 853 * timer is started to prevent us from waiting forever in case 854 * something goes wrong (see the ide_timer_expiry() handler later on). 855 * 856 * See also ide_execute_command 857 */ 858static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 859 unsigned int timeout, ide_expiry_t *expiry) 860{ 861 ide_hwgroup_t *hwgroup = HWGROUP(drive); 862 863 if (hwgroup->handler != NULL) { 864 printk(KERN_CRIT "%s: ide_set_handler: handler not null; " 865 "old=%p, new=%p\n", 866 drive->name, hwgroup->handler, handler); 867 } 868 hwgroup->handler = handler; 869 hwgroup->expiry = expiry; 870 hwgroup->timer.expires = jiffies + timeout; 871 hwgroup->req_gen_timer = hwgroup->req_gen; 872 add_timer(&hwgroup->timer); 873} 874 875void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 876 unsigned int timeout, ide_expiry_t *expiry) 877{ 878 unsigned long flags; 879 spin_lock_irqsave(&ide_lock, flags); 880 __ide_set_handler(drive, handler, timeout, expiry); 881 spin_unlock_irqrestore(&ide_lock, flags); 882} 883 884EXPORT_SYMBOL(ide_set_handler); 885 886/** 887 * ide_execute_command - execute an IDE command 888 * @drive: IDE drive to issue the command against 889 * @command: command byte to write 890 * @handler: handler for next phase 891 * @timeout: timeout for command 892 * @expiry: handler to run on timeout 893 * 894 * Helper function to issue an IDE command. This handles the 895 * atomicity requirements, command timing and ensures that the 896 * handler and IRQ setup do not race. All IDE command kick off 897 * should go via this function or do equivalent locking. 898 */ 899 900void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry) 901{ 902 unsigned long flags; 903 ide_hwgroup_t *hwgroup = HWGROUP(drive); 904 ide_hwif_t *hwif = HWIF(drive); 905 906 spin_lock_irqsave(&ide_lock, flags); 907 908 BUG_ON(hwgroup->handler); 909 hwgroup->handler = handler; 910 hwgroup->expiry = expiry; 911 hwgroup->timer.expires = jiffies + timeout; 912 hwgroup->req_gen_timer = hwgroup->req_gen; 913 add_timer(&hwgroup->timer); 914 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG); 915 /* Drive takes 400nS to respond, we must avoid the IRQ being 916 serviced before that. 917 918 FIXME: we could skip this delay with care on non shared 919 devices 920 */ 921 ndelay(400); 922 spin_unlock_irqrestore(&ide_lock, flags); 923} 924 925EXPORT_SYMBOL(ide_execute_command); 926 927 928/* needed below */ 929static ide_startstop_t do_reset1 (ide_drive_t *, int); 930 931/* 932 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 933 * during an atapi drive reset operation. If the drive has not yet responded, 934 * and we have not yet hit our maximum waiting time, then the timer is restarted 935 * for another 50ms. 936 */ 937static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 938{ 939 ide_hwgroup_t *hwgroup = HWGROUP(drive); 940 ide_hwif_t *hwif = HWIF(drive); 941 u8 stat; 942 943 SELECT_DRIVE(drive); 944 udelay (10); 945 946 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 947 printk("%s: ATAPI reset complete\n", drive->name); 948 } else { 949 if (time_before(jiffies, hwgroup->poll_timeout)) { 950 BUG_ON(HWGROUP(drive)->handler != NULL); 951 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 952 /* continue polling */ 953 return ide_started; 954 } 955 /* end of polling */ 956 hwgroup->polling = 0; 957 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 958 drive->name, stat); 959 /* do it the old fashioned way */ 960 return do_reset1(drive, 1); 961 } 962 /* done polling */ 963 hwgroup->polling = 0; 964 hwgroup->resetting = 0; 965 return ide_stopped; 966} 967 968/* 969 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 970 * during an ide reset operation. If the drives have not yet responded, 971 * and we have not yet hit our maximum waiting time, then the timer is restarted 972 * for another 50ms. 973 */ 974static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 975{ 976 ide_hwgroup_t *hwgroup = HWGROUP(drive); 977 ide_hwif_t *hwif = HWIF(drive); 978 u8 tmp; 979 980 if (hwif->reset_poll != NULL) { 981 if (hwif->reset_poll(drive)) { 982 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 983 hwif->name, drive->name); 984 return ide_stopped; 985 } 986 } 987 988 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 989 if (time_before(jiffies, hwgroup->poll_timeout)) { 990 BUG_ON(HWGROUP(drive)->handler != NULL); 991 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 992 /* continue polling */ 993 return ide_started; 994 } 995 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 996 drive->failures++; 997 } else { 998 printk("%s: reset: ", hwif->name); 999 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) { 1000 printk("success\n"); 1001 drive->failures = 0; 1002 } else { 1003 drive->failures++; 1004 printk("master: "); 1005 switch (tmp & 0x7f) { 1006 case 1: printk("passed"); 1007 break; 1008 case 2: printk("formatter device error"); 1009 break; 1010 case 3: printk("sector buffer error"); 1011 break; 1012 case 4: printk("ECC circuitry error"); 1013 break; 1014 case 5: printk("controlling MPU error"); 1015 break; 1016 default:printk("error (0x%02x?)", tmp); 1017 } 1018 if (tmp & 0x80) 1019 printk("; slave: failed"); 1020 printk("\n"); 1021 } 1022 } 1023 hwgroup->polling = 0; /* done polling */ 1024 hwgroup->resetting = 0; /* done reset attempt */ 1025 return ide_stopped; 1026} 1027 1028static void check_dma_crc(ide_drive_t *drive) 1029{ 1030#ifdef CONFIG_BLK_DEV_IDEDMA 1031 if (drive->crc_count) { 1032 drive->hwif->dma_off_quietly(drive); 1033 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive)); 1034 if (drive->current_speed >= XFER_SW_DMA_0) 1035 (void) HWIF(drive)->ide_dma_on(drive); 1036 } else 1037 ide_dma_off(drive); 1038#endif 1039} 1040 1041static void ide_disk_pre_reset(ide_drive_t *drive) 1042{ 1043 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1; 1044 1045 drive->special.all = 0; 1046 drive->special.b.set_geometry = legacy; 1047 drive->special.b.recalibrate = legacy; 1048 if (OK_TO_RESET_CONTROLLER) 1049 drive->mult_count = 0; 1050 if (!drive->keep_settings && !drive->using_dma) 1051 drive->mult_req = 0; 1052 if (drive->mult_req != drive->mult_count) 1053 drive->special.b.set_multmode = 1; 1054} 1055 1056static void pre_reset(ide_drive_t *drive) 1057{ 1058 if (drive->media == ide_disk) 1059 ide_disk_pre_reset(drive); 1060 else 1061 drive->post_reset = 1; 1062 1063 if (!drive->keep_settings) { 1064 if (drive->using_dma) { 1065 check_dma_crc(drive); 1066 } else { 1067 drive->unmask = 0; 1068 drive->io_32bit = 0; 1069 } 1070 return; 1071 } 1072 if (drive->using_dma) 1073 check_dma_crc(drive); 1074 1075 if (HWIF(drive)->pre_reset != NULL) 1076 HWIF(drive)->pre_reset(drive); 1077 1078 if (drive->current_speed != 0xff) 1079 drive->desired_speed = drive->current_speed; 1080 drive->current_speed = 0xff; 1081} 1082 1083/* 1084 * do_reset1() attempts to recover a confused drive by resetting it. 1085 * Unfortunately, resetting a disk drive actually resets all devices on 1086 * the same interface, so it can really be thought of as resetting the 1087 * interface rather than resetting the drive. 1088 * 1089 * ATAPI devices have their own reset mechanism which allows them to be 1090 * individually reset without clobbering other devices on the same interface. 1091 * 1092 * Unfortunately, the IDE interface does not generate an interrupt to let 1093 * us know when the reset operation has finished, so we must poll for this. 1094 * Equally poor, though, is the fact that this may a very long time to complete, 1095 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1096 * we set a timer to poll at 50ms intervals. 1097 */ 1098static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1099{ 1100 unsigned int unit; 1101 unsigned long flags; 1102 ide_hwif_t *hwif; 1103 ide_hwgroup_t *hwgroup; 1104 1105 spin_lock_irqsave(&ide_lock, flags); 1106 hwif = HWIF(drive); 1107 hwgroup = HWGROUP(drive); 1108 1109 /* We must not reset with running handlers */ 1110 BUG_ON(hwgroup->handler != NULL); 1111 1112 /* For an ATAPI device, first try an ATAPI SRST. */ 1113 if (drive->media != ide_disk && !do_not_try_atapi) { 1114 hwgroup->resetting = 1; 1115 pre_reset(drive); 1116 SELECT_DRIVE(drive); 1117 udelay (20); 1118 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG); 1119 ndelay(400); 1120 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1121 hwgroup->polling = 1; 1122 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1123 spin_unlock_irqrestore(&ide_lock, flags); 1124 return ide_started; 1125 } 1126 1127 /* 1128 * First, reset any device state data we were maintaining 1129 * for any of the drives on this interface. 1130 */ 1131 for (unit = 0; unit < MAX_DRIVES; ++unit) 1132 pre_reset(&hwif->drives[unit]); 1133 1134#if OK_TO_RESET_CONTROLLER 1135 if (!IDE_CONTROL_REG) { 1136 spin_unlock_irqrestore(&ide_lock, flags); 1137 return ide_stopped; 1138 } 1139 1140 hwgroup->resetting = 1; 1141 /* 1142 * Note that we also set nIEN while resetting the device, 1143 * to mask unwanted interrupts from the interface during the reset. 1144 * However, due to the design of PC hardware, this will cause an 1145 * immediate interrupt due to the edge transition it produces. 1146 * This single interrupt gives us a "fast poll" for drives that 1147 * recover from reset very quickly, saving us the first 50ms wait time. 1148 */ 1149 /* set SRST and nIEN */ 1150 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG); 1151 /* more than enough time */ 1152 udelay(10); 1153 if (drive->quirk_list == 2) { 1154 /* clear SRST and nIEN */ 1155 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG); 1156 } else { 1157 /* clear SRST, leave nIEN */ 1158 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG); 1159 } 1160 /* more than enough time */ 1161 udelay(10); 1162 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1163 hwgroup->polling = 1; 1164 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1165 1166 /* 1167 * Some weird controller like resetting themselves to a strange 1168 * state when the disks are reset this way. At least, the Winbond 1169 * 553 documentation says that 1170 */ 1171 if (hwif->resetproc != NULL) { 1172 hwif->resetproc(drive); 1173 } 1174 1175#endif /* OK_TO_RESET_CONTROLLER */ 1176 1177 spin_unlock_irqrestore(&ide_lock, flags); 1178 return ide_started; 1179} 1180 1181/* 1182 * ide_do_reset() is the entry point to the drive/interface reset code. 1183 */ 1184 1185ide_startstop_t ide_do_reset (ide_drive_t *drive) 1186{ 1187 return do_reset1(drive, 0); 1188} 1189 1190EXPORT_SYMBOL(ide_do_reset); 1191 1192/* 1193 * ide_wait_not_busy() waits for the currently selected device on the hwif 1194 * to report a non-busy status, see comments in probe_hwif(). 1195 */ 1196int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1197{ 1198 u8 stat = 0; 1199 1200 while(timeout--) { 1201 /* 1202 * Turn this into a schedule() sleep once I'm sure 1203 * about locking issues (2.5 work ?). 1204 */ 1205 mdelay(1); 1206 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); 1207 if ((stat & BUSY_STAT) == 0) 1208 return 0; 1209 /* 1210 * Assume a value of 0xff means nothing is connected to 1211 * the interface and it doesn't implement the pull-down 1212 * resistor on D7. 1213 */ 1214 if (stat == 0xff) 1215 return -ENODEV; 1216 touch_softlockup_watchdog(); 1217 touch_nmi_watchdog(); 1218 } 1219 return -EBUSY; 1220} 1221 1222EXPORT_SYMBOL_GPL(ide_wait_not_busy); 1223 1224