ide-iops.c revision 1e86240f3fd33f8052141778ad3dffe2c96184d7
1/* 2 * linux/drivers/ide/ide-iops.c Version 0.37 Mar 05, 2003 3 * 4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 5 * Copyright (C) 2003 Red Hat <alan@redhat.com> 6 * 7 */ 8 9#include <linux/module.h> 10#include <linux/types.h> 11#include <linux/string.h> 12#include <linux/kernel.h> 13#include <linux/timer.h> 14#include <linux/mm.h> 15#include <linux/interrupt.h> 16#include <linux/major.h> 17#include <linux/errno.h> 18#include <linux/genhd.h> 19#include <linux/blkpg.h> 20#include <linux/slab.h> 21#include <linux/pci.h> 22#include <linux/delay.h> 23#include <linux/hdreg.h> 24#include <linux/ide.h> 25#include <linux/bitops.h> 26#include <linux/nmi.h> 27 28#include <asm/byteorder.h> 29#include <asm/irq.h> 30#include <asm/uaccess.h> 31#include <asm/io.h> 32 33/* 34 * Conventional PIO operations for ATA devices 35 */ 36 37static u8 ide_inb (unsigned long port) 38{ 39 return (u8) inb(port); 40} 41 42static u16 ide_inw (unsigned long port) 43{ 44 return (u16) inw(port); 45} 46 47static void ide_insw (unsigned long port, void *addr, u32 count) 48{ 49 insw(port, addr, count); 50} 51 52static u32 ide_inl (unsigned long port) 53{ 54 return (u32) inl(port); 55} 56 57static void ide_insl (unsigned long port, void *addr, u32 count) 58{ 59 insl(port, addr, count); 60} 61 62static void ide_outb (u8 val, unsigned long port) 63{ 64 outb(val, port); 65} 66 67static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port) 68{ 69 outb(addr, port); 70} 71 72static void ide_outw (u16 val, unsigned long port) 73{ 74 outw(val, port); 75} 76 77static void ide_outsw (unsigned long port, void *addr, u32 count) 78{ 79 outsw(port, addr, count); 80} 81 82static void ide_outl (u32 val, unsigned long port) 83{ 84 outl(val, port); 85} 86 87static void ide_outsl (unsigned long port, void *addr, u32 count) 88{ 89 outsl(port, addr, count); 90} 91 92void default_hwif_iops (ide_hwif_t *hwif) 93{ 94 hwif->OUTB = ide_outb; 95 hwif->OUTBSYNC = ide_outbsync; 96 hwif->OUTW = ide_outw; 97 hwif->OUTL = ide_outl; 98 hwif->OUTSW = ide_outsw; 99 hwif->OUTSL = ide_outsl; 100 hwif->INB = ide_inb; 101 hwif->INW = ide_inw; 102 hwif->INL = ide_inl; 103 hwif->INSW = ide_insw; 104 hwif->INSL = ide_insl; 105} 106 107/* 108 * MMIO operations, typically used for SATA controllers 109 */ 110 111static u8 ide_mm_inb (unsigned long port) 112{ 113 return (u8) readb((void __iomem *) port); 114} 115 116static u16 ide_mm_inw (unsigned long port) 117{ 118 return (u16) readw((void __iomem *) port); 119} 120 121static void ide_mm_insw (unsigned long port, void *addr, u32 count) 122{ 123 __ide_mm_insw((void __iomem *) port, addr, count); 124} 125 126static u32 ide_mm_inl (unsigned long port) 127{ 128 return (u32) readl((void __iomem *) port); 129} 130 131static void ide_mm_insl (unsigned long port, void *addr, u32 count) 132{ 133 __ide_mm_insl((void __iomem *) port, addr, count); 134} 135 136static void ide_mm_outb (u8 value, unsigned long port) 137{ 138 writeb(value, (void __iomem *) port); 139} 140 141static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port) 142{ 143 writeb(value, (void __iomem *) port); 144} 145 146static void ide_mm_outw (u16 value, unsigned long port) 147{ 148 writew(value, (void __iomem *) port); 149} 150 151static void ide_mm_outsw (unsigned long port, void *addr, u32 count) 152{ 153 __ide_mm_outsw((void __iomem *) port, addr, count); 154} 155 156static void ide_mm_outl (u32 value, unsigned long port) 157{ 158 writel(value, (void __iomem *) port); 159} 160 161static void ide_mm_outsl (unsigned long port, void *addr, u32 count) 162{ 163 __ide_mm_outsl((void __iomem *) port, addr, count); 164} 165 166void default_hwif_mmiops (ide_hwif_t *hwif) 167{ 168 hwif->OUTB = ide_mm_outb; 169 /* Most systems will need to override OUTBSYNC, alas however 170 this one is controller specific! */ 171 hwif->OUTBSYNC = ide_mm_outbsync; 172 hwif->OUTW = ide_mm_outw; 173 hwif->OUTL = ide_mm_outl; 174 hwif->OUTSW = ide_mm_outsw; 175 hwif->OUTSL = ide_mm_outsl; 176 hwif->INB = ide_mm_inb; 177 hwif->INW = ide_mm_inw; 178 hwif->INL = ide_mm_inl; 179 hwif->INSW = ide_mm_insw; 180 hwif->INSL = ide_mm_insl; 181} 182 183EXPORT_SYMBOL(default_hwif_mmiops); 184 185u32 ide_read_24 (ide_drive_t *drive) 186{ 187 u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG); 188 u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG); 189 u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG); 190 return (hcyl<<16)|(lcyl<<8)|sect; 191} 192 193void SELECT_DRIVE (ide_drive_t *drive) 194{ 195 if (HWIF(drive)->selectproc) 196 HWIF(drive)->selectproc(drive); 197 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG); 198} 199 200EXPORT_SYMBOL(SELECT_DRIVE); 201 202void SELECT_INTERRUPT (ide_drive_t *drive) 203{ 204 if (HWIF(drive)->intrproc) 205 HWIF(drive)->intrproc(drive); 206 else 207 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG); 208} 209 210void SELECT_MASK (ide_drive_t *drive, int mask) 211{ 212 if (HWIF(drive)->maskproc) 213 HWIF(drive)->maskproc(drive, mask); 214} 215 216void QUIRK_LIST (ide_drive_t *drive) 217{ 218 if (HWIF(drive)->quirkproc) 219 drive->quirk_list = HWIF(drive)->quirkproc(drive); 220} 221 222/* 223 * Some localbus EIDE interfaces require a special access sequence 224 * when using 32-bit I/O instructions to transfer data. We call this 225 * the "vlb_sync" sequence, which consists of three successive reads 226 * of the sector count register location, with interrupts disabled 227 * to ensure that the reads all happen together. 228 */ 229static void ata_vlb_sync(ide_drive_t *drive, unsigned long port) 230{ 231 (void) HWIF(drive)->INB(port); 232 (void) HWIF(drive)->INB(port); 233 (void) HWIF(drive)->INB(port); 234} 235 236/* 237 * This is used for most PIO data transfers *from* the IDE interface 238 */ 239static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount) 240{ 241 ide_hwif_t *hwif = HWIF(drive); 242 u8 io_32bit = drive->io_32bit; 243 244 if (io_32bit) { 245 if (io_32bit & 2) { 246 unsigned long flags; 247 local_irq_save(flags); 248 ata_vlb_sync(drive, IDE_NSECTOR_REG); 249 hwif->INSL(IDE_DATA_REG, buffer, wcount); 250 local_irq_restore(flags); 251 } else 252 hwif->INSL(IDE_DATA_REG, buffer, wcount); 253 } else { 254 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1); 255 } 256} 257 258/* 259 * This is used for most PIO data transfers *to* the IDE interface 260 */ 261static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount) 262{ 263 ide_hwif_t *hwif = HWIF(drive); 264 u8 io_32bit = drive->io_32bit; 265 266 if (io_32bit) { 267 if (io_32bit & 2) { 268 unsigned long flags; 269 local_irq_save(flags); 270 ata_vlb_sync(drive, IDE_NSECTOR_REG); 271 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 272 local_irq_restore(flags); 273 } else 274 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 275 } else { 276 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1); 277 } 278} 279 280/* 281 * The following routines are mainly used by the ATAPI drivers. 282 * 283 * These routines will round up any request for an odd number of bytes, 284 * so if an odd bytecount is specified, be sure that there's at least one 285 * extra byte allocated for the buffer. 286 */ 287 288static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 289{ 290 ide_hwif_t *hwif = HWIF(drive); 291 292 ++bytecount; 293#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 294 if (MACH_IS_ATARI || MACH_IS_Q40) { 295 /* Atari has a byte-swapped IDE interface */ 296 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 297 return; 298 } 299#endif /* CONFIG_ATARI || CONFIG_Q40 */ 300 hwif->ata_input_data(drive, buffer, bytecount / 4); 301 if ((bytecount & 0x03) >= 2) 302 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1); 303} 304 305static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 306{ 307 ide_hwif_t *hwif = HWIF(drive); 308 309 ++bytecount; 310#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 311 if (MACH_IS_ATARI || MACH_IS_Q40) { 312 /* Atari has a byte-swapped IDE interface */ 313 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 314 return; 315 } 316#endif /* CONFIG_ATARI || CONFIG_Q40 */ 317 hwif->ata_output_data(drive, buffer, bytecount / 4); 318 if ((bytecount & 0x03) >= 2) 319 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1); 320} 321 322void default_hwif_transport(ide_hwif_t *hwif) 323{ 324 hwif->ata_input_data = ata_input_data; 325 hwif->ata_output_data = ata_output_data; 326 hwif->atapi_input_bytes = atapi_input_bytes; 327 hwif->atapi_output_bytes = atapi_output_bytes; 328} 329 330/* 331 * Beginning of Taskfile OPCODE Library and feature sets. 332 */ 333void ide_fix_driveid (struct hd_driveid *id) 334{ 335#ifndef __LITTLE_ENDIAN 336# ifdef __BIG_ENDIAN 337 int i; 338 u16 *stringcast; 339 340 id->config = __le16_to_cpu(id->config); 341 id->cyls = __le16_to_cpu(id->cyls); 342 id->reserved2 = __le16_to_cpu(id->reserved2); 343 id->heads = __le16_to_cpu(id->heads); 344 id->track_bytes = __le16_to_cpu(id->track_bytes); 345 id->sector_bytes = __le16_to_cpu(id->sector_bytes); 346 id->sectors = __le16_to_cpu(id->sectors); 347 id->vendor0 = __le16_to_cpu(id->vendor0); 348 id->vendor1 = __le16_to_cpu(id->vendor1); 349 id->vendor2 = __le16_to_cpu(id->vendor2); 350 stringcast = (u16 *)&id->serial_no[0]; 351 for (i = 0; i < (20/2); i++) 352 stringcast[i] = __le16_to_cpu(stringcast[i]); 353 id->buf_type = __le16_to_cpu(id->buf_type); 354 id->buf_size = __le16_to_cpu(id->buf_size); 355 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); 356 stringcast = (u16 *)&id->fw_rev[0]; 357 for (i = 0; i < (8/2); i++) 358 stringcast[i] = __le16_to_cpu(stringcast[i]); 359 stringcast = (u16 *)&id->model[0]; 360 for (i = 0; i < (40/2); i++) 361 stringcast[i] = __le16_to_cpu(stringcast[i]); 362 id->dword_io = __le16_to_cpu(id->dword_io); 363 id->reserved50 = __le16_to_cpu(id->reserved50); 364 id->field_valid = __le16_to_cpu(id->field_valid); 365 id->cur_cyls = __le16_to_cpu(id->cur_cyls); 366 id->cur_heads = __le16_to_cpu(id->cur_heads); 367 id->cur_sectors = __le16_to_cpu(id->cur_sectors); 368 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); 369 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); 370 id->lba_capacity = __le32_to_cpu(id->lba_capacity); 371 id->dma_1word = __le16_to_cpu(id->dma_1word); 372 id->dma_mword = __le16_to_cpu(id->dma_mword); 373 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); 374 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); 375 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); 376 id->eide_pio = __le16_to_cpu(id->eide_pio); 377 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); 378 for (i = 0; i < 2; ++i) 379 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); 380 for (i = 0; i < 4; ++i) 381 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); 382 id->queue_depth = __le16_to_cpu(id->queue_depth); 383 for (i = 0; i < 4; ++i) 384 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); 385 id->major_rev_num = __le16_to_cpu(id->major_rev_num); 386 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); 387 id->command_set_1 = __le16_to_cpu(id->command_set_1); 388 id->command_set_2 = __le16_to_cpu(id->command_set_2); 389 id->cfsse = __le16_to_cpu(id->cfsse); 390 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); 391 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); 392 id->csf_default = __le16_to_cpu(id->csf_default); 393 id->dma_ultra = __le16_to_cpu(id->dma_ultra); 394 id->trseuc = __le16_to_cpu(id->trseuc); 395 id->trsEuc = __le16_to_cpu(id->trsEuc); 396 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); 397 id->mprc = __le16_to_cpu(id->mprc); 398 id->hw_config = __le16_to_cpu(id->hw_config); 399 id->acoustic = __le16_to_cpu(id->acoustic); 400 id->msrqs = __le16_to_cpu(id->msrqs); 401 id->sxfert = __le16_to_cpu(id->sxfert); 402 id->sal = __le16_to_cpu(id->sal); 403 id->spg = __le32_to_cpu(id->spg); 404 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); 405 for (i = 0; i < 22; i++) 406 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); 407 id->last_lun = __le16_to_cpu(id->last_lun); 408 id->word127 = __le16_to_cpu(id->word127); 409 id->dlf = __le16_to_cpu(id->dlf); 410 id->csfo = __le16_to_cpu(id->csfo); 411 for (i = 0; i < 26; i++) 412 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); 413 id->word156 = __le16_to_cpu(id->word156); 414 for (i = 0; i < 3; i++) 415 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); 416 id->cfa_power = __le16_to_cpu(id->cfa_power); 417 for (i = 0; i < 14; i++) 418 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); 419 for (i = 0; i < 31; i++) 420 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); 421 for (i = 0; i < 48; i++) 422 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); 423 id->integrity_word = __le16_to_cpu(id->integrity_word); 424# else 425# error "Please fix <asm/byteorder.h>" 426# endif 427#endif 428} 429 430/* FIXME: exported for use by the USB storage (isd200.c) code only */ 431EXPORT_SYMBOL(ide_fix_driveid); 432 433void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 434{ 435 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ 436 437 if (byteswap) { 438 /* convert from big-endian to host byte order */ 439 for (p = end ; p != s;) { 440 unsigned short *pp = (unsigned short *) (p -= 2); 441 *pp = ntohs(*pp); 442 } 443 } 444 /* strip leading blanks */ 445 while (s != end && *s == ' ') 446 ++s; 447 /* compress internal blanks and strip trailing blanks */ 448 while (s != end && *s) { 449 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 450 *p++ = *(s-1); 451 } 452 /* wipe out trailing garbage */ 453 while (p != end) 454 *p++ = '\0'; 455} 456 457EXPORT_SYMBOL(ide_fixstring); 458 459/* 460 * Needed for PCI irq sharing 461 */ 462int drive_is_ready (ide_drive_t *drive) 463{ 464 ide_hwif_t *hwif = HWIF(drive); 465 u8 stat = 0; 466 467 if (drive->waiting_for_dma) 468 return hwif->ide_dma_test_irq(drive); 469 470#if 0 471 /* need to guarantee 400ns since last command was issued */ 472 udelay(1); 473#endif 474 475#ifdef CONFIG_IDEPCI_SHARE_IRQ 476 /* 477 * We do a passive status test under shared PCI interrupts on 478 * cards that truly share the ATA side interrupt, but may also share 479 * an interrupt with another pci card/device. We make no assumptions 480 * about possible isa-pnp and pci-pnp issues yet. 481 */ 482 if (IDE_CONTROL_REG) 483 stat = hwif->INB(IDE_ALTSTATUS_REG); 484 else 485#endif /* CONFIG_IDEPCI_SHARE_IRQ */ 486 /* Note: this may clear a pending IRQ!! */ 487 stat = hwif->INB(IDE_STATUS_REG); 488 489 if (stat & BUSY_STAT) 490 /* drive busy: definitely not interrupting */ 491 return 0; 492 493 /* drive ready: *might* be interrupting */ 494 return 1; 495} 496 497EXPORT_SYMBOL(drive_is_ready); 498 499/* 500 * Global for All, and taken from ide-pmac.c. Can be called 501 * with spinlock held & IRQs disabled, so don't schedule ! 502 */ 503int wait_for_ready (ide_drive_t *drive, int timeout) 504{ 505 ide_hwif_t *hwif = HWIF(drive); 506 u8 stat = 0; 507 508 while(--timeout) { 509 stat = hwif->INB(IDE_STATUS_REG); 510 if (!(stat & BUSY_STAT)) { 511 if (drive->ready_stat == 0) 512 break; 513 else if ((stat & drive->ready_stat)||(stat & ERR_STAT)) 514 break; 515 } 516 mdelay(1); 517 } 518 if ((stat & ERR_STAT) || timeout <= 0) { 519 if (stat & ERR_STAT) { 520 printk(KERN_ERR "%s: wait_for_ready, " 521 "error status: %x\n", drive->name, stat); 522 } 523 return 1; 524 } 525 return 0; 526} 527 528/* 529 * This routine busy-waits for the drive status to be not "busy". 530 * It then checks the status for all of the "good" bits and none 531 * of the "bad" bits, and if all is okay it returns 0. All other 532 * cases return 1 after invoking ide_error() -- caller should just return. 533 * 534 * This routine should get fixed to not hog the cpu during extra long waits.. 535 * That could be done by busy-waiting for the first jiffy or two, and then 536 * setting a timer to wake up at half second intervals thereafter, 537 * until timeout is achieved, before timing out. 538 */ 539int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 540{ 541 ide_hwif_t *hwif = HWIF(drive); 542 u8 stat; 543 int i; 544 unsigned long flags; 545 546 /* bail early if we've exceeded max_failures */ 547 if (drive->max_failures && (drive->failures > drive->max_failures)) { 548 *startstop = ide_stopped; 549 return 1; 550 } 551 552 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 553 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 554 local_irq_set(flags); 555 timeout += jiffies; 556 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 557 if (time_after(jiffies, timeout)) { 558 /* 559 * One last read after the timeout in case 560 * heavy interrupt load made us not make any 561 * progress during the timeout.. 562 */ 563 stat = hwif->INB(IDE_STATUS_REG); 564 if (!(stat & BUSY_STAT)) 565 break; 566 567 local_irq_restore(flags); 568 *startstop = ide_error(drive, "status timeout", stat); 569 return 1; 570 } 571 } 572 local_irq_restore(flags); 573 } 574 /* 575 * Allow status to settle, then read it again. 576 * A few rare drives vastly violate the 400ns spec here, 577 * so we'll wait up to 10usec for a "good" status 578 * rather than expensively fail things immediately. 579 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 580 */ 581 for (i = 0; i < 10; i++) { 582 udelay(1); 583 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) 584 return 0; 585 } 586 *startstop = ide_error(drive, "status error", stat); 587 return 1; 588} 589 590EXPORT_SYMBOL(ide_wait_stat); 591 592/* 593 * All hosts that use the 80c ribbon must use! 594 * The name is derived from upper byte of word 93 and the 80c ribbon. 595 */ 596u8 eighty_ninty_three (ide_drive_t *drive) 597{ 598 if(HWIF(drive)->udma_four == 0) 599 return 0; 600 601 /* Check for SATA but only if we are ATA5 or higher */ 602 if (drive->id->hw_config == 0 && (drive->id->major_rev_num & 0x7FE0)) 603 return 1; 604 if (!(drive->id->hw_config & 0x6000)) 605 return 0; 606#ifndef CONFIG_IDEDMA_IVB 607 if(!(drive->id->hw_config & 0x4000)) 608 return 0; 609#endif /* CONFIG_IDEDMA_IVB */ 610 return 1; 611} 612 613EXPORT_SYMBOL(eighty_ninty_three); 614 615int ide_ata66_check (ide_drive_t *drive, ide_task_t *args) 616{ 617 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) && 618 (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) && 619 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) { 620#ifndef CONFIG_IDEDMA_IVB 621 if ((drive->id->hw_config & 0x6000) == 0) { 622#else /* !CONFIG_IDEDMA_IVB */ 623 if (((drive->id->hw_config & 0x2000) == 0) || 624 ((drive->id->hw_config & 0x4000) == 0)) { 625#endif /* CONFIG_IDEDMA_IVB */ 626 printk("%s: Speed warnings UDMA 3/4/5 is not " 627 "functional.\n", drive->name); 628 return 1; 629 } 630 if (!HWIF(drive)->udma_four) { 631 printk("%s: Speed warnings UDMA 3/4/5 is not " 632 "functional.\n", 633 HWIF(drive)->name); 634 return 1; 635 } 636 } 637 return 0; 638} 639 640/* 641 * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER. 642 * 1 : Safe to update drive->id DMA registers. 643 * 0 : OOPs not allowed. 644 */ 645int set_transfer (ide_drive_t *drive, ide_task_t *args) 646{ 647 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) && 648 (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) && 649 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) && 650 (drive->id->dma_ultra || 651 drive->id->dma_mword || 652 drive->id->dma_1word)) 653 return 1; 654 655 return 0; 656} 657 658#ifdef CONFIG_BLK_DEV_IDEDMA 659static u8 ide_auto_reduce_xfer (ide_drive_t *drive) 660{ 661 if (!drive->crc_count) 662 return drive->current_speed; 663 drive->crc_count = 0; 664 665 switch(drive->current_speed) { 666 case XFER_UDMA_7: return XFER_UDMA_6; 667 case XFER_UDMA_6: return XFER_UDMA_5; 668 case XFER_UDMA_5: return XFER_UDMA_4; 669 case XFER_UDMA_4: return XFER_UDMA_3; 670 case XFER_UDMA_3: return XFER_UDMA_2; 671 case XFER_UDMA_2: return XFER_UDMA_1; 672 case XFER_UDMA_1: return XFER_UDMA_0; 673 /* 674 * OOPS we do not goto non Ultra DMA modes 675 * without iCRC's available we force 676 * the system to PIO and make the user 677 * invoke the ATA-1 ATA-2 DMA modes. 678 */ 679 case XFER_UDMA_0: 680 default: return XFER_PIO_4; 681 } 682} 683#endif /* CONFIG_BLK_DEV_IDEDMA */ 684 685/* 686 * Update the 687 */ 688int ide_driveid_update (ide_drive_t *drive) 689{ 690 ide_hwif_t *hwif = HWIF(drive); 691 struct hd_driveid *id; 692#if 0 693 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 694 if (!id) 695 return 0; 696 697 taskfile_lib_get_identify(drive, (char *)&id); 698 699 ide_fix_driveid(id); 700 if (id) { 701 drive->id->dma_ultra = id->dma_ultra; 702 drive->id->dma_mword = id->dma_mword; 703 drive->id->dma_1word = id->dma_1word; 704 /* anything more ? */ 705 kfree(id); 706 } 707 return 1; 708#else 709 /* 710 * Re-read drive->id for possible DMA mode 711 * change (copied from ide-probe.c) 712 */ 713 unsigned long timeout, flags; 714 715 SELECT_MASK(drive, 1); 716 if (IDE_CONTROL_REG) 717 hwif->OUTB(drive->ctl,IDE_CONTROL_REG); 718 msleep(50); 719 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG); 720 timeout = jiffies + WAIT_WORSTCASE; 721 do { 722 if (time_after(jiffies, timeout)) { 723 SELECT_MASK(drive, 0); 724 return 0; /* drive timed-out */ 725 } 726 msleep(50); /* give drive a breather */ 727 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT); 728 msleep(50); /* wait for IRQ and DRQ_STAT */ 729 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) { 730 SELECT_MASK(drive, 0); 731 printk("%s: CHECK for good STATUS\n", drive->name); 732 return 0; 733 } 734 local_irq_save(flags); 735 SELECT_MASK(drive, 0); 736 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 737 if (!id) { 738 local_irq_restore(flags); 739 return 0; 740 } 741 ata_input_data(drive, id, SECTOR_WORDS); 742 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */ 743 local_irq_enable(); 744 local_irq_restore(flags); 745 ide_fix_driveid(id); 746 if (id) { 747 drive->id->dma_ultra = id->dma_ultra; 748 drive->id->dma_mword = id->dma_mword; 749 drive->id->dma_1word = id->dma_1word; 750 /* anything more ? */ 751 kfree(id); 752 } 753 754 return 1; 755#endif 756} 757 758/* 759 * Similar to ide_wait_stat(), except it never calls ide_error internally. 760 * This is a kludge to handle the new ide_config_drive_speed() function, 761 * and should not otherwise be used anywhere. Eventually, the tuneproc's 762 * should be updated to return ide_startstop_t, in which case we can get 763 * rid of this abomination again. :) -ml 764 * 765 * It is gone.......... 766 * 767 * const char *msg == consider adding for verbose errors. 768 */ 769int ide_config_drive_speed (ide_drive_t *drive, u8 speed) 770{ 771 ide_hwif_t *hwif = HWIF(drive); 772 int i, error = 1; 773 u8 stat; 774 775// while (HWGROUP(drive)->busy) 776// msleep(50); 777 778#ifdef CONFIG_BLK_DEV_IDEDMA 779 if (hwif->ide_dma_check) /* check if host supports DMA */ 780 hwif->ide_dma_host_off(drive); 781#endif 782 783 /* 784 * Don't use ide_wait_cmd here - it will 785 * attempt to set_geometry and recalibrate, 786 * but for some reason these don't work at 787 * this point (lost interrupt). 788 */ 789 /* 790 * Select the drive, and issue the SETFEATURES command 791 */ 792 disable_irq_nosync(hwif->irq); 793 794 /* 795 * FIXME: we race against the running IRQ here if 796 * this is called from non IRQ context. If we use 797 * disable_irq() we hang on the error path. Work 798 * is needed. 799 */ 800 801 udelay(1); 802 SELECT_DRIVE(drive); 803 SELECT_MASK(drive, 0); 804 udelay(1); 805 if (IDE_CONTROL_REG) 806 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG); 807 hwif->OUTB(speed, IDE_NSECTOR_REG); 808 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG); 809 hwif->OUTB(WIN_SETFEATURES, IDE_COMMAND_REG); 810 if ((IDE_CONTROL_REG) && (drive->quirk_list == 2)) 811 hwif->OUTB(drive->ctl, IDE_CONTROL_REG); 812 udelay(1); 813 /* 814 * Wait for drive to become non-BUSY 815 */ 816 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 817 unsigned long flags, timeout; 818 local_irq_set(flags); 819 timeout = jiffies + WAIT_CMD; 820 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 821 if (time_after(jiffies, timeout)) 822 break; 823 } 824 local_irq_restore(flags); 825 } 826 827 /* 828 * Allow status to settle, then read it again. 829 * A few rare drives vastly violate the 400ns spec here, 830 * so we'll wait up to 10usec for a "good" status 831 * rather than expensively fail things immediately. 832 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 833 */ 834 for (i = 0; i < 10; i++) { 835 udelay(1); 836 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), DRIVE_READY, BUSY_STAT|DRQ_STAT|ERR_STAT)) { 837 error = 0; 838 break; 839 } 840 } 841 842 SELECT_MASK(drive, 0); 843 844 enable_irq(hwif->irq); 845 846 if (error) { 847 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 848 return error; 849 } 850 851 drive->id->dma_ultra &= ~0xFF00; 852 drive->id->dma_mword &= ~0x0F00; 853 drive->id->dma_1word &= ~0x0F00; 854 855#ifdef CONFIG_BLK_DEV_IDEDMA 856 if (speed >= XFER_SW_DMA_0) 857 hwif->ide_dma_host_on(drive); 858 else if (hwif->ide_dma_check) /* check if host supports DMA */ 859 hwif->ide_dma_off_quietly(drive); 860#endif 861 862 switch(speed) { 863 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break; 864 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break; 865 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break; 866 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break; 867 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break; 868 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break; 869 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break; 870 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break; 871 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break; 872 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break; 873 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break; 874 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break; 875 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break; 876 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break; 877 default: break; 878 } 879 if (!drive->init_speed) 880 drive->init_speed = speed; 881 drive->current_speed = speed; 882 return error; 883} 884 885EXPORT_SYMBOL(ide_config_drive_speed); 886 887 888/* 889 * This should get invoked any time we exit the driver to 890 * wait for an interrupt response from a drive. handler() points 891 * at the appropriate code to handle the next interrupt, and a 892 * timer is started to prevent us from waiting forever in case 893 * something goes wrong (see the ide_timer_expiry() handler later on). 894 * 895 * See also ide_execute_command 896 */ 897static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 898 unsigned int timeout, ide_expiry_t *expiry) 899{ 900 ide_hwgroup_t *hwgroup = HWGROUP(drive); 901 902 if (hwgroup->handler != NULL) { 903 printk(KERN_CRIT "%s: ide_set_handler: handler not null; " 904 "old=%p, new=%p\n", 905 drive->name, hwgroup->handler, handler); 906 } 907 hwgroup->handler = handler; 908 hwgroup->expiry = expiry; 909 hwgroup->timer.expires = jiffies + timeout; 910 add_timer(&hwgroup->timer); 911} 912 913void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 914 unsigned int timeout, ide_expiry_t *expiry) 915{ 916 unsigned long flags; 917 spin_lock_irqsave(&ide_lock, flags); 918 __ide_set_handler(drive, handler, timeout, expiry); 919 spin_unlock_irqrestore(&ide_lock, flags); 920} 921 922EXPORT_SYMBOL(ide_set_handler); 923 924/** 925 * ide_execute_command - execute an IDE command 926 * @drive: IDE drive to issue the command against 927 * @command: command byte to write 928 * @handler: handler for next phase 929 * @timeout: timeout for command 930 * @expiry: handler to run on timeout 931 * 932 * Helper function to issue an IDE command. This handles the 933 * atomicity requirements, command timing and ensures that the 934 * handler and IRQ setup do not race. All IDE command kick off 935 * should go via this function or do equivalent locking. 936 */ 937 938void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry) 939{ 940 unsigned long flags; 941 ide_hwgroup_t *hwgroup = HWGROUP(drive); 942 ide_hwif_t *hwif = HWIF(drive); 943 944 spin_lock_irqsave(&ide_lock, flags); 945 946 BUG_ON(hwgroup->handler); 947 hwgroup->handler = handler; 948 hwgroup->expiry = expiry; 949 hwgroup->timer.expires = jiffies + timeout; 950 add_timer(&hwgroup->timer); 951 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG); 952 /* Drive takes 400nS to respond, we must avoid the IRQ being 953 serviced before that. 954 955 FIXME: we could skip this delay with care on non shared 956 devices 957 */ 958 ndelay(400); 959 spin_unlock_irqrestore(&ide_lock, flags); 960} 961 962EXPORT_SYMBOL(ide_execute_command); 963 964 965/* needed below */ 966static ide_startstop_t do_reset1 (ide_drive_t *, int); 967 968/* 969 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 970 * during an atapi drive reset operation. If the drive has not yet responded, 971 * and we have not yet hit our maximum waiting time, then the timer is restarted 972 * for another 50ms. 973 */ 974static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 975{ 976 ide_hwgroup_t *hwgroup = HWGROUP(drive); 977 ide_hwif_t *hwif = HWIF(drive); 978 u8 stat; 979 980 SELECT_DRIVE(drive); 981 udelay (10); 982 983 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 984 printk("%s: ATAPI reset complete\n", drive->name); 985 } else { 986 if (time_before(jiffies, hwgroup->poll_timeout)) { 987 BUG_ON(HWGROUP(drive)->handler != NULL); 988 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 989 /* continue polling */ 990 return ide_started; 991 } 992 /* end of polling */ 993 hwgroup->polling = 0; 994 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 995 drive->name, stat); 996 /* do it the old fashioned way */ 997 return do_reset1(drive, 1); 998 } 999 /* done polling */ 1000 hwgroup->polling = 0; 1001 return ide_stopped; 1002} 1003 1004/* 1005 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 1006 * during an ide reset operation. If the drives have not yet responded, 1007 * and we have not yet hit our maximum waiting time, then the timer is restarted 1008 * for another 50ms. 1009 */ 1010static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 1011{ 1012 ide_hwgroup_t *hwgroup = HWGROUP(drive); 1013 ide_hwif_t *hwif = HWIF(drive); 1014 u8 tmp; 1015 1016 if (hwif->reset_poll != NULL) { 1017 if (hwif->reset_poll(drive)) { 1018 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 1019 hwif->name, drive->name); 1020 return ide_stopped; 1021 } 1022 } 1023 1024 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 1025 if (time_before(jiffies, hwgroup->poll_timeout)) { 1026 BUG_ON(HWGROUP(drive)->handler != NULL); 1027 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1028 /* continue polling */ 1029 return ide_started; 1030 } 1031 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 1032 drive->failures++; 1033 } else { 1034 printk("%s: reset: ", hwif->name); 1035 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) { 1036 printk("success\n"); 1037 drive->failures = 0; 1038 } else { 1039 drive->failures++; 1040 printk("master: "); 1041 switch (tmp & 0x7f) { 1042 case 1: printk("passed"); 1043 break; 1044 case 2: printk("formatter device error"); 1045 break; 1046 case 3: printk("sector buffer error"); 1047 break; 1048 case 4: printk("ECC circuitry error"); 1049 break; 1050 case 5: printk("controlling MPU error"); 1051 break; 1052 default:printk("error (0x%02x?)", tmp); 1053 } 1054 if (tmp & 0x80) 1055 printk("; slave: failed"); 1056 printk("\n"); 1057 } 1058 } 1059 hwgroup->polling = 0; /* done polling */ 1060 return ide_stopped; 1061} 1062 1063static void check_dma_crc(ide_drive_t *drive) 1064{ 1065#ifdef CONFIG_BLK_DEV_IDEDMA 1066 if (drive->crc_count) { 1067 (void) HWIF(drive)->ide_dma_off_quietly(drive); 1068 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive)); 1069 if (drive->current_speed >= XFER_SW_DMA_0) 1070 (void) HWIF(drive)->ide_dma_on(drive); 1071 } else 1072 (void)__ide_dma_off(drive); 1073#endif 1074} 1075 1076static void ide_disk_pre_reset(ide_drive_t *drive) 1077{ 1078 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1; 1079 1080 drive->special.all = 0; 1081 drive->special.b.set_geometry = legacy; 1082 drive->special.b.recalibrate = legacy; 1083 if (OK_TO_RESET_CONTROLLER) 1084 drive->mult_count = 0; 1085 if (!drive->keep_settings && !drive->using_dma) 1086 drive->mult_req = 0; 1087 if (drive->mult_req != drive->mult_count) 1088 drive->special.b.set_multmode = 1; 1089} 1090 1091static void pre_reset(ide_drive_t *drive) 1092{ 1093 if (drive->media == ide_disk) 1094 ide_disk_pre_reset(drive); 1095 else 1096 drive->post_reset = 1; 1097 1098 if (!drive->keep_settings) { 1099 if (drive->using_dma) { 1100 check_dma_crc(drive); 1101 } else { 1102 drive->unmask = 0; 1103 drive->io_32bit = 0; 1104 } 1105 return; 1106 } 1107 if (drive->using_dma) 1108 check_dma_crc(drive); 1109 1110 if (HWIF(drive)->pre_reset != NULL) 1111 HWIF(drive)->pre_reset(drive); 1112 1113} 1114 1115/* 1116 * do_reset1() attempts to recover a confused drive by resetting it. 1117 * Unfortunately, resetting a disk drive actually resets all devices on 1118 * the same interface, so it can really be thought of as resetting the 1119 * interface rather than resetting the drive. 1120 * 1121 * ATAPI devices have their own reset mechanism which allows them to be 1122 * individually reset without clobbering other devices on the same interface. 1123 * 1124 * Unfortunately, the IDE interface does not generate an interrupt to let 1125 * us know when the reset operation has finished, so we must poll for this. 1126 * Equally poor, though, is the fact that this may a very long time to complete, 1127 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1128 * we set a timer to poll at 50ms intervals. 1129 */ 1130static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1131{ 1132 unsigned int unit; 1133 unsigned long flags; 1134 ide_hwif_t *hwif; 1135 ide_hwgroup_t *hwgroup; 1136 1137 spin_lock_irqsave(&ide_lock, flags); 1138 hwif = HWIF(drive); 1139 hwgroup = HWGROUP(drive); 1140 1141 /* We must not reset with running handlers */ 1142 BUG_ON(hwgroup->handler != NULL); 1143 1144 /* For an ATAPI device, first try an ATAPI SRST. */ 1145 if (drive->media != ide_disk && !do_not_try_atapi) { 1146 pre_reset(drive); 1147 SELECT_DRIVE(drive); 1148 udelay (20); 1149 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG); 1150 ndelay(400); 1151 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1152 hwgroup->polling = 1; 1153 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1154 spin_unlock_irqrestore(&ide_lock, flags); 1155 return ide_started; 1156 } 1157 1158 /* 1159 * First, reset any device state data we were maintaining 1160 * for any of the drives on this interface. 1161 */ 1162 for (unit = 0; unit < MAX_DRIVES; ++unit) 1163 pre_reset(&hwif->drives[unit]); 1164 1165#if OK_TO_RESET_CONTROLLER 1166 if (!IDE_CONTROL_REG) { 1167 spin_unlock_irqrestore(&ide_lock, flags); 1168 return ide_stopped; 1169 } 1170 1171 /* 1172 * Note that we also set nIEN while resetting the device, 1173 * to mask unwanted interrupts from the interface during the reset. 1174 * However, due to the design of PC hardware, this will cause an 1175 * immediate interrupt due to the edge transition it produces. 1176 * This single interrupt gives us a "fast poll" for drives that 1177 * recover from reset very quickly, saving us the first 50ms wait time. 1178 */ 1179 /* set SRST and nIEN */ 1180 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG); 1181 /* more than enough time */ 1182 udelay(10); 1183 if (drive->quirk_list == 2) { 1184 /* clear SRST and nIEN */ 1185 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG); 1186 } else { 1187 /* clear SRST, leave nIEN */ 1188 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG); 1189 } 1190 /* more than enough time */ 1191 udelay(10); 1192 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1193 hwgroup->polling = 1; 1194 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1195 1196 /* 1197 * Some weird controller like resetting themselves to a strange 1198 * state when the disks are reset this way. At least, the Winbond 1199 * 553 documentation says that 1200 */ 1201 if (hwif->resetproc != NULL) { 1202 hwif->resetproc(drive); 1203 } 1204 1205#endif /* OK_TO_RESET_CONTROLLER */ 1206 1207 spin_unlock_irqrestore(&ide_lock, flags); 1208 return ide_started; 1209} 1210 1211/* 1212 * ide_do_reset() is the entry point to the drive/interface reset code. 1213 */ 1214 1215ide_startstop_t ide_do_reset (ide_drive_t *drive) 1216{ 1217 return do_reset1(drive, 0); 1218} 1219 1220EXPORT_SYMBOL(ide_do_reset); 1221 1222/* 1223 * ide_wait_not_busy() waits for the currently selected device on the hwif 1224 * to report a non-busy status, see comments in probe_hwif(). 1225 */ 1226int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1227{ 1228 u8 stat = 0; 1229 1230 while(timeout--) { 1231 /* 1232 * Turn this into a schedule() sleep once I'm sure 1233 * about locking issues (2.5 work ?). 1234 */ 1235 mdelay(1); 1236 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); 1237 if ((stat & BUSY_STAT) == 0) 1238 return 0; 1239 /* 1240 * Assume a value of 0xff means nothing is connected to 1241 * the interface and it doesn't implement the pull-down 1242 * resistor on D7. 1243 */ 1244 if (stat == 0xff) 1245 return -ENODEV; 1246 touch_softlockup_watchdog(); 1247 touch_nmi_watchdog(); 1248 } 1249 return -EBUSY; 1250} 1251 1252EXPORT_SYMBOL_GPL(ide_wait_not_busy); 1253 1254