ide-iops.c revision 26bcb879c03254545a19c6700fe5bcef6f21e7b1
1/* 2 * linux/drivers/ide/ide-iops.c Version 0.37 Mar 05, 2003 3 * 4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 5 * Copyright (C) 2003 Red Hat <alan@redhat.com> 6 * 7 */ 8 9#include <linux/module.h> 10#include <linux/types.h> 11#include <linux/string.h> 12#include <linux/kernel.h> 13#include <linux/timer.h> 14#include <linux/mm.h> 15#include <linux/interrupt.h> 16#include <linux/major.h> 17#include <linux/errno.h> 18#include <linux/genhd.h> 19#include <linux/blkpg.h> 20#include <linux/slab.h> 21#include <linux/pci.h> 22#include <linux/delay.h> 23#include <linux/hdreg.h> 24#include <linux/ide.h> 25#include <linux/bitops.h> 26#include <linux/nmi.h> 27 28#include <asm/byteorder.h> 29#include <asm/irq.h> 30#include <asm/uaccess.h> 31#include <asm/io.h> 32 33/* 34 * Conventional PIO operations for ATA devices 35 */ 36 37static u8 ide_inb (unsigned long port) 38{ 39 return (u8) inb(port); 40} 41 42static u16 ide_inw (unsigned long port) 43{ 44 return (u16) inw(port); 45} 46 47static void ide_insw (unsigned long port, void *addr, u32 count) 48{ 49 insw(port, addr, count); 50} 51 52static void ide_insl (unsigned long port, void *addr, u32 count) 53{ 54 insl(port, addr, count); 55} 56 57static void ide_outb (u8 val, unsigned long port) 58{ 59 outb(val, port); 60} 61 62static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port) 63{ 64 outb(addr, port); 65} 66 67static void ide_outw (u16 val, unsigned long port) 68{ 69 outw(val, port); 70} 71 72static void ide_outsw (unsigned long port, void *addr, u32 count) 73{ 74 outsw(port, addr, count); 75} 76 77static void ide_outsl (unsigned long port, void *addr, u32 count) 78{ 79 outsl(port, addr, count); 80} 81 82void default_hwif_iops (ide_hwif_t *hwif) 83{ 84 hwif->OUTB = ide_outb; 85 hwif->OUTBSYNC = ide_outbsync; 86 hwif->OUTW = ide_outw; 87 hwif->OUTSW = ide_outsw; 88 hwif->OUTSL = ide_outsl; 89 hwif->INB = ide_inb; 90 hwif->INW = ide_inw; 91 hwif->INSW = ide_insw; 92 hwif->INSL = ide_insl; 93} 94 95/* 96 * MMIO operations, typically used for SATA controllers 97 */ 98 99static u8 ide_mm_inb (unsigned long port) 100{ 101 return (u8) readb((void __iomem *) port); 102} 103 104static u16 ide_mm_inw (unsigned long port) 105{ 106 return (u16) readw((void __iomem *) port); 107} 108 109static void ide_mm_insw (unsigned long port, void *addr, u32 count) 110{ 111 __ide_mm_insw((void __iomem *) port, addr, count); 112} 113 114static void ide_mm_insl (unsigned long port, void *addr, u32 count) 115{ 116 __ide_mm_insl((void __iomem *) port, addr, count); 117} 118 119static void ide_mm_outb (u8 value, unsigned long port) 120{ 121 writeb(value, (void __iomem *) port); 122} 123 124static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port) 125{ 126 writeb(value, (void __iomem *) port); 127} 128 129static void ide_mm_outw (u16 value, unsigned long port) 130{ 131 writew(value, (void __iomem *) port); 132} 133 134static void ide_mm_outsw (unsigned long port, void *addr, u32 count) 135{ 136 __ide_mm_outsw((void __iomem *) port, addr, count); 137} 138 139static void ide_mm_outsl (unsigned long port, void *addr, u32 count) 140{ 141 __ide_mm_outsl((void __iomem *) port, addr, count); 142} 143 144void default_hwif_mmiops (ide_hwif_t *hwif) 145{ 146 hwif->OUTB = ide_mm_outb; 147 /* Most systems will need to override OUTBSYNC, alas however 148 this one is controller specific! */ 149 hwif->OUTBSYNC = ide_mm_outbsync; 150 hwif->OUTW = ide_mm_outw; 151 hwif->OUTSW = ide_mm_outsw; 152 hwif->OUTSL = ide_mm_outsl; 153 hwif->INB = ide_mm_inb; 154 hwif->INW = ide_mm_inw; 155 hwif->INSW = ide_mm_insw; 156 hwif->INSL = ide_mm_insl; 157} 158 159EXPORT_SYMBOL(default_hwif_mmiops); 160 161u32 ide_read_24 (ide_drive_t *drive) 162{ 163 u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG); 164 u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG); 165 u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG); 166 return (hcyl<<16)|(lcyl<<8)|sect; 167} 168 169void SELECT_DRIVE (ide_drive_t *drive) 170{ 171 if (HWIF(drive)->selectproc) 172 HWIF(drive)->selectproc(drive); 173 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG); 174} 175 176EXPORT_SYMBOL(SELECT_DRIVE); 177 178void SELECT_INTERRUPT (ide_drive_t *drive) 179{ 180 if (HWIF(drive)->intrproc) 181 HWIF(drive)->intrproc(drive); 182 else 183 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG); 184} 185 186void SELECT_MASK (ide_drive_t *drive, int mask) 187{ 188 if (HWIF(drive)->maskproc) 189 HWIF(drive)->maskproc(drive, mask); 190} 191 192void QUIRK_LIST (ide_drive_t *drive) 193{ 194 if (HWIF(drive)->quirkproc) 195 drive->quirk_list = HWIF(drive)->quirkproc(drive); 196} 197 198/* 199 * Some localbus EIDE interfaces require a special access sequence 200 * when using 32-bit I/O instructions to transfer data. We call this 201 * the "vlb_sync" sequence, which consists of three successive reads 202 * of the sector count register location, with interrupts disabled 203 * to ensure that the reads all happen together. 204 */ 205static void ata_vlb_sync(ide_drive_t *drive, unsigned long port) 206{ 207 (void) HWIF(drive)->INB(port); 208 (void) HWIF(drive)->INB(port); 209 (void) HWIF(drive)->INB(port); 210} 211 212/* 213 * This is used for most PIO data transfers *from* the IDE interface 214 */ 215static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount) 216{ 217 ide_hwif_t *hwif = HWIF(drive); 218 u8 io_32bit = drive->io_32bit; 219 220 if (io_32bit) { 221 if (io_32bit & 2) { 222 unsigned long flags; 223 local_irq_save(flags); 224 ata_vlb_sync(drive, IDE_NSECTOR_REG); 225 hwif->INSL(IDE_DATA_REG, buffer, wcount); 226 local_irq_restore(flags); 227 } else 228 hwif->INSL(IDE_DATA_REG, buffer, wcount); 229 } else { 230 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1); 231 } 232} 233 234/* 235 * This is used for most PIO data transfers *to* the IDE interface 236 */ 237static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount) 238{ 239 ide_hwif_t *hwif = HWIF(drive); 240 u8 io_32bit = drive->io_32bit; 241 242 if (io_32bit) { 243 if (io_32bit & 2) { 244 unsigned long flags; 245 local_irq_save(flags); 246 ata_vlb_sync(drive, IDE_NSECTOR_REG); 247 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 248 local_irq_restore(flags); 249 } else 250 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 251 } else { 252 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1); 253 } 254} 255 256/* 257 * The following routines are mainly used by the ATAPI drivers. 258 * 259 * These routines will round up any request for an odd number of bytes, 260 * so if an odd bytecount is specified, be sure that there's at least one 261 * extra byte allocated for the buffer. 262 */ 263 264static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 265{ 266 ide_hwif_t *hwif = HWIF(drive); 267 268 ++bytecount; 269#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 270 if (MACH_IS_ATARI || MACH_IS_Q40) { 271 /* Atari has a byte-swapped IDE interface */ 272 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 273 return; 274 } 275#endif /* CONFIG_ATARI || CONFIG_Q40 */ 276 hwif->ata_input_data(drive, buffer, bytecount / 4); 277 if ((bytecount & 0x03) >= 2) 278 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1); 279} 280 281static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 282{ 283 ide_hwif_t *hwif = HWIF(drive); 284 285 ++bytecount; 286#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 287 if (MACH_IS_ATARI || MACH_IS_Q40) { 288 /* Atari has a byte-swapped IDE interface */ 289 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 290 return; 291 } 292#endif /* CONFIG_ATARI || CONFIG_Q40 */ 293 hwif->ata_output_data(drive, buffer, bytecount / 4); 294 if ((bytecount & 0x03) >= 2) 295 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1); 296} 297 298void default_hwif_transport(ide_hwif_t *hwif) 299{ 300 hwif->ata_input_data = ata_input_data; 301 hwif->ata_output_data = ata_output_data; 302 hwif->atapi_input_bytes = atapi_input_bytes; 303 hwif->atapi_output_bytes = atapi_output_bytes; 304} 305 306/* 307 * Beginning of Taskfile OPCODE Library and feature sets. 308 */ 309void ide_fix_driveid (struct hd_driveid *id) 310{ 311#ifndef __LITTLE_ENDIAN 312# ifdef __BIG_ENDIAN 313 int i; 314 u16 *stringcast; 315 316 id->config = __le16_to_cpu(id->config); 317 id->cyls = __le16_to_cpu(id->cyls); 318 id->reserved2 = __le16_to_cpu(id->reserved2); 319 id->heads = __le16_to_cpu(id->heads); 320 id->track_bytes = __le16_to_cpu(id->track_bytes); 321 id->sector_bytes = __le16_to_cpu(id->sector_bytes); 322 id->sectors = __le16_to_cpu(id->sectors); 323 id->vendor0 = __le16_to_cpu(id->vendor0); 324 id->vendor1 = __le16_to_cpu(id->vendor1); 325 id->vendor2 = __le16_to_cpu(id->vendor2); 326 stringcast = (u16 *)&id->serial_no[0]; 327 for (i = 0; i < (20/2); i++) 328 stringcast[i] = __le16_to_cpu(stringcast[i]); 329 id->buf_type = __le16_to_cpu(id->buf_type); 330 id->buf_size = __le16_to_cpu(id->buf_size); 331 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); 332 stringcast = (u16 *)&id->fw_rev[0]; 333 for (i = 0; i < (8/2); i++) 334 stringcast[i] = __le16_to_cpu(stringcast[i]); 335 stringcast = (u16 *)&id->model[0]; 336 for (i = 0; i < (40/2); i++) 337 stringcast[i] = __le16_to_cpu(stringcast[i]); 338 id->dword_io = __le16_to_cpu(id->dword_io); 339 id->reserved50 = __le16_to_cpu(id->reserved50); 340 id->field_valid = __le16_to_cpu(id->field_valid); 341 id->cur_cyls = __le16_to_cpu(id->cur_cyls); 342 id->cur_heads = __le16_to_cpu(id->cur_heads); 343 id->cur_sectors = __le16_to_cpu(id->cur_sectors); 344 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); 345 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); 346 id->lba_capacity = __le32_to_cpu(id->lba_capacity); 347 id->dma_1word = __le16_to_cpu(id->dma_1word); 348 id->dma_mword = __le16_to_cpu(id->dma_mword); 349 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); 350 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); 351 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); 352 id->eide_pio = __le16_to_cpu(id->eide_pio); 353 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); 354 for (i = 0; i < 2; ++i) 355 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); 356 for (i = 0; i < 4; ++i) 357 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); 358 id->queue_depth = __le16_to_cpu(id->queue_depth); 359 for (i = 0; i < 4; ++i) 360 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); 361 id->major_rev_num = __le16_to_cpu(id->major_rev_num); 362 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); 363 id->command_set_1 = __le16_to_cpu(id->command_set_1); 364 id->command_set_2 = __le16_to_cpu(id->command_set_2); 365 id->cfsse = __le16_to_cpu(id->cfsse); 366 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); 367 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); 368 id->csf_default = __le16_to_cpu(id->csf_default); 369 id->dma_ultra = __le16_to_cpu(id->dma_ultra); 370 id->trseuc = __le16_to_cpu(id->trseuc); 371 id->trsEuc = __le16_to_cpu(id->trsEuc); 372 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); 373 id->mprc = __le16_to_cpu(id->mprc); 374 id->hw_config = __le16_to_cpu(id->hw_config); 375 id->acoustic = __le16_to_cpu(id->acoustic); 376 id->msrqs = __le16_to_cpu(id->msrqs); 377 id->sxfert = __le16_to_cpu(id->sxfert); 378 id->sal = __le16_to_cpu(id->sal); 379 id->spg = __le32_to_cpu(id->spg); 380 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); 381 for (i = 0; i < 22; i++) 382 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); 383 id->last_lun = __le16_to_cpu(id->last_lun); 384 id->word127 = __le16_to_cpu(id->word127); 385 id->dlf = __le16_to_cpu(id->dlf); 386 id->csfo = __le16_to_cpu(id->csfo); 387 for (i = 0; i < 26; i++) 388 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); 389 id->word156 = __le16_to_cpu(id->word156); 390 for (i = 0; i < 3; i++) 391 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); 392 id->cfa_power = __le16_to_cpu(id->cfa_power); 393 for (i = 0; i < 14; i++) 394 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); 395 for (i = 0; i < 31; i++) 396 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); 397 for (i = 0; i < 48; i++) 398 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); 399 id->integrity_word = __le16_to_cpu(id->integrity_word); 400# else 401# error "Please fix <asm/byteorder.h>" 402# endif 403#endif 404} 405 406/* FIXME: exported for use by the USB storage (isd200.c) code only */ 407EXPORT_SYMBOL(ide_fix_driveid); 408 409void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 410{ 411 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ 412 413 if (byteswap) { 414 /* convert from big-endian to host byte order */ 415 for (p = end ; p != s;) { 416 unsigned short *pp = (unsigned short *) (p -= 2); 417 *pp = ntohs(*pp); 418 } 419 } 420 /* strip leading blanks */ 421 while (s != end && *s == ' ') 422 ++s; 423 /* compress internal blanks and strip trailing blanks */ 424 while (s != end && *s) { 425 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 426 *p++ = *(s-1); 427 } 428 /* wipe out trailing garbage */ 429 while (p != end) 430 *p++ = '\0'; 431} 432 433EXPORT_SYMBOL(ide_fixstring); 434 435/* 436 * Needed for PCI irq sharing 437 */ 438int drive_is_ready (ide_drive_t *drive) 439{ 440 ide_hwif_t *hwif = HWIF(drive); 441 u8 stat = 0; 442 443 if (drive->waiting_for_dma) 444 return hwif->ide_dma_test_irq(drive); 445 446#if 0 447 /* need to guarantee 400ns since last command was issued */ 448 udelay(1); 449#endif 450 451#ifdef CONFIG_IDEPCI_SHARE_IRQ 452 /* 453 * We do a passive status test under shared PCI interrupts on 454 * cards that truly share the ATA side interrupt, but may also share 455 * an interrupt with another pci card/device. We make no assumptions 456 * about possible isa-pnp and pci-pnp issues yet. 457 */ 458 if (IDE_CONTROL_REG) 459 stat = hwif->INB(IDE_ALTSTATUS_REG); 460 else 461#endif /* CONFIG_IDEPCI_SHARE_IRQ */ 462 /* Note: this may clear a pending IRQ!! */ 463 stat = hwif->INB(IDE_STATUS_REG); 464 465 if (stat & BUSY_STAT) 466 /* drive busy: definitely not interrupting */ 467 return 0; 468 469 /* drive ready: *might* be interrupting */ 470 return 1; 471} 472 473EXPORT_SYMBOL(drive_is_ready); 474 475/* 476 * Global for All, and taken from ide-pmac.c. Can be called 477 * with spinlock held & IRQs disabled, so don't schedule ! 478 */ 479int wait_for_ready (ide_drive_t *drive, int timeout) 480{ 481 ide_hwif_t *hwif = HWIF(drive); 482 u8 stat = 0; 483 484 while(--timeout) { 485 stat = hwif->INB(IDE_STATUS_REG); 486 if (!(stat & BUSY_STAT)) { 487 if (drive->ready_stat == 0) 488 break; 489 else if ((stat & drive->ready_stat)||(stat & ERR_STAT)) 490 break; 491 } 492 mdelay(1); 493 } 494 if ((stat & ERR_STAT) || timeout <= 0) { 495 if (stat & ERR_STAT) { 496 printk(KERN_ERR "%s: wait_for_ready, " 497 "error status: %x\n", drive->name, stat); 498 } 499 return 1; 500 } 501 return 0; 502} 503 504/* 505 * This routine busy-waits for the drive status to be not "busy". 506 * It then checks the status for all of the "good" bits and none 507 * of the "bad" bits, and if all is okay it returns 0. All other 508 * cases return 1 after invoking ide_error() -- caller should just return. 509 * 510 * This routine should get fixed to not hog the cpu during extra long waits.. 511 * That could be done by busy-waiting for the first jiffy or two, and then 512 * setting a timer to wake up at half second intervals thereafter, 513 * until timeout is achieved, before timing out. 514 */ 515int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 516{ 517 ide_hwif_t *hwif = HWIF(drive); 518 u8 stat; 519 int i; 520 unsigned long flags; 521 522 /* bail early if we've exceeded max_failures */ 523 if (drive->max_failures && (drive->failures > drive->max_failures)) { 524 *startstop = ide_stopped; 525 return 1; 526 } 527 528 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 529 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 530 local_irq_set(flags); 531 timeout += jiffies; 532 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 533 if (time_after(jiffies, timeout)) { 534 /* 535 * One last read after the timeout in case 536 * heavy interrupt load made us not make any 537 * progress during the timeout.. 538 */ 539 stat = hwif->INB(IDE_STATUS_REG); 540 if (!(stat & BUSY_STAT)) 541 break; 542 543 local_irq_restore(flags); 544 *startstop = ide_error(drive, "status timeout", stat); 545 return 1; 546 } 547 } 548 local_irq_restore(flags); 549 } 550 /* 551 * Allow status to settle, then read it again. 552 * A few rare drives vastly violate the 400ns spec here, 553 * so we'll wait up to 10usec for a "good" status 554 * rather than expensively fail things immediately. 555 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 556 */ 557 for (i = 0; i < 10; i++) { 558 udelay(1); 559 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) 560 return 0; 561 } 562 *startstop = ide_error(drive, "status error", stat); 563 return 1; 564} 565 566EXPORT_SYMBOL(ide_wait_stat); 567 568/** 569 * ide_in_drive_list - look for drive in black/white list 570 * @id: drive identifier 571 * @drive_table: list to inspect 572 * 573 * Look for a drive in the blacklist and the whitelist tables 574 * Returns 1 if the drive is found in the table. 575 */ 576 577int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table) 578{ 579 for ( ; drive_table->id_model; drive_table++) 580 if ((!strcmp(drive_table->id_model, id->model)) && 581 (!drive_table->id_firmware || 582 strstr(id->fw_rev, drive_table->id_firmware))) 583 return 1; 584 return 0; 585} 586 587EXPORT_SYMBOL_GPL(ide_in_drive_list); 588 589/* 590 * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. 591 * We list them here and depend on the device side cable detection for them. 592 */ 593static const struct drive_list_entry ivb_list[] = { 594 { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, 595 { NULL , NULL } 596}; 597 598/* 599 * All hosts that use the 80c ribbon must use! 600 * The name is derived from upper byte of word 93 and the 80c ribbon. 601 */ 602u8 eighty_ninty_three (ide_drive_t *drive) 603{ 604 ide_hwif_t *hwif = drive->hwif; 605 struct hd_driveid *id = drive->id; 606 int ivb = ide_in_drive_list(id, ivb_list); 607 608 if (hwif->cbl == ATA_CBL_PATA40_SHORT) 609 return 1; 610 611 if (ivb) 612 printk(KERN_DEBUG "%s: skipping word 93 validity check\n", 613 drive->name); 614 615 if (hwif->cbl != ATA_CBL_PATA80 && !ivb) 616 goto no_80w; 617 618 if (ide_dev_is_sata(id)) 619 return 1; 620 621 /* 622 * FIXME: 623 * - change master/slave IDENTIFY order 624 * - force bit13 (80c cable present) check also for !ivb devices 625 * (unless the slave device is pre-ATA3) 626 */ 627#ifndef CONFIG_IDEDMA_IVB 628 if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000))) 629#else 630 if (id->hw_config & 0x6000) 631#endif 632 return 1; 633 634no_80w: 635 if (drive->udma33_warned == 1) 636 return 0; 637 638 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 639 "limiting max speed to UDMA33\n", 640 drive->name, 641 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); 642 643 drive->udma33_warned = 1; 644 645 return 0; 646} 647 648int ide_ata66_check (ide_drive_t *drive, ide_task_t *args) 649{ 650 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) && 651 (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) && 652 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) { 653 if (eighty_ninty_three(drive) == 0) { 654 printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot " 655 "be set\n", drive->name); 656 return 1; 657 } 658 } 659 660 return 0; 661} 662 663/* 664 * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER. 665 * 1 : Safe to update drive->id DMA registers. 666 * 0 : OOPs not allowed. 667 */ 668int set_transfer (ide_drive_t *drive, ide_task_t *args) 669{ 670 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) && 671 (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) && 672 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) && 673 (drive->id->dma_ultra || 674 drive->id->dma_mword || 675 drive->id->dma_1word)) 676 return 1; 677 678 return 0; 679} 680 681#ifdef CONFIG_BLK_DEV_IDEDMA 682static u8 ide_auto_reduce_xfer (ide_drive_t *drive) 683{ 684 if (!drive->crc_count) 685 return drive->current_speed; 686 drive->crc_count = 0; 687 688 switch(drive->current_speed) { 689 case XFER_UDMA_7: return XFER_UDMA_6; 690 case XFER_UDMA_6: return XFER_UDMA_5; 691 case XFER_UDMA_5: return XFER_UDMA_4; 692 case XFER_UDMA_4: return XFER_UDMA_3; 693 case XFER_UDMA_3: return XFER_UDMA_2; 694 case XFER_UDMA_2: return XFER_UDMA_1; 695 case XFER_UDMA_1: return XFER_UDMA_0; 696 /* 697 * OOPS we do not goto non Ultra DMA modes 698 * without iCRC's available we force 699 * the system to PIO and make the user 700 * invoke the ATA-1 ATA-2 DMA modes. 701 */ 702 case XFER_UDMA_0: 703 default: return XFER_PIO_4; 704 } 705} 706#endif /* CONFIG_BLK_DEV_IDEDMA */ 707 708/* 709 * Update the 710 */ 711int ide_driveid_update (ide_drive_t *drive) 712{ 713 ide_hwif_t *hwif = HWIF(drive); 714 struct hd_driveid *id; 715#if 0 716 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 717 if (!id) 718 return 0; 719 720 taskfile_lib_get_identify(drive, (char *)&id); 721 722 ide_fix_driveid(id); 723 if (id) { 724 drive->id->dma_ultra = id->dma_ultra; 725 drive->id->dma_mword = id->dma_mword; 726 drive->id->dma_1word = id->dma_1word; 727 /* anything more ? */ 728 kfree(id); 729 } 730 return 1; 731#else 732 /* 733 * Re-read drive->id for possible DMA mode 734 * change (copied from ide-probe.c) 735 */ 736 unsigned long timeout, flags; 737 738 SELECT_MASK(drive, 1); 739 if (IDE_CONTROL_REG) 740 hwif->OUTB(drive->ctl,IDE_CONTROL_REG); 741 msleep(50); 742 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG); 743 timeout = jiffies + WAIT_WORSTCASE; 744 do { 745 if (time_after(jiffies, timeout)) { 746 SELECT_MASK(drive, 0); 747 return 0; /* drive timed-out */ 748 } 749 msleep(50); /* give drive a breather */ 750 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT); 751 msleep(50); /* wait for IRQ and DRQ_STAT */ 752 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) { 753 SELECT_MASK(drive, 0); 754 printk("%s: CHECK for good STATUS\n", drive->name); 755 return 0; 756 } 757 local_irq_save(flags); 758 SELECT_MASK(drive, 0); 759 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 760 if (!id) { 761 local_irq_restore(flags); 762 return 0; 763 } 764 ata_input_data(drive, id, SECTOR_WORDS); 765 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */ 766 local_irq_enable(); 767 local_irq_restore(flags); 768 ide_fix_driveid(id); 769 if (id) { 770 drive->id->dma_ultra = id->dma_ultra; 771 drive->id->dma_mword = id->dma_mword; 772 drive->id->dma_1word = id->dma_1word; 773 /* anything more ? */ 774 kfree(id); 775 } 776 777 return 1; 778#endif 779} 780 781/* 782 * Similar to ide_wait_stat(), except it never calls ide_error internally. 783 * 784 * const char *msg == consider adding for verbose errors. 785 */ 786int ide_config_drive_speed (ide_drive_t *drive, u8 speed) 787{ 788 ide_hwif_t *hwif = HWIF(drive); 789 int i, error = 1; 790 u8 stat; 791 792// while (HWGROUP(drive)->busy) 793// msleep(50); 794 795#ifdef CONFIG_BLK_DEV_IDEDMA 796 if (hwif->ide_dma_check) /* check if host supports DMA */ 797 hwif->dma_host_off(drive); 798#endif 799 800 /* 801 * Don't use ide_wait_cmd here - it will 802 * attempt to set_geometry and recalibrate, 803 * but for some reason these don't work at 804 * this point (lost interrupt). 805 */ 806 /* 807 * Select the drive, and issue the SETFEATURES command 808 */ 809 disable_irq_nosync(hwif->irq); 810 811 /* 812 * FIXME: we race against the running IRQ here if 813 * this is called from non IRQ context. If we use 814 * disable_irq() we hang on the error path. Work 815 * is needed. 816 */ 817 818 udelay(1); 819 SELECT_DRIVE(drive); 820 SELECT_MASK(drive, 0); 821 udelay(1); 822 if (IDE_CONTROL_REG) 823 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG); 824 hwif->OUTB(speed, IDE_NSECTOR_REG); 825 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG); 826 hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG); 827 if ((IDE_CONTROL_REG) && (drive->quirk_list == 2)) 828 hwif->OUTB(drive->ctl, IDE_CONTROL_REG); 829 udelay(1); 830 /* 831 * Wait for drive to become non-BUSY 832 */ 833 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 834 unsigned long flags, timeout; 835 local_irq_set(flags); 836 timeout = jiffies + WAIT_CMD; 837 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 838 if (time_after(jiffies, timeout)) 839 break; 840 } 841 local_irq_restore(flags); 842 } 843 844 /* 845 * Allow status to settle, then read it again. 846 * A few rare drives vastly violate the 400ns spec here, 847 * so we'll wait up to 10usec for a "good" status 848 * rather than expensively fail things immediately. 849 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 850 */ 851 for (i = 0; i < 10; i++) { 852 udelay(1); 853 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), drive->ready_stat, BUSY_STAT|DRQ_STAT|ERR_STAT)) { 854 error = 0; 855 break; 856 } 857 } 858 859 SELECT_MASK(drive, 0); 860 861 enable_irq(hwif->irq); 862 863 if (error) { 864 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 865 return error; 866 } 867 868 drive->id->dma_ultra &= ~0xFF00; 869 drive->id->dma_mword &= ~0x0F00; 870 drive->id->dma_1word &= ~0x0F00; 871 872#ifdef CONFIG_BLK_DEV_IDEDMA 873 if (speed >= XFER_SW_DMA_0) 874 hwif->dma_host_on(drive); 875 else if (hwif->ide_dma_check) /* check if host supports DMA */ 876 hwif->dma_off_quietly(drive); 877#endif 878 879 switch(speed) { 880 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break; 881 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break; 882 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break; 883 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break; 884 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break; 885 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break; 886 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break; 887 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break; 888 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break; 889 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break; 890 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break; 891 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break; 892 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break; 893 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break; 894 default: break; 895 } 896 if (!drive->init_speed) 897 drive->init_speed = speed; 898 drive->current_speed = speed; 899 return error; 900} 901 902EXPORT_SYMBOL(ide_config_drive_speed); 903 904 905/* 906 * This should get invoked any time we exit the driver to 907 * wait for an interrupt response from a drive. handler() points 908 * at the appropriate code to handle the next interrupt, and a 909 * timer is started to prevent us from waiting forever in case 910 * something goes wrong (see the ide_timer_expiry() handler later on). 911 * 912 * See also ide_execute_command 913 */ 914static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 915 unsigned int timeout, ide_expiry_t *expiry) 916{ 917 ide_hwgroup_t *hwgroup = HWGROUP(drive); 918 919 if (hwgroup->handler != NULL) { 920 printk(KERN_CRIT "%s: ide_set_handler: handler not null; " 921 "old=%p, new=%p\n", 922 drive->name, hwgroup->handler, handler); 923 } 924 hwgroup->handler = handler; 925 hwgroup->expiry = expiry; 926 hwgroup->timer.expires = jiffies + timeout; 927 hwgroup->req_gen_timer = hwgroup->req_gen; 928 add_timer(&hwgroup->timer); 929} 930 931void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 932 unsigned int timeout, ide_expiry_t *expiry) 933{ 934 unsigned long flags; 935 spin_lock_irqsave(&ide_lock, flags); 936 __ide_set_handler(drive, handler, timeout, expiry); 937 spin_unlock_irqrestore(&ide_lock, flags); 938} 939 940EXPORT_SYMBOL(ide_set_handler); 941 942/** 943 * ide_execute_command - execute an IDE command 944 * @drive: IDE drive to issue the command against 945 * @command: command byte to write 946 * @handler: handler for next phase 947 * @timeout: timeout for command 948 * @expiry: handler to run on timeout 949 * 950 * Helper function to issue an IDE command. This handles the 951 * atomicity requirements, command timing and ensures that the 952 * handler and IRQ setup do not race. All IDE command kick off 953 * should go via this function or do equivalent locking. 954 */ 955 956void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry) 957{ 958 unsigned long flags; 959 ide_hwgroup_t *hwgroup = HWGROUP(drive); 960 ide_hwif_t *hwif = HWIF(drive); 961 962 spin_lock_irqsave(&ide_lock, flags); 963 964 BUG_ON(hwgroup->handler); 965 hwgroup->handler = handler; 966 hwgroup->expiry = expiry; 967 hwgroup->timer.expires = jiffies + timeout; 968 hwgroup->req_gen_timer = hwgroup->req_gen; 969 add_timer(&hwgroup->timer); 970 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG); 971 /* Drive takes 400nS to respond, we must avoid the IRQ being 972 serviced before that. 973 974 FIXME: we could skip this delay with care on non shared 975 devices 976 */ 977 ndelay(400); 978 spin_unlock_irqrestore(&ide_lock, flags); 979} 980 981EXPORT_SYMBOL(ide_execute_command); 982 983 984/* needed below */ 985static ide_startstop_t do_reset1 (ide_drive_t *, int); 986 987/* 988 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 989 * during an atapi drive reset operation. If the drive has not yet responded, 990 * and we have not yet hit our maximum waiting time, then the timer is restarted 991 * for another 50ms. 992 */ 993static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 994{ 995 ide_hwgroup_t *hwgroup = HWGROUP(drive); 996 ide_hwif_t *hwif = HWIF(drive); 997 u8 stat; 998 999 SELECT_DRIVE(drive); 1000 udelay (10); 1001 1002 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 1003 printk("%s: ATAPI reset complete\n", drive->name); 1004 } else { 1005 if (time_before(jiffies, hwgroup->poll_timeout)) { 1006 BUG_ON(HWGROUP(drive)->handler != NULL); 1007 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1008 /* continue polling */ 1009 return ide_started; 1010 } 1011 /* end of polling */ 1012 hwgroup->polling = 0; 1013 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 1014 drive->name, stat); 1015 /* do it the old fashioned way */ 1016 return do_reset1(drive, 1); 1017 } 1018 /* done polling */ 1019 hwgroup->polling = 0; 1020 hwgroup->resetting = 0; 1021 return ide_stopped; 1022} 1023 1024/* 1025 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 1026 * during an ide reset operation. If the drives have not yet responded, 1027 * and we have not yet hit our maximum waiting time, then the timer is restarted 1028 * for another 50ms. 1029 */ 1030static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 1031{ 1032 ide_hwgroup_t *hwgroup = HWGROUP(drive); 1033 ide_hwif_t *hwif = HWIF(drive); 1034 u8 tmp; 1035 1036 if (hwif->reset_poll != NULL) { 1037 if (hwif->reset_poll(drive)) { 1038 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 1039 hwif->name, drive->name); 1040 return ide_stopped; 1041 } 1042 } 1043 1044 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 1045 if (time_before(jiffies, hwgroup->poll_timeout)) { 1046 BUG_ON(HWGROUP(drive)->handler != NULL); 1047 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1048 /* continue polling */ 1049 return ide_started; 1050 } 1051 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 1052 drive->failures++; 1053 } else { 1054 printk("%s: reset: ", hwif->name); 1055 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) { 1056 printk("success\n"); 1057 drive->failures = 0; 1058 } else { 1059 drive->failures++; 1060 printk("master: "); 1061 switch (tmp & 0x7f) { 1062 case 1: printk("passed"); 1063 break; 1064 case 2: printk("formatter device error"); 1065 break; 1066 case 3: printk("sector buffer error"); 1067 break; 1068 case 4: printk("ECC circuitry error"); 1069 break; 1070 case 5: printk("controlling MPU error"); 1071 break; 1072 default:printk("error (0x%02x?)", tmp); 1073 } 1074 if (tmp & 0x80) 1075 printk("; slave: failed"); 1076 printk("\n"); 1077 } 1078 } 1079 hwgroup->polling = 0; /* done polling */ 1080 hwgroup->resetting = 0; /* done reset attempt */ 1081 return ide_stopped; 1082} 1083 1084static void check_dma_crc(ide_drive_t *drive) 1085{ 1086#ifdef CONFIG_BLK_DEV_IDEDMA 1087 if (drive->crc_count) { 1088 drive->hwif->dma_off_quietly(drive); 1089 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive)); 1090 if (drive->current_speed >= XFER_SW_DMA_0) 1091 (void) HWIF(drive)->ide_dma_on(drive); 1092 } else 1093 ide_dma_off(drive); 1094#endif 1095} 1096 1097static void ide_disk_pre_reset(ide_drive_t *drive) 1098{ 1099 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1; 1100 1101 drive->special.all = 0; 1102 drive->special.b.set_geometry = legacy; 1103 drive->special.b.recalibrate = legacy; 1104 if (OK_TO_RESET_CONTROLLER) 1105 drive->mult_count = 0; 1106 if (!drive->keep_settings && !drive->using_dma) 1107 drive->mult_req = 0; 1108 if (drive->mult_req != drive->mult_count) 1109 drive->special.b.set_multmode = 1; 1110} 1111 1112static void pre_reset(ide_drive_t *drive) 1113{ 1114 if (drive->media == ide_disk) 1115 ide_disk_pre_reset(drive); 1116 else 1117 drive->post_reset = 1; 1118 1119 if (!drive->keep_settings) { 1120 if (drive->using_dma) { 1121 check_dma_crc(drive); 1122 } else { 1123 drive->unmask = 0; 1124 drive->io_32bit = 0; 1125 } 1126 return; 1127 } 1128 if (drive->using_dma) 1129 check_dma_crc(drive); 1130 1131 if (HWIF(drive)->pre_reset != NULL) 1132 HWIF(drive)->pre_reset(drive); 1133 1134 if (drive->current_speed != 0xff) 1135 drive->desired_speed = drive->current_speed; 1136 drive->current_speed = 0xff; 1137} 1138 1139/* 1140 * do_reset1() attempts to recover a confused drive by resetting it. 1141 * Unfortunately, resetting a disk drive actually resets all devices on 1142 * the same interface, so it can really be thought of as resetting the 1143 * interface rather than resetting the drive. 1144 * 1145 * ATAPI devices have their own reset mechanism which allows them to be 1146 * individually reset without clobbering other devices on the same interface. 1147 * 1148 * Unfortunately, the IDE interface does not generate an interrupt to let 1149 * us know when the reset operation has finished, so we must poll for this. 1150 * Equally poor, though, is the fact that this may a very long time to complete, 1151 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1152 * we set a timer to poll at 50ms intervals. 1153 */ 1154static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1155{ 1156 unsigned int unit; 1157 unsigned long flags; 1158 ide_hwif_t *hwif; 1159 ide_hwgroup_t *hwgroup; 1160 1161 spin_lock_irqsave(&ide_lock, flags); 1162 hwif = HWIF(drive); 1163 hwgroup = HWGROUP(drive); 1164 1165 /* We must not reset with running handlers */ 1166 BUG_ON(hwgroup->handler != NULL); 1167 1168 /* For an ATAPI device, first try an ATAPI SRST. */ 1169 if (drive->media != ide_disk && !do_not_try_atapi) { 1170 hwgroup->resetting = 1; 1171 pre_reset(drive); 1172 SELECT_DRIVE(drive); 1173 udelay (20); 1174 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG); 1175 ndelay(400); 1176 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1177 hwgroup->polling = 1; 1178 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1179 spin_unlock_irqrestore(&ide_lock, flags); 1180 return ide_started; 1181 } 1182 1183 /* 1184 * First, reset any device state data we were maintaining 1185 * for any of the drives on this interface. 1186 */ 1187 for (unit = 0; unit < MAX_DRIVES; ++unit) 1188 pre_reset(&hwif->drives[unit]); 1189 1190#if OK_TO_RESET_CONTROLLER 1191 if (!IDE_CONTROL_REG) { 1192 spin_unlock_irqrestore(&ide_lock, flags); 1193 return ide_stopped; 1194 } 1195 1196 hwgroup->resetting = 1; 1197 /* 1198 * Note that we also set nIEN while resetting the device, 1199 * to mask unwanted interrupts from the interface during the reset. 1200 * However, due to the design of PC hardware, this will cause an 1201 * immediate interrupt due to the edge transition it produces. 1202 * This single interrupt gives us a "fast poll" for drives that 1203 * recover from reset very quickly, saving us the first 50ms wait time. 1204 */ 1205 /* set SRST and nIEN */ 1206 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG); 1207 /* more than enough time */ 1208 udelay(10); 1209 if (drive->quirk_list == 2) { 1210 /* clear SRST and nIEN */ 1211 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG); 1212 } else { 1213 /* clear SRST, leave nIEN */ 1214 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG); 1215 } 1216 /* more than enough time */ 1217 udelay(10); 1218 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1219 hwgroup->polling = 1; 1220 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1221 1222 /* 1223 * Some weird controller like resetting themselves to a strange 1224 * state when the disks are reset this way. At least, the Winbond 1225 * 553 documentation says that 1226 */ 1227 if (hwif->resetproc != NULL) { 1228 hwif->resetproc(drive); 1229 } 1230 1231#endif /* OK_TO_RESET_CONTROLLER */ 1232 1233 spin_unlock_irqrestore(&ide_lock, flags); 1234 return ide_started; 1235} 1236 1237/* 1238 * ide_do_reset() is the entry point to the drive/interface reset code. 1239 */ 1240 1241ide_startstop_t ide_do_reset (ide_drive_t *drive) 1242{ 1243 return do_reset1(drive, 0); 1244} 1245 1246EXPORT_SYMBOL(ide_do_reset); 1247 1248/* 1249 * ide_wait_not_busy() waits for the currently selected device on the hwif 1250 * to report a non-busy status, see comments in probe_hwif(). 1251 */ 1252int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1253{ 1254 u8 stat = 0; 1255 1256 while(timeout--) { 1257 /* 1258 * Turn this into a schedule() sleep once I'm sure 1259 * about locking issues (2.5 work ?). 1260 */ 1261 mdelay(1); 1262 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); 1263 if ((stat & BUSY_STAT) == 0) 1264 return 0; 1265 /* 1266 * Assume a value of 0xff means nothing is connected to 1267 * the interface and it doesn't implement the pull-down 1268 * resistor on D7. 1269 */ 1270 if (stat == 0xff) 1271 return -ENODEV; 1272 touch_softlockup_watchdog(); 1273 touch_nmi_watchdog(); 1274 } 1275 return -EBUSY; 1276} 1277 1278EXPORT_SYMBOL_GPL(ide_wait_not_busy); 1279 1280