ide-iops.c revision 2bd24a1cfc99d242c2cff9a6b74ca49fcaac3fb6
1/* 2 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 3 * Copyright (C) 2003 Red Hat 4 * 5 */ 6 7#include <linux/module.h> 8#include <linux/types.h> 9#include <linux/string.h> 10#include <linux/kernel.h> 11#include <linux/timer.h> 12#include <linux/mm.h> 13#include <linux/interrupt.h> 14#include <linux/major.h> 15#include <linux/errno.h> 16#include <linux/genhd.h> 17#include <linux/blkpg.h> 18#include <linux/slab.h> 19#include <linux/pci.h> 20#include <linux/delay.h> 21#include <linux/ide.h> 22#include <linux/bitops.h> 23#include <linux/nmi.h> 24 25#include <asm/byteorder.h> 26#include <asm/irq.h> 27#include <asm/uaccess.h> 28#include <asm/io.h> 29 30/* 31 * Conventional PIO operations for ATA devices 32 */ 33 34static u8 ide_inb (unsigned long port) 35{ 36 return (u8) inb(port); 37} 38 39static void ide_outb (u8 val, unsigned long port) 40{ 41 outb(val, port); 42} 43 44/* 45 * MMIO operations, typically used for SATA controllers 46 */ 47 48static u8 ide_mm_inb (unsigned long port) 49{ 50 return (u8) readb((void __iomem *) port); 51} 52 53static void ide_mm_outb (u8 value, unsigned long port) 54{ 55 writeb(value, (void __iomem *) port); 56} 57 58void SELECT_DRIVE (ide_drive_t *drive) 59{ 60 ide_hwif_t *hwif = drive->hwif; 61 const struct ide_port_ops *port_ops = hwif->port_ops; 62 ide_task_t task; 63 64 if (port_ops && port_ops->selectproc) 65 port_ops->selectproc(drive); 66 67 memset(&task, 0, sizeof(task)); 68 task.tf_flags = IDE_TFLAG_OUT_DEVICE; 69 70 drive->hwif->tp_ops->tf_load(drive, &task); 71} 72 73void SELECT_MASK(ide_drive_t *drive, int mask) 74{ 75 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 76 77 if (port_ops && port_ops->maskproc) 78 port_ops->maskproc(drive, mask); 79} 80 81void ide_exec_command(ide_hwif_t *hwif, u8 cmd) 82{ 83 if (hwif->host_flags & IDE_HFLAG_MMIO) 84 writeb(cmd, (void __iomem *)hwif->io_ports.command_addr); 85 else 86 outb(cmd, hwif->io_ports.command_addr); 87} 88EXPORT_SYMBOL_GPL(ide_exec_command); 89 90u8 ide_read_status(ide_hwif_t *hwif) 91{ 92 if (hwif->host_flags & IDE_HFLAG_MMIO) 93 return readb((void __iomem *)hwif->io_ports.status_addr); 94 else 95 return inb(hwif->io_ports.status_addr); 96} 97EXPORT_SYMBOL_GPL(ide_read_status); 98 99u8 ide_read_altstatus(ide_hwif_t *hwif) 100{ 101 if (hwif->host_flags & IDE_HFLAG_MMIO) 102 return readb((void __iomem *)hwif->io_ports.ctl_addr); 103 else 104 return inb(hwif->io_ports.ctl_addr); 105} 106EXPORT_SYMBOL_GPL(ide_read_altstatus); 107 108u8 ide_read_sff_dma_status(ide_hwif_t *hwif) 109{ 110 if (hwif->host_flags & IDE_HFLAG_MMIO) 111 return readb((void __iomem *)(hwif->dma_base + ATA_DMA_STATUS)); 112 else 113 return inb(hwif->dma_base + ATA_DMA_STATUS); 114} 115EXPORT_SYMBOL_GPL(ide_read_sff_dma_status); 116 117void ide_set_irq(ide_hwif_t *hwif, int on) 118{ 119 u8 ctl = ATA_DEVCTL_OBS; 120 121 if (on == 4) { /* hack for SRST */ 122 ctl |= 4; 123 on &= ~4; 124 } 125 126 ctl |= on ? 0 : 2; 127 128 if (hwif->host_flags & IDE_HFLAG_MMIO) 129 writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr); 130 else 131 outb(ctl, hwif->io_ports.ctl_addr); 132} 133EXPORT_SYMBOL_GPL(ide_set_irq); 134 135void ide_tf_load(ide_drive_t *drive, ide_task_t *task) 136{ 137 ide_hwif_t *hwif = drive->hwif; 138 struct ide_io_ports *io_ports = &hwif->io_ports; 139 struct ide_taskfile *tf = &task->tf; 140 void (*tf_outb)(u8 addr, unsigned long port); 141 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 142 u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF; 143 144 if (mmio) 145 tf_outb = ide_mm_outb; 146 else 147 tf_outb = ide_outb; 148 149 if (task->tf_flags & IDE_TFLAG_FLAGGED) 150 HIHI = 0xFF; 151 152 if (task->tf_flags & IDE_TFLAG_OUT_DATA) { 153 u16 data = (tf->hob_data << 8) | tf->data; 154 155 if (mmio) 156 writew(data, (void __iomem *)io_ports->data_addr); 157 else 158 outw(data, io_ports->data_addr); 159 } 160 161 if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE) 162 tf_outb(tf->hob_feature, io_ports->feature_addr); 163 if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT) 164 tf_outb(tf->hob_nsect, io_ports->nsect_addr); 165 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL) 166 tf_outb(tf->hob_lbal, io_ports->lbal_addr); 167 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM) 168 tf_outb(tf->hob_lbam, io_ports->lbam_addr); 169 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH) 170 tf_outb(tf->hob_lbah, io_ports->lbah_addr); 171 172 if (task->tf_flags & IDE_TFLAG_OUT_FEATURE) 173 tf_outb(tf->feature, io_ports->feature_addr); 174 if (task->tf_flags & IDE_TFLAG_OUT_NSECT) 175 tf_outb(tf->nsect, io_ports->nsect_addr); 176 if (task->tf_flags & IDE_TFLAG_OUT_LBAL) 177 tf_outb(tf->lbal, io_ports->lbal_addr); 178 if (task->tf_flags & IDE_TFLAG_OUT_LBAM) 179 tf_outb(tf->lbam, io_ports->lbam_addr); 180 if (task->tf_flags & IDE_TFLAG_OUT_LBAH) 181 tf_outb(tf->lbah, io_ports->lbah_addr); 182 183 if (task->tf_flags & IDE_TFLAG_OUT_DEVICE) 184 tf_outb((tf->device & HIHI) | drive->select, 185 io_ports->device_addr); 186} 187EXPORT_SYMBOL_GPL(ide_tf_load); 188 189void ide_tf_read(ide_drive_t *drive, ide_task_t *task) 190{ 191 ide_hwif_t *hwif = drive->hwif; 192 struct ide_io_ports *io_ports = &hwif->io_ports; 193 struct ide_taskfile *tf = &task->tf; 194 void (*tf_outb)(u8 addr, unsigned long port); 195 u8 (*tf_inb)(unsigned long port); 196 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 197 198 if (mmio) { 199 tf_outb = ide_mm_outb; 200 tf_inb = ide_mm_inb; 201 } else { 202 tf_outb = ide_outb; 203 tf_inb = ide_inb; 204 } 205 206 if (task->tf_flags & IDE_TFLAG_IN_DATA) { 207 u16 data; 208 209 if (mmio) 210 data = readw((void __iomem *)io_ports->data_addr); 211 else 212 data = inw(io_ports->data_addr); 213 214 tf->data = data & 0xff; 215 tf->hob_data = (data >> 8) & 0xff; 216 } 217 218 /* be sure we're looking at the low order bits */ 219 tf_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr); 220 221 if (task->tf_flags & IDE_TFLAG_IN_FEATURE) 222 tf->feature = tf_inb(io_ports->feature_addr); 223 if (task->tf_flags & IDE_TFLAG_IN_NSECT) 224 tf->nsect = tf_inb(io_ports->nsect_addr); 225 if (task->tf_flags & IDE_TFLAG_IN_LBAL) 226 tf->lbal = tf_inb(io_ports->lbal_addr); 227 if (task->tf_flags & IDE_TFLAG_IN_LBAM) 228 tf->lbam = tf_inb(io_ports->lbam_addr); 229 if (task->tf_flags & IDE_TFLAG_IN_LBAH) 230 tf->lbah = tf_inb(io_ports->lbah_addr); 231 if (task->tf_flags & IDE_TFLAG_IN_DEVICE) 232 tf->device = tf_inb(io_ports->device_addr); 233 234 if (task->tf_flags & IDE_TFLAG_LBA48) { 235 tf_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr); 236 237 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE) 238 tf->hob_feature = tf_inb(io_ports->feature_addr); 239 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT) 240 tf->hob_nsect = tf_inb(io_ports->nsect_addr); 241 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL) 242 tf->hob_lbal = tf_inb(io_ports->lbal_addr); 243 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM) 244 tf->hob_lbam = tf_inb(io_ports->lbam_addr); 245 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH) 246 tf->hob_lbah = tf_inb(io_ports->lbah_addr); 247 } 248} 249EXPORT_SYMBOL_GPL(ide_tf_read); 250 251/* 252 * Some localbus EIDE interfaces require a special access sequence 253 * when using 32-bit I/O instructions to transfer data. We call this 254 * the "vlb_sync" sequence, which consists of three successive reads 255 * of the sector count register location, with interrupts disabled 256 * to ensure that the reads all happen together. 257 */ 258static void ata_vlb_sync(unsigned long port) 259{ 260 (void)inb(port); 261 (void)inb(port); 262 (void)inb(port); 263} 264 265/* 266 * This is used for most PIO data transfers *from* the IDE interface 267 * 268 * These routines will round up any request for an odd number of bytes, 269 * so if an odd len is specified, be sure that there's at least one 270 * extra byte allocated for the buffer. 271 */ 272void ide_input_data(ide_drive_t *drive, struct request *rq, void *buf, 273 unsigned int len) 274{ 275 ide_hwif_t *hwif = drive->hwif; 276 struct ide_io_ports *io_ports = &hwif->io_ports; 277 unsigned long data_addr = io_ports->data_addr; 278 u8 io_32bit = drive->io_32bit; 279 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 280 281 len++; 282 283 if (io_32bit) { 284 unsigned long uninitialized_var(flags); 285 286 if ((io_32bit & 2) && !mmio) { 287 local_irq_save(flags); 288 ata_vlb_sync(io_ports->nsect_addr); 289 } 290 291 if (mmio) 292 __ide_mm_insl((void __iomem *)data_addr, buf, len / 4); 293 else 294 insl(data_addr, buf, len / 4); 295 296 if ((io_32bit & 2) && !mmio) 297 local_irq_restore(flags); 298 299 if ((len & 3) >= 2) { 300 if (mmio) 301 __ide_mm_insw((void __iomem *)data_addr, 302 (u8 *)buf + (len & ~3), 1); 303 else 304 insw(data_addr, (u8 *)buf + (len & ~3), 1); 305 } 306 } else { 307 if (mmio) 308 __ide_mm_insw((void __iomem *)data_addr, buf, len / 2); 309 else 310 insw(data_addr, buf, len / 2); 311 } 312} 313EXPORT_SYMBOL_GPL(ide_input_data); 314 315/* 316 * This is used for most PIO data transfers *to* the IDE interface 317 */ 318void ide_output_data(ide_drive_t *drive, struct request *rq, void *buf, 319 unsigned int len) 320{ 321 ide_hwif_t *hwif = drive->hwif; 322 struct ide_io_ports *io_ports = &hwif->io_ports; 323 unsigned long data_addr = io_ports->data_addr; 324 u8 io_32bit = drive->io_32bit; 325 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 326 327 if (io_32bit) { 328 unsigned long uninitialized_var(flags); 329 330 if ((io_32bit & 2) && !mmio) { 331 local_irq_save(flags); 332 ata_vlb_sync(io_ports->nsect_addr); 333 } 334 335 if (mmio) 336 __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4); 337 else 338 outsl(data_addr, buf, len / 4); 339 340 if ((io_32bit & 2) && !mmio) 341 local_irq_restore(flags); 342 343 if ((len & 3) >= 2) { 344 if (mmio) 345 __ide_mm_outsw((void __iomem *)data_addr, 346 (u8 *)buf + (len & ~3), 1); 347 else 348 outsw(data_addr, (u8 *)buf + (len & ~3), 1); 349 } 350 } else { 351 if (mmio) 352 __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2); 353 else 354 outsw(data_addr, buf, len / 2); 355 } 356} 357EXPORT_SYMBOL_GPL(ide_output_data); 358 359u8 ide_read_error(ide_drive_t *drive) 360{ 361 ide_task_t task; 362 363 memset(&task, 0, sizeof(task)); 364 task.tf_flags = IDE_TFLAG_IN_FEATURE; 365 366 drive->hwif->tp_ops->tf_read(drive, &task); 367 368 return task.tf.error; 369} 370EXPORT_SYMBOL_GPL(ide_read_error); 371 372void ide_read_bcount_and_ireason(ide_drive_t *drive, u16 *bcount, u8 *ireason) 373{ 374 ide_task_t task; 375 376 memset(&task, 0, sizeof(task)); 377 task.tf_flags = IDE_TFLAG_IN_LBAH | IDE_TFLAG_IN_LBAM | 378 IDE_TFLAG_IN_NSECT; 379 380 drive->hwif->tp_ops->tf_read(drive, &task); 381 382 *bcount = (task.tf.lbah << 8) | task.tf.lbam; 383 *ireason = task.tf.nsect & 3; 384} 385EXPORT_SYMBOL_GPL(ide_read_bcount_and_ireason); 386 387const struct ide_tp_ops default_tp_ops = { 388 .exec_command = ide_exec_command, 389 .read_status = ide_read_status, 390 .read_altstatus = ide_read_altstatus, 391 .read_sff_dma_status = ide_read_sff_dma_status, 392 393 .set_irq = ide_set_irq, 394 395 .tf_load = ide_tf_load, 396 .tf_read = ide_tf_read, 397 398 .input_data = ide_input_data, 399 .output_data = ide_output_data, 400}; 401 402void ide_fix_driveid(u16 *id) 403{ 404#ifndef __LITTLE_ENDIAN 405# ifdef __BIG_ENDIAN 406 int i; 407 408 for (i = 0; i < 256; i++) 409 id[i] = __le16_to_cpu(id[i]); 410# else 411# error "Please fix <asm/byteorder.h>" 412# endif 413#endif 414} 415 416/* 417 * ide_fixstring() cleans up and (optionally) byte-swaps a text string, 418 * removing leading/trailing blanks and compressing internal blanks. 419 * It is primarily used to tidy up the model name/number fields as 420 * returned by the ATA_CMD_ID_ATA[PI] commands. 421 */ 422 423void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 424{ 425 u8 *p, *end = &s[bytecount & ~1]; /* bytecount must be even */ 426 427 if (byteswap) { 428 /* convert from big-endian to host byte order */ 429 for (p = s ; p != end ; p += 2) 430 be16_to_cpus((u16 *) p); 431 } 432 433 /* strip leading blanks */ 434 p = s; 435 while (s != end && *s == ' ') 436 ++s; 437 /* compress internal blanks and strip trailing blanks */ 438 while (s != end && *s) { 439 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 440 *p++ = *(s-1); 441 } 442 /* wipe out trailing garbage */ 443 while (p != end) 444 *p++ = '\0'; 445} 446 447EXPORT_SYMBOL(ide_fixstring); 448 449/* 450 * Needed for PCI irq sharing 451 */ 452int drive_is_ready (ide_drive_t *drive) 453{ 454 ide_hwif_t *hwif = drive->hwif; 455 u8 stat = 0; 456 457 if (drive->waiting_for_dma) 458 return hwif->dma_ops->dma_test_irq(drive); 459 460 /* 461 * We do a passive status test under shared PCI interrupts on 462 * cards that truly share the ATA side interrupt, but may also share 463 * an interrupt with another pci card/device. We make no assumptions 464 * about possible isa-pnp and pci-pnp issues yet. 465 */ 466 if (hwif->io_ports.ctl_addr && 467 (hwif->host_flags & IDE_HFLAG_BROKEN_ALTSTATUS) == 0) 468 stat = hwif->tp_ops->read_altstatus(hwif); 469 else 470 /* Note: this may clear a pending IRQ!! */ 471 stat = hwif->tp_ops->read_status(hwif); 472 473 if (stat & ATA_BUSY) 474 /* drive busy: definitely not interrupting */ 475 return 0; 476 477 /* drive ready: *might* be interrupting */ 478 return 1; 479} 480 481EXPORT_SYMBOL(drive_is_ready); 482 483/* 484 * This routine busy-waits for the drive status to be not "busy". 485 * It then checks the status for all of the "good" bits and none 486 * of the "bad" bits, and if all is okay it returns 0. All other 487 * cases return error -- caller may then invoke ide_error(). 488 * 489 * This routine should get fixed to not hog the cpu during extra long waits.. 490 * That could be done by busy-waiting for the first jiffy or two, and then 491 * setting a timer to wake up at half second intervals thereafter, 492 * until timeout is achieved, before timing out. 493 */ 494static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) 495{ 496 ide_hwif_t *hwif = drive->hwif; 497 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 498 unsigned long flags; 499 int i; 500 u8 stat; 501 502 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 503 stat = tp_ops->read_status(hwif); 504 505 if (stat & ATA_BUSY) { 506 local_irq_save(flags); 507 local_irq_enable_in_hardirq(); 508 timeout += jiffies; 509 while ((stat = tp_ops->read_status(hwif)) & ATA_BUSY) { 510 if (time_after(jiffies, timeout)) { 511 /* 512 * One last read after the timeout in case 513 * heavy interrupt load made us not make any 514 * progress during the timeout.. 515 */ 516 stat = tp_ops->read_status(hwif); 517 if ((stat & ATA_BUSY) == 0) 518 break; 519 520 local_irq_restore(flags); 521 *rstat = stat; 522 return -EBUSY; 523 } 524 } 525 local_irq_restore(flags); 526 } 527 /* 528 * Allow status to settle, then read it again. 529 * A few rare drives vastly violate the 400ns spec here, 530 * so we'll wait up to 10usec for a "good" status 531 * rather than expensively fail things immediately. 532 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 533 */ 534 for (i = 0; i < 10; i++) { 535 udelay(1); 536 stat = tp_ops->read_status(hwif); 537 538 if (OK_STAT(stat, good, bad)) { 539 *rstat = stat; 540 return 0; 541 } 542 } 543 *rstat = stat; 544 return -EFAULT; 545} 546 547/* 548 * In case of error returns error value after doing "*startstop = ide_error()". 549 * The caller should return the updated value of "startstop" in this case, 550 * "startstop" is unchanged when the function returns 0. 551 */ 552int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 553{ 554 int err; 555 u8 stat; 556 557 /* bail early if we've exceeded max_failures */ 558 if (drive->max_failures && (drive->failures > drive->max_failures)) { 559 *startstop = ide_stopped; 560 return 1; 561 } 562 563 err = __ide_wait_stat(drive, good, bad, timeout, &stat); 564 565 if (err) { 566 char *s = (err == -EBUSY) ? "status timeout" : "status error"; 567 *startstop = ide_error(drive, s, stat); 568 } 569 570 return err; 571} 572 573EXPORT_SYMBOL(ide_wait_stat); 574 575/** 576 * ide_in_drive_list - look for drive in black/white list 577 * @id: drive identifier 578 * @table: list to inspect 579 * 580 * Look for a drive in the blacklist and the whitelist tables 581 * Returns 1 if the drive is found in the table. 582 */ 583 584int ide_in_drive_list(u16 *id, const struct drive_list_entry *table) 585{ 586 for ( ; table->id_model; table++) 587 if ((!strcmp(table->id_model, (char *)&id[ATA_ID_PROD])) && 588 (!table->id_firmware || 589 strstr((char *)&id[ATA_ID_FW_REV], table->id_firmware))) 590 return 1; 591 return 0; 592} 593 594EXPORT_SYMBOL_GPL(ide_in_drive_list); 595 596/* 597 * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. 598 * We list them here and depend on the device side cable detection for them. 599 * 600 * Some optical devices with the buggy firmwares have the same problem. 601 */ 602static const struct drive_list_entry ivb_list[] = { 603 { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, 604 { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, 605 { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, 606 { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, 607 { "TSSTcorp CDDVDW SH-S202N" , "SB01" }, 608 { "TSSTcorp CDDVDW SH-S202H" , "SB00" }, 609 { "TSSTcorp CDDVDW SH-S202H" , "SB01" }, 610 { "SAMSUNG SP0822N" , "WA100-10" }, 611 { NULL , NULL } 612}; 613 614/* 615 * All hosts that use the 80c ribbon must use! 616 * The name is derived from upper byte of word 93 and the 80c ribbon. 617 */ 618u8 eighty_ninty_three (ide_drive_t *drive) 619{ 620 ide_hwif_t *hwif = drive->hwif; 621 u16 *id = drive->id; 622 int ivb = ide_in_drive_list(id, ivb_list); 623 624 if (hwif->cbl == ATA_CBL_PATA40_SHORT) 625 return 1; 626 627 if (ivb) 628 printk(KERN_DEBUG "%s: skipping word 93 validity check\n", 629 drive->name); 630 631 if (ata_id_is_sata(id) && !ivb) 632 return 1; 633 634 if (hwif->cbl != ATA_CBL_PATA80 && !ivb) 635 goto no_80w; 636 637 /* 638 * FIXME: 639 * - change master/slave IDENTIFY order 640 * - force bit13 (80c cable present) check also for !ivb devices 641 * (unless the slave device is pre-ATA3) 642 */ 643 if ((id[ATA_ID_HW_CONFIG] & 0x4000) || 644 (ivb && (id[ATA_ID_HW_CONFIG] & 0x2000))) 645 return 1; 646 647no_80w: 648 if (drive->dev_flags & IDE_DFLAG_UDMA33_WARNED) 649 return 0; 650 651 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 652 "limiting max speed to UDMA33\n", 653 drive->name, 654 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); 655 656 drive->dev_flags |= IDE_DFLAG_UDMA33_WARNED; 657 658 return 0; 659} 660 661int ide_driveid_update(ide_drive_t *drive) 662{ 663 ide_hwif_t *hwif = drive->hwif; 664 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 665 u16 *id; 666 unsigned long flags; 667 u8 stat; 668 669 /* 670 * Re-read drive->id for possible DMA mode 671 * change (copied from ide-probe.c) 672 */ 673 674 SELECT_MASK(drive, 1); 675 tp_ops->set_irq(hwif, 0); 676 msleep(50); 677 tp_ops->exec_command(hwif, ATA_CMD_ID_ATA); 678 679 if (ide_busy_sleep(hwif, WAIT_WORSTCASE, 1)) { 680 SELECT_MASK(drive, 0); 681 return 0; 682 } 683 684 msleep(50); /* wait for IRQ and ATA_DRQ */ 685 stat = tp_ops->read_status(hwif); 686 687 if (!OK_STAT(stat, ATA_DRQ, BAD_R_STAT)) { 688 SELECT_MASK(drive, 0); 689 printk("%s: CHECK for good STATUS\n", drive->name); 690 return 0; 691 } 692 local_irq_save(flags); 693 SELECT_MASK(drive, 0); 694 id = kmalloc(SECTOR_SIZE, GFP_ATOMIC); 695 if (!id) { 696 local_irq_restore(flags); 697 return 0; 698 } 699 tp_ops->input_data(drive, NULL, id, SECTOR_SIZE); 700 (void)tp_ops->read_status(hwif); /* clear drive IRQ */ 701 local_irq_enable(); 702 local_irq_restore(flags); 703 ide_fix_driveid(id); 704 705 drive->id[ATA_ID_UDMA_MODES] = id[ATA_ID_UDMA_MODES]; 706 drive->id[ATA_ID_MWDMA_MODES] = id[ATA_ID_MWDMA_MODES]; 707 drive->id[ATA_ID_SWDMA_MODES] = id[ATA_ID_SWDMA_MODES]; 708 /* anything more ? */ 709 710 kfree(id); 711 712 if ((drive->dev_flags & IDE_DFLAG_USING_DMA) && ide_id_dma_bug(drive)) 713 ide_dma_off(drive); 714 715 return 1; 716} 717 718int ide_config_drive_speed(ide_drive_t *drive, u8 speed) 719{ 720 ide_hwif_t *hwif = drive->hwif; 721 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 722 u16 *id = drive->id, i; 723 int error = 0; 724 u8 stat; 725 ide_task_t task; 726 727#ifdef CONFIG_BLK_DEV_IDEDMA 728 if (hwif->dma_ops) /* check if host supports DMA */ 729 hwif->dma_ops->dma_host_set(drive, 0); 730#endif 731 732 /* Skip setting PIO flow-control modes on pre-EIDE drives */ 733 if ((speed & 0xf8) == XFER_PIO_0 && ata_id_has_iordy(drive->id) == 0) 734 goto skip; 735 736 /* 737 * Don't use ide_wait_cmd here - it will 738 * attempt to set_geometry and recalibrate, 739 * but for some reason these don't work at 740 * this point (lost interrupt). 741 */ 742 /* 743 * Select the drive, and issue the SETFEATURES command 744 */ 745 disable_irq_nosync(hwif->irq); 746 747 /* 748 * FIXME: we race against the running IRQ here if 749 * this is called from non IRQ context. If we use 750 * disable_irq() we hang on the error path. Work 751 * is needed. 752 */ 753 754 udelay(1); 755 SELECT_DRIVE(drive); 756 SELECT_MASK(drive, 1); 757 udelay(1); 758 tp_ops->set_irq(hwif, 0); 759 760 memset(&task, 0, sizeof(task)); 761 task.tf_flags = IDE_TFLAG_OUT_FEATURE | IDE_TFLAG_OUT_NSECT; 762 task.tf.feature = SETFEATURES_XFER; 763 task.tf.nsect = speed; 764 765 tp_ops->tf_load(drive, &task); 766 767 tp_ops->exec_command(hwif, ATA_CMD_SET_FEATURES); 768 769 if (drive->quirk_list == 2) 770 tp_ops->set_irq(hwif, 1); 771 772 error = __ide_wait_stat(drive, drive->ready_stat, 773 ATA_BUSY | ATA_DRQ | ATA_ERR, 774 WAIT_CMD, &stat); 775 776 SELECT_MASK(drive, 0); 777 778 enable_irq(hwif->irq); 779 780 if (error) { 781 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 782 return error; 783 } 784 785 id[ATA_ID_UDMA_MODES] &= ~0xFF00; 786 id[ATA_ID_MWDMA_MODES] &= ~0x0F00; 787 id[ATA_ID_SWDMA_MODES] &= ~0x0F00; 788 789 skip: 790#ifdef CONFIG_BLK_DEV_IDEDMA 791 if (speed >= XFER_SW_DMA_0 && (drive->dev_flags & IDE_DFLAG_USING_DMA)) 792 hwif->dma_ops->dma_host_set(drive, 1); 793 else if (hwif->dma_ops) /* check if host supports DMA */ 794 ide_dma_off_quietly(drive); 795#endif 796 797 if (speed >= XFER_UDMA_0) { 798 i = 1 << (speed - XFER_UDMA_0); 799 id[ATA_ID_UDMA_MODES] |= (i << 8 | i); 800 } else if (speed >= XFER_MW_DMA_0) { 801 i = 1 << (speed - XFER_MW_DMA_0); 802 id[ATA_ID_MWDMA_MODES] |= (i << 8 | i); 803 } else if (speed >= XFER_SW_DMA_0) { 804 i = 1 << (speed - XFER_SW_DMA_0); 805 id[ATA_ID_SWDMA_MODES] |= (i << 8 | i); 806 } 807 808 if (!drive->init_speed) 809 drive->init_speed = speed; 810 drive->current_speed = speed; 811 return error; 812} 813 814/* 815 * This should get invoked any time we exit the driver to 816 * wait for an interrupt response from a drive. handler() points 817 * at the appropriate code to handle the next interrupt, and a 818 * timer is started to prevent us from waiting forever in case 819 * something goes wrong (see the ide_timer_expiry() handler later on). 820 * 821 * See also ide_execute_command 822 */ 823static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 824 unsigned int timeout, ide_expiry_t *expiry) 825{ 826 ide_hwif_t *hwif = drive->hwif; 827 828 BUG_ON(hwif->handler); 829 hwif->handler = handler; 830 hwif->expiry = expiry; 831 hwif->timer.expires = jiffies + timeout; 832 hwif->req_gen_timer = hwif->req_gen; 833 add_timer(&hwif->timer); 834} 835 836void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 837 unsigned int timeout, ide_expiry_t *expiry) 838{ 839 ide_hwif_t *hwif = drive->hwif; 840 unsigned long flags; 841 842 spin_lock_irqsave(&hwif->lock, flags); 843 __ide_set_handler(drive, handler, timeout, expiry); 844 spin_unlock_irqrestore(&hwif->lock, flags); 845} 846 847EXPORT_SYMBOL(ide_set_handler); 848 849/** 850 * ide_execute_command - execute an IDE command 851 * @drive: IDE drive to issue the command against 852 * @command: command byte to write 853 * @handler: handler for next phase 854 * @timeout: timeout for command 855 * @expiry: handler to run on timeout 856 * 857 * Helper function to issue an IDE command. This handles the 858 * atomicity requirements, command timing and ensures that the 859 * handler and IRQ setup do not race. All IDE command kick off 860 * should go via this function or do equivalent locking. 861 */ 862 863void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler, 864 unsigned timeout, ide_expiry_t *expiry) 865{ 866 ide_hwif_t *hwif = drive->hwif; 867 unsigned long flags; 868 869 spin_lock_irqsave(&hwif->lock, flags); 870 __ide_set_handler(drive, handler, timeout, expiry); 871 hwif->tp_ops->exec_command(hwif, cmd); 872 /* 873 * Drive takes 400nS to respond, we must avoid the IRQ being 874 * serviced before that. 875 * 876 * FIXME: we could skip this delay with care on non shared devices 877 */ 878 ndelay(400); 879 spin_unlock_irqrestore(&hwif->lock, flags); 880} 881EXPORT_SYMBOL(ide_execute_command); 882 883void ide_execute_pkt_cmd(ide_drive_t *drive) 884{ 885 ide_hwif_t *hwif = drive->hwif; 886 unsigned long flags; 887 888 spin_lock_irqsave(&hwif->lock, flags); 889 hwif->tp_ops->exec_command(hwif, ATA_CMD_PACKET); 890 ndelay(400); 891 spin_unlock_irqrestore(&hwif->lock, flags); 892} 893EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd); 894 895static inline void ide_complete_drive_reset(ide_drive_t *drive, int err) 896{ 897 struct request *rq = drive->hwif->rq; 898 899 if (rq && blk_special_request(rq) && rq->cmd[0] == REQ_DRIVE_RESET) 900 ide_end_request(drive, err ? err : 1, 0); 901} 902 903/* needed below */ 904static ide_startstop_t do_reset1 (ide_drive_t *, int); 905 906/* 907 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 908 * during an atapi drive reset operation. If the drive has not yet responded, 909 * and we have not yet hit our maximum waiting time, then the timer is restarted 910 * for another 50ms. 911 */ 912static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 913{ 914 ide_hwif_t *hwif = drive->hwif; 915 u8 stat; 916 917 SELECT_DRIVE(drive); 918 udelay (10); 919 stat = hwif->tp_ops->read_status(hwif); 920 921 if (OK_STAT(stat, 0, ATA_BUSY)) 922 printk("%s: ATAPI reset complete\n", drive->name); 923 else { 924 if (time_before(jiffies, hwif->poll_timeout)) { 925 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 926 /* continue polling */ 927 return ide_started; 928 } 929 /* end of polling */ 930 hwif->polling = 0; 931 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 932 drive->name, stat); 933 /* do it the old fashioned way */ 934 return do_reset1(drive, 1); 935 } 936 /* done polling */ 937 hwif->polling = 0; 938 ide_complete_drive_reset(drive, 0); 939 return ide_stopped; 940} 941 942static void ide_reset_report_error(ide_hwif_t *hwif, u8 err) 943{ 944 static const char *err_master_vals[] = 945 { NULL, "passed", "formatter device error", 946 "sector buffer error", "ECC circuitry error", 947 "controlling MPU error" }; 948 949 u8 err_master = err & 0x7f; 950 951 printk(KERN_ERR "%s: reset: master: ", hwif->name); 952 if (err_master && err_master < 6) 953 printk(KERN_CONT "%s", err_master_vals[err_master]); 954 else 955 printk(KERN_CONT "error (0x%02x?)", err); 956 if (err & 0x80) 957 printk(KERN_CONT "; slave: failed"); 958 printk(KERN_CONT "\n"); 959} 960 961/* 962 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 963 * during an ide reset operation. If the drives have not yet responded, 964 * and we have not yet hit our maximum waiting time, then the timer is restarted 965 * for another 50ms. 966 */ 967static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 968{ 969 ide_hwif_t *hwif = drive->hwif; 970 const struct ide_port_ops *port_ops = hwif->port_ops; 971 u8 tmp; 972 int err = 0; 973 974 if (port_ops && port_ops->reset_poll) { 975 err = port_ops->reset_poll(drive); 976 if (err) { 977 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 978 hwif->name, drive->name); 979 goto out; 980 } 981 } 982 983 tmp = hwif->tp_ops->read_status(hwif); 984 985 if (!OK_STAT(tmp, 0, ATA_BUSY)) { 986 if (time_before(jiffies, hwif->poll_timeout)) { 987 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 988 /* continue polling */ 989 return ide_started; 990 } 991 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 992 drive->failures++; 993 err = -EIO; 994 } else { 995 tmp = ide_read_error(drive); 996 997 if (tmp == 1) { 998 printk(KERN_INFO "%s: reset: success\n", hwif->name); 999 drive->failures = 0; 1000 } else { 1001 ide_reset_report_error(hwif, tmp); 1002 drive->failures++; 1003 err = -EIO; 1004 } 1005 } 1006out: 1007 hwif->polling = 0; /* done polling */ 1008 ide_complete_drive_reset(drive, err); 1009 return ide_stopped; 1010} 1011 1012static void ide_disk_pre_reset(ide_drive_t *drive) 1013{ 1014 int legacy = (drive->id[ATA_ID_CFS_ENABLE_2] & 0x0400) ? 0 : 1; 1015 1016 drive->special.all = 0; 1017 drive->special.b.set_geometry = legacy; 1018 drive->special.b.recalibrate = legacy; 1019 1020 drive->mult_count = 0; 1021 drive->dev_flags &= ~IDE_DFLAG_PARKED; 1022 1023 if ((drive->dev_flags & IDE_DFLAG_KEEP_SETTINGS) == 0 && 1024 (drive->dev_flags & IDE_DFLAG_USING_DMA) == 0) 1025 drive->mult_req = 0; 1026 1027 if (drive->mult_req != drive->mult_count) 1028 drive->special.b.set_multmode = 1; 1029} 1030 1031static void pre_reset(ide_drive_t *drive) 1032{ 1033 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 1034 1035 if (drive->media == ide_disk) 1036 ide_disk_pre_reset(drive); 1037 else 1038 drive->dev_flags |= IDE_DFLAG_POST_RESET; 1039 1040 if (drive->dev_flags & IDE_DFLAG_USING_DMA) { 1041 if (drive->crc_count) 1042 ide_check_dma_crc(drive); 1043 else 1044 ide_dma_off(drive); 1045 } 1046 1047 if ((drive->dev_flags & IDE_DFLAG_KEEP_SETTINGS) == 0) { 1048 if ((drive->dev_flags & IDE_DFLAG_USING_DMA) == 0) { 1049 drive->dev_flags &= ~IDE_DFLAG_UNMASK; 1050 drive->io_32bit = 0; 1051 } 1052 return; 1053 } 1054 1055 if (port_ops && port_ops->pre_reset) 1056 port_ops->pre_reset(drive); 1057 1058 if (drive->current_speed != 0xff) 1059 drive->desired_speed = drive->current_speed; 1060 drive->current_speed = 0xff; 1061} 1062 1063/* 1064 * do_reset1() attempts to recover a confused drive by resetting it. 1065 * Unfortunately, resetting a disk drive actually resets all devices on 1066 * the same interface, so it can really be thought of as resetting the 1067 * interface rather than resetting the drive. 1068 * 1069 * ATAPI devices have their own reset mechanism which allows them to be 1070 * individually reset without clobbering other devices on the same interface. 1071 * 1072 * Unfortunately, the IDE interface does not generate an interrupt to let 1073 * us know when the reset operation has finished, so we must poll for this. 1074 * Equally poor, though, is the fact that this may a very long time to complete, 1075 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1076 * we set a timer to poll at 50ms intervals. 1077 */ 1078static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1079{ 1080 ide_hwif_t *hwif = drive->hwif; 1081 struct ide_io_ports *io_ports = &hwif->io_ports; 1082 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 1083 const struct ide_port_ops *port_ops; 1084 ide_drive_t *tdrive; 1085 unsigned long flags, timeout; 1086 int i; 1087 DEFINE_WAIT(wait); 1088 1089 spin_lock_irqsave(&hwif->lock, flags); 1090 1091 /* We must not reset with running handlers */ 1092 BUG_ON(hwif->handler != NULL); 1093 1094 /* For an ATAPI device, first try an ATAPI SRST. */ 1095 if (drive->media != ide_disk && !do_not_try_atapi) { 1096 pre_reset(drive); 1097 SELECT_DRIVE(drive); 1098 udelay (20); 1099 tp_ops->exec_command(hwif, ATA_CMD_DEV_RESET); 1100 ndelay(400); 1101 hwif->poll_timeout = jiffies + WAIT_WORSTCASE; 1102 hwif->polling = 1; 1103 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1104 spin_unlock_irqrestore(&hwif->lock, flags); 1105 return ide_started; 1106 } 1107 1108 /* We must not disturb devices in the IDE_DFLAG_PARKED state. */ 1109 do { 1110 unsigned long now; 1111 1112 prepare_to_wait(&ide_park_wq, &wait, TASK_UNINTERRUPTIBLE); 1113 timeout = jiffies; 1114 ide_port_for_each_dev(i, tdrive, hwif) { 1115 if (tdrive->dev_flags & IDE_DFLAG_PRESENT && 1116 tdrive->dev_flags & IDE_DFLAG_PARKED && 1117 time_after(tdrive->sleep, timeout)) 1118 timeout = tdrive->sleep; 1119 } 1120 1121 now = jiffies; 1122 if (time_before_eq(timeout, now)) 1123 break; 1124 1125 spin_unlock_irqrestore(&hwif->lock, flags); 1126 timeout = schedule_timeout_uninterruptible(timeout - now); 1127 spin_lock_irqsave(&hwif->lock, flags); 1128 } while (timeout); 1129 finish_wait(&ide_park_wq, &wait); 1130 1131 /* 1132 * First, reset any device state data we were maintaining 1133 * for any of the drives on this interface. 1134 */ 1135 ide_port_for_each_dev(i, tdrive, hwif) 1136 pre_reset(tdrive); 1137 1138 if (io_ports->ctl_addr == 0) { 1139 spin_unlock_irqrestore(&hwif->lock, flags); 1140 ide_complete_drive_reset(drive, -ENXIO); 1141 return ide_stopped; 1142 } 1143 1144 /* 1145 * Note that we also set nIEN while resetting the device, 1146 * to mask unwanted interrupts from the interface during the reset. 1147 * However, due to the design of PC hardware, this will cause an 1148 * immediate interrupt due to the edge transition it produces. 1149 * This single interrupt gives us a "fast poll" for drives that 1150 * recover from reset very quickly, saving us the first 50ms wait time. 1151 * 1152 * TODO: add ->softreset method and stop abusing ->set_irq 1153 */ 1154 /* set SRST and nIEN */ 1155 tp_ops->set_irq(hwif, 4); 1156 /* more than enough time */ 1157 udelay(10); 1158 /* clear SRST, leave nIEN (unless device is on the quirk list) */ 1159 tp_ops->set_irq(hwif, drive->quirk_list == 2); 1160 /* more than enough time */ 1161 udelay(10); 1162 hwif->poll_timeout = jiffies + WAIT_WORSTCASE; 1163 hwif->polling = 1; 1164 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1165 1166 /* 1167 * Some weird controller like resetting themselves to a strange 1168 * state when the disks are reset this way. At least, the Winbond 1169 * 553 documentation says that 1170 */ 1171 port_ops = hwif->port_ops; 1172 if (port_ops && port_ops->resetproc) 1173 port_ops->resetproc(drive); 1174 1175 spin_unlock_irqrestore(&hwif->lock, flags); 1176 return ide_started; 1177} 1178 1179/* 1180 * ide_do_reset() is the entry point to the drive/interface reset code. 1181 */ 1182 1183ide_startstop_t ide_do_reset (ide_drive_t *drive) 1184{ 1185 return do_reset1(drive, 0); 1186} 1187 1188EXPORT_SYMBOL(ide_do_reset); 1189 1190/* 1191 * ide_wait_not_busy() waits for the currently selected device on the hwif 1192 * to report a non-busy status, see comments in ide_probe_port(). 1193 */ 1194int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1195{ 1196 u8 stat = 0; 1197 1198 while(timeout--) { 1199 /* 1200 * Turn this into a schedule() sleep once I'm sure 1201 * about locking issues (2.5 work ?). 1202 */ 1203 mdelay(1); 1204 stat = hwif->tp_ops->read_status(hwif); 1205 if ((stat & ATA_BUSY) == 0) 1206 return 0; 1207 /* 1208 * Assume a value of 0xff means nothing is connected to 1209 * the interface and it doesn't implement the pull-down 1210 * resistor on D7. 1211 */ 1212 if (stat == 0xff) 1213 return -ENODEV; 1214 touch_softlockup_watchdog(); 1215 touch_nmi_watchdog(); 1216 } 1217 return -EBUSY; 1218} 1219